xref: /linux/drivers/net/wireless/realtek/rtw89/ser.c (revision 2f5606afa4c2bcabd45cb34c92faf93ca5ffe75e)
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020  Realtek Corporation
3  */
4 
5 #include <linux/devcoredump.h>
6 
7 #include "cam.h"
8 #include "chan.h"
9 #include "debug.h"
10 #include "fw.h"
11 #include "mac.h"
12 #include "ps.h"
13 #include "reg.h"
14 #include "ser.h"
15 #include "util.h"
16 
17 #define SER_RECFG_TIMEOUT 1000
18 
19 enum ser_evt {
20 	SER_EV_NONE,
21 	SER_EV_STATE_IN,
22 	SER_EV_STATE_OUT,
23 	SER_EV_L1_RESET_PREPARE, /* pre-M0 */
24 	SER_EV_L1_RESET, /* M1 */
25 	SER_EV_DO_RECOVERY, /* M3 */
26 	SER_EV_MAC_RESET_DONE, /* M5 */
27 	SER_EV_L2_RESET,
28 	SER_EV_L2_RECFG_DONE,
29 	SER_EV_L2_RECFG_TIMEOUT,
30 	SER_EV_M1_TIMEOUT,
31 	SER_EV_M3_TIMEOUT,
32 	SER_EV_FW_M5_TIMEOUT,
33 	SER_EV_L0_RESET,
34 	SER_EV_MAXX
35 };
36 
37 enum ser_state {
38 	SER_IDLE_ST,
39 	SER_L1_RESET_PRE_ST,
40 	SER_RESET_TRX_ST,
41 	SER_DO_HCI_ST,
42 	SER_L2_RESET_ST,
43 	SER_ST_MAX_ST
44 };
45 
46 struct ser_msg {
47 	struct list_head list;
48 	u8 event;
49 };
50 
51 struct state_ent {
52 	u8 state;
53 	char *name;
54 	void (*st_func)(struct rtw89_ser *ser, u8 event);
55 };
56 
57 struct event_ent {
58 	u8 event;
59 	char *name;
60 };
61 
62 static char *ser_ev_name(struct rtw89_ser *ser, u8 event)
63 {
64 	if (event < SER_EV_MAXX)
65 		return ser->ev_tbl[event].name;
66 
67 	return "err_ev_name";
68 }
69 
70 static char *ser_st_name(struct rtw89_ser *ser)
71 {
72 	if (ser->state < SER_ST_MAX_ST)
73 		return ser->st_tbl[ser->state].name;
74 
75 	return "err_st_name";
76 }
77 
78 #define RTW89_DEF_SER_CD_TYPE(_name, _type, _size) \
79 struct ser_cd_ ## _name { \
80 	u32 type; \
81 	u32 type_size; \
82 	u64 padding; \
83 	u8 data[_size]; \
84 } __packed; \
85 static void ser_cd_ ## _name ## _init(struct ser_cd_ ## _name *p) \
86 { \
87 	p->type = _type; \
88 	p->type_size = sizeof(p->data); \
89 	p->padding = 0x0123456789abcdef; \
90 }
91 
92 enum rtw89_ser_cd_type {
93 	RTW89_SER_CD_FW_RSVD_PLE	= 0,
94 	RTW89_SER_CD_FW_BACKTRACE	= 1,
95 };
96 
97 RTW89_DEF_SER_CD_TYPE(fw_rsvd_ple,
98 		      RTW89_SER_CD_FW_RSVD_PLE,
99 		      RTW89_FW_RSVD_PLE_SIZE);
100 
101 RTW89_DEF_SER_CD_TYPE(fw_backtrace,
102 		      RTW89_SER_CD_FW_BACKTRACE,
103 		      RTW89_FW_BACKTRACE_MAX_SIZE);
104 
105 struct rtw89_ser_cd_buffer {
106 	struct ser_cd_fw_rsvd_ple fwple;
107 	struct ser_cd_fw_backtrace fwbt;
108 } __packed;
109 
110 static struct rtw89_ser_cd_buffer *rtw89_ser_cd_prep(struct rtw89_dev *rtwdev)
111 {
112 	struct rtw89_ser_cd_buffer *buf;
113 
114 	buf = vzalloc(sizeof(*buf));
115 	if (!buf)
116 		return NULL;
117 
118 	ser_cd_fw_rsvd_ple_init(&buf->fwple);
119 	ser_cd_fw_backtrace_init(&buf->fwbt);
120 
121 	return buf;
122 }
123 
124 static void rtw89_ser_cd_send(struct rtw89_dev *rtwdev,
125 			      struct rtw89_ser_cd_buffer *buf)
126 {
127 	rtw89_debug(rtwdev, RTW89_DBG_SER, "SER sends core dump\n");
128 
129 	/* After calling dev_coredump, buf's lifetime is supposed to be
130 	 * handled by the device coredump framework. Note that a new dump
131 	 * will be discarded if a previous one hasn't been released by
132 	 * framework yet.
133 	 */
134 	dev_coredumpv(rtwdev->dev, buf, sizeof(*buf), GFP_KERNEL);
135 }
136 
137 static void rtw89_ser_cd_free(struct rtw89_dev *rtwdev,
138 			      struct rtw89_ser_cd_buffer *buf, bool free_self)
139 {
140 	if (!free_self)
141 		return;
142 
143 	rtw89_debug(rtwdev, RTW89_DBG_SER, "SER frees core dump by self\n");
144 
145 	/* When some problems happen during filling data of core dump,
146 	 * we won't send it to device coredump framework. Instead, we
147 	 * free buf by ourselves.
148 	 */
149 	vfree(buf);
150 }
151 
152 static void ser_state_run(struct rtw89_ser *ser, u8 evt)
153 {
154 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
155 
156 	rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s receive %s\n",
157 		    ser_st_name(ser), ser_ev_name(ser, evt));
158 
159 	wiphy_lock(rtwdev->hw->wiphy);
160 	rtw89_leave_lps(rtwdev);
161 	wiphy_unlock(rtwdev->hw->wiphy);
162 
163 	ser->st_tbl[ser->state].st_func(ser, evt);
164 }
165 
166 static void ser_state_goto(struct rtw89_ser *ser, u8 new_state)
167 {
168 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
169 
170 	if (ser->state == new_state || new_state >= SER_ST_MAX_ST)
171 		return;
172 	ser_state_run(ser, SER_EV_STATE_OUT);
173 
174 	rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s goto -> %s\n",
175 		    ser_st_name(ser), ser->st_tbl[new_state].name);
176 
177 	ser->state = new_state;
178 	ser_state_run(ser, SER_EV_STATE_IN);
179 }
180 
181 static struct ser_msg *__rtw89_ser_dequeue_msg(struct rtw89_ser *ser)
182 {
183 	struct ser_msg *msg;
184 
185 	spin_lock_irq(&ser->msg_q_lock);
186 	msg = list_first_entry_or_null(&ser->msg_q, struct ser_msg, list);
187 	if (msg)
188 		list_del(&msg->list);
189 	spin_unlock_irq(&ser->msg_q_lock);
190 
191 	return msg;
192 }
193 
194 static void rtw89_ser_hdl_work(struct work_struct *work)
195 {
196 	struct ser_msg *msg;
197 	struct rtw89_ser *ser = container_of(work, struct rtw89_ser,
198 					     ser_hdl_work);
199 
200 	while ((msg = __rtw89_ser_dequeue_msg(ser))) {
201 		ser_state_run(ser, msg->event);
202 		kfree(msg);
203 	}
204 }
205 
206 static int ser_send_msg(struct rtw89_ser *ser, u8 event)
207 {
208 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
209 	struct ser_msg *msg = NULL;
210 
211 	if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags))
212 		return -EIO;
213 
214 	msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
215 	if (!msg)
216 		return -ENOMEM;
217 
218 	msg->event = event;
219 
220 	spin_lock_irq(&ser->msg_q_lock);
221 	list_add(&msg->list, &ser->msg_q);
222 	spin_unlock_irq(&ser->msg_q_lock);
223 
224 	ieee80211_queue_work(rtwdev->hw, &ser->ser_hdl_work);
225 	return 0;
226 }
227 
228 static void rtw89_ser_alarm_work(struct work_struct *work)
229 {
230 	struct rtw89_ser *ser = container_of(work, struct rtw89_ser,
231 					     ser_alarm_work.work);
232 
233 	ser_send_msg(ser, ser->alarm_event);
234 	ser->alarm_event = SER_EV_NONE;
235 }
236 
237 static void ser_set_alarm(struct rtw89_ser *ser, u32 ms, u8 event)
238 {
239 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
240 
241 	if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags))
242 		return;
243 
244 	ser->alarm_event = event;
245 	ieee80211_queue_delayed_work(rtwdev->hw, &ser->ser_alarm_work,
246 				     msecs_to_jiffies(ms));
247 }
248 
249 static void ser_del_alarm(struct rtw89_ser *ser)
250 {
251 	cancel_delayed_work(&ser->ser_alarm_work);
252 	ser->alarm_event = SER_EV_NONE;
253 }
254 
255 /* driver function */
256 static void drv_stop_tx(struct rtw89_ser *ser)
257 {
258 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
259 
260 	ieee80211_stop_queues(rtwdev->hw);
261 	set_bit(RTW89_SER_DRV_STOP_TX, ser->flags);
262 }
263 
264 static void drv_stop_rx(struct rtw89_ser *ser)
265 {
266 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
267 
268 	clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
269 	set_bit(RTW89_SER_DRV_STOP_RX, ser->flags);
270 }
271 
272 static void drv_trx_reset(struct rtw89_ser *ser)
273 {
274 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
275 
276 	rtw89_hci_reset(rtwdev);
277 }
278 
279 static void drv_resume_tx(struct rtw89_ser *ser)
280 {
281 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
282 
283 	if (!test_bit(RTW89_SER_DRV_STOP_TX, ser->flags))
284 		return;
285 
286 	ieee80211_wake_queues(rtwdev->hw);
287 	clear_bit(RTW89_SER_DRV_STOP_TX, ser->flags);
288 }
289 
290 static void drv_resume_rx(struct rtw89_ser *ser)
291 {
292 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
293 
294 	if (!test_bit(RTW89_SER_DRV_STOP_RX, ser->flags))
295 		return;
296 
297 	set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
298 	clear_bit(RTW89_SER_DRV_STOP_RX, ser->flags);
299 }
300 
301 static void ser_reset_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
302 {
303 	struct rtw89_vif_link *rtwvif_link;
304 	unsigned int link_id;
305 
306 	rtwvif->tdls_peer = 0;
307 
308 	rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id) {
309 		rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif_link->port);
310 		rtwvif_link->net_type = RTW89_NET_TYPE_NO_LINK;
311 		rtwvif_link->trigger = false;
312 		rtwvif_link->rand_tsf_done = false;
313 
314 		rtw89_p2p_noa_once_deinit(rtwvif_link);
315 	}
316 }
317 
318 static void ser_sta_deinit_cam_iter(void *data, struct ieee80211_sta *sta)
319 {
320 	struct rtw89_vif *target_rtwvif = (struct rtw89_vif *)data;
321 	struct rtw89_sta *rtwsta = sta_to_rtwsta(sta);
322 	struct rtw89_vif *rtwvif = rtwsta->rtwvif;
323 	struct rtw89_dev *rtwdev = rtwvif->rtwdev;
324 	struct rtw89_vif_link *rtwvif_link;
325 	struct rtw89_sta_link *rtwsta_link;
326 	unsigned int link_id;
327 
328 	if (rtwvif != target_rtwvif)
329 		return;
330 
331 	rtw89_sta_for_each_link(rtwsta, rtwsta_link, link_id) {
332 		rtwvif_link = rtwsta_link->rtwvif_link;
333 
334 		if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE || sta->tdls)
335 			rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta_link->addr_cam);
336 		if (sta->tdls)
337 			rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta_link->bssid_cam);
338 
339 		INIT_LIST_HEAD(&rtwsta_link->ba_cam_list);
340 	}
341 }
342 
343 static void ser_deinit_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
344 {
345 	struct rtw89_vif_link *rtwvif_link;
346 	unsigned int link_id;
347 
348 	ieee80211_iterate_stations_atomic(rtwdev->hw,
349 					  ser_sta_deinit_cam_iter,
350 					  rtwvif);
351 
352 	rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id)
353 		rtw89_cam_deinit(rtwdev, rtwvif_link);
354 
355 	bitmap_zero(rtwdev->cam_info.ba_cam_map, RTW89_MAX_BA_CAM_NUM);
356 }
357 
358 static void ser_reset_mac_binding(struct rtw89_dev *rtwdev)
359 {
360 	struct rtw89_vif *rtwvif;
361 
362 	rtw89_cam_reset_keys(rtwdev);
363 	rtw89_for_each_rtwvif(rtwdev, rtwvif)
364 		ser_deinit_cam(rtwdev, rtwvif);
365 
366 	rtw89_core_release_all_bits_map(rtwdev->mac_id_map, RTW89_MAX_MAC_ID_NUM);
367 	rtw89_for_each_rtwvif(rtwdev, rtwvif)
368 		ser_reset_vif(rtwdev, rtwvif);
369 
370 	rtwdev->total_sta_assoc = 0;
371 	refcount_set(&rtwdev->refcount_ap_info, 0);
372 }
373 
374 /* hal function */
375 static int hal_enable_dma(struct rtw89_ser *ser)
376 {
377 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
378 	int ret;
379 
380 	if (!test_bit(RTW89_SER_HAL_STOP_DMA, ser->flags))
381 		return 0;
382 
383 	if (!rtwdev->hci.ops->mac_lv1_rcvy)
384 		return -EIO;
385 
386 	ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_2);
387 	if (!ret)
388 		clear_bit(RTW89_SER_HAL_STOP_DMA, ser->flags);
389 	else
390 		rtw89_debug(rtwdev, RTW89_DBG_SER,
391 			    "lv1 rcvy fail to start dma: %d\n", ret);
392 
393 	return ret;
394 }
395 
396 static int hal_stop_dma(struct rtw89_ser *ser)
397 {
398 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
399 	int ret;
400 
401 	if (!rtwdev->hci.ops->mac_lv1_rcvy)
402 		return -EIO;
403 
404 	ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_1);
405 	if (!ret)
406 		set_bit(RTW89_SER_HAL_STOP_DMA, ser->flags);
407 	else
408 		rtw89_debug(rtwdev, RTW89_DBG_SER,
409 			    "lv1 rcvy fail to stop dma: %d\n", ret);
410 
411 	return ret;
412 }
413 
414 static void hal_send_post_m0_event(struct rtw89_ser *ser)
415 {
416 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
417 
418 	rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RESET_START_DMAC);
419 }
420 
421 static void hal_send_m2_event(struct rtw89_ser *ser)
422 {
423 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
424 
425 	rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_DISABLE_EN);
426 }
427 
428 static void hal_send_m4_event(struct rtw89_ser *ser)
429 {
430 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
431 
432 	rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RCVY_EN);
433 }
434 
435 /* state handler */
436 static void ser_idle_st_hdl(struct rtw89_ser *ser, u8 evt)
437 {
438 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
439 
440 	switch (evt) {
441 	case SER_EV_STATE_IN:
442 		rtw89_hci_recovery_complete(rtwdev);
443 		clear_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags);
444 		clear_bit(RTW89_FLAG_CRASH_SIMULATING, rtwdev->flags);
445 		break;
446 	case SER_EV_L1_RESET_PREPARE:
447 		ser_state_goto(ser, SER_L1_RESET_PRE_ST);
448 		break;
449 	case SER_EV_L1_RESET:
450 		ser_state_goto(ser, SER_RESET_TRX_ST);
451 		break;
452 	case SER_EV_L2_RESET:
453 		ser_state_goto(ser, SER_L2_RESET_ST);
454 		break;
455 	case SER_EV_STATE_OUT:
456 		set_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags);
457 		rtw89_hci_recovery_start(rtwdev);
458 		break;
459 	default:
460 		break;
461 	}
462 }
463 
464 static void ser_l1_reset_pre_st_hdl(struct rtw89_ser *ser, u8 evt)
465 {
466 	switch (evt) {
467 	case SER_EV_STATE_IN:
468 		ser->prehandle_l1 = true;
469 		hal_send_post_m0_event(ser);
470 		ser_set_alarm(ser, 1000, SER_EV_M1_TIMEOUT);
471 		break;
472 	case SER_EV_L1_RESET:
473 		ser_state_goto(ser, SER_RESET_TRX_ST);
474 		break;
475 	case SER_EV_M1_TIMEOUT:
476 		ser_state_goto(ser, SER_L2_RESET_ST);
477 		break;
478 	case SER_EV_STATE_OUT:
479 		ser_del_alarm(ser);
480 		break;
481 	default:
482 		break;
483 	}
484 }
485 
486 static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt)
487 {
488 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
489 	struct wiphy *wiphy = rtwdev->hw->wiphy;
490 
491 	switch (evt) {
492 	case SER_EV_STATE_IN:
493 		wiphy_lock(wiphy);
494 		wiphy_delayed_work_cancel(wiphy, &rtwdev->track_work);
495 		wiphy_unlock(wiphy);
496 		drv_stop_tx(ser);
497 
498 		if (hal_stop_dma(ser)) {
499 			ser_state_goto(ser, SER_L2_RESET_ST);
500 			break;
501 		}
502 
503 		drv_stop_rx(ser);
504 		drv_trx_reset(ser);
505 
506 		/* wait m3 */
507 		hal_send_m2_event(ser);
508 
509 		/* set alarm to prevent FW response timeout */
510 		ser_set_alarm(ser, 1000, SER_EV_M3_TIMEOUT);
511 		break;
512 
513 	case SER_EV_DO_RECOVERY:
514 		ser_state_goto(ser, SER_DO_HCI_ST);
515 		break;
516 
517 	case SER_EV_M3_TIMEOUT:
518 		ser_state_goto(ser, SER_L2_RESET_ST);
519 		break;
520 
521 	case SER_EV_STATE_OUT:
522 		ser_del_alarm(ser);
523 		hal_enable_dma(ser);
524 		drv_resume_rx(ser);
525 		drv_resume_tx(ser);
526 		wiphy_delayed_work_queue(wiphy, &rtwdev->track_work,
527 					 RTW89_TRACK_WORK_PERIOD);
528 		break;
529 
530 	default:
531 		break;
532 	}
533 }
534 
535 static void ser_do_hci_st_hdl(struct rtw89_ser *ser, u8 evt)
536 {
537 	switch (evt) {
538 	case SER_EV_STATE_IN:
539 		/* wait m5 */
540 		hal_send_m4_event(ser);
541 
542 		/* prevent FW response timeout */
543 		ser_set_alarm(ser, 1000, SER_EV_FW_M5_TIMEOUT);
544 		break;
545 
546 	case SER_EV_FW_M5_TIMEOUT:
547 		ser_state_goto(ser, SER_L2_RESET_ST);
548 		break;
549 
550 	case SER_EV_MAC_RESET_DONE:
551 		ser_state_goto(ser, SER_IDLE_ST);
552 		break;
553 
554 	case SER_EV_STATE_OUT:
555 		ser_del_alarm(ser);
556 		break;
557 
558 	default:
559 		break;
560 	}
561 }
562 
563 static void ser_mac_mem_dump(struct rtw89_dev *rtwdev, u8 *buf,
564 			     u8 sel, u32 start_addr, u32 len)
565 {
566 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
567 	u32 filter_model_addr = mac->filter_model_addr;
568 	u32 indir_access_addr = mac->indir_access_addr;
569 	u32 *ptr = (u32 *)buf;
570 	u32 base_addr, start_page, residue;
571 	u32 cnt = 0;
572 	u32 i;
573 
574 	start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE;
575 	residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE;
576 	base_addr = mac->mem_base_addrs[sel];
577 	base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE;
578 
579 	while (cnt < len) {
580 		rtw89_write32(rtwdev, filter_model_addr, base_addr);
581 
582 		for (i = indir_access_addr + residue;
583 		     i < indir_access_addr + MAC_MEM_DUMP_PAGE_SIZE;
584 		     i += 4, ptr++) {
585 			*ptr = rtw89_read32(rtwdev, i);
586 			cnt += 4;
587 			if (cnt >= len)
588 				break;
589 		}
590 
591 		residue = 0;
592 		base_addr += MAC_MEM_DUMP_PAGE_SIZE;
593 	}
594 }
595 
596 static void rtw89_ser_fw_rsvd_ple_dump(struct rtw89_dev *rtwdev, u8 *buf)
597 {
598 	u32 start_addr = rtwdev->chip->rsvd_ple_ofst;
599 
600 	rtw89_debug(rtwdev, RTW89_DBG_SER,
601 		    "dump mem for fw rsvd payload engine (start addr: 0x%x)\n",
602 		    start_addr);
603 	ser_mac_mem_dump(rtwdev, buf, RTW89_MAC_MEM_SHARED_BUF, start_addr,
604 			 RTW89_FW_RSVD_PLE_SIZE);
605 }
606 
607 struct __fw_backtrace_entry {
608 	u32 wcpu_addr;
609 	u32 size;
610 	u32 key;
611 } __packed;
612 
613 struct __fw_backtrace_info {
614 	u32 ra;
615 	u32 sp;
616 } __packed;
617 
618 static_assert(RTW89_FW_BACKTRACE_INFO_SIZE ==
619 	      sizeof(struct __fw_backtrace_info));
620 
621 static u32 convert_addr_from_wcpu(u32 wcpu_addr)
622 {
623 	if (wcpu_addr < 0x30000000)
624 		return wcpu_addr;
625 
626 	return wcpu_addr & GENMASK(28, 0);
627 }
628 
629 static int rtw89_ser_fw_backtrace_dump(struct rtw89_dev *rtwdev, u8 *buf,
630 				       const struct __fw_backtrace_entry *ent)
631 {
632 	struct __fw_backtrace_info *ptr = (struct __fw_backtrace_info *)buf;
633 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
634 	u32 filter_model_addr = mac->filter_model_addr;
635 	u32 indir_access_addr = mac->indir_access_addr;
636 	u32 fwbt_addr = convert_addr_from_wcpu(ent->wcpu_addr);
637 	u32 fwbt_size = ent->size;
638 	u32 fwbt_key = ent->key;
639 	u32 i;
640 
641 	if (fwbt_addr == 0) {
642 		rtw89_warn(rtwdev, "FW backtrace invalid address: 0x%x\n",
643 			   fwbt_addr);
644 		return -EINVAL;
645 	}
646 
647 	if (fwbt_key != RTW89_FW_BACKTRACE_KEY) {
648 		rtw89_warn(rtwdev, "FW backtrace invalid key: 0x%x\n",
649 			   fwbt_key);
650 		return -EINVAL;
651 	}
652 
653 	if (fwbt_size == 0 || !RTW89_VALID_FW_BACKTRACE_SIZE(fwbt_size) ||
654 	    fwbt_size > RTW89_FW_BACKTRACE_MAX_SIZE) {
655 		rtw89_warn(rtwdev, "FW backtrace invalid size: 0x%x\n",
656 			   fwbt_size);
657 		return -EINVAL;
658 	}
659 
660 	rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace start\n");
661 	rtw89_write32(rtwdev, filter_model_addr, fwbt_addr);
662 
663 	for (i = indir_access_addr;
664 	     i < indir_access_addr + fwbt_size;
665 	     i += RTW89_FW_BACKTRACE_INFO_SIZE, ptr++) {
666 		*ptr = (struct __fw_backtrace_info){
667 			.ra = rtw89_read32(rtwdev, i),
668 			.sp = rtw89_read32(rtwdev, i + 4),
669 		};
670 		rtw89_debug(rtwdev, RTW89_DBG_SER,
671 			    "next sp: 0x%x, next ra: 0x%x\n",
672 			    ptr->sp, ptr->ra);
673 	}
674 
675 	rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace end\n");
676 	return 0;
677 }
678 
679 static void ser_l2_reset_st_pre_hdl(struct rtw89_ser *ser)
680 {
681 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
682 	struct rtw89_ser_cd_buffer *buf;
683 	struct __fw_backtrace_entry fwbt_ent;
684 	int ret = 0;
685 
686 	buf = rtw89_ser_cd_prep(rtwdev);
687 	if (!buf) {
688 		ret = -ENOMEM;
689 		goto bottom;
690 	}
691 
692 	rtw89_ser_fw_rsvd_ple_dump(rtwdev, buf->fwple.data);
693 
694 	fwbt_ent = *(struct __fw_backtrace_entry *)buf->fwple.data;
695 	ret = rtw89_ser_fw_backtrace_dump(rtwdev, buf->fwbt.data, &fwbt_ent);
696 	if (ret)
697 		goto bottom;
698 
699 	rtw89_ser_cd_send(rtwdev, buf);
700 
701 bottom:
702 	rtw89_ser_cd_free(rtwdev, buf, !!ret);
703 
704 	ser_reset_mac_binding(rtwdev);
705 	rtw89_core_stop(rtwdev);
706 	rtw89_entity_init(rtwdev);
707 	rtw89_fw_release_general_pkt_list(rtwdev, false);
708 	INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
709 }
710 
711 static void ser_l2_reset_st_hdl(struct rtw89_ser *ser, u8 evt)
712 {
713 	struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
714 
715 	switch (evt) {
716 	case SER_EV_STATE_IN:
717 		wiphy_lock(rtwdev->hw->wiphy);
718 		ser_l2_reset_st_pre_hdl(ser);
719 		wiphy_unlock(rtwdev->hw->wiphy);
720 
721 		ieee80211_restart_hw(rtwdev->hw);
722 		ser_set_alarm(ser, SER_RECFG_TIMEOUT, SER_EV_L2_RECFG_TIMEOUT);
723 		break;
724 
725 	case SER_EV_L2_RECFG_TIMEOUT:
726 		rtw89_info(rtwdev, "Err: ser L2 re-config timeout\n");
727 		fallthrough;
728 	case SER_EV_L2_RECFG_DONE:
729 		ser_state_goto(ser, SER_IDLE_ST);
730 		break;
731 
732 	case SER_EV_STATE_OUT:
733 		ser_del_alarm(ser);
734 		break;
735 
736 	default:
737 		break;
738 	}
739 }
740 
741 static const struct event_ent ser_ev_tbl[] = {
742 	{SER_EV_NONE, "SER_EV_NONE"},
743 	{SER_EV_STATE_IN, "SER_EV_STATE_IN"},
744 	{SER_EV_STATE_OUT, "SER_EV_STATE_OUT"},
745 	{SER_EV_L1_RESET_PREPARE, "SER_EV_L1_RESET_PREPARE pre-m0"},
746 	{SER_EV_L1_RESET, "SER_EV_L1_RESET m1"},
747 	{SER_EV_DO_RECOVERY, "SER_EV_DO_RECOVERY m3"},
748 	{SER_EV_MAC_RESET_DONE, "SER_EV_MAC_RESET_DONE m5"},
749 	{SER_EV_L2_RESET, "SER_EV_L2_RESET"},
750 	{SER_EV_L2_RECFG_DONE, "SER_EV_L2_RECFG_DONE"},
751 	{SER_EV_L2_RECFG_TIMEOUT, "SER_EV_L2_RECFG_TIMEOUT"},
752 	{SER_EV_M1_TIMEOUT, "SER_EV_M1_TIMEOUT"},
753 	{SER_EV_M3_TIMEOUT, "SER_EV_M3_TIMEOUT"},
754 	{SER_EV_FW_M5_TIMEOUT, "SER_EV_FW_M5_TIMEOUT"},
755 	{SER_EV_L0_RESET, "SER_EV_L0_RESET"},
756 	{SER_EV_MAXX, "SER_EV_MAX"}
757 };
758 
759 static const struct state_ent ser_st_tbl[] = {
760 	{SER_IDLE_ST, "SER_IDLE_ST", ser_idle_st_hdl},
761 	{SER_L1_RESET_PRE_ST, "SER_L1_RESET_PRE_ST", ser_l1_reset_pre_st_hdl},
762 	{SER_RESET_TRX_ST, "SER_RESET_TRX_ST", ser_reset_trx_st_hdl},
763 	{SER_DO_HCI_ST, "SER_DO_HCI_ST", ser_do_hci_st_hdl},
764 	{SER_L2_RESET_ST, "SER_L2_RESET_ST", ser_l2_reset_st_hdl}
765 };
766 
767 int rtw89_ser_init(struct rtw89_dev *rtwdev)
768 {
769 	struct rtw89_ser *ser = &rtwdev->ser;
770 
771 	memset(ser, 0, sizeof(*ser));
772 	INIT_LIST_HEAD(&ser->msg_q);
773 	ser->state = SER_IDLE_ST;
774 	ser->st_tbl = ser_st_tbl;
775 	ser->ev_tbl = ser_ev_tbl;
776 
777 	bitmap_zero(ser->flags, RTW89_NUM_OF_SER_FLAGS);
778 	spin_lock_init(&ser->msg_q_lock);
779 	INIT_WORK(&ser->ser_hdl_work, rtw89_ser_hdl_work);
780 	INIT_DELAYED_WORK(&ser->ser_alarm_work, rtw89_ser_alarm_work);
781 	return 0;
782 }
783 
784 int rtw89_ser_deinit(struct rtw89_dev *rtwdev)
785 {
786 	struct rtw89_ser *ser = (struct rtw89_ser *)&rtwdev->ser;
787 
788 	set_bit(RTW89_SER_DRV_STOP_RUN, ser->flags);
789 	cancel_delayed_work_sync(&ser->ser_alarm_work);
790 	cancel_work_sync(&ser->ser_hdl_work);
791 	clear_bit(RTW89_SER_DRV_STOP_RUN, ser->flags);
792 	return 0;
793 }
794 
795 void rtw89_ser_recfg_done(struct rtw89_dev *rtwdev)
796 {
797 	ser_send_msg(&rtwdev->ser, SER_EV_L2_RECFG_DONE);
798 }
799 
800 int rtw89_ser_notify(struct rtw89_dev *rtwdev, u32 err)
801 {
802 	u8 event = SER_EV_NONE;
803 
804 	rtw89_info(rtwdev, "SER catches error: 0x%x\n", err);
805 
806 	switch (err) {
807 	case MAC_AX_ERR_L1_PREERR_DMAC: /* pre-M0 */
808 		event = SER_EV_L1_RESET_PREPARE;
809 		break;
810 	case MAC_AX_ERR_L1_ERR_DMAC:
811 	case MAC_AX_ERR_L0_PROMOTE_TO_L1:
812 		event = SER_EV_L1_RESET; /* M1 */
813 		break;
814 	case MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE:
815 		event = SER_EV_DO_RECOVERY; /* M3 */
816 		break;
817 	case MAC_AX_ERR_L1_RESET_RECOVERY_DONE:
818 		event = SER_EV_MAC_RESET_DONE; /* M5 */
819 		break;
820 	case MAC_AX_ERR_L0_ERR_CMAC0:
821 	case MAC_AX_ERR_L0_ERR_CMAC1:
822 	case MAC_AX_ERR_L0_RESET_DONE:
823 		event = SER_EV_L0_RESET;
824 		break;
825 	default:
826 		if (err == MAC_AX_ERR_L1_PROMOTE_TO_L2 ||
827 		    (err >= MAC_AX_ERR_L2_ERR_AH_DMA &&
828 		     err <= MAC_AX_GET_ERR_MAX))
829 			event = SER_EV_L2_RESET;
830 		break;
831 	}
832 
833 	if (event == SER_EV_NONE) {
834 		rtw89_warn(rtwdev, "SER cannot recognize error: 0x%x\n", err);
835 		return -EINVAL;
836 	}
837 
838 	ser_send_msg(&rtwdev->ser, event);
839 	return 0;
840 }
841 EXPORT_SYMBOL(rtw89_ser_notify);
842