1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2020 Realtek Corporation 3 */ 4 5 #include "cam.h" 6 #include "coex.h" 7 #include "debug.h" 8 #include "fw.h" 9 #include "mac.h" 10 #include "phy.h" 11 #include "reg.h" 12 13 static struct sk_buff *rtw89_fw_h2c_alloc_skb(u32 len, bool header) 14 { 15 struct sk_buff *skb; 16 u32 header_len = 0; 17 18 if (header) 19 header_len = H2C_HEADER_LEN; 20 21 skb = dev_alloc_skb(len + header_len + 24); 22 if (!skb) 23 return NULL; 24 skb_reserve(skb, header_len + 24); 25 memset(skb->data, 0, len); 26 27 return skb; 28 } 29 30 struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(u32 len) 31 { 32 return rtw89_fw_h2c_alloc_skb(len, true); 33 } 34 35 struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(u32 len) 36 { 37 return rtw89_fw_h2c_alloc_skb(len, false); 38 } 39 40 static u8 _fw_get_rdy(struct rtw89_dev *rtwdev) 41 { 42 u8 val = rtw89_read8(rtwdev, R_AX_WCPU_FW_CTRL); 43 44 return FIELD_GET(B_AX_WCPU_FWDL_STS_MASK, val); 45 } 46 47 #define FWDL_WAIT_CNT 400000 48 int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev) 49 { 50 u8 val; 51 int ret; 52 53 ret = read_poll_timeout_atomic(_fw_get_rdy, val, 54 val == RTW89_FWDL_WCPU_FW_INIT_RDY, 55 1, FWDL_WAIT_CNT, false, rtwdev); 56 if (ret) { 57 switch (val) { 58 case RTW89_FWDL_CHECKSUM_FAIL: 59 rtw89_err(rtwdev, "fw checksum fail\n"); 60 return -EINVAL; 61 62 case RTW89_FWDL_SECURITY_FAIL: 63 rtw89_err(rtwdev, "fw security fail\n"); 64 return -EINVAL; 65 66 case RTW89_FWDL_CV_NOT_MATCH: 67 rtw89_err(rtwdev, "fw cv not match\n"); 68 return -EINVAL; 69 70 default: 71 return -EBUSY; 72 } 73 } 74 75 set_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); 76 77 return 0; 78 } 79 80 static int rtw89_fw_hdr_parser(struct rtw89_dev *rtwdev, const u8 *fw, u32 len, 81 struct rtw89_fw_bin_info *info) 82 { 83 struct rtw89_fw_hdr_section_info *section_info; 84 const u8 *fw_end = fw + len; 85 const u8 *bin; 86 u32 i; 87 88 if (!info) 89 return -EINVAL; 90 91 info->section_num = GET_FW_HDR_SEC_NUM(fw); 92 info->hdr_len = RTW89_FW_HDR_SIZE + 93 info->section_num * RTW89_FW_SECTION_HDR_SIZE; 94 95 bin = fw + info->hdr_len; 96 97 /* jump to section header */ 98 fw += RTW89_FW_HDR_SIZE; 99 section_info = info->section_info; 100 for (i = 0; i < info->section_num; i++) { 101 section_info->len = GET_FWSECTION_HDR_SEC_SIZE(fw); 102 if (GET_FWSECTION_HDR_CHECKSUM(fw)) 103 section_info->len += FWDL_SECTION_CHKSUM_LEN; 104 section_info->redl = GET_FWSECTION_HDR_REDL(fw); 105 section_info->dladdr = 106 GET_FWSECTION_HDR_DL_ADDR(fw) & 0x1fffffff; 107 section_info->addr = bin; 108 bin += section_info->len; 109 fw += RTW89_FW_SECTION_HDR_SIZE; 110 section_info++; 111 } 112 113 if (fw_end != bin) { 114 rtw89_err(rtwdev, "[ERR]fw bin size\n"); 115 return -EINVAL; 116 } 117 118 return 0; 119 } 120 121 static 122 int rtw89_mfw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type, 123 struct rtw89_fw_suit *fw_suit) 124 { 125 struct rtw89_fw_info *fw_info = &rtwdev->fw; 126 const u8 *mfw = fw_info->firmware->data; 127 u32 mfw_len = fw_info->firmware->size; 128 const struct rtw89_mfw_hdr *mfw_hdr = (const struct rtw89_mfw_hdr *)mfw; 129 const struct rtw89_mfw_info *mfw_info; 130 int i; 131 132 if (mfw_hdr->sig != RTW89_MFW_SIG) { 133 rtw89_debug(rtwdev, RTW89_DBG_FW, "use legacy firmware\n"); 134 /* legacy firmware support normal type only */ 135 if (type != RTW89_FW_NORMAL) 136 return -EINVAL; 137 fw_suit->data = mfw; 138 fw_suit->size = mfw_len; 139 return 0; 140 } 141 142 for (i = 0; i < mfw_hdr->fw_nr; i++) { 143 mfw_info = &mfw_hdr->info[i]; 144 if (mfw_info->cv != rtwdev->hal.cv || 145 mfw_info->type != type || 146 mfw_info->mp) 147 continue; 148 149 fw_suit->data = mfw + le32_to_cpu(mfw_info->shift); 150 fw_suit->size = le32_to_cpu(mfw_info->size); 151 return 0; 152 } 153 154 rtw89_err(rtwdev, "no suitable firmware found\n"); 155 return -ENOENT; 156 } 157 158 static void rtw89_fw_update_ver(struct rtw89_dev *rtwdev, 159 enum rtw89_fw_type type, 160 struct rtw89_fw_suit *fw_suit) 161 { 162 const u8 *hdr = fw_suit->data; 163 164 fw_suit->major_ver = GET_FW_HDR_MAJOR_VERSION(hdr); 165 fw_suit->minor_ver = GET_FW_HDR_MINOR_VERSION(hdr); 166 fw_suit->sub_ver = GET_FW_HDR_SUBVERSION(hdr); 167 fw_suit->sub_idex = GET_FW_HDR_SUBINDEX(hdr); 168 fw_suit->build_year = GET_FW_HDR_YEAR(hdr); 169 fw_suit->build_mon = GET_FW_HDR_MONTH(hdr); 170 fw_suit->build_date = GET_FW_HDR_DATE(hdr); 171 fw_suit->build_hour = GET_FW_HDR_HOUR(hdr); 172 fw_suit->build_min = GET_FW_HDR_MIN(hdr); 173 fw_suit->cmd_ver = GET_FW_HDR_CMD_VERSERION(hdr); 174 175 rtw89_info(rtwdev, 176 "Firmware version %u.%u.%u.%u, cmd version %u, type %u\n", 177 fw_suit->major_ver, fw_suit->minor_ver, fw_suit->sub_ver, 178 fw_suit->sub_idex, fw_suit->cmd_ver, type); 179 } 180 181 static 182 int __rtw89_fw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) 183 { 184 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); 185 int ret; 186 187 ret = rtw89_mfw_recognize(rtwdev, type, fw_suit); 188 if (ret) 189 return ret; 190 191 rtw89_fw_update_ver(rtwdev, type, fw_suit); 192 193 return 0; 194 } 195 196 static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev) 197 { 198 const struct rtw89_chip_info *chip = rtwdev->chip; 199 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL); 200 201 if (chip->chip_id == RTL8852A && 202 RTW89_FW_SUIT_VER_CODE(fw_suit) <= RTW89_FW_VER_CODE(0, 13, 29, 0)) 203 rtwdev->fw.old_ht_ra_format = true; 204 } 205 206 int rtw89_fw_recognize(struct rtw89_dev *rtwdev) 207 { 208 int ret; 209 210 ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL); 211 if (ret) 212 return ret; 213 214 /* It still works if wowlan firmware isn't existing. */ 215 __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN); 216 217 rtw89_fw_recognize_features(rtwdev); 218 219 return 0; 220 } 221 222 void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb, 223 u8 type, u8 cat, u8 class, u8 func, 224 bool rack, bool dack, u32 len) 225 { 226 struct fwcmd_hdr *hdr; 227 228 hdr = (struct fwcmd_hdr *)skb_push(skb, 8); 229 230 if (!(rtwdev->fw.h2c_seq % 4)) 231 rack = true; 232 hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) | 233 FIELD_PREP(H2C_HDR_CAT, cat) | 234 FIELD_PREP(H2C_HDR_CLASS, class) | 235 FIELD_PREP(H2C_HDR_FUNC, func) | 236 FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq)); 237 238 hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN, 239 len + H2C_HEADER_LEN) | 240 (rack ? H2C_HDR_REC_ACK : 0) | 241 (dack ? H2C_HDR_DONE_ACK : 0)); 242 243 rtwdev->fw.h2c_seq++; 244 } 245 246 static void rtw89_h2c_pkt_set_hdr_fwdl(struct rtw89_dev *rtwdev, 247 struct sk_buff *skb, 248 u8 type, u8 cat, u8 class, u8 func, 249 u32 len) 250 { 251 struct fwcmd_hdr *hdr; 252 253 hdr = (struct fwcmd_hdr *)skb_push(skb, 8); 254 255 hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) | 256 FIELD_PREP(H2C_HDR_CAT, cat) | 257 FIELD_PREP(H2C_HDR_CLASS, class) | 258 FIELD_PREP(H2C_HDR_FUNC, func) | 259 FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq)); 260 261 hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN, 262 len + H2C_HEADER_LEN)); 263 } 264 265 static int __rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 len) 266 { 267 struct sk_buff *skb; 268 u32 ret = 0; 269 270 skb = rtw89_fw_h2c_alloc_skb_with_hdr(len); 271 if (!skb) { 272 rtw89_err(rtwdev, "failed to alloc skb for fw hdr dl\n"); 273 return -ENOMEM; 274 } 275 276 skb_put_data(skb, fw, len); 277 SET_FW_HDR_PART_SIZE(skb->data, FWDL_SECTION_PER_PKT_LEN); 278 rtw89_h2c_pkt_set_hdr_fwdl(rtwdev, skb, FWCMD_TYPE_H2C, 279 H2C_CAT_MAC, H2C_CL_MAC_FWDL, 280 H2C_FUNC_MAC_FWHDR_DL, len); 281 282 ret = rtw89_h2c_tx(rtwdev, skb, false); 283 if (ret) { 284 rtw89_err(rtwdev, "failed to send h2c\n"); 285 ret = -1; 286 goto fail; 287 } 288 289 return 0; 290 fail: 291 dev_kfree_skb_any(skb); 292 293 return ret; 294 } 295 296 static int rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 len) 297 { 298 u8 val; 299 int ret; 300 301 ret = __rtw89_fw_download_hdr(rtwdev, fw, len); 302 if (ret) { 303 rtw89_err(rtwdev, "[ERR]FW header download\n"); 304 return ret; 305 } 306 307 ret = read_poll_timeout_atomic(rtw89_read8, val, val & B_AX_FWDL_PATH_RDY, 308 1, FWDL_WAIT_CNT, false, 309 rtwdev, R_AX_WCPU_FW_CTRL); 310 if (ret) { 311 rtw89_err(rtwdev, "[ERR]FWDL path ready\n"); 312 return ret; 313 } 314 315 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); 316 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); 317 318 return 0; 319 } 320 321 static int __rtw89_fw_download_main(struct rtw89_dev *rtwdev, 322 struct rtw89_fw_hdr_section_info *info) 323 { 324 struct sk_buff *skb; 325 const u8 *section = info->addr; 326 u32 residue_len = info->len; 327 u32 pkt_len; 328 int ret; 329 330 while (residue_len) { 331 if (residue_len >= FWDL_SECTION_PER_PKT_LEN) 332 pkt_len = FWDL_SECTION_PER_PKT_LEN; 333 else 334 pkt_len = residue_len; 335 336 skb = rtw89_fw_h2c_alloc_skb_no_hdr(pkt_len); 337 if (!skb) { 338 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 339 return -ENOMEM; 340 } 341 skb_put_data(skb, section, pkt_len); 342 343 ret = rtw89_h2c_tx(rtwdev, skb, true); 344 if (ret) { 345 rtw89_err(rtwdev, "failed to send h2c\n"); 346 ret = -1; 347 goto fail; 348 } 349 350 section += pkt_len; 351 residue_len -= pkt_len; 352 } 353 354 return 0; 355 fail: 356 dev_kfree_skb_any(skb); 357 358 return ret; 359 } 360 361 static int rtw89_fw_download_main(struct rtw89_dev *rtwdev, const u8 *fw, 362 struct rtw89_fw_bin_info *info) 363 { 364 struct rtw89_fw_hdr_section_info *section_info = info->section_info; 365 u8 section_num = info->section_num; 366 int ret; 367 368 while (section_num--) { 369 ret = __rtw89_fw_download_main(rtwdev, section_info); 370 if (ret) 371 return ret; 372 section_info++; 373 } 374 375 mdelay(5); 376 377 ret = rtw89_fw_check_rdy(rtwdev); 378 if (ret) { 379 rtw89_warn(rtwdev, "download firmware fail\n"); 380 return ret; 381 } 382 383 return 0; 384 } 385 386 static void rtw89_fw_prog_cnt_dump(struct rtw89_dev *rtwdev) 387 { 388 u32 val32; 389 u16 index; 390 391 rtw89_write32(rtwdev, R_AX_DBG_CTRL, 392 FIELD_PREP(B_AX_DBG_SEL0, FW_PROG_CNTR_DBG_SEL) | 393 FIELD_PREP(B_AX_DBG_SEL1, FW_PROG_CNTR_DBG_SEL)); 394 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_SEL_0XC0_MASK, MAC_DBG_SEL); 395 396 for (index = 0; index < 15; index++) { 397 val32 = rtw89_read32(rtwdev, R_AX_DBG_PORT_SEL); 398 rtw89_err(rtwdev, "[ERR]fw PC = 0x%x\n", val32); 399 fsleep(10); 400 } 401 } 402 403 static void rtw89_fw_dl_fail_dump(struct rtw89_dev *rtwdev) 404 { 405 u32 val32; 406 u16 val16; 407 408 val32 = rtw89_read32(rtwdev, R_AX_WCPU_FW_CTRL); 409 rtw89_err(rtwdev, "[ERR]fwdl 0x1E0 = 0x%x\n", val32); 410 411 val16 = rtw89_read16(rtwdev, R_AX_BOOT_DBG + 2); 412 rtw89_err(rtwdev, "[ERR]fwdl 0x83F2 = 0x%x\n", val16); 413 414 rtw89_fw_prog_cnt_dump(rtwdev); 415 } 416 417 int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) 418 { 419 struct rtw89_fw_info *fw_info = &rtwdev->fw; 420 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); 421 struct rtw89_fw_bin_info info; 422 const u8 *fw = fw_suit->data; 423 u32 len = fw_suit->size; 424 u8 val; 425 int ret; 426 427 if (!fw || !len) { 428 rtw89_err(rtwdev, "fw type %d isn't recognized\n", type); 429 return -ENOENT; 430 } 431 432 ret = rtw89_fw_hdr_parser(rtwdev, fw, len, &info); 433 if (ret) { 434 rtw89_err(rtwdev, "parse fw header fail\n"); 435 goto fwdl_err; 436 } 437 438 ret = read_poll_timeout_atomic(rtw89_read8, val, val & B_AX_H2C_PATH_RDY, 439 1, FWDL_WAIT_CNT, false, 440 rtwdev, R_AX_WCPU_FW_CTRL); 441 if (ret) { 442 rtw89_err(rtwdev, "[ERR]H2C path ready\n"); 443 goto fwdl_err; 444 } 445 446 ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len); 447 if (ret) { 448 ret = -EBUSY; 449 goto fwdl_err; 450 } 451 452 ret = rtw89_fw_download_main(rtwdev, fw, &info); 453 if (ret) { 454 ret = -EBUSY; 455 goto fwdl_err; 456 } 457 458 fw_info->h2c_seq = 0; 459 fw_info->rec_seq = 0; 460 rtwdev->mac.rpwm_seq_num = RPWM_SEQ_NUM_MAX; 461 rtwdev->mac.cpwm_seq_num = CPWM_SEQ_NUM_MAX; 462 463 return ret; 464 465 fwdl_err: 466 rtw89_fw_dl_fail_dump(rtwdev); 467 return ret; 468 } 469 470 int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev) 471 { 472 struct rtw89_fw_info *fw = &rtwdev->fw; 473 474 wait_for_completion(&fw->completion); 475 if (!fw->firmware) 476 return -EINVAL; 477 478 return 0; 479 } 480 481 static void rtw89_load_firmware_cb(const struct firmware *firmware, void *context) 482 { 483 struct rtw89_fw_info *fw = context; 484 struct rtw89_dev *rtwdev = fw->rtwdev; 485 486 if (!firmware || !firmware->data) { 487 rtw89_err(rtwdev, "failed to request firmware\n"); 488 complete_all(&fw->completion); 489 return; 490 } 491 492 fw->firmware = firmware; 493 complete_all(&fw->completion); 494 } 495 496 int rtw89_load_firmware(struct rtw89_dev *rtwdev) 497 { 498 struct rtw89_fw_info *fw = &rtwdev->fw; 499 const char *fw_name = rtwdev->chip->fw_name; 500 int ret; 501 502 fw->rtwdev = rtwdev; 503 init_completion(&fw->completion); 504 505 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 506 GFP_KERNEL, fw, rtw89_load_firmware_cb); 507 if (ret) { 508 rtw89_err(rtwdev, "failed to async firmware request\n"); 509 return ret; 510 } 511 512 return 0; 513 } 514 515 void rtw89_unload_firmware(struct rtw89_dev *rtwdev) 516 { 517 struct rtw89_fw_info *fw = &rtwdev->fw; 518 519 rtw89_wait_firmware_completion(rtwdev); 520 521 if (fw->firmware) 522 release_firmware(fw->firmware); 523 } 524 525 #define H2C_CAM_LEN 60 526 int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 527 struct rtw89_sta *rtwsta, const u8 *scan_mac_addr) 528 { 529 struct sk_buff *skb; 530 531 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CAM_LEN); 532 if (!skb) { 533 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 534 return -ENOMEM; 535 } 536 skb_put(skb, H2C_CAM_LEN); 537 rtw89_cam_fill_addr_cam_info(rtwdev, rtwvif, rtwsta, scan_mac_addr, skb->data); 538 rtw89_cam_fill_bssid_cam_info(rtwdev, rtwvif, skb->data); 539 540 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 541 H2C_CAT_MAC, 542 H2C_CL_MAC_ADDR_CAM_UPDATE, 543 H2C_FUNC_MAC_ADDR_CAM_UPD, 0, 1, 544 H2C_CAM_LEN); 545 546 if (rtw89_h2c_tx(rtwdev, skb, false)) { 547 rtw89_err(rtwdev, "failed to send h2c\n"); 548 goto fail; 549 } 550 551 return 0; 552 fail: 553 dev_kfree_skb_any(skb); 554 555 return -EBUSY; 556 } 557 558 #define H2C_BA_CAM_LEN 8 559 int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, 560 bool valid, struct ieee80211_ampdu_params *params) 561 { 562 u8 macid = rtwsta->mac_id; 563 struct sk_buff *skb; 564 u8 entry_idx; 565 int ret; 566 567 ret = valid ? 568 rtw89_core_acquire_sta_ba_entry(rtwsta, params->tid, &entry_idx) : 569 rtw89_core_release_sta_ba_entry(rtwsta, params->tid, &entry_idx); 570 if (ret) { 571 /* it still works even if we don't have static BA CAM, because 572 * hardware can create dynamic BA CAM automatically. 573 */ 574 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 575 "failed to %s entry tid=%d for h2c ba cam\n", 576 valid ? "alloc" : "free", params->tid); 577 return 0; 578 } 579 580 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_BA_CAM_LEN); 581 if (!skb) { 582 rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam\n"); 583 return -ENOMEM; 584 } 585 skb_put(skb, H2C_BA_CAM_LEN); 586 SET_BA_CAM_MACID(skb->data, macid); 587 SET_BA_CAM_ENTRY_IDX(skb->data, entry_idx); 588 if (!valid) 589 goto end; 590 SET_BA_CAM_VALID(skb->data, valid); 591 SET_BA_CAM_TID(skb->data, params->tid); 592 if (params->buf_size > 64) 593 SET_BA_CAM_BMAP_SIZE(skb->data, 4); 594 else 595 SET_BA_CAM_BMAP_SIZE(skb->data, 0); 596 /* If init req is set, hw will set the ssn */ 597 SET_BA_CAM_INIT_REQ(skb->data, 1); 598 SET_BA_CAM_SSN(skb->data, params->ssn); 599 600 end: 601 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 602 H2C_CAT_MAC, 603 H2C_CL_BA_CAM, 604 H2C_FUNC_MAC_BA_CAM, 0, 1, 605 H2C_BA_CAM_LEN); 606 607 if (rtw89_h2c_tx(rtwdev, skb, false)) { 608 rtw89_err(rtwdev, "failed to send h2c\n"); 609 goto fail; 610 } 611 612 return 0; 613 fail: 614 dev_kfree_skb_any(skb); 615 616 return -EBUSY; 617 } 618 619 #define H2C_LOG_CFG_LEN 12 620 int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable) 621 { 622 struct sk_buff *skb; 623 u32 comp = enable ? BIT(RTW89_FW_LOG_COMP_INIT) | BIT(RTW89_FW_LOG_COMP_TASK) | 624 BIT(RTW89_FW_LOG_COMP_PS) | BIT(RTW89_FW_LOG_COMP_ERROR) : 0; 625 626 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LOG_CFG_LEN); 627 if (!skb) { 628 rtw89_err(rtwdev, "failed to alloc skb for fw log cfg\n"); 629 return -ENOMEM; 630 } 631 632 skb_put(skb, H2C_LOG_CFG_LEN); 633 SET_LOG_CFG_LEVEL(skb->data, RTW89_FW_LOG_LEVEL_SER); 634 SET_LOG_CFG_PATH(skb->data, BIT(RTW89_FW_LOG_LEVEL_C2H)); 635 SET_LOG_CFG_COMP(skb->data, comp); 636 SET_LOG_CFG_COMP_EXT(skb->data, 0); 637 638 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 639 H2C_CAT_MAC, 640 H2C_CL_FW_INFO, 641 H2C_FUNC_LOG_CFG, 0, 0, 642 H2C_LOG_CFG_LEN); 643 644 if (rtw89_h2c_tx(rtwdev, skb, false)) { 645 rtw89_err(rtwdev, "failed to send h2c\n"); 646 goto fail; 647 } 648 649 return 0; 650 fail: 651 dev_kfree_skb_any(skb); 652 653 return -EBUSY; 654 } 655 656 #define H2C_GENERAL_PKT_LEN 6 657 #define H2C_GENERAL_PKT_ID_UND 0xff 658 int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid) 659 { 660 struct sk_buff *skb; 661 662 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_GENERAL_PKT_LEN); 663 if (!skb) { 664 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 665 return -ENOMEM; 666 } 667 skb_put(skb, H2C_GENERAL_PKT_LEN); 668 SET_GENERAL_PKT_MACID(skb->data, macid); 669 SET_GENERAL_PKT_PROBRSP_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 670 SET_GENERAL_PKT_PSPOLL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 671 SET_GENERAL_PKT_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 672 SET_GENERAL_PKT_QOS_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 673 SET_GENERAL_PKT_CTS2SELF_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 674 675 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 676 H2C_CAT_MAC, 677 H2C_CL_FW_INFO, 678 H2C_FUNC_MAC_GENERAL_PKT, 0, 1, 679 H2C_GENERAL_PKT_LEN); 680 681 if (rtw89_h2c_tx(rtwdev, skb, false)) { 682 rtw89_err(rtwdev, "failed to send h2c\n"); 683 goto fail; 684 } 685 686 return 0; 687 fail: 688 dev_kfree_skb_any(skb); 689 690 return -EBUSY; 691 } 692 693 #define H2C_LPS_PARM_LEN 8 694 int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev, 695 struct rtw89_lps_parm *lps_param) 696 { 697 struct sk_buff *skb; 698 699 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LPS_PARM_LEN); 700 if (!skb) { 701 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 702 return -ENOMEM; 703 } 704 skb_put(skb, H2C_LPS_PARM_LEN); 705 706 SET_LPS_PARM_MACID(skb->data, lps_param->macid); 707 SET_LPS_PARM_PSMODE(skb->data, lps_param->psmode); 708 SET_LPS_PARM_LASTRPWM(skb->data, lps_param->lastrpwm); 709 SET_LPS_PARM_RLBM(skb->data, 1); 710 SET_LPS_PARM_SMARTPS(skb->data, 1); 711 SET_LPS_PARM_AWAKEINTERVAL(skb->data, 1); 712 SET_LPS_PARM_VOUAPSD(skb->data, 0); 713 SET_LPS_PARM_VIUAPSD(skb->data, 0); 714 SET_LPS_PARM_BEUAPSD(skb->data, 0); 715 SET_LPS_PARM_BKUAPSD(skb->data, 0); 716 717 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 718 H2C_CAT_MAC, 719 H2C_CL_MAC_PS, 720 H2C_FUNC_MAC_LPS_PARM, 0, 1, 721 H2C_LPS_PARM_LEN); 722 723 if (rtw89_h2c_tx(rtwdev, skb, false)) { 724 rtw89_err(rtwdev, "failed to send h2c\n"); 725 goto fail; 726 } 727 728 return 0; 729 fail: 730 dev_kfree_skb_any(skb); 731 732 return -EBUSY; 733 } 734 735 #define H2C_CMC_TBL_LEN 68 736 int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, 737 struct rtw89_vif *rtwvif) 738 { 739 struct rtw89_hal *hal = &rtwdev->hal; 740 struct sk_buff *skb; 741 u8 ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B; 742 u8 map_b = hal->antenna_tx == RF_AB ? 1 : 0; 743 u8 macid = rtwvif->mac_id; 744 745 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); 746 if (!skb) { 747 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 748 return -ENOMEM; 749 } 750 skb_put(skb, H2C_CMC_TBL_LEN); 751 SET_CTRL_INFO_MACID(skb->data, macid); 752 SET_CTRL_INFO_OPERATION(skb->data, 1); 753 SET_CMC_TBL_TXPWR_MODE(skb->data, 0); 754 SET_CMC_TBL_NTX_PATH_EN(skb->data, ntx_path); 755 SET_CMC_TBL_PATH_MAP_A(skb->data, 0); 756 SET_CMC_TBL_PATH_MAP_B(skb->data, map_b); 757 SET_CMC_TBL_PATH_MAP_C(skb->data, 0); 758 SET_CMC_TBL_PATH_MAP_D(skb->data, 0); 759 SET_CMC_TBL_ANTSEL_A(skb->data, 0); 760 SET_CMC_TBL_ANTSEL_B(skb->data, 0); 761 SET_CMC_TBL_ANTSEL_C(skb->data, 0); 762 SET_CMC_TBL_ANTSEL_D(skb->data, 0); 763 SET_CMC_TBL_DOPPLER_CTRL(skb->data, 0); 764 SET_CMC_TBL_TXPWR_TOLERENCE(skb->data, 0); 765 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) 766 SET_CMC_TBL_DATA_DCM(skb->data, 0); 767 768 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 769 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 770 H2C_FUNC_MAC_CCTLINFO_UD, 0, 1, 771 H2C_CMC_TBL_LEN); 772 773 if (rtw89_h2c_tx(rtwdev, skb, false)) { 774 rtw89_err(rtwdev, "failed to send h2c\n"); 775 goto fail; 776 } 777 778 return 0; 779 fail: 780 dev_kfree_skb_any(skb); 781 782 return -EBUSY; 783 } 784 785 static void __get_sta_he_pkt_padding(struct rtw89_dev *rtwdev, 786 struct ieee80211_sta *sta, u8 *pads) 787 { 788 bool ppe_th; 789 u8 ppe16, ppe8; 790 u8 nss = min(sta->rx_nss, rtwdev->hal.tx_nss) - 1; 791 u8 ppe_thres_hdr = sta->he_cap.ppe_thres[0]; 792 u8 ru_bitmap; 793 u8 n, idx, sh; 794 u16 ppe; 795 int i; 796 797 if (!sta->he_cap.has_he) 798 return; 799 800 ppe_th = FIELD_GET(IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 801 sta->he_cap.he_cap_elem.phy_cap_info[6]); 802 if (!ppe_th) { 803 u8 pad; 804 805 pad = FIELD_GET(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK, 806 sta->he_cap.he_cap_elem.phy_cap_info[9]); 807 808 for (i = 0; i < RTW89_PPE_BW_NUM; i++) 809 pads[i] = pad; 810 } 811 812 ru_bitmap = FIELD_GET(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, ppe_thres_hdr); 813 n = hweight8(ru_bitmap); 814 n = 7 + (n * IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2) * nss; 815 816 for (i = 0; i < RTW89_PPE_BW_NUM; i++) { 817 if (!(ru_bitmap & BIT(i))) { 818 pads[i] = 1; 819 continue; 820 } 821 822 idx = n >> 3; 823 sh = n & 7; 824 n += IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2; 825 826 ppe = le16_to_cpu(*((__le16 *)&sta->he_cap.ppe_thres[idx])); 827 ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 828 sh += IEEE80211_PPE_THRES_INFO_PPET_SIZE; 829 ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 830 831 if (ppe16 != 7 && ppe8 == 7) 832 pads[i] = 2; 833 else if (ppe8 != 7) 834 pads[i] = 1; 835 else 836 pads[i] = 0; 837 } 838 } 839 840 int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, 841 struct ieee80211_vif *vif, 842 struct ieee80211_sta *sta) 843 { 844 struct rtw89_hal *hal = &rtwdev->hal; 845 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); 846 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 847 struct sk_buff *skb; 848 u8 pads[RTW89_PPE_BW_NUM]; 849 u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; 850 851 memset(pads, 0, sizeof(pads)); 852 if (sta) 853 __get_sta_he_pkt_padding(rtwdev, sta, pads); 854 855 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); 856 if (!skb) { 857 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 858 return -ENOMEM; 859 } 860 skb_put(skb, H2C_CMC_TBL_LEN); 861 SET_CTRL_INFO_MACID(skb->data, mac_id); 862 SET_CTRL_INFO_OPERATION(skb->data, 1); 863 SET_CMC_TBL_DISRTSFB(skb->data, 1); 864 SET_CMC_TBL_DISDATAFB(skb->data, 1); 865 if (hal->current_band_type == RTW89_BAND_2G) 866 SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, RTW89_HW_RATE_CCK1); 867 else 868 SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, RTW89_HW_RATE_OFDM6); 869 SET_CMC_TBL_RTS_TXCNT_LMT_SEL(skb->data, 0); 870 SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 0); 871 if (vif->type == NL80211_IFTYPE_STATION) 872 SET_CMC_TBL_ULDL(skb->data, 1); 873 else 874 SET_CMC_TBL_ULDL(skb->data, 0); 875 SET_CMC_TBL_MULTI_PORT_ID(skb->data, rtwvif->port); 876 SET_CMC_TBL_NOMINAL_PKT_PADDING(skb->data, pads[RTW89_CHANNEL_WIDTH_20]); 877 SET_CMC_TBL_NOMINAL_PKT_PADDING40(skb->data, pads[RTW89_CHANNEL_WIDTH_40]); 878 SET_CMC_TBL_NOMINAL_PKT_PADDING80(skb->data, pads[RTW89_CHANNEL_WIDTH_80]); 879 if (sta) 880 SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(skb->data, sta->he_cap.has_he); 881 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) 882 SET_CMC_TBL_DATA_DCM(skb->data, 0); 883 884 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 885 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 886 H2C_FUNC_MAC_CCTLINFO_UD, 0, 1, 887 H2C_CMC_TBL_LEN); 888 889 if (rtw89_h2c_tx(rtwdev, skb, false)) { 890 rtw89_err(rtwdev, "failed to send h2c\n"); 891 goto fail; 892 } 893 894 return 0; 895 fail: 896 dev_kfree_skb_any(skb); 897 898 return -EBUSY; 899 } 900 901 int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev, 902 struct rtw89_sta *rtwsta) 903 { 904 struct sk_buff *skb; 905 906 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); 907 if (!skb) { 908 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 909 return -ENOMEM; 910 } 911 skb_put(skb, H2C_CMC_TBL_LEN); 912 SET_CTRL_INFO_MACID(skb->data, rtwsta->mac_id); 913 SET_CTRL_INFO_OPERATION(skb->data, 1); 914 if (rtwsta->cctl_tx_time) { 915 SET_CMC_TBL_AMPDU_TIME_SEL(skb->data, 1); 916 SET_CMC_TBL_AMPDU_MAX_TIME(skb->data, rtwsta->ampdu_max_time); 917 } 918 if (rtwsta->cctl_tx_retry_limit) { 919 SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 1); 920 SET_CMC_TBL_DATA_TX_CNT_LMT(skb->data, rtwsta->data_tx_cnt_lmt); 921 } 922 923 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 924 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 925 H2C_FUNC_MAC_CCTLINFO_UD, 0, 1, 926 H2C_CMC_TBL_LEN); 927 928 if (rtw89_h2c_tx(rtwdev, skb, false)) { 929 rtw89_err(rtwdev, "failed to send h2c\n"); 930 goto fail; 931 } 932 933 return 0; 934 fail: 935 dev_kfree_skb_any(skb); 936 937 return -EBUSY; 938 } 939 940 #define H2C_BCN_BASE_LEN 12 941 int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev, 942 struct rtw89_vif *rtwvif) 943 { 944 struct rtw89_hal *hal = &rtwdev->hal; 945 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); 946 struct sk_buff *skb; 947 struct sk_buff *skb_beacon; 948 u16 tim_offset; 949 int bcn_total_len; 950 951 skb_beacon = ieee80211_beacon_get_tim(rtwdev->hw, vif, &tim_offset, NULL); 952 if (!skb_beacon) { 953 rtw89_err(rtwdev, "failed to get beacon skb\n"); 954 return -ENOMEM; 955 } 956 957 bcn_total_len = H2C_BCN_BASE_LEN + skb_beacon->len; 958 skb = rtw89_fw_h2c_alloc_skb_with_hdr(bcn_total_len); 959 if (!skb) { 960 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 961 dev_kfree_skb_any(skb_beacon); 962 return -ENOMEM; 963 } 964 skb_put(skb, H2C_BCN_BASE_LEN); 965 966 SET_BCN_UPD_PORT(skb->data, rtwvif->port); 967 SET_BCN_UPD_MBSSID(skb->data, 0); 968 SET_BCN_UPD_BAND(skb->data, rtwvif->mac_idx); 969 SET_BCN_UPD_GRP_IE_OFST(skb->data, tim_offset); 970 SET_BCN_UPD_MACID(skb->data, rtwvif->mac_id); 971 SET_BCN_UPD_SSN_SEL(skb->data, RTW89_MGMT_HW_SSN_SEL); 972 SET_BCN_UPD_SSN_MODE(skb->data, RTW89_MGMT_HW_SEQ_MODE); 973 SET_BCN_UPD_RATE(skb->data, hal->current_band_type == RTW89_BAND_2G ? 974 RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6); 975 976 skb_put_data(skb, skb_beacon->data, skb_beacon->len); 977 dev_kfree_skb_any(skb_beacon); 978 979 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 980 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 981 H2C_FUNC_MAC_BCN_UPD, 0, 1, 982 bcn_total_len); 983 984 if (rtw89_h2c_tx(rtwdev, skb, false)) { 985 rtw89_err(rtwdev, "failed to send h2c\n"); 986 dev_kfree_skb_any(skb); 987 return -EBUSY; 988 } 989 990 return 0; 991 } 992 993 #define H2C_ROLE_MAINTAIN_LEN 4 994 int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev, 995 struct rtw89_vif *rtwvif, 996 struct rtw89_sta *rtwsta, 997 enum rtw89_upd_mode upd_mode) 998 { 999 struct sk_buff *skb; 1000 u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; 1001 u8 self_role; 1002 1003 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) { 1004 if (rtwsta) 1005 self_role = RTW89_SELF_ROLE_AP_CLIENT; 1006 else 1007 self_role = rtwvif->self_role; 1008 } else { 1009 self_role = rtwvif->self_role; 1010 } 1011 1012 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_ROLE_MAINTAIN_LEN); 1013 if (!skb) { 1014 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1015 return -ENOMEM; 1016 } 1017 skb_put(skb, H2C_ROLE_MAINTAIN_LEN); 1018 SET_FWROLE_MAINTAIN_MACID(skb->data, mac_id); 1019 SET_FWROLE_MAINTAIN_SELF_ROLE(skb->data, self_role); 1020 SET_FWROLE_MAINTAIN_UPD_MODE(skb->data, upd_mode); 1021 SET_FWROLE_MAINTAIN_WIFI_ROLE(skb->data, rtwvif->wifi_role); 1022 1023 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1024 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, 1025 H2C_FUNC_MAC_FWROLE_MAINTAIN, 0, 1, 1026 H2C_ROLE_MAINTAIN_LEN); 1027 1028 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1029 rtw89_err(rtwdev, "failed to send h2c\n"); 1030 goto fail; 1031 } 1032 1033 return 0; 1034 fail: 1035 dev_kfree_skb_any(skb); 1036 1037 return -EBUSY; 1038 } 1039 1040 #define H2C_JOIN_INFO_LEN 4 1041 int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 1042 struct rtw89_sta *rtwsta, bool dis_conn) 1043 { 1044 struct sk_buff *skb; 1045 u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; 1046 u8 self_role = rtwvif->self_role; 1047 u8 net_type = rtwvif->net_type; 1048 1049 if (net_type == RTW89_NET_TYPE_AP_MODE && rtwsta) { 1050 self_role = RTW89_SELF_ROLE_AP_CLIENT; 1051 net_type = dis_conn ? RTW89_NET_TYPE_NO_LINK : net_type; 1052 } 1053 1054 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN); 1055 if (!skb) { 1056 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1057 return -ENOMEM; 1058 } 1059 skb_put(skb, H2C_JOIN_INFO_LEN); 1060 SET_JOININFO_MACID(skb->data, mac_id); 1061 SET_JOININFO_OP(skb->data, dis_conn); 1062 SET_JOININFO_BAND(skb->data, rtwvif->mac_idx); 1063 SET_JOININFO_WMM(skb->data, rtwvif->wmm); 1064 SET_JOININFO_TGR(skb->data, rtwvif->trigger); 1065 SET_JOININFO_ISHESTA(skb->data, 0); 1066 SET_JOININFO_DLBW(skb->data, 0); 1067 SET_JOININFO_TF_MAC_PAD(skb->data, 0); 1068 SET_JOININFO_DL_T_PE(skb->data, 0); 1069 SET_JOININFO_PORT_ID(skb->data, rtwvif->port); 1070 SET_JOININFO_NET_TYPE(skb->data, net_type); 1071 SET_JOININFO_WIFI_ROLE(skb->data, rtwvif->wifi_role); 1072 SET_JOININFO_SELF_ROLE(skb->data, self_role); 1073 1074 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1075 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, 1076 H2C_FUNC_MAC_JOININFO, 0, 1, 1077 H2C_JOIN_INFO_LEN); 1078 1079 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1080 rtw89_err(rtwdev, "failed to send h2c\n"); 1081 goto fail; 1082 } 1083 1084 return 0; 1085 fail: 1086 dev_kfree_skb_any(skb); 1087 1088 return -EBUSY; 1089 } 1090 1091 int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp, 1092 bool pause) 1093 { 1094 struct rtw89_fw_macid_pause_grp h2c = {{0}}; 1095 u8 len = sizeof(struct rtw89_fw_macid_pause_grp); 1096 struct sk_buff *skb; 1097 1098 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN); 1099 if (!skb) { 1100 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1101 return -ENOMEM; 1102 } 1103 h2c.mask_grp[grp] = cpu_to_le32(BIT(sh)); 1104 if (pause) 1105 h2c.pause_grp[grp] = cpu_to_le32(BIT(sh)); 1106 skb_put_data(skb, &h2c, len); 1107 1108 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1109 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1110 H2C_FUNC_MAC_MACID_PAUSE, 1, 0, 1111 len); 1112 1113 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1114 rtw89_err(rtwdev, "failed to send h2c\n"); 1115 goto fail; 1116 } 1117 1118 return 0; 1119 fail: 1120 dev_kfree_skb_any(skb); 1121 1122 return -EBUSY; 1123 } 1124 1125 #define H2C_EDCA_LEN 12 1126 int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 1127 u8 ac, u32 val) 1128 { 1129 struct sk_buff *skb; 1130 1131 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_EDCA_LEN); 1132 if (!skb) { 1133 rtw89_err(rtwdev, "failed to alloc skb for h2c edca\n"); 1134 return -ENOMEM; 1135 } 1136 skb_put(skb, H2C_EDCA_LEN); 1137 RTW89_SET_EDCA_SEL(skb->data, 0); 1138 RTW89_SET_EDCA_BAND(skb->data, rtwvif->mac_idx); 1139 RTW89_SET_EDCA_WMM(skb->data, 0); 1140 RTW89_SET_EDCA_AC(skb->data, ac); 1141 RTW89_SET_EDCA_PARAM(skb->data, val); 1142 1143 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1144 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1145 H2C_FUNC_USR_EDCA, 0, 1, 1146 H2C_EDCA_LEN); 1147 1148 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1149 rtw89_err(rtwdev, "failed to send h2c\n"); 1150 goto fail; 1151 } 1152 1153 return 0; 1154 fail: 1155 dev_kfree_skb_any(skb); 1156 1157 return -EBUSY; 1158 } 1159 1160 #define H2C_OFLD_CFG_LEN 8 1161 int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev) 1162 { 1163 static const u8 cfg[] = {0x09, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00}; 1164 struct sk_buff *skb; 1165 1166 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_OFLD_CFG_LEN); 1167 if (!skb) { 1168 rtw89_err(rtwdev, "failed to alloc skb for h2c ofld\n"); 1169 return -ENOMEM; 1170 } 1171 skb_put_data(skb, cfg, H2C_OFLD_CFG_LEN); 1172 1173 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1174 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1175 H2C_FUNC_OFLD_CFG, 0, 1, 1176 H2C_OFLD_CFG_LEN); 1177 1178 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1179 rtw89_err(rtwdev, "failed to send h2c\n"); 1180 goto fail; 1181 } 1182 1183 return 0; 1184 fail: 1185 dev_kfree_skb_any(skb); 1186 1187 return -EBUSY; 1188 } 1189 1190 #define H2C_RA_LEN 16 1191 int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi) 1192 { 1193 struct sk_buff *skb; 1194 u8 *cmd; 1195 1196 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_RA_LEN); 1197 if (!skb) { 1198 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1199 return -ENOMEM; 1200 } 1201 skb_put(skb, H2C_RA_LEN); 1202 cmd = skb->data; 1203 rtw89_debug(rtwdev, RTW89_DBG_RA, 1204 "ra cmd msk: %llx ", ra->ra_mask); 1205 1206 RTW89_SET_FWCMD_RA_MODE(cmd, ra->mode_ctrl); 1207 RTW89_SET_FWCMD_RA_BW_CAP(cmd, ra->bw_cap); 1208 RTW89_SET_FWCMD_RA_MACID(cmd, ra->macid); 1209 RTW89_SET_FWCMD_RA_DCM(cmd, ra->dcm_cap); 1210 RTW89_SET_FWCMD_RA_ER(cmd, ra->er_cap); 1211 RTW89_SET_FWCMD_RA_INIT_RATE_LV(cmd, ra->init_rate_lv); 1212 RTW89_SET_FWCMD_RA_UPD_ALL(cmd, ra->upd_all); 1213 RTW89_SET_FWCMD_RA_SGI(cmd, ra->en_sgi); 1214 RTW89_SET_FWCMD_RA_LDPC(cmd, ra->ldpc_cap); 1215 RTW89_SET_FWCMD_RA_STBC(cmd, ra->stbc_cap); 1216 RTW89_SET_FWCMD_RA_SS_NUM(cmd, ra->ss_num); 1217 RTW89_SET_FWCMD_RA_GILTF(cmd, ra->giltf); 1218 RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(cmd, ra->upd_bw_nss_mask); 1219 RTW89_SET_FWCMD_RA_UPD_MASK(cmd, ra->upd_mask); 1220 RTW89_SET_FWCMD_RA_MASK_0(cmd, FIELD_GET(MASKBYTE0, ra->ra_mask)); 1221 RTW89_SET_FWCMD_RA_MASK_1(cmd, FIELD_GET(MASKBYTE1, ra->ra_mask)); 1222 RTW89_SET_FWCMD_RA_MASK_2(cmd, FIELD_GET(MASKBYTE2, ra->ra_mask)); 1223 RTW89_SET_FWCMD_RA_MASK_3(cmd, FIELD_GET(MASKBYTE3, ra->ra_mask)); 1224 RTW89_SET_FWCMD_RA_MASK_4(cmd, FIELD_GET(MASKBYTE4, ra->ra_mask)); 1225 1226 if (csi) { 1227 RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(cmd, 1); 1228 RTW89_SET_FWCMD_RA_BAND_NUM(cmd, ra->band_num); 1229 RTW89_SET_FWCMD_RA_CR_TBL_SEL(cmd, ra->cr_tbl_sel); 1230 RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(cmd, ra->fixed_csi_rate_en); 1231 RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(cmd, ra->ra_csi_rate_en); 1232 RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(cmd, ra->csi_mcs_ss_idx); 1233 RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(cmd, ra->csi_mode); 1234 RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(cmd, ra->csi_gi_ltf); 1235 RTW89_SET_FWCMD_RA_FIXED_CSI_BW(cmd, ra->csi_bw); 1236 } 1237 1238 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1239 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RA, 1240 H2C_FUNC_OUTSRC_RA_MACIDCFG, 0, 0, 1241 H2C_RA_LEN); 1242 1243 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1244 rtw89_err(rtwdev, "failed to send h2c\n"); 1245 goto fail; 1246 } 1247 1248 return 0; 1249 fail: 1250 dev_kfree_skb_any(skb); 1251 1252 return -EBUSY; 1253 } 1254 1255 #define H2C_LEN_CXDRVHDR 2 1256 #define H2C_LEN_CXDRVINFO_INIT (12 + H2C_LEN_CXDRVHDR) 1257 int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev) 1258 { 1259 struct rtw89_btc *btc = &rtwdev->btc; 1260 struct rtw89_btc_dm *dm = &btc->dm; 1261 struct rtw89_btc_init_info *init_info = &dm->init_info; 1262 struct rtw89_btc_module *module = &init_info->module; 1263 struct rtw89_btc_ant_info *ant = &module->ant; 1264 struct sk_buff *skb; 1265 u8 *cmd; 1266 1267 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_INIT); 1268 if (!skb) { 1269 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n"); 1270 return -ENOMEM; 1271 } 1272 skb_put(skb, H2C_LEN_CXDRVINFO_INIT); 1273 cmd = skb->data; 1274 1275 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_INIT); 1276 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_INIT - H2C_LEN_CXDRVHDR); 1277 1278 RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, ant->type); 1279 RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, ant->num); 1280 RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, ant->isolation); 1281 RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, ant->single_pos); 1282 RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, ant->diversity); 1283 1284 RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, module->rfe_type); 1285 RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, module->cv); 1286 RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, module->bt_solo); 1287 RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, module->bt_pos); 1288 RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, module->switch_type); 1289 1290 RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, init_info->wl_guard_ch); 1291 RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, init_info->wl_only); 1292 RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, init_info->wl_init_ok); 1293 RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, init_info->dbcc_en); 1294 RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, init_info->cx_other); 1295 RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, init_info->bt_only); 1296 1297 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1298 H2C_CAT_OUTSRC, BTFC_SET, 1299 SET_DRV_INFO, 0, 0, 1300 H2C_LEN_CXDRVINFO_INIT); 1301 1302 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1303 rtw89_err(rtwdev, "failed to send h2c\n"); 1304 goto fail; 1305 } 1306 1307 return 0; 1308 fail: 1309 dev_kfree_skb_any(skb); 1310 1311 return -EBUSY; 1312 } 1313 1314 #define H2C_LEN_CXDRVINFO_ROLE (4 + 12 * RTW89_PORT_NUM + H2C_LEN_CXDRVHDR) 1315 int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev) 1316 { 1317 struct rtw89_btc *btc = &rtwdev->btc; 1318 struct rtw89_btc_wl_info *wl = &btc->cx.wl; 1319 struct rtw89_btc_wl_role_info *role_info = &wl->role_info; 1320 struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; 1321 struct rtw89_btc_wl_active_role *active = role_info->active_role; 1322 struct sk_buff *skb; 1323 u8 *cmd; 1324 int i; 1325 1326 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_ROLE); 1327 if (!skb) { 1328 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); 1329 return -ENOMEM; 1330 } 1331 skb_put(skb, H2C_LEN_CXDRVINFO_ROLE); 1332 cmd = skb->data; 1333 1334 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); 1335 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_ROLE - H2C_LEN_CXDRVHDR); 1336 1337 RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); 1338 RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); 1339 1340 RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none); 1341 RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station); 1342 RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap); 1343 RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap); 1344 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc); 1345 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master); 1346 RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh); 1347 RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter); 1348 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device); 1349 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc); 1350 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go); 1351 RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan); 1352 1353 for (i = 0; i < RTW89_PORT_NUM; i++, active++) { 1354 RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i); 1355 RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i); 1356 RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i); 1357 RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i); 1358 RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i); 1359 RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i); 1360 RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i); 1361 RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i); 1362 RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i); 1363 RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i); 1364 RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i); 1365 RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i); 1366 RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i); 1367 } 1368 1369 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1370 H2C_CAT_OUTSRC, BTFC_SET, 1371 SET_DRV_INFO, 0, 0, 1372 H2C_LEN_CXDRVINFO_ROLE); 1373 1374 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1375 rtw89_err(rtwdev, "failed to send h2c\n"); 1376 goto fail; 1377 } 1378 1379 return 0; 1380 fail: 1381 dev_kfree_skb_any(skb); 1382 1383 return -EBUSY; 1384 } 1385 1386 #define H2C_LEN_CXDRVINFO_CTRL (4 + H2C_LEN_CXDRVHDR) 1387 int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev) 1388 { 1389 struct rtw89_btc *btc = &rtwdev->btc; 1390 struct rtw89_btc_ctrl *ctrl = &btc->ctrl; 1391 struct sk_buff *skb; 1392 u8 *cmd; 1393 1394 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_CTRL); 1395 if (!skb) { 1396 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); 1397 return -ENOMEM; 1398 } 1399 skb_put(skb, H2C_LEN_CXDRVINFO_CTRL); 1400 cmd = skb->data; 1401 1402 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_CTRL); 1403 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_CTRL - H2C_LEN_CXDRVHDR); 1404 1405 RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, ctrl->manual); 1406 RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, ctrl->igno_bt); 1407 RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, ctrl->always_freerun); 1408 RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, ctrl->trace_step); 1409 1410 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1411 H2C_CAT_OUTSRC, BTFC_SET, 1412 SET_DRV_INFO, 0, 0, 1413 H2C_LEN_CXDRVINFO_CTRL); 1414 1415 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1416 rtw89_err(rtwdev, "failed to send h2c\n"); 1417 goto fail; 1418 } 1419 1420 return 0; 1421 fail: 1422 dev_kfree_skb_any(skb); 1423 1424 return -EBUSY; 1425 } 1426 1427 #define H2C_LEN_CXDRVINFO_RFK (4 + H2C_LEN_CXDRVHDR) 1428 int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev) 1429 { 1430 struct rtw89_btc *btc = &rtwdev->btc; 1431 struct rtw89_btc_wl_info *wl = &btc->cx.wl; 1432 struct rtw89_btc_wl_rfk_info *rfk_info = &wl->rfk_info; 1433 struct sk_buff *skb; 1434 u8 *cmd; 1435 1436 skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_RFK); 1437 if (!skb) { 1438 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); 1439 return -ENOMEM; 1440 } 1441 skb_put(skb, H2C_LEN_CXDRVINFO_RFK); 1442 cmd = skb->data; 1443 1444 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_RFK); 1445 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_RFK - H2C_LEN_CXDRVHDR); 1446 1447 RTW89_SET_FWCMD_CXRFK_STATE(cmd, rfk_info->state); 1448 RTW89_SET_FWCMD_CXRFK_PATH_MAP(cmd, rfk_info->path_map); 1449 RTW89_SET_FWCMD_CXRFK_PHY_MAP(cmd, rfk_info->phy_map); 1450 RTW89_SET_FWCMD_CXRFK_BAND(cmd, rfk_info->band); 1451 RTW89_SET_FWCMD_CXRFK_TYPE(cmd, rfk_info->type); 1452 1453 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1454 H2C_CAT_OUTSRC, BTFC_SET, 1455 SET_DRV_INFO, 0, 0, 1456 H2C_LEN_CXDRVINFO_RFK); 1457 1458 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1459 rtw89_err(rtwdev, "failed to send h2c\n"); 1460 goto fail; 1461 } 1462 1463 return 0; 1464 fail: 1465 dev_kfree_skb_any(skb); 1466 1467 return -EBUSY; 1468 } 1469 1470 int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, 1471 struct rtw89_fw_h2c_rf_reg_info *info, 1472 u16 len, u8 page) 1473 { 1474 struct sk_buff *skb; 1475 u8 class = info->rf_path == RF_PATH_A ? 1476 H2C_CL_OUTSRC_RF_REG_A : H2C_CL_OUTSRC_RF_REG_B; 1477 1478 skb = rtw89_fw_h2c_alloc_skb_with_hdr(len); 1479 if (!skb) { 1480 rtw89_err(rtwdev, "failed to alloc skb for h2c rf reg\n"); 1481 return -ENOMEM; 1482 } 1483 skb_put_data(skb, info->rtw89_phy_config_rf_h2c[page], len); 1484 1485 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1486 H2C_CAT_OUTSRC, class, page, 0, 0, 1487 len); 1488 1489 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1490 rtw89_err(rtwdev, "failed to send h2c\n"); 1491 goto fail; 1492 } 1493 1494 return 0; 1495 fail: 1496 dev_kfree_skb_any(skb); 1497 1498 return -EBUSY; 1499 } 1500 1501 int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev, 1502 u8 h2c_class, u8 h2c_func, u8 *buf, u16 len, 1503 bool rack, bool dack) 1504 { 1505 struct sk_buff *skb; 1506 1507 skb = rtw89_fw_h2c_alloc_skb_with_hdr(len); 1508 if (!skb) { 1509 rtw89_err(rtwdev, "failed to alloc skb for raw with hdr\n"); 1510 return -ENOMEM; 1511 } 1512 skb_put_data(skb, buf, len); 1513 1514 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1515 H2C_CAT_OUTSRC, h2c_class, h2c_func, rack, dack, 1516 len); 1517 1518 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1519 rtw89_err(rtwdev, "failed to send h2c\n"); 1520 goto fail; 1521 } 1522 1523 return 0; 1524 fail: 1525 dev_kfree_skb_any(skb); 1526 1527 return -EBUSY; 1528 } 1529 1530 int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len) 1531 { 1532 struct sk_buff *skb; 1533 1534 skb = rtw89_fw_h2c_alloc_skb_no_hdr(len); 1535 if (!skb) { 1536 rtw89_err(rtwdev, "failed to alloc skb for h2c raw\n"); 1537 return -ENOMEM; 1538 } 1539 skb_put_data(skb, buf, len); 1540 1541 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1542 rtw89_err(rtwdev, "failed to send h2c\n"); 1543 goto fail; 1544 } 1545 1546 return 0; 1547 fail: 1548 dev_kfree_skb_any(skb); 1549 1550 return -EBUSY; 1551 } 1552 1553 void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev) 1554 { 1555 struct rtw89_early_h2c *early_h2c; 1556 1557 lockdep_assert_held(&rtwdev->mutex); 1558 1559 list_for_each_entry(early_h2c, &rtwdev->early_h2c_list, list) { 1560 rtw89_fw_h2c_raw(rtwdev, early_h2c->h2c, early_h2c->h2c_len); 1561 } 1562 } 1563 1564 void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev) 1565 { 1566 struct rtw89_early_h2c *early_h2c, *tmp; 1567 1568 mutex_lock(&rtwdev->mutex); 1569 list_for_each_entry_safe(early_h2c, tmp, &rtwdev->early_h2c_list, list) { 1570 list_del(&early_h2c->list); 1571 kfree(early_h2c->h2c); 1572 kfree(early_h2c); 1573 } 1574 mutex_unlock(&rtwdev->mutex); 1575 } 1576 1577 void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h) 1578 { 1579 skb_queue_tail(&rtwdev->c2h_queue, c2h); 1580 ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work); 1581 } 1582 1583 static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, 1584 struct sk_buff *skb) 1585 { 1586 u8 category = RTW89_GET_C2H_CATEGORY(skb->data); 1587 u8 class = RTW89_GET_C2H_CLASS(skb->data); 1588 u8 func = RTW89_GET_C2H_FUNC(skb->data); 1589 u16 len = RTW89_GET_C2H_LEN(skb->data); 1590 bool dump = true; 1591 1592 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) 1593 return; 1594 1595 switch (category) { 1596 case RTW89_C2H_CAT_TEST: 1597 break; 1598 case RTW89_C2H_CAT_MAC: 1599 rtw89_mac_c2h_handle(rtwdev, skb, len, class, func); 1600 if (class == RTW89_MAC_C2H_CLASS_INFO && 1601 func == RTW89_MAC_C2H_FUNC_C2H_LOG) 1602 dump = false; 1603 break; 1604 case RTW89_C2H_CAT_OUTSRC: 1605 if (class >= RTW89_PHY_C2H_CLASS_BTC_MIN && 1606 class <= RTW89_PHY_C2H_CLASS_BTC_MAX) 1607 rtw89_btc_c2h_handle(rtwdev, skb, len, class, func); 1608 else 1609 rtw89_phy_c2h_handle(rtwdev, skb, len, class, func); 1610 break; 1611 } 1612 1613 if (dump) 1614 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "C2H: ", skb->data, skb->len); 1615 } 1616 1617 void rtw89_fw_c2h_work(struct work_struct *work) 1618 { 1619 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, 1620 c2h_work); 1621 struct sk_buff *skb, *tmp; 1622 1623 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 1624 skb_unlink(skb, &rtwdev->c2h_queue); 1625 mutex_lock(&rtwdev->mutex); 1626 rtw89_fw_c2h_cmd_handle(rtwdev, skb); 1627 mutex_unlock(&rtwdev->mutex); 1628 dev_kfree_skb_any(skb); 1629 } 1630 } 1631 1632 static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev, 1633 struct rtw89_mac_h2c_info *info) 1634 { 1635 static const u32 h2c_reg[RTW89_H2CREG_MAX] = { 1636 R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, 1637 R_AX_H2CREG_DATA2, R_AX_H2CREG_DATA3 1638 }; 1639 u8 i, val, len; 1640 int ret; 1641 1642 ret = read_poll_timeout(rtw89_read8, val, val == 0, 1000, 5000, false, 1643 rtwdev, R_AX_H2CREG_CTRL); 1644 if (ret) { 1645 rtw89_warn(rtwdev, "FW does not process h2c registers\n"); 1646 return ret; 1647 } 1648 1649 len = DIV_ROUND_UP(info->content_len + RTW89_H2CREG_HDR_LEN, 1650 sizeof(info->h2creg[0])); 1651 1652 RTW89_SET_H2CREG_HDR_FUNC(&info->h2creg[0], info->id); 1653 RTW89_SET_H2CREG_HDR_LEN(&info->h2creg[0], len); 1654 for (i = 0; i < RTW89_H2CREG_MAX; i++) 1655 rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]); 1656 1657 rtw89_write8(rtwdev, R_AX_H2CREG_CTRL, B_AX_H2CREG_TRIGGER); 1658 1659 return 0; 1660 } 1661 1662 static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev, 1663 struct rtw89_mac_c2h_info *info) 1664 { 1665 static const u32 c2h_reg[RTW89_C2HREG_MAX] = { 1666 R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, 1667 R_AX_C2HREG_DATA2, R_AX_C2HREG_DATA3 1668 }; 1669 u32 ret; 1670 u8 i, val; 1671 1672 info->id = RTW89_FWCMD_C2HREG_FUNC_NULL; 1673 1674 ret = read_poll_timeout_atomic(rtw89_read8, val, val, 1, 1675 RTW89_C2H_TIMEOUT, false, rtwdev, 1676 R_AX_C2HREG_CTRL); 1677 if (ret) { 1678 rtw89_warn(rtwdev, "c2h reg timeout\n"); 1679 return ret; 1680 } 1681 1682 for (i = 0; i < RTW89_C2HREG_MAX; i++) 1683 info->c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]); 1684 1685 rtw89_write8(rtwdev, R_AX_C2HREG_CTRL, 0); 1686 1687 info->id = RTW89_GET_C2H_HDR_FUNC(*info->c2hreg); 1688 info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) - 1689 RTW89_C2HREG_HDR_LEN; 1690 1691 return 0; 1692 } 1693 1694 int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev, 1695 struct rtw89_mac_h2c_info *h2c_info, 1696 struct rtw89_mac_c2h_info *c2h_info) 1697 { 1698 u32 ret; 1699 1700 if (h2c_info && h2c_info->id != RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE) 1701 lockdep_assert_held(&rtwdev->mutex); 1702 1703 if (!h2c_info && !c2h_info) 1704 return -EINVAL; 1705 1706 if (!h2c_info) 1707 goto recv_c2h; 1708 1709 ret = rtw89_fw_write_h2c_reg(rtwdev, h2c_info); 1710 if (ret) 1711 return ret; 1712 1713 recv_c2h: 1714 if (!c2h_info) 1715 return 0; 1716 1717 ret = rtw89_fw_read_c2h_reg(rtwdev, c2h_info); 1718 if (ret) 1719 return ret; 1720 1721 return 0; 1722 } 1723 1724 void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev) 1725 { 1726 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) { 1727 rtw89_err(rtwdev, "[ERR]pwr is off\n"); 1728 return; 1729 } 1730 1731 rtw89_info(rtwdev, "FW status = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM0)); 1732 rtw89_info(rtwdev, "FW BADADDR = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM1)); 1733 rtw89_info(rtwdev, "FW EPC/RA = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM2)); 1734 rtw89_info(rtwdev, "FW MISC = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM3)); 1735 rtw89_info(rtwdev, "R_AX_HALT_C2H = 0x%x\n", 1736 rtw89_read32(rtwdev, R_AX_HALT_C2H)); 1737 rtw89_info(rtwdev, "R_AX_SER_DBG_INFO = 0x%x\n", 1738 rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); 1739 1740 rtw89_fw_prog_cnt_dump(rtwdev); 1741 } 1742