1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2020 Realtek Corporation 3 */ 4 #include <linux/ip.h> 5 #include <linux/udp.h> 6 7 #include "coex.h" 8 #include "core.h" 9 #include "efuse.h" 10 #include "fw.h" 11 #include "mac.h" 12 #include "phy.h" 13 #include "ps.h" 14 #include "reg.h" 15 #include "sar.h" 16 #include "ser.h" 17 #include "txrx.h" 18 #include "util.h" 19 20 static bool rtw89_disable_ps_mode; 21 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644); 22 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode"); 23 24 static struct ieee80211_channel rtw89_channels_2ghz[] = { 25 { .center_freq = 2412, .hw_value = 1, }, 26 { .center_freq = 2417, .hw_value = 2, }, 27 { .center_freq = 2422, .hw_value = 3, }, 28 { .center_freq = 2427, .hw_value = 4, }, 29 { .center_freq = 2432, .hw_value = 5, }, 30 { .center_freq = 2437, .hw_value = 6, }, 31 { .center_freq = 2442, .hw_value = 7, }, 32 { .center_freq = 2447, .hw_value = 8, }, 33 { .center_freq = 2452, .hw_value = 9, }, 34 { .center_freq = 2457, .hw_value = 10, }, 35 { .center_freq = 2462, .hw_value = 11, }, 36 { .center_freq = 2467, .hw_value = 12, }, 37 { .center_freq = 2472, .hw_value = 13, }, 38 { .center_freq = 2484, .hw_value = 14, }, 39 }; 40 41 static struct ieee80211_channel rtw89_channels_5ghz[] = { 42 {.center_freq = 5180, .hw_value = 36,}, 43 {.center_freq = 5200, .hw_value = 40,}, 44 {.center_freq = 5220, .hw_value = 44,}, 45 {.center_freq = 5240, .hw_value = 48,}, 46 {.center_freq = 5260, .hw_value = 52,}, 47 {.center_freq = 5280, .hw_value = 56,}, 48 {.center_freq = 5300, .hw_value = 60,}, 49 {.center_freq = 5320, .hw_value = 64,}, 50 {.center_freq = 5500, .hw_value = 100,}, 51 {.center_freq = 5520, .hw_value = 104,}, 52 {.center_freq = 5540, .hw_value = 108,}, 53 {.center_freq = 5560, .hw_value = 112,}, 54 {.center_freq = 5580, .hw_value = 116,}, 55 {.center_freq = 5600, .hw_value = 120,}, 56 {.center_freq = 5620, .hw_value = 124,}, 57 {.center_freq = 5640, .hw_value = 128,}, 58 {.center_freq = 5660, .hw_value = 132,}, 59 {.center_freq = 5680, .hw_value = 136,}, 60 {.center_freq = 5700, .hw_value = 140,}, 61 {.center_freq = 5720, .hw_value = 144,}, 62 {.center_freq = 5745, .hw_value = 149,}, 63 {.center_freq = 5765, .hw_value = 153,}, 64 {.center_freq = 5785, .hw_value = 157,}, 65 {.center_freq = 5805, .hw_value = 161,}, 66 {.center_freq = 5825, .hw_value = 165, 67 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 68 }; 69 70 static struct ieee80211_rate rtw89_bitrates[] = { 71 { .bitrate = 10, .hw_value = 0x00, }, 72 { .bitrate = 20, .hw_value = 0x01, }, 73 { .bitrate = 55, .hw_value = 0x02, }, 74 { .bitrate = 110, .hw_value = 0x03, }, 75 { .bitrate = 60, .hw_value = 0x04, }, 76 { .bitrate = 90, .hw_value = 0x05, }, 77 { .bitrate = 120, .hw_value = 0x06, }, 78 { .bitrate = 180, .hw_value = 0x07, }, 79 { .bitrate = 240, .hw_value = 0x08, }, 80 { .bitrate = 360, .hw_value = 0x09, }, 81 { .bitrate = 480, .hw_value = 0x0a, }, 82 { .bitrate = 540, .hw_value = 0x0b, }, 83 }; 84 85 u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate) 86 { 87 struct ieee80211_rate rate; 88 89 if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) { 90 rtw89_info(rtwdev, "invalid rpt rate %d\n", rpt_rate); 91 return 0; 92 } 93 94 rate = rtw89_bitrates[rpt_rate]; 95 96 return rate.bitrate; 97 } 98 99 static struct ieee80211_supported_band rtw89_sband_2ghz = { 100 .band = NL80211_BAND_2GHZ, 101 .channels = rtw89_channels_2ghz, 102 .n_channels = ARRAY_SIZE(rtw89_channels_2ghz), 103 .bitrates = rtw89_bitrates, 104 .n_bitrates = ARRAY_SIZE(rtw89_bitrates), 105 .ht_cap = {0}, 106 .vht_cap = {0}, 107 }; 108 109 static struct ieee80211_supported_band rtw89_sband_5ghz = { 110 .band = NL80211_BAND_5GHZ, 111 .channels = rtw89_channels_5ghz, 112 .n_channels = ARRAY_SIZE(rtw89_channels_5ghz), 113 114 /* 5G has no CCK rates, 1M/2M/5.5M/11M */ 115 .bitrates = rtw89_bitrates + 4, 116 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, 117 .ht_cap = {0}, 118 .vht_cap = {0}, 119 }; 120 121 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev, 122 struct rtw89_traffic_stats *stats, 123 struct sk_buff *skb, bool tx) 124 { 125 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 126 127 if (!ieee80211_is_data(hdr->frame_control)) 128 return; 129 130 if (is_broadcast_ether_addr(hdr->addr1) || 131 is_multicast_ether_addr(hdr->addr1)) 132 return; 133 134 if (tx) { 135 stats->tx_cnt++; 136 stats->tx_unicast += skb->len; 137 } else { 138 stats->rx_cnt++; 139 stats->rx_unicast += skb->len; 140 } 141 } 142 143 static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef, 144 struct rtw89_channel_params *chan_param) 145 { 146 struct ieee80211_channel *channel = chandef->chan; 147 enum nl80211_chan_width width = chandef->width; 148 u32 primary_freq, center_freq; 149 u8 center_chan; 150 u8 bandwidth = RTW89_CHANNEL_WIDTH_20; 151 u8 primary_chan_idx = 0; 152 153 center_chan = channel->hw_value; 154 primary_freq = channel->center_freq; 155 center_freq = chandef->center_freq1; 156 157 switch (width) { 158 case NL80211_CHAN_WIDTH_20_NOHT: 159 case NL80211_CHAN_WIDTH_20: 160 bandwidth = RTW89_CHANNEL_WIDTH_20; 161 primary_chan_idx = RTW89_SC_DONT_CARE; 162 break; 163 case NL80211_CHAN_WIDTH_40: 164 bandwidth = RTW89_CHANNEL_WIDTH_40; 165 if (primary_freq > center_freq) { 166 primary_chan_idx = RTW89_SC_20_UPPER; 167 center_chan -= 2; 168 } else { 169 primary_chan_idx = RTW89_SC_20_LOWER; 170 center_chan += 2; 171 } 172 break; 173 case NL80211_CHAN_WIDTH_80: 174 bandwidth = RTW89_CHANNEL_WIDTH_80; 175 if (primary_freq > center_freq) { 176 if (primary_freq - center_freq == 10) { 177 primary_chan_idx = RTW89_SC_20_UPPER; 178 center_chan -= 2; 179 } else { 180 primary_chan_idx = RTW89_SC_20_UPMOST; 181 center_chan -= 6; 182 } 183 } else { 184 if (center_freq - primary_freq == 10) { 185 primary_chan_idx = RTW89_SC_20_LOWER; 186 center_chan += 2; 187 } else { 188 primary_chan_idx = RTW89_SC_20_LOWEST; 189 center_chan += 6; 190 } 191 } 192 break; 193 default: 194 center_chan = 0; 195 break; 196 } 197 198 chan_param->center_chan = center_chan; 199 chan_param->primary_chan = channel->hw_value; 200 chan_param->bandwidth = bandwidth; 201 chan_param->pri_ch_idx = primary_chan_idx; 202 } 203 204 void rtw89_set_channel(struct rtw89_dev *rtwdev) 205 { 206 struct ieee80211_hw *hw = rtwdev->hw; 207 const struct rtw89_chip_info *chip = rtwdev->chip; 208 struct rtw89_hal *hal = &rtwdev->hal; 209 struct rtw89_channel_params ch_param; 210 struct rtw89_channel_help_params bak; 211 u8 center_chan, bandwidth; 212 u8 band_type; 213 bool band_changed; 214 215 rtw89_get_channel_params(&hw->conf.chandef, &ch_param); 216 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 217 return; 218 219 center_chan = ch_param.center_chan; 220 bandwidth = ch_param.bandwidth; 221 band_type = center_chan > 14 ? RTW89_BAND_5G : RTW89_BAND_2G; 222 band_changed = hal->current_band_type != band_type || 223 hal->current_channel == 0; 224 225 hal->current_band_width = bandwidth; 226 hal->current_channel = center_chan; 227 hal->prev_primary_channel = hal->current_primary_channel; 228 hal->current_primary_channel = ch_param.primary_chan; 229 hal->current_band_type = band_type; 230 231 switch (center_chan) { 232 case 1 ... 14: 233 hal->current_subband = RTW89_CH_2G; 234 break; 235 case 36 ... 64: 236 hal->current_subband = RTW89_CH_5G_BAND_1; 237 break; 238 case 100 ... 144: 239 hal->current_subband = RTW89_CH_5G_BAND_3; 240 break; 241 case 149 ... 177: 242 hal->current_subband = RTW89_CH_5G_BAND_4; 243 break; 244 } 245 246 rtw89_chip_set_channel_prepare(rtwdev, &bak); 247 248 chip->ops->set_channel(rtwdev, &ch_param); 249 250 rtw89_chip_set_txpwr(rtwdev); 251 252 rtw89_chip_set_channel_done(rtwdev, &bak); 253 254 if (band_changed) { 255 rtw89_btc_ntfy_switch_band(rtwdev, RTW89_PHY_0, hal->current_band_type); 256 rtw89_chip_rfk_band_changed(rtwdev); 257 } 258 } 259 260 static enum rtw89_core_tx_type 261 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev, 262 struct sk_buff *skb) 263 { 264 struct ieee80211_hdr *hdr = (void *)skb->data; 265 __le16 fc = hdr->frame_control; 266 267 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc)) 268 return RTW89_CORE_TX_TYPE_MGMT; 269 270 return RTW89_CORE_TX_TYPE_DATA; 271 } 272 273 static void 274 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev, 275 struct rtw89_core_tx_request *tx_req, u8 tid) 276 { 277 struct ieee80211_sta *sta = tx_req->sta; 278 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 279 struct rtw89_sta *rtwsta; 280 u8 ampdu_num; 281 282 if (!sta) { 283 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n"); 284 return; 285 } 286 287 rtwsta = (struct rtw89_sta *)sta->drv_priv; 288 289 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ? 290 rtwsta->ampdu_params[tid].agg_num : 291 4 << sta->ht_cap.ampdu_factor) - 1); 292 293 desc_info->agg_en = true; 294 desc_info->ampdu_density = sta->ht_cap.ampdu_density; 295 desc_info->ampdu_num = ampdu_num; 296 } 297 298 static void 299 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev, 300 struct rtw89_core_tx_request *tx_req) 301 { 302 struct ieee80211_vif *vif = tx_req->vif; 303 struct ieee80211_tx_info *info; 304 struct ieee80211_key_conf *key; 305 struct rtw89_vif *rtwvif; 306 struct rtw89_addr_cam_entry *addr_cam; 307 struct rtw89_sec_cam_entry *sec_cam; 308 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 309 struct sk_buff *skb = tx_req->skb; 310 u8 sec_type = RTW89_SEC_KEY_TYPE_NONE; 311 312 if (!vif) { 313 rtw89_warn(rtwdev, "cannot set sec key without vif\n"); 314 return; 315 } 316 317 rtwvif = (struct rtw89_vif *)vif->drv_priv; 318 addr_cam = &rtwvif->addr_cam; 319 320 info = IEEE80211_SKB_CB(skb); 321 key = info->control.hw_key; 322 sec_cam = addr_cam->sec_entries[key->hw_key_idx]; 323 if (!sec_cam) { 324 rtw89_warn(rtwdev, "sec cam entry is empty\n"); 325 return; 326 } 327 328 switch (key->cipher) { 329 case WLAN_CIPHER_SUITE_WEP40: 330 sec_type = RTW89_SEC_KEY_TYPE_WEP40; 331 break; 332 case WLAN_CIPHER_SUITE_WEP104: 333 sec_type = RTW89_SEC_KEY_TYPE_WEP104; 334 break; 335 case WLAN_CIPHER_SUITE_TKIP: 336 sec_type = RTW89_SEC_KEY_TYPE_TKIP; 337 break; 338 case WLAN_CIPHER_SUITE_CCMP: 339 sec_type = RTW89_SEC_KEY_TYPE_CCMP128; 340 break; 341 case WLAN_CIPHER_SUITE_CCMP_256: 342 sec_type = RTW89_SEC_KEY_TYPE_CCMP256; 343 break; 344 case WLAN_CIPHER_SUITE_GCMP: 345 sec_type = RTW89_SEC_KEY_TYPE_GCMP128; 346 break; 347 case WLAN_CIPHER_SUITE_GCMP_256: 348 sec_type = RTW89_SEC_KEY_TYPE_GCMP256; 349 break; 350 default: 351 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher); 352 return; 353 } 354 355 desc_info->sec_en = true; 356 desc_info->sec_type = sec_type; 357 desc_info->sec_cam_idx = sec_cam->sec_cam_idx; 358 } 359 360 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev, 361 struct rtw89_core_tx_request *tx_req) 362 { 363 struct sk_buff *skb = tx_req->skb; 364 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 365 struct ieee80211_vif *vif = tx_info->control.vif; 366 struct rtw89_hal *hal = &rtwdev->hal; 367 u16 lowest_rate = hal->current_band_type == RTW89_BAND_2G ? 368 RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6; 369 370 if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta) 371 return lowest_rate; 372 373 return __ffs(vif->bss_conf.basic_rates) + lowest_rate; 374 } 375 376 static void 377 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev, 378 struct rtw89_core_tx_request *tx_req) 379 { 380 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 381 u8 qsel, ch_dma; 382 383 qsel = RTW89_TX_QSEL_B0_MGMT; 384 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 385 386 desc_info->qsel = RTW89_TX_QSEL_B0_MGMT; 387 desc_info->ch_dma = ch_dma; 388 389 /* fixed data rate for mgmt frames */ 390 desc_info->en_wd_info = true; 391 desc_info->use_rate = true; 392 desc_info->dis_data_fb = true; 393 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req); 394 395 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 396 "tx mgmt frame with rate 0x%x on channel %d (bw %d)\n", 397 desc_info->data_rate, rtwdev->hal.current_channel, 398 rtwdev->hal.current_band_width); 399 } 400 401 static void 402 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev, 403 struct rtw89_core_tx_request *tx_req) 404 { 405 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 406 407 desc_info->is_bmc = false; 408 desc_info->wd_page = false; 409 desc_info->ch_dma = RTW89_DMA_H2C; 410 } 411 412 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc) 413 { 414 static const u8 rtw89_bandwidth_to_om[] = { 415 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20, 416 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40, 417 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80, 418 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80, 419 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80, 420 }; 421 const struct rtw89_chip_info *chip = rtwdev->chip; 422 struct rtw89_hal *hal = &rtwdev->hal; 423 u8 om_bandwidth; 424 425 if (!chip->dis_2g_40m_ul_ofdma || 426 hal->current_band_type != RTW89_BAND_2G || 427 hal->current_band_width != RTW89_CHANNEL_WIDTH_40) 428 return; 429 430 om_bandwidth = hal->current_band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ? 431 rtw89_bandwidth_to_om[hal->current_band_width] : 0; 432 *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) | 433 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) | 434 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) | 435 le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) | 436 le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) | 437 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) | 438 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) | 439 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) | 440 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS); 441 } 442 443 static bool 444 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev, 445 struct rtw89_core_tx_request *tx_req, 446 enum btc_pkt_type pkt_type) 447 { 448 struct ieee80211_sta *sta = tx_req->sta; 449 struct sk_buff *skb = tx_req->skb; 450 struct ieee80211_hdr *hdr = (void *)skb->data; 451 __le16 fc = hdr->frame_control; 452 453 /* AP IOT issue with EAPoL, ARP and DHCP */ 454 if (pkt_type < PACKET_MAX) 455 return false; 456 457 if (!sta || !sta->he_cap.has_he) 458 return false; 459 460 if (!ieee80211_is_data_qos(fc)) 461 return false; 462 463 if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN) 464 return false; 465 466 return true; 467 } 468 469 static void 470 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev, 471 struct rtw89_core_tx_request *tx_req) 472 { 473 struct ieee80211_sta *sta = tx_req->sta; 474 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 475 struct sk_buff *skb = tx_req->skb; 476 struct ieee80211_hdr *hdr = (void *)skb->data; 477 __le16 fc = hdr->frame_control; 478 void *data; 479 __le32 *htc; 480 u8 *qc; 481 int hdr_len; 482 483 hdr_len = ieee80211_has_a4(fc) ? 32 : 26; 484 data = skb_push(skb, IEEE80211_HT_CTL_LEN); 485 memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len); 486 487 hdr = data; 488 htc = data + hdr_len; 489 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER); 490 *htc = rtwsta->htc_template ? rtwsta->htc_template : 491 le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) | 492 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID); 493 494 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN; 495 qc[0] |= IEEE80211_QOS_CTL_EOSP; 496 } 497 498 static void 499 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev, 500 struct rtw89_core_tx_request *tx_req, 501 enum btc_pkt_type pkt_type) 502 { 503 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 504 struct ieee80211_vif *vif = tx_req->vif; 505 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 506 507 if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type)) 508 goto desc_bk; 509 510 __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req); 511 512 desc_info->pkt_size += IEEE80211_HT_CTL_LEN; 513 desc_info->a_ctrl_bsr = true; 514 515 desc_bk: 516 if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr) 517 return; 518 519 rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr; 520 desc_info->bk = true; 521 } 522 523 static void 524 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, 525 struct rtw89_core_tx_request *tx_req) 526 { 527 struct ieee80211_vif *vif = tx_req->vif; 528 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 529 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; 530 struct rtw89_hal *hal = &rtwdev->hal; 531 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 532 struct sk_buff *skb = tx_req->skb; 533 u8 tid, tid_indicate; 534 u8 qsel, ch_dma; 535 536 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; 537 tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid); 538 qsel = rtw89_core_get_qsel(rtwdev, tid); 539 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 540 541 desc_info->ch_dma = ch_dma; 542 desc_info->tid_indicate = tid_indicate; 543 desc_info->qsel = qsel; 544 545 /* enable wd_info for AMPDU */ 546 desc_info->en_wd_info = true; 547 548 if (IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU) 549 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, tid); 550 if (IEEE80211_SKB_CB(skb)->control.hw_key) 551 rtw89_core_tx_update_sec_key(rtwdev, tx_req); 552 553 if (rate_pattern->enable) 554 desc_info->data_retry_lowest_rate = rate_pattern->rate; 555 else if (hal->current_band_type == RTW89_BAND_2G) 556 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1; 557 else 558 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6; 559 } 560 561 static enum btc_pkt_type 562 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev, 563 struct rtw89_core_tx_request *tx_req) 564 { 565 struct sk_buff *skb = tx_req->skb; 566 struct udphdr *udphdr; 567 568 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) { 569 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work); 570 return PACKET_EAPOL; 571 } 572 573 if (skb->protocol == htons(ETH_P_ARP)) { 574 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work); 575 return PACKET_ARP; 576 } 577 578 if (skb->protocol == htons(ETH_P_IP) && 579 ip_hdr(skb)->protocol == IPPROTO_UDP) { 580 udphdr = udp_hdr(skb); 581 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) || 582 (udphdr->source == htons(68) && udphdr->dest == htons(67))) && 583 skb->len > 282) { 584 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work); 585 return PACKET_DHCP; 586 } 587 } 588 589 if (skb->protocol == htons(ETH_P_IP) && 590 ip_hdr(skb)->protocol == IPPROTO_ICMP) { 591 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work); 592 return PACKET_ICMP; 593 } 594 595 return PACKET_MAX; 596 } 597 598 static void 599 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev, 600 struct rtw89_core_tx_request *tx_req) 601 { 602 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 603 struct sk_buff *skb = tx_req->skb; 604 struct ieee80211_hdr *hdr = (void *)skb->data; 605 enum rtw89_core_tx_type tx_type; 606 enum btc_pkt_type pkt_type; 607 bool is_bmc; 608 u16 seq; 609 610 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; 611 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) { 612 tx_type = rtw89_core_get_tx_type(rtwdev, skb); 613 tx_req->tx_type = tx_type; 614 } 615 is_bmc = (is_broadcast_ether_addr(hdr->addr1) || 616 is_multicast_ether_addr(hdr->addr1)); 617 618 desc_info->seq = seq; 619 desc_info->pkt_size = skb->len; 620 desc_info->is_bmc = is_bmc; 621 desc_info->wd_page = true; 622 623 switch (tx_req->tx_type) { 624 case RTW89_CORE_TX_TYPE_MGMT: 625 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req); 626 break; 627 case RTW89_CORE_TX_TYPE_DATA: 628 rtw89_core_tx_update_data_info(rtwdev, tx_req); 629 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req); 630 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type); 631 break; 632 case RTW89_CORE_TX_TYPE_FWCMD: 633 rtw89_core_tx_update_h2c_info(rtwdev, tx_req); 634 break; 635 } 636 } 637 638 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel) 639 { 640 u8 ch_dma; 641 642 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 643 644 rtw89_hci_tx_kick_off(rtwdev, ch_dma); 645 } 646 647 int rtw89_h2c_tx(struct rtw89_dev *rtwdev, 648 struct sk_buff *skb, bool fwdl) 649 { 650 struct rtw89_core_tx_request tx_req = {0}; 651 u32 cnt; 652 int ret; 653 654 tx_req.skb = skb; 655 tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD; 656 if (fwdl) 657 tx_req.desc_info.fw_dl = true; 658 659 rtw89_core_tx_update_desc_info(rtwdev, &tx_req); 660 661 if (!fwdl) 662 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len); 663 664 cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12); 665 if (cnt == 0) { 666 rtw89_err(rtwdev, "no tx fwcmd resource\n"); 667 return -ENOSPC; 668 } 669 670 ret = rtw89_hci_tx_write(rtwdev, &tx_req); 671 if (ret) { 672 rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); 673 return ret; 674 } 675 rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12); 676 677 return 0; 678 } 679 680 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, 681 struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel) 682 { 683 struct rtw89_core_tx_request tx_req = {0}; 684 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 685 int ret; 686 687 tx_req.skb = skb; 688 tx_req.sta = sta; 689 tx_req.vif = vif; 690 691 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true); 692 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true); 693 rtw89_core_tx_update_desc_info(rtwdev, &tx_req); 694 ret = rtw89_hci_tx_write(rtwdev, &tx_req); 695 if (ret) { 696 rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); 697 return ret; 698 } 699 700 if (qsel) 701 *qsel = tx_req.desc_info.qsel; 702 703 return 0; 704 } 705 706 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info) 707 { 708 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) | 709 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) | 710 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) | 711 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) | 712 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) | 713 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl); 714 715 return cpu_to_le32(dword); 716 } 717 718 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info) 719 { 720 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) | 721 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) | 722 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size); 723 724 return cpu_to_le32(dword); 725 } 726 727 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info) 728 { 729 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) | 730 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) | 731 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk); 732 733 return cpu_to_le32(dword); 734 } 735 736 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info) 737 { 738 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) | 739 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) | 740 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb); 741 742 return cpu_to_le32(dword); 743 } 744 745 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info) 746 { 747 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) | 748 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) | 749 FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE, 750 desc_info->data_retry_lowest_rate); 751 752 return cpu_to_le32(dword); 753 } 754 755 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info) 756 { 757 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) | 758 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) | 759 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) | 760 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx); 761 762 return cpu_to_le32(dword); 763 } 764 765 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info) 766 { 767 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) | 768 FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1); 769 770 return cpu_to_le32(dword); 771 } 772 773 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev, 774 struct rtw89_tx_desc_info *desc_info, 775 void *txdesc) 776 { 777 struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc; 778 struct rtw89_txwd_info *txwd_info; 779 780 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info); 781 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info); 782 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info); 783 784 if (!desc_info->en_wd_info) 785 return; 786 787 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1); 788 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info); 789 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info); 790 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info); 791 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info); 792 793 } 794 EXPORT_SYMBOL(rtw89_core_fill_txdesc); 795 796 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev, 797 struct sk_buff *skb, 798 struct rtw89_rx_phy_ppdu *phy_ppdu) 799 { 800 bool rx_cnt_valid = false; 801 u8 plcp_size = 0; 802 u8 usr_num = 0; 803 u8 *phy_sts; 804 805 rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data); 806 plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3; 807 usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data); 808 if (usr_num > RTW89_PPDU_MAX_USR) { 809 rtw89_warn(rtwdev, "Invalid user number in mac info\n"); 810 return -EINVAL; 811 } 812 813 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE; 814 phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE; 815 /* 8-byte alignment */ 816 if (usr_num & BIT(0)) 817 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE; 818 if (rx_cnt_valid) 819 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE; 820 phy_sts += plcp_size; 821 822 phy_ppdu->buf = phy_sts; 823 phy_ppdu->len = skb->data + skb->len - phy_sts; 824 825 return 0; 826 } 827 828 static void rtw89_core_rx_process_phy_ppdu_iter(void *data, 829 struct ieee80211_sta *sta) 830 { 831 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 832 struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data; 833 834 if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self) 835 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg); 836 } 837 838 #define VAR_LEN 0xff 839 #define VAR_LEN_UNIT 8 840 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr) 841 { 842 static const u8 physts_ie_len_tab[32] = { 843 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN, 844 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN, 845 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32 846 }; 847 u16 ie_len; 848 u8 ie; 849 850 ie = RTW89_GET_PHY_STS_IE_TYPE(addr); 851 if (physts_ie_len_tab[ie] != VAR_LEN) 852 ie_len = physts_ie_len_tab[ie]; 853 else 854 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT; 855 856 return ie_len; 857 } 858 859 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr, 860 struct rtw89_rx_phy_ppdu *phy_ppdu) 861 { 862 s16 cfo; 863 864 phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr); 865 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) 866 return; 867 /* sign conversion for S(12,2) */ 868 cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_CFO(addr), 11); 869 rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); 870 } 871 872 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr, 873 struct rtw89_rx_phy_ppdu *phy_ppdu) 874 { 875 u8 ie; 876 877 ie = RTW89_GET_PHY_STS_IE_TYPE(addr); 878 switch (ie) { 879 case RTW89_PHYSTS_IE01_CMN_OFDM: 880 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu); 881 break; 882 default: 883 break; 884 } 885 886 return 0; 887 } 888 889 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu) 890 { 891 s8 *rssi = phy_ppdu->rssi; 892 u8 *buf = phy_ppdu->buf; 893 894 phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf); 895 phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf); 896 rssi[RF_PATH_A] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_A(buf)); 897 rssi[RF_PATH_B] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_B(buf)); 898 rssi[RF_PATH_C] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_C(buf)); 899 rssi[RF_PATH_D] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_D(buf)); 900 } 901 902 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev, 903 struct rtw89_rx_phy_ppdu *phy_ppdu) 904 { 905 if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) { 906 rtw89_warn(rtwdev, "phy ppdu len mismatch\n"); 907 return -EINVAL; 908 } 909 rtw89_core_update_phy_ppdu(phy_ppdu); 910 ieee80211_iterate_stations_atomic(rtwdev->hw, 911 rtw89_core_rx_process_phy_ppdu_iter, 912 phy_ppdu); 913 914 return 0; 915 } 916 917 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev, 918 struct rtw89_rx_phy_ppdu *phy_ppdu) 919 { 920 u16 ie_len; 921 u8 *pos, *end; 922 923 /* mark invalid reports and bypass them */ 924 if (phy_ppdu->ie < RTW89_CCK_PKT) 925 return -EINVAL; 926 927 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; 928 end = (u8 *)phy_ppdu->buf + phy_ppdu->len; 929 while (pos < end) { 930 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos); 931 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu); 932 pos += ie_len; 933 if (pos > end || ie_len == 0) { 934 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 935 "phy status parse failed\n"); 936 return -EINVAL; 937 } 938 } 939 940 return 0; 941 } 942 943 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev, 944 struct rtw89_rx_phy_ppdu *phy_ppdu) 945 { 946 int ret; 947 948 ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu); 949 if (ret) 950 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n"); 951 else 952 phy_ppdu->valid = true; 953 } 954 955 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev, 956 const struct rtw89_rx_desc_info *desc_info, 957 bool rx_status) 958 { 959 switch (desc_info->gi_ltf) { 960 case RTW89_GILTF_SGI_4XHE08: 961 case RTW89_GILTF_2XHE08: 962 case RTW89_GILTF_1XHE08: 963 return NL80211_RATE_INFO_HE_GI_0_8; 964 case RTW89_GILTF_2XHE16: 965 case RTW89_GILTF_1XHE16: 966 return NL80211_RATE_INFO_HE_GI_1_6; 967 case RTW89_GILTF_LGI_4XHE32: 968 return NL80211_RATE_INFO_HE_GI_3_2; 969 default: 970 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf); 971 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX; 972 } 973 } 974 975 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev, 976 struct rtw89_rx_desc_info *desc_info, 977 struct ieee80211_rx_status *status) 978 { 979 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 980 u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf; 981 u16 data_rate; 982 bool ret; 983 984 data_rate = desc_info->data_rate; 985 data_rate_mode = GET_DATA_RATE_MODE(data_rate); 986 if (data_rate_mode == DATA_RATE_MODE_NON_HT) { 987 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate); 988 /* rate_idx is still hardware value here */ 989 } else if (data_rate_mode == DATA_RATE_MODE_HT) { 990 rate_idx = GET_DATA_RATE_HT_IDX(data_rate); 991 } else if (data_rate_mode == DATA_RATE_MODE_VHT) { 992 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 993 } else if (data_rate_mode == DATA_RATE_MODE_HE) { 994 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 995 } else { 996 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); 997 } 998 999 if (desc_info->bw == RTW89_CHANNEL_WIDTH_80) 1000 bw = RATE_INFO_BW_80; 1001 else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40) 1002 bw = RATE_INFO_BW_40; 1003 else 1004 bw = RATE_INFO_BW_20; 1005 1006 gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false); 1007 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt && 1008 status->rate_idx == rate_idx && 1009 status->he_gi == gi_ltf && 1010 status->bw == bw; 1011 1012 return ret; 1013 } 1014 1015 struct rtw89_vif_rx_stats_iter_data { 1016 struct rtw89_dev *rtwdev; 1017 struct rtw89_rx_phy_ppdu *phy_ppdu; 1018 struct rtw89_rx_desc_info *desc_info; 1019 struct sk_buff *skb; 1020 const u8 *bssid; 1021 }; 1022 1023 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac, 1024 struct ieee80211_vif *vif) 1025 { 1026 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1027 struct rtw89_vif_rx_stats_iter_data *iter_data = data; 1028 struct rtw89_dev *rtwdev = iter_data->rtwdev; 1029 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat; 1030 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; 1031 struct sk_buff *skb = iter_data->skb; 1032 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1033 const u8 *bssid = iter_data->bssid; 1034 1035 if (!ether_addr_equal(vif->bss_conf.bssid, bssid)) 1036 return; 1037 1038 if (ieee80211_is_beacon(hdr->frame_control)) 1039 pkt_stat->beacon_nr++; 1040 1041 if (!ether_addr_equal(vif->addr, hdr->addr1)) 1042 return; 1043 1044 if (desc_info->data_rate < RTW89_HW_RATE_NR) 1045 pkt_stat->rx_rate_cnt[desc_info->data_rate]++; 1046 1047 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false); 1048 } 1049 1050 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev, 1051 struct rtw89_rx_phy_ppdu *phy_ppdu, 1052 struct rtw89_rx_desc_info *desc_info, 1053 struct sk_buff *skb) 1054 { 1055 struct rtw89_vif_rx_stats_iter_data iter_data; 1056 1057 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false); 1058 1059 iter_data.rtwdev = rtwdev; 1060 iter_data.phy_ppdu = phy_ppdu; 1061 iter_data.desc_info = desc_info; 1062 iter_data.skb = skb; 1063 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data); 1064 rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data); 1065 } 1066 1067 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev, 1068 struct ieee80211_rx_status *status) 1069 { 1070 u16 chan = rtwdev->hal.prev_primary_channel; 1071 u8 band = chan <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; 1072 1073 if (status->band != NL80211_BAND_2GHZ && 1074 status->encoding == RX_ENC_LEGACY && 1075 status->rate_idx < RTW89_HW_RATE_OFDM6) { 1076 status->freq = ieee80211_channel_to_frequency(chan, band); 1077 status->band = band; 1078 } 1079 } 1080 1081 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status) 1082 { 1083 if (rx_status->band == NL80211_BAND_2GHZ || 1084 rx_status->encoding != RX_ENC_LEGACY) 1085 return; 1086 /* No 4 CCK rates for non-2G */ 1087 rx_status->rate_idx -= 4; 1088 } 1089 1090 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev, 1091 struct rtw89_rx_phy_ppdu *phy_ppdu, 1092 struct rtw89_rx_desc_info *desc_info, 1093 struct sk_buff *skb) 1094 { 1095 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1096 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band]; 1097 struct sk_buff *skb_ppdu = NULL, *tmp; 1098 struct ieee80211_rx_status *rx_status; 1099 1100 if (curr > RTW89_MAX_PPDU_CNT) 1101 return; 1102 1103 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) { 1104 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]); 1105 rx_status = IEEE80211_SKB_RXCB(skb_ppdu); 1106 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status)) 1107 rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status); 1108 rtw89_correct_cck_chan(rtwdev, rx_status); 1109 rtw89_core_hw_to_sband_rate(rx_status); 1110 rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); 1111 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); 1112 rtwdev->napi_budget_countdown--; 1113 } 1114 } 1115 1116 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev, 1117 struct rtw89_rx_desc_info *desc_info, 1118 struct sk_buff *skb) 1119 { 1120 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false, 1121 .len = skb->len, 1122 .to_self = desc_info->addr1_match, 1123 .rate = desc_info->data_rate, 1124 .mac_id = desc_info->mac_id}; 1125 int ret; 1126 1127 if (desc_info->mac_info_valid) 1128 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu); 1129 ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu); 1130 if (ret) 1131 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n"); 1132 1133 rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu); 1134 rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb); 1135 dev_kfree_skb_any(skb); 1136 } 1137 1138 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev, 1139 struct rtw89_rx_desc_info *desc_info, 1140 struct sk_buff *skb) 1141 { 1142 switch (desc_info->pkt_type) { 1143 case RTW89_CORE_RX_TYPE_C2H: 1144 rtw89_fw_c2h_irqsafe(rtwdev, skb); 1145 break; 1146 case RTW89_CORE_RX_TYPE_PPDU_STAT: 1147 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb); 1148 break; 1149 default: 1150 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n", 1151 desc_info->pkt_type); 1152 dev_kfree_skb_any(skb); 1153 break; 1154 } 1155 } 1156 1157 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev, 1158 struct rtw89_rx_desc_info *desc_info, 1159 u8 *data, u32 data_offset) 1160 { 1161 struct rtw89_rxdesc_short *rxd_s; 1162 struct rtw89_rxdesc_long *rxd_l; 1163 u8 shift_len, drv_info_len; 1164 1165 rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset); 1166 desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s); 1167 desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s); 1168 desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s); 1169 desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s); 1170 desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s); 1171 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s); 1172 desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s); 1173 desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s); 1174 desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s); 1175 desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s); 1176 desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s); 1177 desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s); 1178 desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s); 1179 desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s); 1180 desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s); 1181 desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s); 1182 desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s); 1183 desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s); 1184 1185 shift_len = desc_info->shift << 1; /* 2-byte unit */ 1186 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */ 1187 desc_info->offset = data_offset + shift_len + drv_info_len; 1188 desc_info->ready = true; 1189 1190 if (!desc_info->long_rxdesc) 1191 return; 1192 1193 rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset); 1194 desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l); 1195 desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l); 1196 desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l); 1197 desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l); 1198 desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l); 1199 desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l); 1200 } 1201 EXPORT_SYMBOL(rtw89_core_query_rxdesc); 1202 1203 struct rtw89_core_iter_rx_status { 1204 struct rtw89_dev *rtwdev; 1205 struct ieee80211_rx_status *rx_status; 1206 struct rtw89_rx_desc_info *desc_info; 1207 u8 mac_id; 1208 }; 1209 1210 static 1211 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta) 1212 { 1213 struct rtw89_core_iter_rx_status *iter_data = 1214 (struct rtw89_core_iter_rx_status *)data; 1215 struct ieee80211_rx_status *rx_status = iter_data->rx_status; 1216 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1217 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; 1218 u8 mac_id = iter_data->mac_id; 1219 1220 if (mac_id != rtwsta->mac_id) 1221 return; 1222 1223 rtwsta->rx_status = *rx_status; 1224 rtwsta->rx_hw_rate = desc_info->data_rate; 1225 } 1226 1227 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev, 1228 struct rtw89_rx_desc_info *desc_info, 1229 struct ieee80211_rx_status *rx_status) 1230 { 1231 struct rtw89_core_iter_rx_status iter_data; 1232 1233 if (!desc_info->addr1_match || !desc_info->long_rxdesc) 1234 return; 1235 1236 if (desc_info->frame_type != RTW89_RX_TYPE_DATA) 1237 return; 1238 1239 iter_data.rtwdev = rtwdev; 1240 iter_data.rx_status = rx_status; 1241 iter_data.desc_info = desc_info; 1242 iter_data.mac_id = desc_info->mac_id; 1243 ieee80211_iterate_stations_atomic(rtwdev->hw, 1244 rtw89_core_stats_sta_rx_status_iter, 1245 &iter_data); 1246 } 1247 1248 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev, 1249 struct rtw89_rx_desc_info *desc_info, 1250 struct ieee80211_rx_status *rx_status) 1251 { 1252 struct ieee80211_hw *hw = rtwdev->hw; 1253 u16 data_rate; 1254 u8 data_rate_mode; 1255 1256 /* currently using single PHY */ 1257 rx_status->freq = hw->conf.chandef.chan->center_freq; 1258 rx_status->band = hw->conf.chandef.chan->band; 1259 1260 if (desc_info->icv_err || desc_info->crc32_err) 1261 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 1262 1263 if (desc_info->hw_dec && 1264 !(desc_info->sw_dec || desc_info->icv_err)) 1265 rx_status->flag |= RX_FLAG_DECRYPTED; 1266 1267 if (desc_info->bw == RTW89_CHANNEL_WIDTH_80) 1268 rx_status->bw = RATE_INFO_BW_80; 1269 else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40) 1270 rx_status->bw = RATE_INFO_BW_40; 1271 else 1272 rx_status->bw = RATE_INFO_BW_20; 1273 1274 data_rate = desc_info->data_rate; 1275 data_rate_mode = GET_DATA_RATE_MODE(data_rate); 1276 if (data_rate_mode == DATA_RATE_MODE_NON_HT) { 1277 rx_status->encoding = RX_ENC_LEGACY; 1278 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate); 1279 /* convert rate_idx after we get the correct band */ 1280 } else if (data_rate_mode == DATA_RATE_MODE_HT) { 1281 rx_status->encoding = RX_ENC_HT; 1282 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate); 1283 if (desc_info->gi_ltf) 1284 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1285 } else if (data_rate_mode == DATA_RATE_MODE_VHT) { 1286 rx_status->encoding = RX_ENC_VHT; 1287 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 1288 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1; 1289 if (desc_info->gi_ltf) 1290 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1291 } else if (data_rate_mode == DATA_RATE_MODE_HE) { 1292 rx_status->encoding = RX_ENC_HE; 1293 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 1294 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1; 1295 } else { 1296 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); 1297 } 1298 1299 /* he_gi is used to match ppdu, so we always fill it. */ 1300 rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true); 1301 rx_status->flag |= RX_FLAG_MACTIME_START; 1302 rx_status->mactime = desc_info->free_run_cnt; 1303 1304 rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status); 1305 } 1306 1307 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev) 1308 { 1309 const struct rtw89_chip_info *chip = rtwdev->chip; 1310 1311 if (rtw89_disable_ps_mode || !chip->ps_mode_supported) 1312 return RTW89_PS_MODE_NONE; 1313 1314 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) 1315 return RTW89_PS_MODE_PWR_GATED; 1316 1317 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED)) 1318 return RTW89_PS_MODE_CLK_GATED; 1319 1320 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF)) 1321 return RTW89_PS_MODE_RFOFF; 1322 1323 return RTW89_PS_MODE_NONE; 1324 } 1325 1326 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev, 1327 struct rtw89_rx_desc_info *desc_info) 1328 { 1329 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts; 1330 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1331 struct ieee80211_rx_status *rx_status; 1332 struct sk_buff *skb_ppdu, *tmp; 1333 1334 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) { 1335 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]); 1336 rx_status = IEEE80211_SKB_RXCB(skb_ppdu); 1337 rtw89_core_hw_to_sband_rate(rx_status); 1338 rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb_ppdu); 1339 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); 1340 rtwdev->napi_budget_countdown--; 1341 } 1342 } 1343 1344 void rtw89_core_rx(struct rtw89_dev *rtwdev, 1345 struct rtw89_rx_desc_info *desc_info, 1346 struct sk_buff *skb) 1347 { 1348 struct ieee80211_rx_status *rx_status; 1349 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts; 1350 u8 ppdu_cnt = desc_info->ppdu_cnt; 1351 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1352 1353 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) { 1354 rtw89_core_rx_process_report(rtwdev, desc_info, skb); 1355 return; 1356 } 1357 1358 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) { 1359 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info); 1360 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt; 1361 } 1362 1363 rx_status = IEEE80211_SKB_RXCB(skb); 1364 memset(rx_status, 0, sizeof(*rx_status)); 1365 rtw89_core_update_rx_status(rtwdev, desc_info, rx_status); 1366 if (desc_info->long_rxdesc && 1367 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP) { 1368 skb_queue_tail(&ppdu_sts->rx_queue[band], skb); 1369 } else { 1370 rtw89_core_hw_to_sband_rate(rx_status); 1371 rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb); 1372 ieee80211_rx_napi(rtwdev->hw, NULL, skb, &rtwdev->napi); 1373 rtwdev->napi_budget_countdown--; 1374 } 1375 } 1376 EXPORT_SYMBOL(rtw89_core_rx); 1377 1378 void rtw89_core_napi_start(struct rtw89_dev *rtwdev) 1379 { 1380 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) 1381 return; 1382 1383 napi_enable(&rtwdev->napi); 1384 } 1385 EXPORT_SYMBOL(rtw89_core_napi_start); 1386 1387 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev) 1388 { 1389 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) 1390 return; 1391 1392 napi_synchronize(&rtwdev->napi); 1393 napi_disable(&rtwdev->napi); 1394 } 1395 EXPORT_SYMBOL(rtw89_core_napi_stop); 1396 1397 void rtw89_core_napi_init(struct rtw89_dev *rtwdev) 1398 { 1399 init_dummy_netdev(&rtwdev->netdev); 1400 netif_napi_add(&rtwdev->netdev, &rtwdev->napi, 1401 rtwdev->hci.ops->napi_poll, NAPI_POLL_WEIGHT); 1402 } 1403 EXPORT_SYMBOL(rtw89_core_napi_init); 1404 1405 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev) 1406 { 1407 rtw89_core_napi_stop(rtwdev); 1408 netif_napi_del(&rtwdev->napi); 1409 } 1410 EXPORT_SYMBOL(rtw89_core_napi_deinit); 1411 1412 static void rtw89_core_ba_work(struct work_struct *work) 1413 { 1414 struct rtw89_dev *rtwdev = 1415 container_of(work, struct rtw89_dev, ba_work); 1416 struct rtw89_txq *rtwtxq, *tmp; 1417 int ret; 1418 1419 spin_lock_bh(&rtwdev->ba_lock); 1420 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) { 1421 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1422 struct ieee80211_sta *sta = txq->sta; 1423 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 1424 u8 tid = txq->tid; 1425 1426 if (!sta) { 1427 rtw89_warn(rtwdev, "cannot start BA without sta\n"); 1428 goto skip_ba_work; 1429 } 1430 1431 if (rtwsta->disassoc) { 1432 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 1433 "cannot start BA with disassoc sta\n"); 1434 goto skip_ba_work; 1435 } 1436 1437 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 1438 if (ret) { 1439 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 1440 "failed to setup BA session for %pM:%2d: %d\n", 1441 sta->addr, tid, ret); 1442 if (ret == -EINVAL) 1443 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags); 1444 } 1445 skip_ba_work: 1446 list_del_init(&rtwtxq->list); 1447 } 1448 spin_unlock_bh(&rtwdev->ba_lock); 1449 } 1450 1451 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev, 1452 struct ieee80211_sta *sta) 1453 { 1454 struct rtw89_txq *rtwtxq, *tmp; 1455 1456 spin_lock_bh(&rtwdev->ba_lock); 1457 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) { 1458 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1459 1460 if (sta == txq->sta) 1461 list_del_init(&rtwtxq->list); 1462 } 1463 spin_unlock_bh(&rtwdev->ba_lock); 1464 } 1465 1466 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev, 1467 struct rtw89_txq *rtwtxq, 1468 struct sk_buff *skb) 1469 { 1470 struct ieee80211_hw *hw = rtwdev->hw; 1471 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1472 struct ieee80211_sta *sta = txq->sta; 1473 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 1474 1475 if (unlikely(skb_get_queue_mapping(skb) == IEEE80211_AC_VO)) 1476 return; 1477 1478 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) 1479 return; 1480 1481 if (unlikely(!sta)) 1482 return; 1483 1484 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags))) 1485 return; 1486 1487 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) { 1488 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU; 1489 return; 1490 } 1491 1492 spin_lock_bh(&rtwdev->ba_lock); 1493 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) { 1494 list_add_tail(&rtwtxq->list, &rtwdev->ba_list); 1495 ieee80211_queue_work(hw, &rtwdev->ba_work); 1496 } 1497 spin_unlock_bh(&rtwdev->ba_lock); 1498 } 1499 1500 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev, 1501 struct rtw89_txq *rtwtxq, 1502 unsigned long frame_cnt, 1503 unsigned long byte_cnt) 1504 { 1505 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1506 struct ieee80211_vif *vif = txq->vif; 1507 struct ieee80211_sta *sta = txq->sta; 1508 struct sk_buff *skb; 1509 unsigned long i; 1510 int ret; 1511 1512 for (i = 0; i < frame_cnt; i++) { 1513 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq); 1514 if (!skb) { 1515 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n"); 1516 return; 1517 } 1518 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb); 1519 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL); 1520 if (ret) { 1521 rtw89_err(rtwdev, "failed to push txq: %d\n", ret); 1522 ieee80211_free_txskb(rtwdev->hw, skb); 1523 break; 1524 } 1525 } 1526 } 1527 1528 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid) 1529 { 1530 u8 qsel, ch_dma; 1531 1532 qsel = rtw89_core_get_qsel(rtwdev, tid); 1533 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 1534 1535 return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma); 1536 } 1537 1538 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev, 1539 struct ieee80211_txq *txq, 1540 unsigned long *frame_cnt, 1541 bool *sched_txq, bool *reinvoke) 1542 { 1543 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv; 1544 struct ieee80211_sta *sta = txq->sta; 1545 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 1546 1547 if (!sta || rtwsta->max_agg_wait <= 0) 1548 return false; 1549 1550 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID) 1551 return false; 1552 1553 if (*frame_cnt > 1) { 1554 *frame_cnt -= 1; 1555 *sched_txq = true; 1556 *reinvoke = true; 1557 rtwtxq->wait_cnt = 1; 1558 return false; 1559 } 1560 1561 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) { 1562 *reinvoke = true; 1563 rtwtxq->wait_cnt++; 1564 return true; 1565 } 1566 1567 rtwtxq->wait_cnt = 0; 1568 return false; 1569 } 1570 1571 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke) 1572 { 1573 struct ieee80211_hw *hw = rtwdev->hw; 1574 struct ieee80211_txq *txq; 1575 struct rtw89_txq *rtwtxq; 1576 unsigned long frame_cnt; 1577 unsigned long byte_cnt; 1578 u32 tx_resource; 1579 bool sched_txq; 1580 1581 ieee80211_txq_schedule_start(hw, ac); 1582 while ((txq = ieee80211_next_txq(hw, ac))) { 1583 rtwtxq = (struct rtw89_txq *)txq->drv_priv; 1584 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid); 1585 sched_txq = false; 1586 1587 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt); 1588 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) { 1589 ieee80211_return_txq(hw, txq, true); 1590 continue; 1591 } 1592 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource); 1593 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt); 1594 ieee80211_return_txq(hw, txq, sched_txq); 1595 if (frame_cnt != 0) 1596 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid)); 1597 } 1598 ieee80211_txq_schedule_end(hw, ac); 1599 } 1600 1601 static void rtw89_core_txq_work(struct work_struct *w) 1602 { 1603 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work); 1604 bool reinvoke = false; 1605 u8 ac; 1606 1607 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) 1608 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke); 1609 1610 if (reinvoke) { 1611 /* reinvoke to process the last frame */ 1612 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1); 1613 } 1614 } 1615 1616 static void rtw89_core_txq_reinvoke_work(struct work_struct *w) 1617 { 1618 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, 1619 txq_reinvoke_work.work); 1620 1621 queue_work(rtwdev->txq_wq, &rtwdev->txq_work); 1622 } 1623 1624 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev, 1625 u32 throughput, u64 cnt) 1626 { 1627 if (cnt < 100) 1628 return RTW89_TFC_IDLE; 1629 if (throughput > 50) 1630 return RTW89_TFC_HIGH; 1631 if (throughput > 10) 1632 return RTW89_TFC_MID; 1633 if (throughput > 2) 1634 return RTW89_TFC_LOW; 1635 return RTW89_TFC_ULTRA_LOW; 1636 } 1637 1638 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev, 1639 struct rtw89_traffic_stats *stats) 1640 { 1641 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv; 1642 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv; 1643 1644 stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT); 1645 stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT); 1646 1647 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw); 1648 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw); 1649 1650 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 1651 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 1652 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput, 1653 stats->tx_cnt); 1654 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput, 1655 stats->rx_cnt); 1656 stats->tx_avg_len = stats->tx_cnt ? 1657 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0; 1658 stats->rx_avg_len = stats->rx_cnt ? 1659 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0; 1660 1661 stats->tx_unicast = 0; 1662 stats->rx_unicast = 0; 1663 stats->tx_cnt = 0; 1664 stats->rx_cnt = 0; 1665 1666 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv) 1667 return true; 1668 1669 return false; 1670 } 1671 1672 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev) 1673 { 1674 struct rtw89_vif *rtwvif; 1675 bool tfc_changed; 1676 1677 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats); 1678 rtw89_for_each_rtwvif(rtwdev, rtwvif) 1679 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats); 1680 1681 return tfc_changed; 1682 } 1683 1684 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) 1685 { 1686 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) 1687 return; 1688 1689 if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE && 1690 rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE) 1691 rtw89_enter_lps(rtwdev, rtwvif->mac_id); 1692 } 1693 1694 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev) 1695 { 1696 struct rtw89_vif *rtwvif; 1697 1698 rtw89_for_each_rtwvif(rtwdev, rtwvif) 1699 rtw89_vif_enter_lps(rtwdev, rtwvif); 1700 } 1701 1702 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, 1703 struct rtw89_traffic_stats *stats) 1704 { 1705 stats->tx_unicast = 0; 1706 stats->rx_unicast = 0; 1707 stats->tx_cnt = 0; 1708 stats->rx_cnt = 0; 1709 ewma_tp_init(&stats->tx_ewma_tp); 1710 ewma_tp_init(&stats->rx_ewma_tp); 1711 } 1712 1713 static void rtw89_track_work(struct work_struct *work) 1714 { 1715 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, 1716 track_work.work); 1717 bool tfc_changed; 1718 1719 mutex_lock(&rtwdev->mutex); 1720 1721 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) 1722 goto out; 1723 1724 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, 1725 RTW89_TRACK_WORK_PERIOD); 1726 1727 tfc_changed = rtw89_traffic_stats_track(rtwdev); 1728 if (rtwdev->scanning) 1729 goto out; 1730 1731 rtw89_leave_lps(rtwdev); 1732 1733 if (tfc_changed) { 1734 rtw89_hci_recalc_int_mit(rtwdev); 1735 rtw89_btc_ntfy_wl_sta(rtwdev); 1736 } 1737 rtw89_mac_bf_monitor_track(rtwdev); 1738 rtw89_phy_stat_track(rtwdev); 1739 rtw89_phy_env_monitor_track(rtwdev); 1740 rtw89_phy_dig(rtwdev); 1741 rtw89_chip_rfk_track(rtwdev); 1742 rtw89_phy_ra_update(rtwdev); 1743 rtw89_phy_cfo_track(rtwdev); 1744 1745 if (rtwdev->lps_enabled && !rtwdev->btc.lps) 1746 rtw89_enter_lps_track(rtwdev); 1747 1748 out: 1749 mutex_unlock(&rtwdev->mutex); 1750 } 1751 1752 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size) 1753 { 1754 unsigned long bit; 1755 1756 bit = find_first_zero_bit(addr, size); 1757 if (bit < size) 1758 set_bit(bit, addr); 1759 1760 return bit; 1761 } 1762 1763 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit) 1764 { 1765 clear_bit(bit, addr); 1766 } 1767 1768 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits) 1769 { 1770 bitmap_zero(addr, nbits); 1771 } 1772 1773 #define RTW89_TYPE_MAPPING(_type) \ 1774 case NL80211_IFTYPE_ ## _type: \ 1775 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \ 1776 break 1777 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc) 1778 { 1779 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1780 1781 switch (vif->type) { 1782 RTW89_TYPE_MAPPING(ADHOC); 1783 RTW89_TYPE_MAPPING(STATION); 1784 RTW89_TYPE_MAPPING(AP); 1785 RTW89_TYPE_MAPPING(MONITOR); 1786 RTW89_TYPE_MAPPING(MESH_POINT); 1787 default: 1788 WARN_ON(1); 1789 break; 1790 } 1791 1792 switch (vif->type) { 1793 case NL80211_IFTYPE_AP: 1794 case NL80211_IFTYPE_MESH_POINT: 1795 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE; 1796 rtwvif->self_role = RTW89_SELF_ROLE_AP; 1797 break; 1798 case NL80211_IFTYPE_ADHOC: 1799 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC; 1800 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; 1801 break; 1802 case NL80211_IFTYPE_STATION: 1803 if (assoc) { 1804 rtwvif->net_type = RTW89_NET_TYPE_INFRA; 1805 rtwvif->trigger = vif->bss_conf.he_support; 1806 } else { 1807 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK; 1808 rtwvif->trigger = false; 1809 } 1810 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; 1811 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL; 1812 break; 1813 default: 1814 WARN_ON(1); 1815 break; 1816 } 1817 } 1818 1819 int rtw89_core_sta_add(struct rtw89_dev *rtwdev, 1820 struct ieee80211_vif *vif, 1821 struct ieee80211_sta *sta) 1822 { 1823 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1824 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1825 int i; 1826 1827 rtwsta->rtwvif = rtwvif; 1828 rtwsta->prev_rssi = 0; 1829 1830 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 1831 rtw89_core_txq_init(rtwdev, sta->txq[i]); 1832 1833 ewma_rssi_init(&rtwsta->avg_rssi); 1834 1835 if (vif->type == NL80211_IFTYPE_STATION) { 1836 /* for station mode, assign the mac_id from itself */ 1837 rtwsta->mac_id = rtwvif->mac_id; 1838 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, 1839 BTC_ROLE_MSTS_STA_CONN_START); 1840 rtw89_chip_rfk_channel(rtwdev); 1841 } 1842 1843 return 0; 1844 } 1845 1846 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev, 1847 struct ieee80211_vif *vif, 1848 struct ieee80211_sta *sta) 1849 { 1850 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1851 1852 rtwdev->total_sta_assoc--; 1853 rtwsta->disassoc = true; 1854 1855 return 0; 1856 } 1857 1858 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, 1859 struct ieee80211_vif *vif, 1860 struct ieee80211_sta *sta) 1861 { 1862 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1863 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1864 int ret; 1865 1866 rtw89_mac_bf_monitor_calc(rtwdev, sta, true); 1867 rtw89_mac_bf_disassoc(rtwdev, vif, sta); 1868 rtw89_core_free_sta_pending_ba(rtwdev, sta); 1869 1870 rtw89_vif_type_mapping(vif, false); 1871 1872 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); 1873 if (ret) { 1874 rtw89_warn(rtwdev, "failed to send h2c cmac table\n"); 1875 return ret; 1876 } 1877 1878 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 1); 1879 if (ret) { 1880 rtw89_warn(rtwdev, "failed to send h2c join info\n"); 1881 return ret; 1882 } 1883 1884 /* update cam aid mac_id net_type */ 1885 rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); 1886 if (ret) { 1887 rtw89_warn(rtwdev, "failed to send h2c cam\n"); 1888 return ret; 1889 } 1890 1891 return ret; 1892 } 1893 1894 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, 1895 struct ieee80211_vif *vif, 1896 struct ieee80211_sta *sta) 1897 { 1898 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1899 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1900 int ret; 1901 1902 rtw89_vif_type_mapping(vif, true); 1903 1904 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); 1905 if (ret) { 1906 rtw89_warn(rtwdev, "failed to send h2c cmac table\n"); 1907 return ret; 1908 } 1909 1910 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 0); 1911 if (ret) { 1912 rtw89_warn(rtwdev, "failed to send h2c join info\n"); 1913 return ret; 1914 } 1915 1916 /* update cam aid mac_id net_type */ 1917 rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); 1918 if (ret) { 1919 rtw89_warn(rtwdev, "failed to send h2c cam\n"); 1920 return ret; 1921 } 1922 1923 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwsta->mac_id); 1924 if (ret) { 1925 rtw89_warn(rtwdev, "failed to send h2c general packet\n"); 1926 return ret; 1927 } 1928 1929 rtwdev->total_sta_assoc++; 1930 rtw89_phy_ra_assoc(rtwdev, sta); 1931 rtw89_mac_bf_assoc(rtwdev, vif, sta); 1932 rtw89_mac_bf_monitor_calc(rtwdev, sta, false); 1933 1934 if (vif->type == NL80211_IFTYPE_STATION) { 1935 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, 1936 BTC_ROLE_MSTS_STA_CONN_END); 1937 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); 1938 } 1939 1940 return ret; 1941 } 1942 1943 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev, 1944 struct ieee80211_vif *vif, 1945 struct ieee80211_sta *sta) 1946 { 1947 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1948 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1949 1950 if (vif->type == NL80211_IFTYPE_STATION) 1951 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, 1952 BTC_ROLE_MSTS_STA_DIS_CONN); 1953 1954 return 0; 1955 } 1956 1957 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev, 1958 struct ieee80211_sta_ht_cap *ht_cap) 1959 { 1960 static const __le16 highest[RF_PATH_MAX] = { 1961 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600), 1962 }; 1963 struct rtw89_hal *hal = &rtwdev->hal; 1964 u8 nss = hal->rx_nss; 1965 int i; 1966 1967 ht_cap->ht_supported = true; 1968 ht_cap->cap = 0; 1969 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 1970 IEEE80211_HT_CAP_MAX_AMSDU | 1971 IEEE80211_HT_CAP_TX_STBC | 1972 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 1973 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 1974 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 1975 IEEE80211_HT_CAP_DSSSCCK40 | 1976 IEEE80211_HT_CAP_SGI_40; 1977 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 1978 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; 1979 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 1980 for (i = 0; i < nss; i++) 1981 ht_cap->mcs.rx_mask[i] = 0xFF; 1982 ht_cap->mcs.rx_mask[4] = 0x01; 1983 ht_cap->mcs.rx_highest = highest[nss - 1]; 1984 } 1985 1986 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev, 1987 struct ieee80211_sta_vht_cap *vht_cap) 1988 { 1989 static const __le16 highest[RF_PATH_MAX] = { 1990 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733), 1991 }; 1992 struct rtw89_hal *hal = &rtwdev->hal; 1993 u16 tx_mcs_map = 0, rx_mcs_map = 0; 1994 u8 sts_cap = 3; 1995 int i; 1996 1997 for (i = 0; i < 8; i++) { 1998 if (i < hal->tx_nss) 1999 tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); 2000 else 2001 tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); 2002 if (i < hal->rx_nss) 2003 rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); 2004 else 2005 rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); 2006 } 2007 2008 vht_cap->vht_supported = true; 2009 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 2010 IEEE80211_VHT_CAP_SHORT_GI_80 | 2011 IEEE80211_VHT_CAP_RXSTBC_1 | 2012 IEEE80211_VHT_CAP_HTC_VHT | 2013 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 2014 0; 2015 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 2016 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 2017 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 2018 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 2019 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; 2020 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map); 2021 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map); 2022 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1]; 2023 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1]; 2024 } 2025 2026 #define RTW89_SBAND_IFTYPES_NR 2 2027 2028 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev, 2029 enum nl80211_band band, 2030 struct ieee80211_supported_band *sband) 2031 { 2032 const struct rtw89_chip_info *chip = rtwdev->chip; 2033 struct rtw89_hal *hal = &rtwdev->hal; 2034 struct ieee80211_sband_iftype_data *iftype_data; 2035 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) || 2036 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV); 2037 u16 mcs_map = 0; 2038 int i; 2039 int nss = hal->rx_nss; 2040 int idx = 0; 2041 2042 iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL); 2043 if (!iftype_data) 2044 return; 2045 2046 for (i = 0; i < 8; i++) { 2047 if (i < nss) 2048 mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2); 2049 else 2050 mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2); 2051 } 2052 2053 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 2054 struct ieee80211_sta_he_cap *he_cap; 2055 u8 *mac_cap_info; 2056 u8 *phy_cap_info; 2057 2058 switch (i) { 2059 case NL80211_IFTYPE_STATION: 2060 case NL80211_IFTYPE_AP: 2061 break; 2062 default: 2063 continue; 2064 } 2065 2066 if (idx >= RTW89_SBAND_IFTYPES_NR) { 2067 rtw89_warn(rtwdev, "run out of iftype_data\n"); 2068 break; 2069 } 2070 2071 iftype_data[idx].types_mask = BIT(i); 2072 he_cap = &iftype_data[idx].he_cap; 2073 mac_cap_info = he_cap->he_cap_elem.mac_cap_info; 2074 phy_cap_info = he_cap->he_cap_elem.phy_cap_info; 2075 2076 he_cap->has_he = true; 2077 if (i == NL80211_IFTYPE_AP) 2078 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE; 2079 if (i == NL80211_IFTYPE_STATION) 2080 mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 2081 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK | 2082 IEEE80211_HE_MAC_CAP2_BSR; 2083 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; 2084 if (i == NL80211_IFTYPE_AP) 2085 mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL; 2086 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS | 2087 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 2088 if (i == NL80211_IFTYPE_STATION) 2089 mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX; 2090 phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 2091 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G; 2092 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 2093 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD | 2094 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 2095 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 2096 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 2097 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | 2098 IEEE80211_HE_PHY_CAP2_DOPPLER_TX; 2099 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM; 2100 if (i == NL80211_IFTYPE_STATION) 2101 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM | 2102 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2; 2103 if (i == NL80211_IFTYPE_AP) 2104 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU; 2105 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 2106 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4; 2107 phy_cap_info[5] = no_ng16 ? 0 : 2108 IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK | 2109 IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK; 2110 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 2111 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU | 2112 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 2113 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE; 2114 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 2115 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI | 2116 IEEE80211_HE_PHY_CAP7_MAX_NC_1; 2117 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 2118 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI | 2119 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996; 2120 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 2121 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 2122 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 2123 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | 2124 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, 2125 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); 2126 if (i == NL80211_IFTYPE_STATION) 2127 phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; 2128 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map); 2129 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map); 2130 2131 idx++; 2132 } 2133 2134 sband->iftype_data = iftype_data; 2135 sband->n_iftype_data = idx; 2136 } 2137 2138 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev) 2139 { 2140 struct ieee80211_hw *hw = rtwdev->hw; 2141 struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL; 2142 u32 size = sizeof(struct ieee80211_supported_band); 2143 2144 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL); 2145 if (!sband_2ghz) 2146 goto err; 2147 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap); 2148 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz); 2149 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz; 2150 2151 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL); 2152 if (!sband_5ghz) 2153 goto err; 2154 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap); 2155 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap); 2156 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz); 2157 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz; 2158 2159 return 0; 2160 2161 err: 2162 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; 2163 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; 2164 if (sband_2ghz) 2165 kfree(sband_2ghz->iftype_data); 2166 if (sband_5ghz) 2167 kfree(sband_5ghz->iftype_data); 2168 kfree(sband_2ghz); 2169 kfree(sband_5ghz); 2170 return -ENOMEM; 2171 } 2172 2173 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev) 2174 { 2175 struct ieee80211_hw *hw = rtwdev->hw; 2176 2177 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data); 2178 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data); 2179 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 2180 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 2181 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; 2182 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; 2183 } 2184 2185 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev) 2186 { 2187 int i; 2188 2189 for (i = 0; i < RTW89_PHY_MAX; i++) 2190 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]); 2191 for (i = 0; i < RTW89_PHY_MAX; i++) 2192 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX; 2193 } 2194 2195 int rtw89_core_start(struct rtw89_dev *rtwdev) 2196 { 2197 int ret; 2198 2199 rtwdev->mac.qta_mode = RTW89_QTA_SCC; 2200 ret = rtw89_mac_init(rtwdev); 2201 if (ret) { 2202 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret); 2203 return ret; 2204 } 2205 2206 rtw89_btc_ntfy_poweron(rtwdev); 2207 2208 /* efuse process */ 2209 2210 /* pre-config BB/RF, BB reset/RFC reset */ 2211 rtw89_mac_disable_bb_rf(rtwdev); 2212 rtw89_mac_enable_bb_rf(rtwdev); 2213 rtw89_phy_init_bb_reg(rtwdev); 2214 rtw89_phy_init_rf_reg(rtwdev); 2215 2216 rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL); 2217 2218 rtw89_phy_dm_init(rtwdev); 2219 2220 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); 2221 rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0); 2222 2223 ret = rtw89_hci_start(rtwdev); 2224 if (ret) { 2225 rtw89_err(rtwdev, "failed to start hci\n"); 2226 return ret; 2227 } 2228 2229 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, 2230 RTW89_TRACK_WORK_PERIOD); 2231 2232 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags); 2233 2234 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON); 2235 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable); 2236 2237 return 0; 2238 } 2239 2240 void rtw89_core_stop(struct rtw89_dev *rtwdev) 2241 { 2242 struct rtw89_btc *btc = &rtwdev->btc; 2243 2244 /* Prvent to stop twice; enter_ips and ops_stop */ 2245 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) 2246 return; 2247 2248 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF); 2249 2250 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags); 2251 2252 mutex_unlock(&rtwdev->mutex); 2253 2254 cancel_work_sync(&rtwdev->c2h_work); 2255 cancel_work_sync(&btc->eapol_notify_work); 2256 cancel_work_sync(&btc->arp_notify_work); 2257 cancel_work_sync(&btc->dhcp_notify_work); 2258 cancel_work_sync(&btc->icmp_notify_work); 2259 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work); 2260 cancel_delayed_work_sync(&rtwdev->track_work); 2261 cancel_delayed_work_sync(&rtwdev->coex_act1_work); 2262 cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work); 2263 cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work); 2264 cancel_delayed_work_sync(&rtwdev->cfo_track_work); 2265 2266 mutex_lock(&rtwdev->mutex); 2267 2268 rtw89_btc_ntfy_poweroff(rtwdev); 2269 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true); 2270 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true); 2271 rtw89_hci_stop(rtwdev); 2272 rtw89_hci_deinit(rtwdev); 2273 rtw89_mac_pwr_off(rtwdev); 2274 rtw89_hci_reset(rtwdev); 2275 } 2276 2277 int rtw89_core_init(struct rtw89_dev *rtwdev) 2278 { 2279 struct rtw89_btc *btc = &rtwdev->btc; 2280 int ret; 2281 2282 INIT_LIST_HEAD(&rtwdev->ba_list); 2283 INIT_LIST_HEAD(&rtwdev->rtwvifs_list); 2284 INIT_LIST_HEAD(&rtwdev->early_h2c_list); 2285 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); 2286 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); 2287 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); 2288 INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work); 2289 INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work); 2290 INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work); 2291 INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work); 2292 INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work); 2293 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); 2294 spin_lock_init(&rtwdev->ba_lock); 2295 mutex_init(&rtwdev->mutex); 2296 mutex_init(&rtwdev->rf_mutex); 2297 rtwdev->total_sta_assoc = 0; 2298 2299 INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); 2300 skb_queue_head_init(&rtwdev->c2h_queue); 2301 rtw89_core_ppdu_sts_init(rtwdev); 2302 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats); 2303 2304 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev); 2305 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR; 2306 2307 INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work); 2308 INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work); 2309 INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work); 2310 INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work); 2311 2312 ret = rtw89_load_firmware(rtwdev); 2313 if (ret) { 2314 rtw89_warn(rtwdev, "no firmware loaded\n"); 2315 return ret; 2316 } 2317 rtw89_ser_init(rtwdev); 2318 2319 return 0; 2320 } 2321 EXPORT_SYMBOL(rtw89_core_init); 2322 2323 void rtw89_core_deinit(struct rtw89_dev *rtwdev) 2324 { 2325 rtw89_ser_deinit(rtwdev); 2326 rtw89_unload_firmware(rtwdev); 2327 rtw89_fw_free_all_early_h2c(rtwdev); 2328 2329 destroy_workqueue(rtwdev->txq_wq); 2330 mutex_destroy(&rtwdev->rf_mutex); 2331 mutex_destroy(&rtwdev->mutex); 2332 } 2333 EXPORT_SYMBOL(rtw89_core_deinit); 2334 2335 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev) 2336 { 2337 u8 cv; 2338 2339 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK); 2340 if (cv <= CHIP_CBV) { 2341 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD) 2342 cv = CHIP_CAV; 2343 else 2344 cv = CHIP_CBV; 2345 } 2346 2347 rtwdev->hal.cv = cv; 2348 } 2349 2350 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev) 2351 { 2352 int ret; 2353 2354 ret = rtw89_mac_partial_init(rtwdev); 2355 if (ret) 2356 return ret; 2357 2358 ret = rtw89_parse_efuse_map(rtwdev); 2359 if (ret) 2360 return ret; 2361 2362 ret = rtw89_parse_phycap_map(rtwdev); 2363 if (ret) 2364 return ret; 2365 2366 ret = rtw89_mac_setup_phycap(rtwdev); 2367 if (ret) 2368 return ret; 2369 2370 rtw89_mac_pwr_off(rtwdev); 2371 2372 return 0; 2373 } 2374 2375 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev) 2376 { 2377 rtw89_chip_fem_setup(rtwdev); 2378 2379 return 0; 2380 } 2381 2382 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev) 2383 { 2384 int ret; 2385 2386 rtw89_read_chip_ver(rtwdev); 2387 2388 ret = rtw89_wait_firmware_completion(rtwdev); 2389 if (ret) { 2390 rtw89_err(rtwdev, "failed to wait firmware completion\n"); 2391 return ret; 2392 } 2393 2394 ret = rtw89_fw_recognize(rtwdev); 2395 if (ret) { 2396 rtw89_err(rtwdev, "failed to recognize firmware\n"); 2397 return ret; 2398 } 2399 2400 ret = rtw89_chip_efuse_info_setup(rtwdev); 2401 if (ret) 2402 return ret; 2403 2404 ret = rtw89_chip_board_info_setup(rtwdev); 2405 if (ret) 2406 return ret; 2407 2408 return 0; 2409 } 2410 EXPORT_SYMBOL(rtw89_chip_info_setup); 2411 2412 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev) 2413 { 2414 struct ieee80211_hw *hw = rtwdev->hw; 2415 struct rtw89_efuse *efuse = &rtwdev->efuse; 2416 int ret; 2417 int tx_headroom = IEEE80211_HT_CTL_LEN; 2418 2419 hw->vif_data_size = sizeof(struct rtw89_vif); 2420 hw->sta_data_size = sizeof(struct rtw89_sta); 2421 hw->txq_data_size = sizeof(struct rtw89_txq); 2422 2423 SET_IEEE80211_PERM_ADDR(hw, efuse->addr); 2424 2425 hw->extra_tx_headroom = tx_headroom; 2426 hw->queues = IEEE80211_NUM_ACS; 2427 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM; 2428 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM; 2429 2430 ieee80211_hw_set(hw, SIGNAL_DBM); 2431 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 2432 ieee80211_hw_set(hw, MFP_CAPABLE); 2433 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 2434 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 2435 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 2436 ieee80211_hw_set(hw, TX_AMSDU); 2437 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 2438 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 2439 ieee80211_hw_set(hw, SUPPORTS_PS); 2440 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 2441 2442 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 2443 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1; 2444 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1; 2445 2446 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 2447 2448 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 2449 2450 ret = rtw89_core_set_supported_band(rtwdev); 2451 if (ret) { 2452 rtw89_err(rtwdev, "failed to set supported band\n"); 2453 return ret; 2454 } 2455 2456 hw->wiphy->reg_notifier = rtw89_regd_notifier; 2457 hw->wiphy->sar_capa = &rtw89_sar_capa; 2458 2459 ret = ieee80211_register_hw(hw); 2460 if (ret) { 2461 rtw89_err(rtwdev, "failed to register hw\n"); 2462 goto err; 2463 } 2464 2465 ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier); 2466 if (ret) { 2467 rtw89_err(rtwdev, "failed to init regd\n"); 2468 goto err; 2469 } 2470 2471 return 0; 2472 2473 err: 2474 return ret; 2475 } 2476 2477 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev) 2478 { 2479 struct ieee80211_hw *hw = rtwdev->hw; 2480 2481 ieee80211_unregister_hw(hw); 2482 rtw89_core_clr_supported_band(rtwdev); 2483 } 2484 2485 int rtw89_core_register(struct rtw89_dev *rtwdev) 2486 { 2487 int ret; 2488 2489 ret = rtw89_core_register_hw(rtwdev); 2490 if (ret) { 2491 rtw89_err(rtwdev, "failed to register core hw\n"); 2492 return ret; 2493 } 2494 2495 rtw89_debugfs_init(rtwdev); 2496 2497 return 0; 2498 } 2499 EXPORT_SYMBOL(rtw89_core_register); 2500 2501 void rtw89_core_unregister(struct rtw89_dev *rtwdev) 2502 { 2503 rtw89_core_unregister_hw(rtwdev); 2504 } 2505 EXPORT_SYMBOL(rtw89_core_unregister); 2506 2507 MODULE_AUTHOR("Realtek Corporation"); 2508 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module"); 2509 MODULE_LICENSE("Dual BSD/GPL"); 2510