xref: /linux/drivers/net/wireless/realtek/rtw89/coex.h (revision 2b0cfa6e49566c8fa6759734cf821aa6e8271a9e)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020  Realtek Corporation
3  */
4 
5 #ifndef __RTW89_COEX_H__
6 #define __RTW89_COEX_H__
7 
8 #include "core.h"
9 
10 enum btc_mode {
11 	BTC_MODE_NORMAL,
12 	BTC_MODE_WL,
13 	BTC_MODE_BT,
14 	BTC_MODE_WLOFF,
15 	BTC_MODE_MAX
16 };
17 
18 enum btc_wl_rfk_type {
19 	BTC_WRFKT_IQK = 0,
20 	BTC_WRFKT_LCK = 1,
21 	BTC_WRFKT_DPK = 2,
22 	BTC_WRFKT_TXGAPK = 3,
23 	BTC_WRFKT_DACK = 4,
24 	BTC_WRFKT_RXDCK = 5,
25 	BTC_WRFKT_TSSI = 6,
26 };
27 
28 #define NM_EXEC false
29 #define FC_EXEC true
30 
31 #define RTW89_COEX_ACT1_WORK_PERIOD	round_jiffies_relative(HZ * 4)
32 #define RTW89_COEX_BT_DEVINFO_WORK_PERIOD	round_jiffies_relative(HZ * 16)
33 #define RTW89_COEX_RFK_CHK_WORK_PERIOD	msecs_to_jiffies(300)
34 #define BTC_RFK_PATH_MAP GENMASK(3, 0)
35 #define BTC_RFK_PHY_MAP GENMASK(5, 4)
36 #define BTC_RFK_BAND_MAP GENMASK(7, 6)
37 
38 enum btc_wl_rfk_state {
39 	BTC_WRFK_STOP = 0,
40 	BTC_WRFK_START = 1,
41 	BTC_WRFK_ONESHOT_START = 2,
42 	BTC_WRFK_ONESHOT_STOP = 3,
43 };
44 
45 enum btc_pri {
46 	BTC_PRI_MASK_RX_RESP = 0,
47 	BTC_PRI_MASK_TX_RESP,
48 	BTC_PRI_MASK_BEACON,
49 	BTC_PRI_MASK_RX_CCK,
50 	BTC_PRI_MASK_TX_MNGQ,
51 	BTC_PRI_MASK_MAX,
52 };
53 
54 enum btc_bt_trs {
55 	BTC_BT_SS_GROUP = 0x0,
56 	BTC_BT_TX_GROUP = 0x2,
57 	BTC_BT_RX_GROUP = 0x3,
58 	BTC_BT_MAX_GROUP,
59 };
60 
61 enum btc_rssi_st {
62 	BTC_RSSI_ST_LOW = 0x0,
63 	BTC_RSSI_ST_HIGH,
64 	BTC_RSSI_ST_STAY_LOW,
65 	BTC_RSSI_ST_STAY_HIGH,
66 	BTC_RSSI_ST_MAX
67 };
68 
69 enum btc_fddt_en {
70 	BTC_FDDT_DISABLE,
71 	BTC_FDDT_ENABLE,
72 };
73 
74 #define	BTC_RSSI_HIGH(_rssi_) \
75 	({typeof(_rssi_) __rssi = (_rssi_); \
76 	  ((__rssi == BTC_RSSI_ST_HIGH || \
77 	    __rssi == BTC_RSSI_ST_STAY_HIGH) ? 1 : 0); })
78 
79 #define	BTC_RSSI_LOW(_rssi_) \
80 	({typeof(_rssi_) __rssi = (_rssi_); \
81 	  ((__rssi == BTC_RSSI_ST_LOW || \
82 	    __rssi == BTC_RSSI_ST_STAY_LOW) ? 1 : 0); })
83 
84 #define BTC_RSSI_CHANGE(_rssi_) \
85 	({typeof(_rssi_) __rssi = (_rssi_); \
86 	  ((__rssi == BTC_RSSI_ST_LOW || \
87 	    __rssi == BTC_RSSI_ST_HIGH) ? 1 : 0); })
88 
89 enum btc_ant {
90 	BTC_ANT_SHARED = 0,
91 	BTC_ANT_DEDICATED,
92 	BTC_ANTTYPE_MAX
93 };
94 
95 enum btc_bt_btg {
96 	BTC_BT_ALONE = 0,
97 	BTC_BT_BTG
98 };
99 
100 enum btc_switch {
101 	BTC_SWITCH_INTERNAL = 0,
102 	BTC_SWITCH_EXTERNAL
103 };
104 
105 enum btc_pkt_type {
106 	PACKET_DHCP,
107 	PACKET_ARP,
108 	PACKET_EAPOL,
109 	PACKET_EAPOL_END,
110 	PACKET_ICMP,
111 	PACKET_MAX
112 };
113 
114 enum btc_bt_mailbox_id {
115 	BTC_BTINFO_REPLY = 0x23,
116 	BTC_BTINFO_AUTO = 0x27
117 };
118 
119 enum btc_role_state {
120 	BTC_ROLE_START,
121 	BTC_ROLE_STOP,
122 	BTC_ROLE_CHG_TYPE,
123 	BTC_ROLE_MSTS_STA_CONN_START,
124 	BTC_ROLE_MSTS_STA_CONN_END,
125 	BTC_ROLE_MSTS_STA_DIS_CONN,
126 	BTC_ROLE_MSTS_AP_START,
127 	BTC_ROLE_MSTS_AP_STOP,
128 	BTC_ROLE_STATE_UNKNOWN
129 };
130 
131 enum btc_rfctrl {
132 	BTC_RFCTRL_WL_OFF,
133 	BTC_RFCTRL_WL_ON,
134 	BTC_RFCTRL_LPS_WL_ON,
135 	BTC_RFCTRL_FW_CTRL,
136 	BTC_RFCTRL_MAX
137 };
138 
139 enum btc_lps_state {
140 	BTC_LPS_OFF = 0,
141 	BTC_LPS_RF_OFF = 1,
142 	BTC_LPS_RF_ON = 2
143 };
144 
145 #define R_BTC_BB_BTG_RX 0x980
146 #define R_BTC_BB_PRE_AGC_S1 0x476C
147 #define R_BTC_BB_PRE_AGC_S0 0x4688
148 
149 #define B_BTC_BB_GNT_MUX GENMASK(20, 17)
150 #define B_BTC_BB_PRE_AGC_MASK GENMASK(31, 24)
151 #define B_BTC_BB_PRE_AGC_VAL BIT(31)
152 
153 #define BTC_REG_NOTFOUND 0xff
154 
155 enum btc_ant_div_pos {
156 	BTC_ANT_DIV_MAIN = 0,
157 	BTC_ANT_DIV_AUX = 1,
158 };
159 
160 enum btc_get_reg_status {
161 	BTC_CSTATUS_TXDIV_POS = 0,
162 	BTC_CSTATUS_RXDIV_POS = 1,
163 	BTC_CSTATUS_BB_GNT_MUX = 2,
164 	BTC_CSTATUS_BB_GNT_MUX_MON = 3,
165 	BTC_CSTATUS_BB_PRE_AGC = 4,
166 	BTC_CSTATUS_BB_PRE_AGC_MON = 5,
167 };
168 
169 enum btc_preagc_type {
170 	BTC_PREAGC_DISABLE,
171 	BTC_PREAGC_ENABLE,
172 	BTC_PREAGC_BB_FWCTRL,
173 	BTC_PREAGC_NOTFOUND,
174 };
175 
176 enum btc_btgctrl_type {
177 	BTC_BTGCTRL_DISABLE,
178 	BTC_BTGCTRL_ENABLE,
179 	BTC_BTGCTRL_BB_GNT_FWCTRL,
180 	BTC_BTGCTRL_BB_GNT_NOTFOUND,
181 };
182 
183 void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev);
184 void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev);
185 void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode);
186 void rtw89_btc_ntfy_scan_start(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band);
187 void rtw89_btc_ntfy_scan_finish(struct rtw89_dev *rtwdev, u8 phy_idx);
188 void rtw89_btc_ntfy_switch_band(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band);
189 void rtw89_btc_ntfy_specific_packet(struct rtw89_dev *rtwdev,
190 				    enum btc_pkt_type pkt_type);
191 void rtw89_btc_ntfy_eapol_packet_work(struct work_struct *work);
192 void rtw89_btc_ntfy_arp_packet_work(struct work_struct *work);
193 void rtw89_btc_ntfy_dhcp_packet_work(struct work_struct *work);
194 void rtw89_btc_ntfy_icmp_packet_work(struct work_struct *work);
195 void rtw89_btc_ntfy_role_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
196 			      struct rtw89_sta *rtwsta, enum btc_role_state state);
197 void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_state);
198 void rtw89_btc_ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_map,
199 			   enum btc_wl_rfk_type type,
200 			   enum btc_wl_rfk_state state);
201 void rtw89_btc_ntfy_wl_sta(struct rtw89_dev *rtwdev);
202 void rtw89_btc_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb,
203 			  u32 len, u8 class, u8 func);
204 void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m);
205 void rtw89_coex_act1_work(struct work_struct *work);
206 void rtw89_coex_bt_devinfo_work(struct work_struct *work);
207 void rtw89_coex_rfk_chk_work(struct work_struct *work);
208 void rtw89_coex_power_on(struct rtw89_dev *rtwdev);
209 void rtw89_btc_set_policy(struct rtw89_dev *rtwdev, u16 policy_type);
210 void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type);
211 void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev);
212 
213 static inline u8 rtw89_btc_phymap(struct rtw89_dev *rtwdev,
214 				  enum rtw89_phy_idx phy_idx,
215 				  enum rtw89_rf_path_bit paths)
216 {
217 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
218 	u8 phy_map;
219 
220 	phy_map = FIELD_PREP(BTC_RFK_PATH_MAP, paths) |
221 		  FIELD_PREP(BTC_RFK_PHY_MAP, BIT(phy_idx)) |
222 		  FIELD_PREP(BTC_RFK_BAND_MAP, chan->band_type);
223 
224 	return phy_map;
225 }
226 
227 static inline u8 rtw89_btc_path_phymap(struct rtw89_dev *rtwdev,
228 				       enum rtw89_phy_idx phy_idx,
229 				       enum rtw89_rf_path path)
230 {
231 	return rtw89_btc_phymap(rtwdev, phy_idx, BIT(path));
232 }
233 
234 /* return bt req len in TU */
235 static inline u16 rtw89_coex_query_bt_req_len(struct rtw89_dev *rtwdev,
236 					      enum rtw89_phy_idx phy_idx)
237 {
238 	struct rtw89_btc *btc = &rtwdev->btc;
239 
240 	return btc->bt_req_len;
241 }
242 
243 #endif
244