1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #include "main.h" 6 #include "regd.h" 7 #include "fw.h" 8 #include "ps.h" 9 #include "sec.h" 10 #include "mac.h" 11 #include "phy.h" 12 #include "reg.h" 13 #include "efuse.h" 14 #include "debug.h" 15 16 static bool rtw_fw_support_lps; 17 unsigned int rtw_debug_mask; 18 EXPORT_SYMBOL(rtw_debug_mask); 19 20 module_param_named(support_lps, rtw_fw_support_lps, bool, 0644); 21 module_param_named(debug_mask, rtw_debug_mask, uint, 0644); 22 23 MODULE_PARM_DESC(support_lps, "Set Y to enable Leisure Power Save support, to turn radio off between beacons"); 24 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 25 26 static struct ieee80211_channel rtw_channeltable_2g[] = { 27 {.center_freq = 2412, .hw_value = 1,}, 28 {.center_freq = 2417, .hw_value = 2,}, 29 {.center_freq = 2422, .hw_value = 3,}, 30 {.center_freq = 2427, .hw_value = 4,}, 31 {.center_freq = 2432, .hw_value = 5,}, 32 {.center_freq = 2437, .hw_value = 6,}, 33 {.center_freq = 2442, .hw_value = 7,}, 34 {.center_freq = 2447, .hw_value = 8,}, 35 {.center_freq = 2452, .hw_value = 9,}, 36 {.center_freq = 2457, .hw_value = 10,}, 37 {.center_freq = 2462, .hw_value = 11,}, 38 {.center_freq = 2467, .hw_value = 12,}, 39 {.center_freq = 2472, .hw_value = 13,}, 40 {.center_freq = 2484, .hw_value = 14,}, 41 }; 42 43 static struct ieee80211_channel rtw_channeltable_5g[] = { 44 {.center_freq = 5180, .hw_value = 36,}, 45 {.center_freq = 5200, .hw_value = 40,}, 46 {.center_freq = 5220, .hw_value = 44,}, 47 {.center_freq = 5240, .hw_value = 48,}, 48 {.center_freq = 5260, .hw_value = 52,}, 49 {.center_freq = 5280, .hw_value = 56,}, 50 {.center_freq = 5300, .hw_value = 60,}, 51 {.center_freq = 5320, .hw_value = 64,}, 52 {.center_freq = 5500, .hw_value = 100,}, 53 {.center_freq = 5520, .hw_value = 104,}, 54 {.center_freq = 5540, .hw_value = 108,}, 55 {.center_freq = 5560, .hw_value = 112,}, 56 {.center_freq = 5580, .hw_value = 116,}, 57 {.center_freq = 5600, .hw_value = 120,}, 58 {.center_freq = 5620, .hw_value = 124,}, 59 {.center_freq = 5640, .hw_value = 128,}, 60 {.center_freq = 5660, .hw_value = 132,}, 61 {.center_freq = 5680, .hw_value = 136,}, 62 {.center_freq = 5700, .hw_value = 140,}, 63 {.center_freq = 5745, .hw_value = 149,}, 64 {.center_freq = 5765, .hw_value = 153,}, 65 {.center_freq = 5785, .hw_value = 157,}, 66 {.center_freq = 5805, .hw_value = 161,}, 67 {.center_freq = 5825, .hw_value = 165, 68 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 69 }; 70 71 static struct ieee80211_rate rtw_ratetable[] = { 72 {.bitrate = 10, .hw_value = 0x00,}, 73 {.bitrate = 20, .hw_value = 0x01,}, 74 {.bitrate = 55, .hw_value = 0x02,}, 75 {.bitrate = 110, .hw_value = 0x03,}, 76 {.bitrate = 60, .hw_value = 0x04,}, 77 {.bitrate = 90, .hw_value = 0x05,}, 78 {.bitrate = 120, .hw_value = 0x06,}, 79 {.bitrate = 180, .hw_value = 0x07,}, 80 {.bitrate = 240, .hw_value = 0x08,}, 81 {.bitrate = 360, .hw_value = 0x09,}, 82 {.bitrate = 480, .hw_value = 0x0a,}, 83 {.bitrate = 540, .hw_value = 0x0b,}, 84 }; 85 86 static struct ieee80211_supported_band rtw_band_2ghz = { 87 .band = NL80211_BAND_2GHZ, 88 89 .channels = rtw_channeltable_2g, 90 .n_channels = ARRAY_SIZE(rtw_channeltable_2g), 91 92 .bitrates = rtw_ratetable, 93 .n_bitrates = ARRAY_SIZE(rtw_ratetable), 94 95 .ht_cap = {0}, 96 .vht_cap = {0}, 97 }; 98 99 static struct ieee80211_supported_band rtw_band_5ghz = { 100 .band = NL80211_BAND_5GHZ, 101 102 .channels = rtw_channeltable_5g, 103 .n_channels = ARRAY_SIZE(rtw_channeltable_5g), 104 105 /* 5G has no CCK rates */ 106 .bitrates = rtw_ratetable + 4, 107 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4, 108 109 .ht_cap = {0}, 110 .vht_cap = {0}, 111 }; 112 113 struct rtw_watch_dog_iter_data { 114 struct rtw_vif *rtwvif; 115 bool active; 116 u8 assoc_cnt; 117 }; 118 119 static void rtw_vif_watch_dog_iter(void *data, u8 *mac, 120 struct ieee80211_vif *vif) 121 { 122 struct rtw_watch_dog_iter_data *iter_data = data; 123 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 124 125 if (vif->type == NL80211_IFTYPE_STATION) { 126 if (vif->bss_conf.assoc) { 127 iter_data->assoc_cnt++; 128 iter_data->rtwvif = rtwvif; 129 } 130 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD || 131 rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD) 132 iter_data->active = true; 133 } else { 134 /* only STATION mode can enter lps */ 135 iter_data->active = true; 136 } 137 138 rtwvif->stats.tx_unicast = 0; 139 rtwvif->stats.rx_unicast = 0; 140 rtwvif->stats.tx_cnt = 0; 141 rtwvif->stats.rx_cnt = 0; 142 } 143 144 /* process TX/RX statistics periodically for hardware, 145 * the information helps hardware to enhance performance 146 */ 147 static void rtw_watch_dog_work(struct work_struct *work) 148 { 149 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 150 watch_dog_work.work); 151 struct rtw_watch_dog_iter_data data = {}; 152 153 if (!rtw_flag_check(rtwdev, RTW_FLAG_RUNNING)) 154 return; 155 156 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 157 RTW_WATCH_DOG_DELAY_TIME); 158 159 /* reset tx/rx statictics */ 160 rtwdev->stats.tx_unicast = 0; 161 rtwdev->stats.rx_unicast = 0; 162 rtwdev->stats.tx_cnt = 0; 163 rtwdev->stats.rx_cnt = 0; 164 165 /* use atomic version to avoid taking local->iflist_mtx mutex */ 166 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data); 167 168 /* fw supports only one station associated to enter lps, if there are 169 * more than two stations associated to the AP, then we can not enter 170 * lps, because fw does not handle the overlapped beacon interval 171 */ 172 if (rtw_fw_support_lps && 173 data.rtwvif && !data.active && data.assoc_cnt == 1) 174 rtw_enter_lps(rtwdev, data.rtwvif); 175 176 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING)) 177 return; 178 179 rtw_phy_dynamic_mechanism(rtwdev); 180 181 rtwdev->watch_dog_cnt++; 182 } 183 184 static void rtw_c2h_work(struct work_struct *work) 185 { 186 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work); 187 struct sk_buff *skb, *tmp; 188 189 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 190 skb_unlink(skb, &rtwdev->c2h_queue); 191 rtw_fw_c2h_cmd_handle(rtwdev, skb); 192 dev_kfree_skb_any(skb); 193 } 194 } 195 196 void rtw_get_channel_params(struct cfg80211_chan_def *chandef, 197 struct rtw_channel_params *chan_params) 198 { 199 struct ieee80211_channel *channel = chandef->chan; 200 enum nl80211_chan_width width = chandef->width; 201 u32 primary_freq, center_freq; 202 u8 center_chan; 203 u8 bandwidth = RTW_CHANNEL_WIDTH_20; 204 u8 primary_chan_idx = 0; 205 206 center_chan = channel->hw_value; 207 primary_freq = channel->center_freq; 208 center_freq = chandef->center_freq1; 209 210 switch (width) { 211 case NL80211_CHAN_WIDTH_20_NOHT: 212 case NL80211_CHAN_WIDTH_20: 213 bandwidth = RTW_CHANNEL_WIDTH_20; 214 primary_chan_idx = 0; 215 break; 216 case NL80211_CHAN_WIDTH_40: 217 bandwidth = RTW_CHANNEL_WIDTH_40; 218 if (primary_freq > center_freq) { 219 primary_chan_idx = 1; 220 center_chan -= 2; 221 } else { 222 primary_chan_idx = 2; 223 center_chan += 2; 224 } 225 break; 226 case NL80211_CHAN_WIDTH_80: 227 bandwidth = RTW_CHANNEL_WIDTH_80; 228 if (primary_freq > center_freq) { 229 if (primary_freq - center_freq == 10) { 230 primary_chan_idx = 1; 231 center_chan -= 2; 232 } else { 233 primary_chan_idx = 3; 234 center_chan -= 6; 235 } 236 } else { 237 if (center_freq - primary_freq == 10) { 238 primary_chan_idx = 2; 239 center_chan += 2; 240 } else { 241 primary_chan_idx = 4; 242 center_chan += 6; 243 } 244 } 245 break; 246 default: 247 center_chan = 0; 248 break; 249 } 250 251 chan_params->center_chan = center_chan; 252 chan_params->bandwidth = bandwidth; 253 chan_params->primary_chan_idx = primary_chan_idx; 254 } 255 256 void rtw_set_channel(struct rtw_dev *rtwdev) 257 { 258 struct ieee80211_hw *hw = rtwdev->hw; 259 struct rtw_hal *hal = &rtwdev->hal; 260 struct rtw_chip_info *chip = rtwdev->chip; 261 struct rtw_channel_params ch_param; 262 u8 center_chan, bandwidth, primary_chan_idx; 263 264 rtw_get_channel_params(&hw->conf.chandef, &ch_param); 265 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 266 return; 267 268 center_chan = ch_param.center_chan; 269 bandwidth = ch_param.bandwidth; 270 primary_chan_idx = ch_param.primary_chan_idx; 271 272 hal->current_band_width = bandwidth; 273 hal->current_channel = center_chan; 274 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; 275 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx); 276 277 rtw_phy_set_tx_power_level(rtwdev, center_chan); 278 } 279 280 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr) 281 { 282 int i; 283 284 for (i = 0; i < ETH_ALEN; i++) 285 rtw_write8(rtwdev, start + i, addr[i]); 286 } 287 288 void rtw_vif_port_config(struct rtw_dev *rtwdev, 289 struct rtw_vif *rtwvif, 290 u32 config) 291 { 292 u32 addr, mask; 293 294 if (config & PORT_SET_MAC_ADDR) { 295 addr = rtwvif->conf->mac_addr.addr; 296 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr); 297 } 298 if (config & PORT_SET_BSSID) { 299 addr = rtwvif->conf->bssid.addr; 300 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid); 301 } 302 if (config & PORT_SET_NET_TYPE) { 303 addr = rtwvif->conf->net_type.addr; 304 mask = rtwvif->conf->net_type.mask; 305 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); 306 } 307 if (config & PORT_SET_AID) { 308 addr = rtwvif->conf->aid.addr; 309 mask = rtwvif->conf->aid.mask; 310 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); 311 } 312 if (config & PORT_SET_BCN_CTRL) { 313 addr = rtwvif->conf->bcn_ctrl.addr; 314 mask = rtwvif->conf->bcn_ctrl.mask; 315 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); 316 } 317 } 318 319 static u8 hw_bw_cap_to_bitamp(u8 bw_cap) 320 { 321 u8 bw = 0; 322 323 switch (bw_cap) { 324 case EFUSE_HW_CAP_IGNORE: 325 case EFUSE_HW_CAP_SUPP_BW80: 326 bw |= BIT(RTW_CHANNEL_WIDTH_80); 327 /* fall through */ 328 case EFUSE_HW_CAP_SUPP_BW40: 329 bw |= BIT(RTW_CHANNEL_WIDTH_40); 330 /* fall through */ 331 default: 332 bw |= BIT(RTW_CHANNEL_WIDTH_20); 333 break; 334 } 335 336 return bw; 337 } 338 339 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) 340 { 341 struct rtw_hal *hal = &rtwdev->hal; 342 343 if (hw_ant_num == EFUSE_HW_CAP_IGNORE || 344 hw_ant_num >= hal->rf_path_num) 345 return; 346 347 switch (hw_ant_num) { 348 case 1: 349 hal->rf_type = RF_1T1R; 350 hal->rf_path_num = 1; 351 hal->antenna_tx = BB_PATH_A; 352 hal->antenna_rx = BB_PATH_A; 353 break; 354 default: 355 WARN(1, "invalid hw configuration from efuse\n"); 356 break; 357 } 358 } 359 360 static u64 get_vht_ra_mask(struct ieee80211_sta *sta) 361 { 362 u64 ra_mask = 0; 363 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); 364 u8 vht_mcs_cap; 365 int i, nss; 366 367 /* 4SS, every two bits for MCS7/8/9 */ 368 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) { 369 vht_mcs_cap = mcs_map & 0x3; 370 switch (vht_mcs_cap) { 371 case 2: /* MCS9 */ 372 ra_mask |= 0x3ffULL << nss; 373 break; 374 case 1: /* MCS8 */ 375 ra_mask |= 0x1ffULL << nss; 376 break; 377 case 0: /* MCS7 */ 378 ra_mask |= 0x0ffULL << nss; 379 break; 380 default: 381 break; 382 } 383 } 384 385 return ra_mask; 386 } 387 388 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) 389 { 390 u8 rate_id = 0; 391 392 switch (wireless_set) { 393 case WIRELESS_CCK: 394 rate_id = RTW_RATEID_B_20M; 395 break; 396 case WIRELESS_OFDM: 397 rate_id = RTW_RATEID_G; 398 break; 399 case WIRELESS_CCK | WIRELESS_OFDM: 400 rate_id = RTW_RATEID_BG; 401 break; 402 case WIRELESS_OFDM | WIRELESS_HT: 403 if (tx_num == 1) 404 rate_id = RTW_RATEID_GN_N1SS; 405 else if (tx_num == 2) 406 rate_id = RTW_RATEID_GN_N2SS; 407 else if (tx_num == 3) 408 rate_id = RTW_RATEID_ARFR5_N_3SS; 409 break; 410 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT: 411 if (bw_mode == RTW_CHANNEL_WIDTH_40) { 412 if (tx_num == 1) 413 rate_id = RTW_RATEID_BGN_40M_1SS; 414 else if (tx_num == 2) 415 rate_id = RTW_RATEID_BGN_40M_2SS; 416 else if (tx_num == 3) 417 rate_id = RTW_RATEID_ARFR5_N_3SS; 418 else if (tx_num == 4) 419 rate_id = RTW_RATEID_ARFR7_N_4SS; 420 } else { 421 if (tx_num == 1) 422 rate_id = RTW_RATEID_BGN_20M_1SS; 423 else if (tx_num == 2) 424 rate_id = RTW_RATEID_BGN_20M_2SS; 425 else if (tx_num == 3) 426 rate_id = RTW_RATEID_ARFR5_N_3SS; 427 else if (tx_num == 4) 428 rate_id = RTW_RATEID_ARFR7_N_4SS; 429 } 430 break; 431 case WIRELESS_OFDM | WIRELESS_VHT: 432 if (tx_num == 1) 433 rate_id = RTW_RATEID_ARFR1_AC_1SS; 434 else if (tx_num == 2) 435 rate_id = RTW_RATEID_ARFR0_AC_2SS; 436 else if (tx_num == 3) 437 rate_id = RTW_RATEID_ARFR4_AC_3SS; 438 else if (tx_num == 4) 439 rate_id = RTW_RATEID_ARFR6_AC_4SS; 440 break; 441 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT: 442 if (bw_mode >= RTW_CHANNEL_WIDTH_80) { 443 if (tx_num == 1) 444 rate_id = RTW_RATEID_ARFR1_AC_1SS; 445 else if (tx_num == 2) 446 rate_id = RTW_RATEID_ARFR0_AC_2SS; 447 else if (tx_num == 3) 448 rate_id = RTW_RATEID_ARFR4_AC_3SS; 449 else if (tx_num == 4) 450 rate_id = RTW_RATEID_ARFR6_AC_4SS; 451 } else { 452 if (tx_num == 1) 453 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS; 454 else if (tx_num == 2) 455 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS; 456 else if (tx_num == 3) 457 rate_id = RTW_RATEID_ARFR4_AC_3SS; 458 else if (tx_num == 4) 459 rate_id = RTW_RATEID_ARFR6_AC_4SS; 460 } 461 break; 462 default: 463 break; 464 } 465 466 return rate_id; 467 } 468 469 #define RA_MASK_CCK_RATES 0x0000f 470 #define RA_MASK_OFDM_RATES 0x00ff0 471 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0) 472 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8) 473 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16) 474 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \ 475 RA_MASK_HT_RATES_2SS | \ 476 RA_MASK_HT_RATES_3SS) 477 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0) 478 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10) 479 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20) 480 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ 481 RA_MASK_VHT_RATES_2SS | \ 482 RA_MASK_VHT_RATES_3SS) 483 #define RA_MASK_CCK_IN_HT 0x00005 484 #define RA_MASK_CCK_IN_VHT 0x00005 485 #define RA_MASK_OFDM_IN_VHT 0x00010 486 #define RA_MASK_OFDM_IN_HT_2G 0x00010 487 #define RA_MASK_OFDM_IN_HT_5G 0x00030 488 489 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 490 { 491 struct ieee80211_sta *sta = si->sta; 492 struct rtw_efuse *efuse = &rtwdev->efuse; 493 struct rtw_hal *hal = &rtwdev->hal; 494 u8 rssi_level; 495 u8 wireless_set; 496 u8 bw_mode; 497 u8 rate_id; 498 u8 rf_type = RF_1T1R; 499 u8 stbc_en = 0; 500 u8 ldpc_en = 0; 501 u8 tx_num = 1; 502 u64 ra_mask = 0; 503 bool is_vht_enable = false; 504 bool is_support_sgi = false; 505 506 if (sta->vht_cap.vht_supported) { 507 is_vht_enable = true; 508 ra_mask |= get_vht_ra_mask(sta); 509 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) 510 stbc_en = VHT_STBC_EN; 511 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) 512 ldpc_en = VHT_LDPC_EN; 513 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 514 is_support_sgi = true; 515 } else if (sta->ht_cap.ht_supported) { 516 ra_mask |= (sta->ht_cap.mcs.rx_mask[NL80211_BAND_5GHZ] << 20) | 517 (sta->ht_cap.mcs.rx_mask[NL80211_BAND_2GHZ] << 12); 518 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 519 stbc_en = HT_STBC_EN; 520 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) 521 ldpc_en = HT_LDPC_EN; 522 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 || 523 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 524 is_support_sgi = true; 525 } 526 527 if (hal->current_band_type == RTW_BAND_5G) { 528 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; 529 if (sta->vht_cap.vht_supported) { 530 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; 531 wireless_set = WIRELESS_OFDM | WIRELESS_VHT; 532 } else if (sta->ht_cap.ht_supported) { 533 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; 534 wireless_set = WIRELESS_OFDM | WIRELESS_HT; 535 } else { 536 wireless_set = WIRELESS_OFDM; 537 } 538 } else if (hal->current_band_type == RTW_BAND_2G) { 539 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; 540 if (sta->vht_cap.vht_supported) { 541 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | 542 RA_MASK_OFDM_IN_VHT; 543 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 544 WIRELESS_HT | WIRELESS_VHT; 545 } else if (sta->ht_cap.ht_supported) { 546 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | 547 RA_MASK_OFDM_IN_HT_2G; 548 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 549 WIRELESS_HT; 550 } else if (sta->supp_rates[0] <= 0xf) { 551 wireless_set = WIRELESS_CCK; 552 } else { 553 wireless_set = WIRELESS_CCK | WIRELESS_OFDM; 554 } 555 } else { 556 rtw_err(rtwdev, "Unknown band type\n"); 557 wireless_set = 0; 558 } 559 560 if (efuse->hw_cap.nss == 1) { 561 ra_mask &= RA_MASK_VHT_RATES_1SS; 562 ra_mask &= RA_MASK_HT_RATES_1SS; 563 } 564 565 switch (sta->bandwidth) { 566 case IEEE80211_STA_RX_BW_80: 567 bw_mode = RTW_CHANNEL_WIDTH_80; 568 break; 569 case IEEE80211_STA_RX_BW_40: 570 bw_mode = RTW_CHANNEL_WIDTH_40; 571 break; 572 default: 573 bw_mode = RTW_CHANNEL_WIDTH_20; 574 break; 575 } 576 577 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) { 578 tx_num = 2; 579 rf_type = RF_2T2R; 580 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) { 581 tx_num = 2; 582 rf_type = RF_2T2R; 583 } 584 585 rate_id = get_rate_id(wireless_set, bw_mode, tx_num); 586 587 if (wireless_set != WIRELESS_CCK) { 588 rssi_level = si->rssi_level; 589 if (rssi_level == 0) 590 ra_mask &= 0xffffffffffffffffULL; 591 else if (rssi_level == 1) 592 ra_mask &= 0xfffffffffffffff0ULL; 593 else if (rssi_level == 2) 594 ra_mask &= 0xffffffffffffefe0ULL; 595 else if (rssi_level == 3) 596 ra_mask &= 0xffffffffffffcfc0ULL; 597 else if (rssi_level == 4) 598 ra_mask &= 0xffffffffffff8f80ULL; 599 else if (rssi_level >= 5) 600 ra_mask &= 0xffffffffffff0f00ULL; 601 } 602 603 si->bw_mode = bw_mode; 604 si->stbc_en = stbc_en; 605 si->ldpc_en = ldpc_en; 606 si->rf_type = rf_type; 607 si->wireless_set = wireless_set; 608 si->sgi_enable = is_support_sgi; 609 si->vht_enable = is_vht_enable; 610 si->ra_mask = ra_mask; 611 si->rate_id = rate_id; 612 613 rtw_fw_send_ra_info(rtwdev, si); 614 } 615 616 static int rtw_power_on(struct rtw_dev *rtwdev) 617 { 618 struct rtw_chip_info *chip = rtwdev->chip; 619 struct rtw_fw_state *fw = &rtwdev->fw; 620 int ret; 621 622 ret = rtw_hci_setup(rtwdev); 623 if (ret) { 624 rtw_err(rtwdev, "failed to setup hci\n"); 625 goto err; 626 } 627 628 /* power on MAC before firmware downloaded */ 629 ret = rtw_mac_power_on(rtwdev); 630 if (ret) { 631 rtw_err(rtwdev, "failed to power on mac\n"); 632 goto err; 633 } 634 635 wait_for_completion(&fw->completion); 636 if (!fw->firmware) { 637 ret = -EINVAL; 638 rtw_err(rtwdev, "failed to load firmware\n"); 639 goto err; 640 } 641 642 ret = rtw_download_firmware(rtwdev, fw); 643 if (ret) { 644 rtw_err(rtwdev, "failed to download firmware\n"); 645 goto err_off; 646 } 647 648 /* config mac after firmware downloaded */ 649 ret = rtw_mac_init(rtwdev); 650 if (ret) { 651 rtw_err(rtwdev, "failed to configure mac\n"); 652 goto err_off; 653 } 654 655 chip->ops->phy_set_param(rtwdev); 656 657 ret = rtw_hci_start(rtwdev); 658 if (ret) { 659 rtw_err(rtwdev, "failed to start hci\n"); 660 goto err_off; 661 } 662 663 return 0; 664 665 err_off: 666 rtw_mac_power_off(rtwdev); 667 668 err: 669 return ret; 670 } 671 672 int rtw_core_start(struct rtw_dev *rtwdev) 673 { 674 int ret; 675 676 ret = rtw_power_on(rtwdev); 677 if (ret) 678 return ret; 679 680 rtw_sec_enable_sec_engine(rtwdev); 681 682 /* rcr reset after powered on */ 683 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); 684 685 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 686 RTW_WATCH_DOG_DELAY_TIME); 687 688 rtw_flag_set(rtwdev, RTW_FLAG_RUNNING); 689 690 return 0; 691 } 692 693 static void rtw_power_off(struct rtw_dev *rtwdev) 694 { 695 rtwdev->hci.ops->stop(rtwdev); 696 rtw_mac_power_off(rtwdev); 697 } 698 699 void rtw_core_stop(struct rtw_dev *rtwdev) 700 { 701 rtw_flag_clear(rtwdev, RTW_FLAG_RUNNING); 702 rtw_flag_clear(rtwdev, RTW_FLAG_FW_RUNNING); 703 704 cancel_delayed_work_sync(&rtwdev->watch_dog_work); 705 706 rtw_power_off(rtwdev); 707 } 708 709 static void rtw_init_ht_cap(struct rtw_dev *rtwdev, 710 struct ieee80211_sta_ht_cap *ht_cap) 711 { 712 struct rtw_efuse *efuse = &rtwdev->efuse; 713 714 ht_cap->ht_supported = true; 715 ht_cap->cap = 0; 716 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 717 IEEE80211_HT_CAP_MAX_AMSDU | 718 IEEE80211_HT_CAP_LDPC_CODING | 719 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 720 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) 721 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 722 IEEE80211_HT_CAP_DSSSCCK40 | 723 IEEE80211_HT_CAP_SGI_40; 724 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 725 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; 726 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 727 if (efuse->hw_cap.nss > 1) { 728 ht_cap->mcs.rx_mask[0] = 0xFF; 729 ht_cap->mcs.rx_mask[1] = 0xFF; 730 ht_cap->mcs.rx_mask[4] = 0x01; 731 ht_cap->mcs.rx_highest = cpu_to_le16(300); 732 } else { 733 ht_cap->mcs.rx_mask[0] = 0xFF; 734 ht_cap->mcs.rx_mask[1] = 0x00; 735 ht_cap->mcs.rx_mask[4] = 0x01; 736 ht_cap->mcs.rx_highest = cpu_to_le16(150); 737 } 738 } 739 740 static void rtw_init_vht_cap(struct rtw_dev *rtwdev, 741 struct ieee80211_sta_vht_cap *vht_cap) 742 { 743 struct rtw_efuse *efuse = &rtwdev->efuse; 744 u16 mcs_map; 745 __le16 highest; 746 747 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && 748 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT) 749 return; 750 751 vht_cap->vht_supported = true; 752 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 753 IEEE80211_VHT_CAP_RXLDPC | 754 IEEE80211_VHT_CAP_SHORT_GI_80 | 755 IEEE80211_VHT_CAP_TXSTBC | 756 IEEE80211_VHT_CAP_RXSTBC_1 | 757 IEEE80211_VHT_CAP_HTC_VHT | 758 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 759 0; 760 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 761 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 762 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 763 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 764 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 765 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 766 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14; 767 if (efuse->hw_cap.nss > 1) { 768 highest = cpu_to_le16(780); 769 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2; 770 } else { 771 highest = cpu_to_le16(390); 772 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2; 773 } 774 775 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 776 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 777 vht_cap->vht_mcs.rx_highest = highest; 778 vht_cap->vht_mcs.tx_highest = highest; 779 } 780 781 static void rtw_set_supported_band(struct ieee80211_hw *hw, 782 struct rtw_chip_info *chip) 783 { 784 struct rtw_dev *rtwdev = hw->priv; 785 struct ieee80211_supported_band *sband; 786 787 if (chip->band & RTW_BAND_2G) { 788 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL); 789 if (!sband) 790 goto err_out; 791 if (chip->ht_supported) 792 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 793 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband; 794 } 795 796 if (chip->band & RTW_BAND_5G) { 797 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL); 798 if (!sband) 799 goto err_out; 800 if (chip->ht_supported) 801 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 802 if (chip->vht_supported) 803 rtw_init_vht_cap(rtwdev, &sband->vht_cap); 804 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 805 } 806 807 return; 808 809 err_out: 810 rtw_err(rtwdev, "failed to set supported band\n"); 811 kfree(sband); 812 } 813 814 static void rtw_unset_supported_band(struct ieee80211_hw *hw, 815 struct rtw_chip_info *chip) 816 { 817 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 818 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 819 } 820 821 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) 822 { 823 struct rtw_dev *rtwdev = context; 824 struct rtw_fw_state *fw = &rtwdev->fw; 825 826 if (!firmware) 827 rtw_err(rtwdev, "failed to request firmware\n"); 828 829 fw->firmware = firmware; 830 complete_all(&fw->completion); 831 } 832 833 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name) 834 { 835 struct rtw_fw_state *fw = &rtwdev->fw; 836 int ret; 837 838 init_completion(&fw->completion); 839 840 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 841 GFP_KERNEL, rtwdev, rtw_load_firmware_cb); 842 if (ret) { 843 rtw_err(rtwdev, "async firmware request failed\n"); 844 return ret; 845 } 846 847 return 0; 848 } 849 850 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) 851 { 852 struct rtw_chip_info *chip = rtwdev->chip; 853 struct rtw_hal *hal = &rtwdev->hal; 854 struct rtw_efuse *efuse = &rtwdev->efuse; 855 u32 wl_bt_pwr_ctrl; 856 int ret = 0; 857 858 switch (rtw_hci_type(rtwdev)) { 859 case RTW_HCI_TYPE_PCIE: 860 rtwdev->hci.rpwm_addr = 0x03d9; 861 break; 862 default: 863 rtw_err(rtwdev, "unsupported hci type\n"); 864 return -EINVAL; 865 } 866 867 wl_bt_pwr_ctrl = rtw_read32(rtwdev, REG_WL_BT_PWR_CTRL); 868 if (wl_bt_pwr_ctrl & BIT_BT_FUNC_EN) 869 rtwdev->efuse.btcoex = true; 870 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 871 hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2; 872 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 873 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 874 if (hal->chip_version & BIT_RF_TYPE_ID) { 875 hal->rf_type = RF_2T2R; 876 hal->rf_path_num = 2; 877 hal->antenna_tx = BB_PATH_AB; 878 hal->antenna_rx = BB_PATH_AB; 879 } else { 880 hal->rf_type = RF_1T1R; 881 hal->rf_path_num = 1; 882 hal->antenna_tx = BB_PATH_A; 883 hal->antenna_rx = BB_PATH_A; 884 } 885 886 if (hal->fab_version == 2) 887 hal->fab_version = 1; 888 else if (hal->fab_version == 1) 889 hal->fab_version = 2; 890 891 efuse->physical_size = chip->phy_efuse_size; 892 efuse->logical_size = chip->log_efuse_size; 893 efuse->protect_size = chip->ptct_efuse_size; 894 895 /* default use ack */ 896 rtwdev->hal.rcr |= BIT_VHT_DACK; 897 898 return ret; 899 } 900 901 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) 902 { 903 struct rtw_fw_state *fw = &rtwdev->fw; 904 int ret; 905 906 ret = rtw_hci_setup(rtwdev); 907 if (ret) { 908 rtw_err(rtwdev, "failed to setup hci\n"); 909 goto err; 910 } 911 912 ret = rtw_mac_power_on(rtwdev); 913 if (ret) { 914 rtw_err(rtwdev, "failed to power on mac\n"); 915 goto err; 916 } 917 918 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP); 919 920 wait_for_completion(&fw->completion); 921 if (!fw->firmware) { 922 ret = -EINVAL; 923 rtw_err(rtwdev, "failed to load firmware\n"); 924 goto err; 925 } 926 927 ret = rtw_download_firmware(rtwdev, fw); 928 if (ret) { 929 rtw_err(rtwdev, "failed to download firmware\n"); 930 goto err_off; 931 } 932 933 return 0; 934 935 err_off: 936 rtw_mac_power_off(rtwdev); 937 938 err: 939 return ret; 940 } 941 942 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev) 943 { 944 struct rtw_efuse *efuse = &rtwdev->efuse; 945 u8 hw_feature[HW_FEATURE_LEN]; 946 u8 id; 947 u8 bw; 948 int i; 949 950 id = rtw_read8(rtwdev, REG_C2HEVT); 951 if (id != C2H_HW_FEATURE_REPORT) { 952 rtw_err(rtwdev, "failed to read hw feature report\n"); 953 return -EBUSY; 954 } 955 956 for (i = 0; i < HW_FEATURE_LEN; i++) 957 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i); 958 959 rtw_write8(rtwdev, REG_C2HEVT, 0); 960 961 bw = GET_EFUSE_HW_CAP_BW(hw_feature); 962 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw); 963 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature); 964 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature); 965 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature); 966 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature); 967 968 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num); 969 970 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE) 971 efuse->hw_cap.nss = rtwdev->hal.rf_path_num; 972 973 rtw_dbg(rtwdev, RTW_DBG_EFUSE, 974 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", 975 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, 976 efuse->hw_cap.ant_num, efuse->hw_cap.nss); 977 978 return 0; 979 } 980 981 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev) 982 { 983 rtw_hci_stop(rtwdev); 984 rtw_mac_power_off(rtwdev); 985 } 986 987 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) 988 { 989 struct rtw_efuse *efuse = &rtwdev->efuse; 990 int ret; 991 992 mutex_lock(&rtwdev->mutex); 993 994 /* power on mac to read efuse */ 995 ret = rtw_chip_efuse_enable(rtwdev); 996 if (ret) 997 goto out; 998 999 ret = rtw_parse_efuse_map(rtwdev); 1000 if (ret) 1001 goto out; 1002 1003 ret = rtw_dump_hw_feature(rtwdev); 1004 if (ret) 1005 goto out; 1006 1007 ret = rtw_check_supported_rfe(rtwdev); 1008 if (ret) 1009 goto out; 1010 1011 if (efuse->crystal_cap == 0xff) 1012 efuse->crystal_cap = 0; 1013 if (efuse->pa_type_2g == 0xff) 1014 efuse->pa_type_2g = 0; 1015 if (efuse->pa_type_5g == 0xff) 1016 efuse->pa_type_5g = 0; 1017 if (efuse->lna_type_2g == 0xff) 1018 efuse->lna_type_2g = 0; 1019 if (efuse->lna_type_5g == 0xff) 1020 efuse->lna_type_5g = 0; 1021 if (efuse->channel_plan == 0xff) 1022 efuse->channel_plan = 0x7f; 1023 if (efuse->bt_setting & BIT(0)) 1024 efuse->share_ant = true; 1025 if (efuse->regd == 0xff) 1026 efuse->regd = 0; 1027 1028 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; 1029 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0; 1030 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0; 1031 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0; 1032 1033 rtw_chip_efuse_disable(rtwdev); 1034 1035 out: 1036 mutex_unlock(&rtwdev->mutex); 1037 return ret; 1038 } 1039 1040 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) 1041 { 1042 struct rtw_hal *hal = &rtwdev->hal; 1043 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev); 1044 1045 if (!rfe_def) 1046 return -ENODEV; 1047 1048 rtw_phy_setup_phy_cond(rtwdev, 0); 1049 1050 rtw_hw_init_tx_power(hal); 1051 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); 1052 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); 1053 rtw_phy_tx_power_by_rate_config(hal); 1054 rtw_phy_tx_power_limit_config(hal); 1055 1056 return 0; 1057 } 1058 1059 int rtw_chip_info_setup(struct rtw_dev *rtwdev) 1060 { 1061 int ret; 1062 1063 ret = rtw_chip_parameter_setup(rtwdev); 1064 if (ret) { 1065 rtw_err(rtwdev, "failed to setup chip parameters\n"); 1066 goto err_out; 1067 } 1068 1069 ret = rtw_chip_efuse_info_setup(rtwdev); 1070 if (ret) { 1071 rtw_err(rtwdev, "failed to setup chip efuse info\n"); 1072 goto err_out; 1073 } 1074 1075 ret = rtw_chip_board_info_setup(rtwdev); 1076 if (ret) { 1077 rtw_err(rtwdev, "failed to setup chip board info\n"); 1078 goto err_out; 1079 } 1080 1081 return 0; 1082 1083 err_out: 1084 return ret; 1085 } 1086 EXPORT_SYMBOL(rtw_chip_info_setup); 1087 1088 int rtw_core_init(struct rtw_dev *rtwdev) 1089 { 1090 int ret; 1091 1092 INIT_LIST_HEAD(&rtwdev->rsvd_page_list); 1093 1094 timer_setup(&rtwdev->tx_report.purge_timer, 1095 rtw_tx_report_purge_timer, 0); 1096 1097 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); 1098 INIT_DELAYED_WORK(&rtwdev->lps_work, rtw_lps_work); 1099 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); 1100 skb_queue_head_init(&rtwdev->c2h_queue); 1101 skb_queue_head_init(&rtwdev->tx_report.queue); 1102 1103 spin_lock_init(&rtwdev->dm_lock); 1104 spin_lock_init(&rtwdev->rf_lock); 1105 spin_lock_init(&rtwdev->h2c.lock); 1106 spin_lock_init(&rtwdev->tx_report.q_lock); 1107 1108 mutex_init(&rtwdev->mutex); 1109 mutex_init(&rtwdev->hal.tx_power_mutex); 1110 1111 rtwdev->sec.total_cam_num = 32; 1112 rtwdev->hal.current_channel = 1; 1113 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map); 1114 1115 mutex_lock(&rtwdev->mutex); 1116 rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false); 1117 mutex_unlock(&rtwdev->mutex); 1118 1119 /* default rx filter setting */ 1120 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | 1121 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | 1122 BIT_AB | BIT_AM | BIT_APM; 1123 1124 ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name); 1125 if (ret) { 1126 rtw_warn(rtwdev, "no firmware loaded\n"); 1127 return ret; 1128 } 1129 1130 return 0; 1131 } 1132 EXPORT_SYMBOL(rtw_core_init); 1133 1134 void rtw_core_deinit(struct rtw_dev *rtwdev) 1135 { 1136 struct rtw_fw_state *fw = &rtwdev->fw; 1137 struct rtw_rsvd_page *rsvd_pkt, *tmp; 1138 unsigned long flags; 1139 1140 if (fw->firmware) 1141 release_firmware(fw->firmware); 1142 1143 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); 1144 skb_queue_purge(&rtwdev->tx_report.queue); 1145 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 1146 1147 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) { 1148 list_del(&rsvd_pkt->list); 1149 kfree(rsvd_pkt); 1150 } 1151 1152 mutex_destroy(&rtwdev->mutex); 1153 mutex_destroy(&rtwdev->hal.tx_power_mutex); 1154 } 1155 EXPORT_SYMBOL(rtw_core_deinit); 1156 1157 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 1158 { 1159 int max_tx_headroom = 0; 1160 int ret; 1161 1162 /* TODO: USB & SDIO may need extra room? */ 1163 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; 1164 1165 hw->extra_tx_headroom = max_tx_headroom; 1166 hw->queues = IEEE80211_NUM_ACS; 1167 hw->sta_data_size = sizeof(struct rtw_sta_info); 1168 hw->vif_data_size = sizeof(struct rtw_vif); 1169 1170 ieee80211_hw_set(hw, SIGNAL_DBM); 1171 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 1172 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 1173 ieee80211_hw_set(hw, MFP_CAPABLE); 1174 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 1175 ieee80211_hw_set(hw, SUPPORTS_PS); 1176 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 1177 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 1178 1179 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1180 BIT(NL80211_IFTYPE_AP) | 1181 BIT(NL80211_IFTYPE_ADHOC) | 1182 BIT(NL80211_IFTYPE_MESH_POINT); 1183 1184 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | 1185 WIPHY_FLAG_TDLS_EXTERNAL_SETUP; 1186 1187 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 1188 1189 rtw_set_supported_band(hw, rtwdev->chip); 1190 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); 1191 1192 rtw_regd_init(rtwdev, rtw_regd_notifier); 1193 1194 ret = ieee80211_register_hw(hw); 1195 if (ret) { 1196 rtw_err(rtwdev, "failed to register hw\n"); 1197 return ret; 1198 } 1199 1200 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2)) 1201 rtw_err(rtwdev, "regulatory_hint fail\n"); 1202 1203 rtw_debugfs_init(rtwdev); 1204 1205 return 0; 1206 } 1207 EXPORT_SYMBOL(rtw_register_hw); 1208 1209 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 1210 { 1211 struct rtw_chip_info *chip = rtwdev->chip; 1212 1213 ieee80211_unregister_hw(hw); 1214 rtw_unset_supported_band(hw, chip); 1215 } 1216 EXPORT_SYMBOL(rtw_unregister_hw); 1217 1218 MODULE_AUTHOR("Realtek Corporation"); 1219 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); 1220 MODULE_LICENSE("Dual BSD/GPL"); 1221