1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #include "main.h" 6 #include "regd.h" 7 #include "fw.h" 8 #include "ps.h" 9 #include "sec.h" 10 #include "mac.h" 11 #include "coex.h" 12 #include "phy.h" 13 #include "reg.h" 14 #include "efuse.h" 15 #include "tx.h" 16 #include "debug.h" 17 #include "bf.h" 18 19 unsigned int rtw_fw_lps_deep_mode; 20 EXPORT_SYMBOL(rtw_fw_lps_deep_mode); 21 bool rtw_bf_support = true; 22 unsigned int rtw_debug_mask; 23 EXPORT_SYMBOL(rtw_debug_mask); 24 25 module_param_named(lps_deep_mode, rtw_fw_lps_deep_mode, uint, 0644); 26 module_param_named(support_bf, rtw_bf_support, bool, 0644); 27 module_param_named(debug_mask, rtw_debug_mask, uint, 0644); 28 29 MODULE_PARM_DESC(lps_deep_mode, "Deeper PS mode. If 0, deep PS is disabled"); 30 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support"); 31 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 32 33 static struct ieee80211_channel rtw_channeltable_2g[] = { 34 {.center_freq = 2412, .hw_value = 1,}, 35 {.center_freq = 2417, .hw_value = 2,}, 36 {.center_freq = 2422, .hw_value = 3,}, 37 {.center_freq = 2427, .hw_value = 4,}, 38 {.center_freq = 2432, .hw_value = 5,}, 39 {.center_freq = 2437, .hw_value = 6,}, 40 {.center_freq = 2442, .hw_value = 7,}, 41 {.center_freq = 2447, .hw_value = 8,}, 42 {.center_freq = 2452, .hw_value = 9,}, 43 {.center_freq = 2457, .hw_value = 10,}, 44 {.center_freq = 2462, .hw_value = 11,}, 45 {.center_freq = 2467, .hw_value = 12,}, 46 {.center_freq = 2472, .hw_value = 13,}, 47 {.center_freq = 2484, .hw_value = 14,}, 48 }; 49 50 static struct ieee80211_channel rtw_channeltable_5g[] = { 51 {.center_freq = 5180, .hw_value = 36,}, 52 {.center_freq = 5200, .hw_value = 40,}, 53 {.center_freq = 5220, .hw_value = 44,}, 54 {.center_freq = 5240, .hw_value = 48,}, 55 {.center_freq = 5260, .hw_value = 52,}, 56 {.center_freq = 5280, .hw_value = 56,}, 57 {.center_freq = 5300, .hw_value = 60,}, 58 {.center_freq = 5320, .hw_value = 64,}, 59 {.center_freq = 5500, .hw_value = 100,}, 60 {.center_freq = 5520, .hw_value = 104,}, 61 {.center_freq = 5540, .hw_value = 108,}, 62 {.center_freq = 5560, .hw_value = 112,}, 63 {.center_freq = 5580, .hw_value = 116,}, 64 {.center_freq = 5600, .hw_value = 120,}, 65 {.center_freq = 5620, .hw_value = 124,}, 66 {.center_freq = 5640, .hw_value = 128,}, 67 {.center_freq = 5660, .hw_value = 132,}, 68 {.center_freq = 5680, .hw_value = 136,}, 69 {.center_freq = 5700, .hw_value = 140,}, 70 {.center_freq = 5745, .hw_value = 149,}, 71 {.center_freq = 5765, .hw_value = 153,}, 72 {.center_freq = 5785, .hw_value = 157,}, 73 {.center_freq = 5805, .hw_value = 161,}, 74 {.center_freq = 5825, .hw_value = 165, 75 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 76 }; 77 78 static struct ieee80211_rate rtw_ratetable[] = { 79 {.bitrate = 10, .hw_value = 0x00,}, 80 {.bitrate = 20, .hw_value = 0x01,}, 81 {.bitrate = 55, .hw_value = 0x02,}, 82 {.bitrate = 110, .hw_value = 0x03,}, 83 {.bitrate = 60, .hw_value = 0x04,}, 84 {.bitrate = 90, .hw_value = 0x05,}, 85 {.bitrate = 120, .hw_value = 0x06,}, 86 {.bitrate = 180, .hw_value = 0x07,}, 87 {.bitrate = 240, .hw_value = 0x08,}, 88 {.bitrate = 360, .hw_value = 0x09,}, 89 {.bitrate = 480, .hw_value = 0x0a,}, 90 {.bitrate = 540, .hw_value = 0x0b,}, 91 }; 92 93 u16 rtw_desc_to_bitrate(u8 desc_rate) 94 { 95 struct ieee80211_rate rate; 96 97 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n")) 98 return 0; 99 100 rate = rtw_ratetable[desc_rate]; 101 102 return rate.bitrate; 103 } 104 105 static struct ieee80211_supported_band rtw_band_2ghz = { 106 .band = NL80211_BAND_2GHZ, 107 108 .channels = rtw_channeltable_2g, 109 .n_channels = ARRAY_SIZE(rtw_channeltable_2g), 110 111 .bitrates = rtw_ratetable, 112 .n_bitrates = ARRAY_SIZE(rtw_ratetable), 113 114 .ht_cap = {0}, 115 .vht_cap = {0}, 116 }; 117 118 static struct ieee80211_supported_band rtw_band_5ghz = { 119 .band = NL80211_BAND_5GHZ, 120 121 .channels = rtw_channeltable_5g, 122 .n_channels = ARRAY_SIZE(rtw_channeltable_5g), 123 124 /* 5G has no CCK rates */ 125 .bitrates = rtw_ratetable + 4, 126 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4, 127 128 .ht_cap = {0}, 129 .vht_cap = {0}, 130 }; 131 132 struct rtw_watch_dog_iter_data { 133 struct rtw_dev *rtwdev; 134 struct rtw_vif *rtwvif; 135 }; 136 137 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) 138 { 139 struct rtw_bf_info *bf_info = &rtwdev->bf_info; 140 u8 fix_rate_enable = 0; 141 u8 new_csi_rate_idx; 142 143 if (rtwvif->bfee.role != RTW_BFEE_SU && 144 rtwvif->bfee.role != RTW_BFEE_MU) 145 return; 146 147 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi, 148 bf_info->cur_csi_rpt_rate, 149 fix_rate_enable, &new_csi_rate_idx); 150 151 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) 152 bf_info->cur_csi_rpt_rate = new_csi_rate_idx; 153 } 154 155 static void rtw_vif_watch_dog_iter(void *data, u8 *mac, 156 struct ieee80211_vif *vif) 157 { 158 struct rtw_watch_dog_iter_data *iter_data = data; 159 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 160 161 if (vif->type == NL80211_IFTYPE_STATION) 162 if (vif->bss_conf.assoc) 163 iter_data->rtwvif = rtwvif; 164 165 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif); 166 167 rtwvif->stats.tx_unicast = 0; 168 rtwvif->stats.rx_unicast = 0; 169 rtwvif->stats.tx_cnt = 0; 170 rtwvif->stats.rx_cnt = 0; 171 } 172 173 /* process TX/RX statistics periodically for hardware, 174 * the information helps hardware to enhance performance 175 */ 176 static void rtw_watch_dog_work(struct work_struct *work) 177 { 178 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 179 watch_dog_work.work); 180 struct rtw_traffic_stats *stats = &rtwdev->stats; 181 struct rtw_watch_dog_iter_data data = {}; 182 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 183 bool ps_active; 184 185 mutex_lock(&rtwdev->mutex); 186 187 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags)) 188 goto unlock; 189 190 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 191 RTW_WATCH_DOG_DELAY_TIME); 192 193 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100) 194 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 195 else 196 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 197 198 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) 199 rtw_coex_wl_status_change_notify(rtwdev); 200 201 if (stats->tx_cnt > RTW_LPS_THRESHOLD || 202 stats->rx_cnt > RTW_LPS_THRESHOLD) 203 ps_active = true; 204 else 205 ps_active = false; 206 207 ewma_tp_add(&stats->tx_ewma_tp, 208 (u32)(stats->tx_unicast >> RTW_TP_SHIFT)); 209 ewma_tp_add(&stats->rx_ewma_tp, 210 (u32)(stats->rx_unicast >> RTW_TP_SHIFT)); 211 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 212 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 213 214 /* reset tx/rx statictics */ 215 stats->tx_unicast = 0; 216 stats->rx_unicast = 0; 217 stats->tx_cnt = 0; 218 stats->rx_cnt = 0; 219 220 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 221 goto unlock; 222 223 /* make sure BB/RF is working for dynamic mech */ 224 rtw_leave_lps(rtwdev); 225 226 rtw_phy_dynamic_mechanism(rtwdev); 227 228 data.rtwdev = rtwdev; 229 /* use atomic version to avoid taking local->iflist_mtx mutex */ 230 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data); 231 232 /* fw supports only one station associated to enter lps, if there are 233 * more than two stations associated to the AP, then we can not enter 234 * lps, because fw does not handle the overlapped beacon interval 235 * 236 * mac80211 should iterate vifs and determine if driver can enter 237 * ps by passing IEEE80211_CONF_PS to us, all we need to do is to 238 * get that vif and check if device is having traffic more than the 239 * threshold. 240 */ 241 if (rtwdev->ps_enabled && data.rtwvif && !ps_active) 242 rtw_enter_lps(rtwdev, data.rtwvif->port); 243 244 rtwdev->watch_dog_cnt++; 245 246 unlock: 247 mutex_unlock(&rtwdev->mutex); 248 } 249 250 static void rtw_c2h_work(struct work_struct *work) 251 { 252 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work); 253 struct sk_buff *skb, *tmp; 254 255 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 256 skb_unlink(skb, &rtwdev->c2h_queue); 257 rtw_fw_c2h_cmd_handle(rtwdev, skb); 258 dev_kfree_skb_any(skb); 259 } 260 } 261 262 struct rtw_txq_ba_iter_data { 263 }; 264 265 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta) 266 { 267 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 268 int ret; 269 u8 tid; 270 271 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 272 while (tid != IEEE80211_NUM_TIDS) { 273 clear_bit(tid, si->tid_ba); 274 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 275 if (ret == -EINVAL) { 276 struct ieee80211_txq *txq; 277 struct rtw_txq *rtwtxq; 278 279 txq = sta->txq[tid]; 280 rtwtxq = (struct rtw_txq *)txq->drv_priv; 281 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags); 282 } 283 284 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 285 } 286 } 287 288 static void rtw_txq_ba_work(struct work_struct *work) 289 { 290 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work); 291 struct rtw_txq_ba_iter_data data; 292 293 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data); 294 } 295 296 void rtw_get_channel_params(struct cfg80211_chan_def *chandef, 297 struct rtw_channel_params *chan_params) 298 { 299 struct ieee80211_channel *channel = chandef->chan; 300 enum nl80211_chan_width width = chandef->width; 301 u8 *cch_by_bw = chan_params->cch_by_bw; 302 u32 primary_freq, center_freq; 303 u8 center_chan; 304 u8 bandwidth = RTW_CHANNEL_WIDTH_20; 305 u8 primary_chan_idx = 0; 306 u8 i; 307 308 center_chan = channel->hw_value; 309 primary_freq = channel->center_freq; 310 center_freq = chandef->center_freq1; 311 312 /* assign the center channel used while 20M bw is selected */ 313 cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value; 314 315 switch (width) { 316 case NL80211_CHAN_WIDTH_20_NOHT: 317 case NL80211_CHAN_WIDTH_20: 318 bandwidth = RTW_CHANNEL_WIDTH_20; 319 primary_chan_idx = RTW_SC_DONT_CARE; 320 break; 321 case NL80211_CHAN_WIDTH_40: 322 bandwidth = RTW_CHANNEL_WIDTH_40; 323 if (primary_freq > center_freq) { 324 primary_chan_idx = RTW_SC_20_UPPER; 325 center_chan -= 2; 326 } else { 327 primary_chan_idx = RTW_SC_20_LOWER; 328 center_chan += 2; 329 } 330 break; 331 case NL80211_CHAN_WIDTH_80: 332 bandwidth = RTW_CHANNEL_WIDTH_80; 333 if (primary_freq > center_freq) { 334 if (primary_freq - center_freq == 10) { 335 primary_chan_idx = RTW_SC_20_UPPER; 336 center_chan -= 2; 337 } else { 338 primary_chan_idx = RTW_SC_20_UPMOST; 339 center_chan -= 6; 340 } 341 /* assign the center channel used 342 * while 40M bw is selected 343 */ 344 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4; 345 } else { 346 if (center_freq - primary_freq == 10) { 347 primary_chan_idx = RTW_SC_20_LOWER; 348 center_chan += 2; 349 } else { 350 primary_chan_idx = RTW_SC_20_LOWEST; 351 center_chan += 6; 352 } 353 /* assign the center channel used 354 * while 40M bw is selected 355 */ 356 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4; 357 } 358 break; 359 default: 360 center_chan = 0; 361 break; 362 } 363 364 chan_params->center_chan = center_chan; 365 chan_params->bandwidth = bandwidth; 366 chan_params->primary_chan_idx = primary_chan_idx; 367 368 /* assign the center channel used while current bw is selected */ 369 cch_by_bw[bandwidth] = center_chan; 370 371 for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++) 372 cch_by_bw[i] = 0; 373 } 374 375 void rtw_set_channel(struct rtw_dev *rtwdev) 376 { 377 struct ieee80211_hw *hw = rtwdev->hw; 378 struct rtw_hal *hal = &rtwdev->hal; 379 struct rtw_chip_info *chip = rtwdev->chip; 380 struct rtw_channel_params ch_param; 381 u8 center_chan, bandwidth, primary_chan_idx; 382 u8 i; 383 384 rtw_get_channel_params(&hw->conf.chandef, &ch_param); 385 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 386 return; 387 388 center_chan = ch_param.center_chan; 389 bandwidth = ch_param.bandwidth; 390 primary_chan_idx = ch_param.primary_chan_idx; 391 392 hal->current_band_width = bandwidth; 393 hal->current_channel = center_chan; 394 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; 395 396 for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++) 397 hal->cch_by_bw[i] = ch_param.cch_by_bw[i]; 398 399 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx); 400 401 if (hal->current_band_type == RTW_BAND_5G) { 402 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); 403 } else { 404 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 405 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G); 406 else 407 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN); 408 } 409 410 rtw_phy_set_tx_power_level(rtwdev, center_chan); 411 } 412 413 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr) 414 { 415 int i; 416 417 for (i = 0; i < ETH_ALEN; i++) 418 rtw_write8(rtwdev, start + i, addr[i]); 419 } 420 421 void rtw_vif_port_config(struct rtw_dev *rtwdev, 422 struct rtw_vif *rtwvif, 423 u32 config) 424 { 425 u32 addr, mask; 426 427 if (config & PORT_SET_MAC_ADDR) { 428 addr = rtwvif->conf->mac_addr.addr; 429 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr); 430 } 431 if (config & PORT_SET_BSSID) { 432 addr = rtwvif->conf->bssid.addr; 433 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid); 434 } 435 if (config & PORT_SET_NET_TYPE) { 436 addr = rtwvif->conf->net_type.addr; 437 mask = rtwvif->conf->net_type.mask; 438 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); 439 } 440 if (config & PORT_SET_AID) { 441 addr = rtwvif->conf->aid.addr; 442 mask = rtwvif->conf->aid.mask; 443 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); 444 } 445 if (config & PORT_SET_BCN_CTRL) { 446 addr = rtwvif->conf->bcn_ctrl.addr; 447 mask = rtwvif->conf->bcn_ctrl.mask; 448 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); 449 } 450 } 451 452 static u8 hw_bw_cap_to_bitamp(u8 bw_cap) 453 { 454 u8 bw = 0; 455 456 switch (bw_cap) { 457 case EFUSE_HW_CAP_IGNORE: 458 case EFUSE_HW_CAP_SUPP_BW80: 459 bw |= BIT(RTW_CHANNEL_WIDTH_80); 460 /* fall through */ 461 case EFUSE_HW_CAP_SUPP_BW40: 462 bw |= BIT(RTW_CHANNEL_WIDTH_40); 463 /* fall through */ 464 default: 465 bw |= BIT(RTW_CHANNEL_WIDTH_20); 466 break; 467 } 468 469 return bw; 470 } 471 472 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) 473 { 474 struct rtw_hal *hal = &rtwdev->hal; 475 struct rtw_chip_info *chip = rtwdev->chip; 476 477 if (hw_ant_num == EFUSE_HW_CAP_IGNORE || 478 hw_ant_num >= hal->rf_path_num) 479 return; 480 481 switch (hw_ant_num) { 482 case 1: 483 hal->rf_type = RF_1T1R; 484 hal->rf_path_num = 1; 485 if (!chip->fix_rf_phy_num) 486 hal->rf_phy_num = hal->rf_path_num; 487 hal->antenna_tx = BB_PATH_A; 488 hal->antenna_rx = BB_PATH_A; 489 break; 490 default: 491 WARN(1, "invalid hw configuration from efuse\n"); 492 break; 493 } 494 } 495 496 static u64 get_vht_ra_mask(struct ieee80211_sta *sta) 497 { 498 u64 ra_mask = 0; 499 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); 500 u8 vht_mcs_cap; 501 int i, nss; 502 503 /* 4SS, every two bits for MCS7/8/9 */ 504 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) { 505 vht_mcs_cap = mcs_map & 0x3; 506 switch (vht_mcs_cap) { 507 case 2: /* MCS9 */ 508 ra_mask |= 0x3ffULL << nss; 509 break; 510 case 1: /* MCS8 */ 511 ra_mask |= 0x1ffULL << nss; 512 break; 513 case 0: /* MCS7 */ 514 ra_mask |= 0x0ffULL << nss; 515 break; 516 default: 517 break; 518 } 519 } 520 521 return ra_mask; 522 } 523 524 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) 525 { 526 u8 rate_id = 0; 527 528 switch (wireless_set) { 529 case WIRELESS_CCK: 530 rate_id = RTW_RATEID_B_20M; 531 break; 532 case WIRELESS_OFDM: 533 rate_id = RTW_RATEID_G; 534 break; 535 case WIRELESS_CCK | WIRELESS_OFDM: 536 rate_id = RTW_RATEID_BG; 537 break; 538 case WIRELESS_OFDM | WIRELESS_HT: 539 if (tx_num == 1) 540 rate_id = RTW_RATEID_GN_N1SS; 541 else if (tx_num == 2) 542 rate_id = RTW_RATEID_GN_N2SS; 543 else if (tx_num == 3) 544 rate_id = RTW_RATEID_ARFR5_N_3SS; 545 break; 546 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT: 547 if (bw_mode == RTW_CHANNEL_WIDTH_40) { 548 if (tx_num == 1) 549 rate_id = RTW_RATEID_BGN_40M_1SS; 550 else if (tx_num == 2) 551 rate_id = RTW_RATEID_BGN_40M_2SS; 552 else if (tx_num == 3) 553 rate_id = RTW_RATEID_ARFR5_N_3SS; 554 else if (tx_num == 4) 555 rate_id = RTW_RATEID_ARFR7_N_4SS; 556 } else { 557 if (tx_num == 1) 558 rate_id = RTW_RATEID_BGN_20M_1SS; 559 else if (tx_num == 2) 560 rate_id = RTW_RATEID_BGN_20M_2SS; 561 else if (tx_num == 3) 562 rate_id = RTW_RATEID_ARFR5_N_3SS; 563 else if (tx_num == 4) 564 rate_id = RTW_RATEID_ARFR7_N_4SS; 565 } 566 break; 567 case WIRELESS_OFDM | WIRELESS_VHT: 568 if (tx_num == 1) 569 rate_id = RTW_RATEID_ARFR1_AC_1SS; 570 else if (tx_num == 2) 571 rate_id = RTW_RATEID_ARFR0_AC_2SS; 572 else if (tx_num == 3) 573 rate_id = RTW_RATEID_ARFR4_AC_3SS; 574 else if (tx_num == 4) 575 rate_id = RTW_RATEID_ARFR6_AC_4SS; 576 break; 577 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT: 578 if (bw_mode >= RTW_CHANNEL_WIDTH_80) { 579 if (tx_num == 1) 580 rate_id = RTW_RATEID_ARFR1_AC_1SS; 581 else if (tx_num == 2) 582 rate_id = RTW_RATEID_ARFR0_AC_2SS; 583 else if (tx_num == 3) 584 rate_id = RTW_RATEID_ARFR4_AC_3SS; 585 else if (tx_num == 4) 586 rate_id = RTW_RATEID_ARFR6_AC_4SS; 587 } else { 588 if (tx_num == 1) 589 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS; 590 else if (tx_num == 2) 591 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS; 592 else if (tx_num == 3) 593 rate_id = RTW_RATEID_ARFR4_AC_3SS; 594 else if (tx_num == 4) 595 rate_id = RTW_RATEID_ARFR6_AC_4SS; 596 } 597 break; 598 default: 599 break; 600 } 601 602 return rate_id; 603 } 604 605 #define RA_MASK_CCK_RATES 0x0000f 606 #define RA_MASK_OFDM_RATES 0x00ff0 607 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0) 608 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8) 609 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16) 610 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \ 611 RA_MASK_HT_RATES_2SS | \ 612 RA_MASK_HT_RATES_3SS) 613 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0) 614 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10) 615 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20) 616 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ 617 RA_MASK_VHT_RATES_2SS | \ 618 RA_MASK_VHT_RATES_3SS) 619 #define RA_MASK_CCK_IN_HT 0x00005 620 #define RA_MASK_CCK_IN_VHT 0x00005 621 #define RA_MASK_OFDM_IN_VHT 0x00010 622 #define RA_MASK_OFDM_IN_HT_2G 0x00010 623 #define RA_MASK_OFDM_IN_HT_5G 0x00030 624 625 static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev, 626 struct rtw_sta_info *si, 627 u64 ra_mask, bool is_vht_enable, 628 u8 wireless_set) 629 { 630 struct rtw_hal *hal = &rtwdev->hal; 631 const struct cfg80211_bitrate_mask *mask = si->mask; 632 u64 cfg_mask = GENMASK_ULL(63, 0); 633 u8 rssi_level, band; 634 635 if (wireless_set != WIRELESS_CCK) { 636 rssi_level = si->rssi_level; 637 if (rssi_level == 0) 638 ra_mask &= 0xffffffffffffffffULL; 639 else if (rssi_level == 1) 640 ra_mask &= 0xfffffffffffffff0ULL; 641 else if (rssi_level == 2) 642 ra_mask &= 0xffffffffffffefe0ULL; 643 else if (rssi_level == 3) 644 ra_mask &= 0xffffffffffffcfc0ULL; 645 else if (rssi_level == 4) 646 ra_mask &= 0xffffffffffff8f80ULL; 647 else if (rssi_level >= 5) 648 ra_mask &= 0xffffffffffff0f00ULL; 649 } 650 651 if (!si->use_cfg_mask) 652 return ra_mask; 653 654 band = hal->current_band_type; 655 if (band == RTW_BAND_2G) { 656 band = NL80211_BAND_2GHZ; 657 cfg_mask = mask->control[band].legacy; 658 } else if (band == RTW_BAND_5G) { 659 band = NL80211_BAND_5GHZ; 660 cfg_mask = u64_encode_bits(mask->control[band].legacy, 661 RA_MASK_OFDM_RATES); 662 } 663 664 if (!is_vht_enable) { 665 if (ra_mask & RA_MASK_HT_RATES_1SS) 666 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], 667 RA_MASK_HT_RATES_1SS); 668 if (ra_mask & RA_MASK_HT_RATES_2SS) 669 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], 670 RA_MASK_HT_RATES_2SS); 671 } else { 672 if (ra_mask & RA_MASK_VHT_RATES_1SS) 673 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], 674 RA_MASK_VHT_RATES_1SS); 675 if (ra_mask & RA_MASK_VHT_RATES_2SS) 676 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], 677 RA_MASK_VHT_RATES_2SS); 678 } 679 680 ra_mask &= cfg_mask; 681 682 return ra_mask; 683 } 684 685 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 686 { 687 struct ieee80211_sta *sta = si->sta; 688 struct rtw_efuse *efuse = &rtwdev->efuse; 689 struct rtw_hal *hal = &rtwdev->hal; 690 u8 wireless_set; 691 u8 bw_mode; 692 u8 rate_id; 693 u8 rf_type = RF_1T1R; 694 u8 stbc_en = 0; 695 u8 ldpc_en = 0; 696 u8 tx_num = 1; 697 u64 ra_mask = 0; 698 bool is_vht_enable = false; 699 bool is_support_sgi = false; 700 701 if (sta->vht_cap.vht_supported) { 702 is_vht_enable = true; 703 ra_mask |= get_vht_ra_mask(sta); 704 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) 705 stbc_en = VHT_STBC_EN; 706 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) 707 ldpc_en = VHT_LDPC_EN; 708 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 709 is_support_sgi = true; 710 } else if (sta->ht_cap.ht_supported) { 711 ra_mask |= (sta->ht_cap.mcs.rx_mask[1] << 20) | 712 (sta->ht_cap.mcs.rx_mask[0] << 12); 713 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 714 stbc_en = HT_STBC_EN; 715 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) 716 ldpc_en = HT_LDPC_EN; 717 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 || 718 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 719 is_support_sgi = true; 720 } 721 722 if (efuse->hw_cap.nss == 1) 723 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; 724 725 if (hal->current_band_type == RTW_BAND_5G) { 726 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; 727 if (sta->vht_cap.vht_supported) { 728 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; 729 wireless_set = WIRELESS_OFDM | WIRELESS_VHT; 730 } else if (sta->ht_cap.ht_supported) { 731 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; 732 wireless_set = WIRELESS_OFDM | WIRELESS_HT; 733 } else { 734 wireless_set = WIRELESS_OFDM; 735 } 736 } else if (hal->current_band_type == RTW_BAND_2G) { 737 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; 738 if (sta->vht_cap.vht_supported) { 739 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | 740 RA_MASK_OFDM_IN_VHT; 741 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 742 WIRELESS_HT | WIRELESS_VHT; 743 } else if (sta->ht_cap.ht_supported) { 744 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | 745 RA_MASK_OFDM_IN_HT_2G; 746 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 747 WIRELESS_HT; 748 } else if (sta->supp_rates[0] <= 0xf) { 749 wireless_set = WIRELESS_CCK; 750 } else { 751 wireless_set = WIRELESS_CCK | WIRELESS_OFDM; 752 } 753 } else { 754 rtw_err(rtwdev, "Unknown band type\n"); 755 wireless_set = 0; 756 } 757 758 switch (sta->bandwidth) { 759 case IEEE80211_STA_RX_BW_80: 760 bw_mode = RTW_CHANNEL_WIDTH_80; 761 break; 762 case IEEE80211_STA_RX_BW_40: 763 bw_mode = RTW_CHANNEL_WIDTH_40; 764 break; 765 default: 766 bw_mode = RTW_CHANNEL_WIDTH_20; 767 break; 768 } 769 770 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) { 771 tx_num = 2; 772 rf_type = RF_2T2R; 773 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) { 774 tx_num = 2; 775 rf_type = RF_2T2R; 776 } 777 778 rate_id = get_rate_id(wireless_set, bw_mode, tx_num); 779 780 ra_mask = rtw_update_rate_mask(rtwdev, si, ra_mask, is_vht_enable, 781 wireless_set); 782 783 si->bw_mode = bw_mode; 784 si->stbc_en = stbc_en; 785 si->ldpc_en = ldpc_en; 786 si->rf_type = rf_type; 787 si->wireless_set = wireless_set; 788 si->sgi_enable = is_support_sgi; 789 si->vht_enable = is_vht_enable; 790 si->ra_mask = ra_mask; 791 si->rate_id = rate_id; 792 793 rtw_fw_send_ra_info(rtwdev, si); 794 } 795 796 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) 797 { 798 struct rtw_chip_info *chip = rtwdev->chip; 799 struct rtw_fw_state *fw; 800 801 fw = &rtwdev->fw; 802 wait_for_completion(&fw->completion); 803 if (!fw->firmware) 804 return -EINVAL; 805 806 if (chip->wow_fw_name) { 807 fw = &rtwdev->wow_fw; 808 wait_for_completion(&fw->completion); 809 if (!fw->firmware) 810 return -EINVAL; 811 } 812 813 return 0; 814 } 815 816 static int rtw_power_on(struct rtw_dev *rtwdev) 817 { 818 struct rtw_chip_info *chip = rtwdev->chip; 819 struct rtw_fw_state *fw = &rtwdev->fw; 820 bool wifi_only; 821 int ret; 822 823 ret = rtw_hci_setup(rtwdev); 824 if (ret) { 825 rtw_err(rtwdev, "failed to setup hci\n"); 826 goto err; 827 } 828 829 /* power on MAC before firmware downloaded */ 830 ret = rtw_mac_power_on(rtwdev); 831 if (ret) { 832 rtw_err(rtwdev, "failed to power on mac\n"); 833 goto err; 834 } 835 836 ret = rtw_wait_firmware_completion(rtwdev); 837 if (ret) { 838 rtw_err(rtwdev, "failed to wait firmware completion\n"); 839 goto err_off; 840 } 841 842 ret = rtw_download_firmware(rtwdev, fw); 843 if (ret) { 844 rtw_err(rtwdev, "failed to download firmware\n"); 845 goto err_off; 846 } 847 848 /* config mac after firmware downloaded */ 849 ret = rtw_mac_init(rtwdev); 850 if (ret) { 851 rtw_err(rtwdev, "failed to configure mac\n"); 852 goto err_off; 853 } 854 855 chip->ops->phy_set_param(rtwdev); 856 857 ret = rtw_hci_start(rtwdev); 858 if (ret) { 859 rtw_err(rtwdev, "failed to start hci\n"); 860 goto err_off; 861 } 862 863 /* send H2C after HCI has started */ 864 rtw_fw_send_general_info(rtwdev); 865 rtw_fw_send_phydm_info(rtwdev); 866 867 wifi_only = !rtwdev->efuse.btcoex; 868 rtw_coex_power_on_setting(rtwdev); 869 rtw_coex_init_hw_config(rtwdev, wifi_only); 870 871 return 0; 872 873 err_off: 874 rtw_mac_power_off(rtwdev); 875 876 err: 877 return ret; 878 } 879 880 int rtw_core_start(struct rtw_dev *rtwdev) 881 { 882 int ret; 883 884 ret = rtw_power_on(rtwdev); 885 if (ret) 886 return ret; 887 888 rtw_sec_enable_sec_engine(rtwdev); 889 890 /* rcr reset after powered on */ 891 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); 892 893 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 894 RTW_WATCH_DOG_DELAY_TIME); 895 896 set_bit(RTW_FLAG_RUNNING, rtwdev->flags); 897 898 return 0; 899 } 900 901 static void rtw_power_off(struct rtw_dev *rtwdev) 902 { 903 rtw_hci_stop(rtwdev); 904 rtw_mac_power_off(rtwdev); 905 } 906 907 void rtw_core_stop(struct rtw_dev *rtwdev) 908 { 909 struct rtw_coex *coex = &rtwdev->coex; 910 911 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags); 912 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags); 913 914 mutex_unlock(&rtwdev->mutex); 915 916 cancel_work_sync(&rtwdev->c2h_work); 917 cancel_delayed_work_sync(&rtwdev->watch_dog_work); 918 cancel_delayed_work_sync(&coex->bt_relink_work); 919 cancel_delayed_work_sync(&coex->bt_reenable_work); 920 cancel_delayed_work_sync(&coex->defreeze_work); 921 922 mutex_lock(&rtwdev->mutex); 923 924 rtw_power_off(rtwdev); 925 } 926 927 static void rtw_init_ht_cap(struct rtw_dev *rtwdev, 928 struct ieee80211_sta_ht_cap *ht_cap) 929 { 930 struct rtw_efuse *efuse = &rtwdev->efuse; 931 932 ht_cap->ht_supported = true; 933 ht_cap->cap = 0; 934 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 935 IEEE80211_HT_CAP_MAX_AMSDU | 936 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 937 938 if (rtw_chip_has_rx_ldpc(rtwdev)) 939 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 940 941 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) 942 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 943 IEEE80211_HT_CAP_DSSSCCK40 | 944 IEEE80211_HT_CAP_SGI_40; 945 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 946 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; 947 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 948 if (efuse->hw_cap.nss > 1) { 949 ht_cap->mcs.rx_mask[0] = 0xFF; 950 ht_cap->mcs.rx_mask[1] = 0xFF; 951 ht_cap->mcs.rx_mask[4] = 0x01; 952 ht_cap->mcs.rx_highest = cpu_to_le16(300); 953 } else { 954 ht_cap->mcs.rx_mask[0] = 0xFF; 955 ht_cap->mcs.rx_mask[1] = 0x00; 956 ht_cap->mcs.rx_mask[4] = 0x01; 957 ht_cap->mcs.rx_highest = cpu_to_le16(150); 958 } 959 } 960 961 static void rtw_init_vht_cap(struct rtw_dev *rtwdev, 962 struct ieee80211_sta_vht_cap *vht_cap) 963 { 964 struct rtw_efuse *efuse = &rtwdev->efuse; 965 u16 mcs_map; 966 __le16 highest; 967 968 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && 969 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT) 970 return; 971 972 vht_cap->vht_supported = true; 973 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 974 IEEE80211_VHT_CAP_SHORT_GI_80 | 975 IEEE80211_VHT_CAP_TXSTBC | 976 IEEE80211_VHT_CAP_RXSTBC_1 | 977 IEEE80211_VHT_CAP_HTC_VHT | 978 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 979 0; 980 981 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 982 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 983 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap << 984 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 985 986 if (rtw_chip_has_rx_ldpc(rtwdev)) 987 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 988 989 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 990 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 991 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 992 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 993 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 994 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 995 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14; 996 if (efuse->hw_cap.nss > 1) { 997 highest = cpu_to_le16(780); 998 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2; 999 } else { 1000 highest = cpu_to_le16(390); 1001 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2; 1002 } 1003 1004 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 1005 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 1006 vht_cap->vht_mcs.rx_highest = highest; 1007 vht_cap->vht_mcs.tx_highest = highest; 1008 } 1009 1010 static void rtw_set_supported_band(struct ieee80211_hw *hw, 1011 struct rtw_chip_info *chip) 1012 { 1013 struct rtw_dev *rtwdev = hw->priv; 1014 struct ieee80211_supported_band *sband; 1015 1016 if (chip->band & RTW_BAND_2G) { 1017 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL); 1018 if (!sband) 1019 goto err_out; 1020 if (chip->ht_supported) 1021 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1022 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband; 1023 } 1024 1025 if (chip->band & RTW_BAND_5G) { 1026 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL); 1027 if (!sband) 1028 goto err_out; 1029 if (chip->ht_supported) 1030 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1031 if (chip->vht_supported) 1032 rtw_init_vht_cap(rtwdev, &sband->vht_cap); 1033 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 1034 } 1035 1036 return; 1037 1038 err_out: 1039 rtw_err(rtwdev, "failed to set supported band\n"); 1040 kfree(sband); 1041 } 1042 1043 static void rtw_unset_supported_band(struct ieee80211_hw *hw, 1044 struct rtw_chip_info *chip) 1045 { 1046 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 1047 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 1048 } 1049 1050 static void __update_firmware_info(struct rtw_dev *rtwdev, 1051 struct rtw_fw_state *fw) 1052 { 1053 const struct rtw_fw_hdr *fw_hdr = 1054 (const struct rtw_fw_hdr *)fw->firmware->data; 1055 1056 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver); 1057 fw->version = le16_to_cpu(fw_hdr->version); 1058 fw->sub_version = fw_hdr->subversion; 1059 fw->sub_index = fw_hdr->subindex; 1060 } 1061 1062 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev, 1063 struct rtw_fw_state *fw) 1064 { 1065 struct rtw_fw_hdr_legacy *legacy = 1066 (struct rtw_fw_hdr_legacy *)fw->firmware->data; 1067 1068 fw->h2c_version = 0; 1069 fw->version = le16_to_cpu(legacy->version); 1070 fw->sub_version = legacy->subversion1; 1071 fw->sub_index = legacy->subversion2; 1072 } 1073 1074 static void update_firmware_info(struct rtw_dev *rtwdev, 1075 struct rtw_fw_state *fw) 1076 { 1077 if (rtw_chip_wcpu_11n(rtwdev)) 1078 __update_firmware_info_legacy(rtwdev, fw); 1079 else 1080 __update_firmware_info(rtwdev, fw); 1081 } 1082 1083 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) 1084 { 1085 struct rtw_fw_state *fw = context; 1086 struct rtw_dev *rtwdev = fw->rtwdev; 1087 1088 if (!firmware || !firmware->data) { 1089 rtw_err(rtwdev, "failed to request firmware\n"); 1090 complete_all(&fw->completion); 1091 return; 1092 } 1093 1094 fw->firmware = firmware; 1095 update_firmware_info(rtwdev, fw); 1096 complete_all(&fw->completion); 1097 1098 rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n", 1099 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); 1100 } 1101 1102 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) 1103 { 1104 const char *fw_name; 1105 struct rtw_fw_state *fw; 1106 int ret; 1107 1108 switch (type) { 1109 case RTW_WOWLAN_FW: 1110 fw = &rtwdev->wow_fw; 1111 fw_name = rtwdev->chip->wow_fw_name; 1112 break; 1113 1114 case RTW_NORMAL_FW: 1115 fw = &rtwdev->fw; 1116 fw_name = rtwdev->chip->fw_name; 1117 break; 1118 1119 default: 1120 rtw_warn(rtwdev, "unsupported firmware type\n"); 1121 return -ENOENT; 1122 } 1123 1124 fw->rtwdev = rtwdev; 1125 init_completion(&fw->completion); 1126 1127 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 1128 GFP_KERNEL, fw, rtw_load_firmware_cb); 1129 if (ret) { 1130 rtw_err(rtwdev, "failed to async firmware request\n"); 1131 return ret; 1132 } 1133 1134 return 0; 1135 } 1136 1137 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) 1138 { 1139 struct rtw_chip_info *chip = rtwdev->chip; 1140 struct rtw_hal *hal = &rtwdev->hal; 1141 struct rtw_efuse *efuse = &rtwdev->efuse; 1142 int ret = 0; 1143 1144 switch (rtw_hci_type(rtwdev)) { 1145 case RTW_HCI_TYPE_PCIE: 1146 rtwdev->hci.rpwm_addr = 0x03d9; 1147 rtwdev->hci.cpwm_addr = 0x03da; 1148 break; 1149 default: 1150 rtw_err(rtwdev, "unsupported hci type\n"); 1151 return -EINVAL; 1152 } 1153 1154 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 1155 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 1156 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 1157 if (hal->chip_version & BIT_RF_TYPE_ID) { 1158 hal->rf_type = RF_2T2R; 1159 hal->rf_path_num = 2; 1160 hal->antenna_tx = BB_PATH_AB; 1161 hal->antenna_rx = BB_PATH_AB; 1162 } else { 1163 hal->rf_type = RF_1T1R; 1164 hal->rf_path_num = 1; 1165 hal->antenna_tx = BB_PATH_A; 1166 hal->antenna_rx = BB_PATH_A; 1167 } 1168 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num : 1169 hal->rf_path_num; 1170 1171 efuse->physical_size = chip->phy_efuse_size; 1172 efuse->logical_size = chip->log_efuse_size; 1173 efuse->protect_size = chip->ptct_efuse_size; 1174 1175 /* default use ack */ 1176 rtwdev->hal.rcr |= BIT_VHT_DACK; 1177 1178 hal->bfee_sts_cap = 3; 1179 1180 return ret; 1181 } 1182 1183 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) 1184 { 1185 struct rtw_fw_state *fw = &rtwdev->fw; 1186 int ret; 1187 1188 ret = rtw_hci_setup(rtwdev); 1189 if (ret) { 1190 rtw_err(rtwdev, "failed to setup hci\n"); 1191 goto err; 1192 } 1193 1194 ret = rtw_mac_power_on(rtwdev); 1195 if (ret) { 1196 rtw_err(rtwdev, "failed to power on mac\n"); 1197 goto err; 1198 } 1199 1200 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP); 1201 1202 wait_for_completion(&fw->completion); 1203 if (!fw->firmware) { 1204 ret = -EINVAL; 1205 rtw_err(rtwdev, "failed to load firmware\n"); 1206 goto err; 1207 } 1208 1209 ret = rtw_download_firmware(rtwdev, fw); 1210 if (ret) { 1211 rtw_err(rtwdev, "failed to download firmware\n"); 1212 goto err_off; 1213 } 1214 1215 return 0; 1216 1217 err_off: 1218 rtw_mac_power_off(rtwdev); 1219 1220 err: 1221 return ret; 1222 } 1223 1224 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev) 1225 { 1226 struct rtw_efuse *efuse = &rtwdev->efuse; 1227 u8 hw_feature[HW_FEATURE_LEN]; 1228 u8 id; 1229 u8 bw; 1230 int i; 1231 1232 id = rtw_read8(rtwdev, REG_C2HEVT); 1233 if (id != C2H_HW_FEATURE_REPORT) { 1234 rtw_err(rtwdev, "failed to read hw feature report\n"); 1235 return -EBUSY; 1236 } 1237 1238 for (i = 0; i < HW_FEATURE_LEN; i++) 1239 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i); 1240 1241 rtw_write8(rtwdev, REG_C2HEVT, 0); 1242 1243 bw = GET_EFUSE_HW_CAP_BW(hw_feature); 1244 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw); 1245 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature); 1246 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature); 1247 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature); 1248 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature); 1249 1250 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num); 1251 1252 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE || 1253 efuse->hw_cap.nss > rtwdev->hal.rf_path_num) 1254 efuse->hw_cap.nss = rtwdev->hal.rf_path_num; 1255 1256 rtw_dbg(rtwdev, RTW_DBG_EFUSE, 1257 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", 1258 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, 1259 efuse->hw_cap.ant_num, efuse->hw_cap.nss); 1260 1261 return 0; 1262 } 1263 1264 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev) 1265 { 1266 rtw_hci_stop(rtwdev); 1267 rtw_mac_power_off(rtwdev); 1268 } 1269 1270 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) 1271 { 1272 struct rtw_efuse *efuse = &rtwdev->efuse; 1273 int ret; 1274 1275 mutex_lock(&rtwdev->mutex); 1276 1277 /* power on mac to read efuse */ 1278 ret = rtw_chip_efuse_enable(rtwdev); 1279 if (ret) 1280 goto out_unlock; 1281 1282 ret = rtw_parse_efuse_map(rtwdev); 1283 if (ret) 1284 goto out_disable; 1285 1286 ret = rtw_dump_hw_feature(rtwdev); 1287 if (ret) 1288 goto out_disable; 1289 1290 ret = rtw_check_supported_rfe(rtwdev); 1291 if (ret) 1292 goto out_disable; 1293 1294 if (efuse->crystal_cap == 0xff) 1295 efuse->crystal_cap = 0; 1296 if (efuse->pa_type_2g == 0xff) 1297 efuse->pa_type_2g = 0; 1298 if (efuse->pa_type_5g == 0xff) 1299 efuse->pa_type_5g = 0; 1300 if (efuse->lna_type_2g == 0xff) 1301 efuse->lna_type_2g = 0; 1302 if (efuse->lna_type_5g == 0xff) 1303 efuse->lna_type_5g = 0; 1304 if (efuse->channel_plan == 0xff) 1305 efuse->channel_plan = 0x7f; 1306 if (efuse->rf_board_option == 0xff) 1307 efuse->rf_board_option = 0; 1308 if (efuse->bt_setting & BIT(0)) 1309 efuse->share_ant = true; 1310 if (efuse->regd == 0xff) 1311 efuse->regd = 0; 1312 1313 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20; 1314 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; 1315 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0; 1316 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0; 1317 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0; 1318 1319 out_disable: 1320 rtw_chip_efuse_disable(rtwdev); 1321 1322 out_unlock: 1323 mutex_unlock(&rtwdev->mutex); 1324 return ret; 1325 } 1326 1327 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) 1328 { 1329 struct rtw_hal *hal = &rtwdev->hal; 1330 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev); 1331 1332 if (!rfe_def) 1333 return -ENODEV; 1334 1335 rtw_phy_setup_phy_cond(rtwdev, 0); 1336 1337 rtw_phy_init_tx_power(rtwdev); 1338 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); 1339 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); 1340 rtw_phy_tx_power_by_rate_config(hal); 1341 rtw_phy_tx_power_limit_config(hal); 1342 1343 return 0; 1344 } 1345 1346 int rtw_chip_info_setup(struct rtw_dev *rtwdev) 1347 { 1348 int ret; 1349 1350 ret = rtw_chip_parameter_setup(rtwdev); 1351 if (ret) { 1352 rtw_err(rtwdev, "failed to setup chip parameters\n"); 1353 goto err_out; 1354 } 1355 1356 ret = rtw_chip_efuse_info_setup(rtwdev); 1357 if (ret) { 1358 rtw_err(rtwdev, "failed to setup chip efuse info\n"); 1359 goto err_out; 1360 } 1361 1362 ret = rtw_chip_board_info_setup(rtwdev); 1363 if (ret) { 1364 rtw_err(rtwdev, "failed to setup chip board info\n"); 1365 goto err_out; 1366 } 1367 1368 return 0; 1369 1370 err_out: 1371 return ret; 1372 } 1373 EXPORT_SYMBOL(rtw_chip_info_setup); 1374 1375 static void rtw_stats_init(struct rtw_dev *rtwdev) 1376 { 1377 struct rtw_traffic_stats *stats = &rtwdev->stats; 1378 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 1379 int i; 1380 1381 ewma_tp_init(&stats->tx_ewma_tp); 1382 ewma_tp_init(&stats->rx_ewma_tp); 1383 1384 for (i = 0; i < RTW_EVM_NUM; i++) 1385 ewma_evm_init(&dm_info->ewma_evm[i]); 1386 for (i = 0; i < RTW_SNR_NUM; i++) 1387 ewma_snr_init(&dm_info->ewma_snr[i]); 1388 } 1389 1390 int rtw_core_init(struct rtw_dev *rtwdev) 1391 { 1392 struct rtw_chip_info *chip = rtwdev->chip; 1393 struct rtw_coex *coex = &rtwdev->coex; 1394 int ret; 1395 1396 INIT_LIST_HEAD(&rtwdev->rsvd_page_list); 1397 INIT_LIST_HEAD(&rtwdev->txqs); 1398 1399 timer_setup(&rtwdev->tx_report.purge_timer, 1400 rtw_tx_report_purge_timer, 0); 1401 tasklet_init(&rtwdev->tx_tasklet, rtw_tx_tasklet, 1402 (unsigned long)rtwdev); 1403 1404 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); 1405 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work); 1406 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work); 1407 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work); 1408 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); 1409 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); 1410 skb_queue_head_init(&rtwdev->c2h_queue); 1411 skb_queue_head_init(&rtwdev->coex.queue); 1412 skb_queue_head_init(&rtwdev->tx_report.queue); 1413 1414 spin_lock_init(&rtwdev->rf_lock); 1415 spin_lock_init(&rtwdev->h2c.lock); 1416 spin_lock_init(&rtwdev->txq_lock); 1417 spin_lock_init(&rtwdev->tx_report.q_lock); 1418 1419 mutex_init(&rtwdev->mutex); 1420 mutex_init(&rtwdev->coex.mutex); 1421 mutex_init(&rtwdev->hal.tx_power_mutex); 1422 1423 init_waitqueue_head(&rtwdev->coex.wait); 1424 1425 rtwdev->sec.total_cam_num = 32; 1426 rtwdev->hal.current_channel = 1; 1427 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map); 1428 if (!(BIT(rtw_fw_lps_deep_mode) & chip->lps_deep_mode_supported)) 1429 rtwdev->lps_conf.deep_mode = LPS_DEEP_MODE_NONE; 1430 else 1431 rtwdev->lps_conf.deep_mode = rtw_fw_lps_deep_mode; 1432 1433 rtw_stats_init(rtwdev); 1434 1435 /* default rx filter setting */ 1436 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | 1437 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | 1438 BIT_AB | BIT_AM | BIT_APM; 1439 1440 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); 1441 if (ret) { 1442 rtw_warn(rtwdev, "no firmware loaded\n"); 1443 return ret; 1444 } 1445 1446 if (chip->wow_fw_name) { 1447 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW); 1448 if (ret) { 1449 rtw_warn(rtwdev, "no wow firmware loaded\n"); 1450 return ret; 1451 } 1452 } 1453 return 0; 1454 } 1455 EXPORT_SYMBOL(rtw_core_init); 1456 1457 void rtw_core_deinit(struct rtw_dev *rtwdev) 1458 { 1459 struct rtw_fw_state *fw = &rtwdev->fw; 1460 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw; 1461 struct rtw_rsvd_page *rsvd_pkt, *tmp; 1462 unsigned long flags; 1463 1464 if (fw->firmware) 1465 release_firmware(fw->firmware); 1466 1467 if (wow_fw->firmware) 1468 release_firmware(wow_fw->firmware); 1469 1470 tasklet_kill(&rtwdev->tx_tasklet); 1471 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); 1472 skb_queue_purge(&rtwdev->tx_report.queue); 1473 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 1474 1475 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 1476 build_list) { 1477 list_del(&rsvd_pkt->build_list); 1478 kfree(rsvd_pkt); 1479 } 1480 1481 mutex_destroy(&rtwdev->mutex); 1482 mutex_destroy(&rtwdev->coex.mutex); 1483 mutex_destroy(&rtwdev->hal.tx_power_mutex); 1484 } 1485 EXPORT_SYMBOL(rtw_core_deinit); 1486 1487 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 1488 { 1489 struct rtw_hal *hal = &rtwdev->hal; 1490 int max_tx_headroom = 0; 1491 int ret; 1492 1493 /* TODO: USB & SDIO may need extra room? */ 1494 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; 1495 1496 hw->extra_tx_headroom = max_tx_headroom; 1497 hw->queues = IEEE80211_NUM_ACS; 1498 hw->txq_data_size = sizeof(struct rtw_txq); 1499 hw->sta_data_size = sizeof(struct rtw_sta_info); 1500 hw->vif_data_size = sizeof(struct rtw_vif); 1501 1502 ieee80211_hw_set(hw, SIGNAL_DBM); 1503 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 1504 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 1505 ieee80211_hw_set(hw, MFP_CAPABLE); 1506 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 1507 ieee80211_hw_set(hw, SUPPORTS_PS); 1508 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 1509 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 1510 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 1511 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 1512 ieee80211_hw_set(hw, TX_AMSDU); 1513 1514 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1515 BIT(NL80211_IFTYPE_AP) | 1516 BIT(NL80211_IFTYPE_ADHOC) | 1517 BIT(NL80211_IFTYPE_MESH_POINT); 1518 hw->wiphy->available_antennas_tx = hal->antenna_tx; 1519 hw->wiphy->available_antennas_rx = hal->antenna_rx; 1520 1521 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | 1522 WIPHY_FLAG_TDLS_EXTERNAL_SETUP; 1523 1524 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 1525 1526 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 1527 1528 #ifdef CONFIG_PM 1529 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; 1530 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids; 1531 #endif 1532 rtw_set_supported_band(hw, rtwdev->chip); 1533 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); 1534 1535 rtw_regd_init(rtwdev, rtw_regd_notifier); 1536 1537 ret = ieee80211_register_hw(hw); 1538 if (ret) { 1539 rtw_err(rtwdev, "failed to register hw\n"); 1540 return ret; 1541 } 1542 1543 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2)) 1544 rtw_err(rtwdev, "regulatory_hint fail\n"); 1545 1546 rtw_debugfs_init(rtwdev); 1547 1548 rtwdev->bf_info.bfer_mu_cnt = 0; 1549 rtwdev->bf_info.bfer_su_cnt = 0; 1550 1551 return 0; 1552 } 1553 EXPORT_SYMBOL(rtw_register_hw); 1554 1555 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 1556 { 1557 struct rtw_chip_info *chip = rtwdev->chip; 1558 1559 ieee80211_unregister_hw(hw); 1560 rtw_unset_supported_band(hw, chip); 1561 } 1562 EXPORT_SYMBOL(rtw_unregister_hw); 1563 1564 MODULE_AUTHOR("Realtek Corporation"); 1565 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); 1566 MODULE_LICENSE("Dual BSD/GPL"); 1567