1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #include "main.h" 6 #include "coex.h" 7 #include "fw.h" 8 #include "tx.h" 9 #include "reg.h" 10 #include "sec.h" 11 #include "debug.h" 12 #include "util.h" 13 14 static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev *rtwdev, 15 struct sk_buff *skb) 16 { 17 struct rtw_c2h_cmd *c2h; 18 u8 sub_cmd_id; 19 20 c2h = get_c2h_from_skb(skb); 21 sub_cmd_id = c2h->payload[0]; 22 23 switch (sub_cmd_id) { 24 case C2H_CCX_RPT: 25 rtw_tx_report_handle(rtwdev, skb); 26 break; 27 default: 28 break; 29 } 30 } 31 32 static u16 get_max_amsdu_len(u32 bit_rate) 33 { 34 /* lower than ofdm, do not aggregate */ 35 if (bit_rate < 550) 36 return 1; 37 38 /* lower than 20M 2ss mcs8, make it small */ 39 if (bit_rate < 1800) 40 return 1200; 41 42 /* lower than 40M 2ss mcs9, make it medium */ 43 if (bit_rate < 4000) 44 return 2600; 45 46 /* not yet 80M 2ss mcs8/9, make it twice regular packet size */ 47 if (bit_rate < 7000) 48 return 3500; 49 50 /* unlimited */ 51 return 0; 52 } 53 54 struct rtw_fw_iter_ra_data { 55 struct rtw_dev *rtwdev; 56 u8 *payload; 57 }; 58 59 static void rtw_fw_ra_report_iter(void *data, struct ieee80211_sta *sta) 60 { 61 struct rtw_fw_iter_ra_data *ra_data = data; 62 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 63 u8 mac_id, rate, sgi, bw; 64 u8 mcs, nss; 65 u32 bit_rate; 66 67 mac_id = GET_RA_REPORT_MACID(ra_data->payload); 68 if (si->mac_id != mac_id) 69 return; 70 71 si->ra_report.txrate.flags = 0; 72 73 rate = GET_RA_REPORT_RATE(ra_data->payload); 74 sgi = GET_RA_REPORT_SGI(ra_data->payload); 75 bw = GET_RA_REPORT_BW(ra_data->payload); 76 77 if (rate < DESC_RATEMCS0) { 78 si->ra_report.txrate.legacy = rtw_desc_to_bitrate(rate); 79 goto legacy; 80 } 81 82 rtw_desc_to_mcsrate(rate, &mcs, &nss); 83 if (rate >= DESC_RATEVHT1SS_MCS0) 84 si->ra_report.txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; 85 else if (rate >= DESC_RATEMCS0) 86 si->ra_report.txrate.flags |= RATE_INFO_FLAGS_MCS; 87 88 if (rate >= DESC_RATEMCS0) { 89 si->ra_report.txrate.mcs = mcs; 90 si->ra_report.txrate.nss = nss; 91 } 92 93 if (sgi) 94 si->ra_report.txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 95 96 if (bw == RTW_CHANNEL_WIDTH_80) 97 si->ra_report.txrate.bw = RATE_INFO_BW_80; 98 else if (bw == RTW_CHANNEL_WIDTH_40) 99 si->ra_report.txrate.bw = RATE_INFO_BW_40; 100 else 101 si->ra_report.txrate.bw = RATE_INFO_BW_20; 102 103 legacy: 104 bit_rate = cfg80211_calculate_bitrate(&si->ra_report.txrate); 105 106 si->ra_report.desc_rate = rate; 107 si->ra_report.bit_rate = bit_rate; 108 109 sta->max_rc_amsdu_len = get_max_amsdu_len(bit_rate); 110 } 111 112 static void rtw_fw_ra_report_handle(struct rtw_dev *rtwdev, u8 *payload, 113 u8 length) 114 { 115 struct rtw_fw_iter_ra_data ra_data; 116 117 if (WARN(length < 7, "invalid ra report c2h length\n")) 118 return; 119 120 rtwdev->dm_info.tx_rate = GET_RA_REPORT_RATE(payload); 121 ra_data.rtwdev = rtwdev; 122 ra_data.payload = payload; 123 rtw_iterate_stas_atomic(rtwdev, rtw_fw_ra_report_iter, &ra_data); 124 } 125 126 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb) 127 { 128 struct rtw_c2h_cmd *c2h; 129 u32 pkt_offset; 130 u8 len; 131 132 pkt_offset = *((u32 *)skb->cb); 133 c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset); 134 len = skb->len - pkt_offset - 2; 135 136 mutex_lock(&rtwdev->mutex); 137 138 switch (c2h->id) { 139 case C2H_BT_INFO: 140 rtw_coex_bt_info_notify(rtwdev, c2h->payload, len); 141 break; 142 case C2H_WLAN_INFO: 143 rtw_coex_wl_fwdbginfo_notify(rtwdev, c2h->payload, len); 144 break; 145 case C2H_HALMAC: 146 rtw_fw_c2h_cmd_handle_ext(rtwdev, skb); 147 break; 148 case C2H_RA_RPT: 149 rtw_fw_ra_report_handle(rtwdev, c2h->payload, len); 150 break; 151 default: 152 break; 153 } 154 155 mutex_unlock(&rtwdev->mutex); 156 } 157 158 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset, 159 struct sk_buff *skb) 160 { 161 struct rtw_c2h_cmd *c2h; 162 u8 len; 163 164 c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset); 165 len = skb->len - pkt_offset - 2; 166 *((u32 *)skb->cb) = pkt_offset; 167 168 rtw_dbg(rtwdev, RTW_DBG_FW, "recv C2H, id=0x%02x, seq=0x%02x, len=%d\n", 169 c2h->id, c2h->seq, len); 170 171 switch (c2h->id) { 172 case C2H_BT_MP_INFO: 173 rtw_coex_info_response(rtwdev, skb); 174 break; 175 default: 176 /* pass offset for further operation */ 177 *((u32 *)skb->cb) = pkt_offset; 178 skb_queue_tail(&rtwdev->c2h_queue, skb); 179 ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work); 180 break; 181 } 182 } 183 EXPORT_SYMBOL(rtw_fw_c2h_cmd_rx_irqsafe); 184 185 static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, 186 u8 *h2c) 187 { 188 u8 box; 189 u8 box_state; 190 u32 box_reg, box_ex_reg; 191 u32 h2c_wait; 192 int idx; 193 194 rtw_dbg(rtwdev, RTW_DBG_FW, 195 "send H2C content %02x%02x%02x%02x %02x%02x%02x%02x\n", 196 h2c[3], h2c[2], h2c[1], h2c[0], 197 h2c[7], h2c[6], h2c[5], h2c[4]); 198 199 spin_lock(&rtwdev->h2c.lock); 200 201 box = rtwdev->h2c.last_box_num; 202 switch (box) { 203 case 0: 204 box_reg = REG_HMEBOX0; 205 box_ex_reg = REG_HMEBOX0_EX; 206 break; 207 case 1: 208 box_reg = REG_HMEBOX1; 209 box_ex_reg = REG_HMEBOX1_EX; 210 break; 211 case 2: 212 box_reg = REG_HMEBOX2; 213 box_ex_reg = REG_HMEBOX2_EX; 214 break; 215 case 3: 216 box_reg = REG_HMEBOX3; 217 box_ex_reg = REG_HMEBOX3_EX; 218 break; 219 default: 220 WARN(1, "invalid h2c mail box number\n"); 221 goto out; 222 } 223 224 h2c_wait = 20; 225 do { 226 box_state = rtw_read8(rtwdev, REG_HMETFR); 227 } while ((box_state >> box) & 0x1 && --h2c_wait > 0); 228 229 if (!h2c_wait) { 230 rtw_err(rtwdev, "failed to send h2c command\n"); 231 goto out; 232 } 233 234 for (idx = 0; idx < 4; idx++) 235 rtw_write8(rtwdev, box_reg + idx, h2c[idx]); 236 for (idx = 0; idx < 4; idx++) 237 rtw_write8(rtwdev, box_ex_reg + idx, h2c[idx + 4]); 238 239 if (++rtwdev->h2c.last_box_num >= 4) 240 rtwdev->h2c.last_box_num = 0; 241 242 out: 243 spin_unlock(&rtwdev->h2c.lock); 244 } 245 246 static void rtw_fw_send_h2c_packet(struct rtw_dev *rtwdev, u8 *h2c_pkt) 247 { 248 int ret; 249 250 spin_lock(&rtwdev->h2c.lock); 251 252 FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq); 253 ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE); 254 if (ret) 255 rtw_err(rtwdev, "failed to send h2c packet\n"); 256 rtwdev->h2c.seq++; 257 258 spin_unlock(&rtwdev->h2c.lock); 259 } 260 261 void 262 rtw_fw_send_general_info(struct rtw_dev *rtwdev) 263 { 264 struct rtw_fifo_conf *fifo = &rtwdev->fifo; 265 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 266 u16 total_size = H2C_PKT_HDR_SIZE + 4; 267 268 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_GENERAL_INFO); 269 270 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size); 271 272 GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, 273 fifo->rsvd_fw_txbuf_addr - 274 fifo->rsvd_boundary); 275 276 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); 277 } 278 279 void 280 rtw_fw_send_phydm_info(struct rtw_dev *rtwdev) 281 { 282 struct rtw_hal *hal = &rtwdev->hal; 283 struct rtw_efuse *efuse = &rtwdev->efuse; 284 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 285 u16 total_size = H2C_PKT_HDR_SIZE + 8; 286 u8 fw_rf_type = 0; 287 288 if (hal->rf_type == RF_1T1R) 289 fw_rf_type = FW_RF_1T1R; 290 else if (hal->rf_type == RF_2T2R) 291 fw_rf_type = FW_RF_2T2R; 292 293 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_PHYDM_INFO); 294 295 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size); 296 PHYDM_INFO_SET_REF_TYPE(h2c_pkt, efuse->rfe_option); 297 PHYDM_INFO_SET_RF_TYPE(h2c_pkt, fw_rf_type); 298 PHYDM_INFO_SET_CUT_VER(h2c_pkt, hal->cut_version); 299 PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, hal->antenna_tx); 300 PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, hal->antenna_rx); 301 302 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); 303 } 304 305 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para) 306 { 307 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 308 u16 total_size = H2C_PKT_HDR_SIZE + 1; 309 310 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_IQK); 311 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size); 312 IQK_SET_CLEAR(h2c_pkt, para->clear); 313 IQK_SET_SEGMENT_IQK(h2c_pkt, para->segment_iqk); 314 315 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); 316 } 317 318 void rtw_fw_query_bt_info(struct rtw_dev *rtwdev) 319 { 320 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 321 322 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_INFO); 323 324 SET_QUERY_BT_INFO(h2c_pkt, true); 325 326 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 327 } 328 329 void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw) 330 { 331 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 332 333 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WL_CH_INFO); 334 335 SET_WL_CH_INFO_LINK(h2c_pkt, link); 336 SET_WL_CH_INFO_CHNL(h2c_pkt, ch); 337 SET_WL_CH_INFO_BW(h2c_pkt, bw); 338 339 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 340 } 341 342 void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev, 343 struct rtw_coex_info_req *req) 344 { 345 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 346 347 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_MP_INFO); 348 349 SET_BT_MP_INFO_SEQ(h2c_pkt, req->seq); 350 SET_BT_MP_INFO_OP_CODE(h2c_pkt, req->op_code); 351 SET_BT_MP_INFO_PARA1(h2c_pkt, req->para1); 352 SET_BT_MP_INFO_PARA2(h2c_pkt, req->para2); 353 SET_BT_MP_INFO_PARA3(h2c_pkt, req->para3); 354 355 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 356 } 357 358 void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl) 359 { 360 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 361 u8 index = 0 - bt_pwr_dec_lvl; 362 363 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_FORCE_BT_TX_POWER); 364 365 SET_BT_TX_POWER_INDEX(h2c_pkt, index); 366 367 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 368 } 369 370 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable) 371 { 372 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 373 374 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_IGNORE_WLAN_ACTION); 375 376 SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, enable); 377 378 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 379 } 380 381 void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, 382 u8 para1, u8 para2, u8 para3, u8 para4, u8 para5) 383 { 384 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 385 386 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_COEX_TDMA_TYPE); 387 388 SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, para1); 389 SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, para2); 390 SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, para3); 391 SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, para4); 392 SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, para5); 393 394 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 395 } 396 397 void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data) 398 { 399 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 400 401 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BT_WIFI_CONTROL); 402 403 SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, op_code); 404 405 SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, *data); 406 SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, *(data + 1)); 407 SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, *(data + 2)); 408 SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, *(data + 3)); 409 SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, *(data + 4)); 410 411 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 412 } 413 414 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 415 { 416 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 417 u8 rssi = ewma_rssi_read(&si->avg_rssi); 418 bool stbc_en = si->stbc_en ? true : false; 419 420 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSSI_MONITOR); 421 422 SET_RSSI_INFO_MACID(h2c_pkt, si->mac_id); 423 SET_RSSI_INFO_RSSI(h2c_pkt, rssi); 424 SET_RSSI_INFO_STBC(h2c_pkt, stbc_en); 425 426 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 427 } 428 429 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 430 { 431 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 432 bool no_update = si->updated; 433 bool disable_pt = true; 434 435 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO); 436 437 SET_RA_INFO_MACID(h2c_pkt, si->mac_id); 438 SET_RA_INFO_RATE_ID(h2c_pkt, si->rate_id); 439 SET_RA_INFO_INIT_RA_LVL(h2c_pkt, si->init_ra_lv); 440 SET_RA_INFO_SGI_EN(h2c_pkt, si->sgi_enable); 441 SET_RA_INFO_BW_MODE(h2c_pkt, si->bw_mode); 442 SET_RA_INFO_LDPC(h2c_pkt, si->ldpc_en); 443 SET_RA_INFO_NO_UPDATE(h2c_pkt, no_update); 444 SET_RA_INFO_VHT_EN(h2c_pkt, si->vht_enable); 445 SET_RA_INFO_DIS_PT(h2c_pkt, disable_pt); 446 SET_RA_INFO_RA_MASK0(h2c_pkt, (si->ra_mask & 0xff)); 447 SET_RA_INFO_RA_MASK1(h2c_pkt, (si->ra_mask & 0xff00) >> 8); 448 SET_RA_INFO_RA_MASK2(h2c_pkt, (si->ra_mask & 0xff0000) >> 16); 449 SET_RA_INFO_RA_MASK3(h2c_pkt, (si->ra_mask & 0xff000000) >> 24); 450 451 si->init_ra_lv = 0; 452 si->updated = true; 453 454 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 455 } 456 457 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool connect) 458 { 459 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 460 461 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_MEDIA_STATUS_RPT); 462 MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, connect); 463 MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, mac_id); 464 465 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 466 } 467 468 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev) 469 { 470 struct rtw_lps_conf *conf = &rtwdev->lps_conf; 471 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 472 473 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_SET_PWR_MODE); 474 475 SET_PWR_MODE_SET_MODE(h2c_pkt, conf->mode); 476 SET_PWR_MODE_SET_RLBM(h2c_pkt, conf->rlbm); 477 SET_PWR_MODE_SET_SMART_PS(h2c_pkt, conf->smart_ps); 478 SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, conf->awake_interval); 479 SET_PWR_MODE_SET_PORT_ID(h2c_pkt, conf->port_id); 480 SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, conf->state); 481 482 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 483 } 484 485 static u8 rtw_get_rsvd_page_location(struct rtw_dev *rtwdev, 486 enum rtw_rsvd_packet_type type) 487 { 488 struct rtw_rsvd_page *rsvd_pkt; 489 u8 location = 0; 490 491 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 492 if (type == rsvd_pkt->type) 493 location = rsvd_pkt->page; 494 } 495 496 return location; 497 } 498 499 void rtw_fw_set_pg_info(struct rtw_dev *rtwdev) 500 { 501 struct rtw_lps_conf *conf = &rtwdev->lps_conf; 502 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 503 u8 loc_pg, loc_dpk; 504 505 loc_pg = rtw_get_rsvd_page_location(rtwdev, RSVD_LPS_PG_INFO); 506 loc_dpk = rtw_get_rsvd_page_location(rtwdev, RSVD_LPS_PG_DPK); 507 508 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_LPS_PG_INFO); 509 510 LPS_PG_INFO_LOC(h2c_pkt, loc_pg); 511 LPS_PG_DPK_LOC(h2c_pkt, loc_dpk); 512 LPS_PG_SEC_CAM_EN(h2c_pkt, conf->sec_cam_backup); 513 514 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 515 } 516 517 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev) 518 { 519 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 520 u8 location = 0; 521 522 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSVD_PAGE); 523 524 location = rtw_get_rsvd_page_location(rtwdev, RSVD_PROBE_RESP); 525 *(h2c_pkt + 1) = location; 526 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PROBE_RESP loc: %d\n", location); 527 528 location = rtw_get_rsvd_page_location(rtwdev, RSVD_PS_POLL); 529 *(h2c_pkt + 2) = location; 530 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PS_POLL loc: %d\n", location); 531 532 location = rtw_get_rsvd_page_location(rtwdev, RSVD_NULL); 533 *(h2c_pkt + 3) = location; 534 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_NULL loc: %d\n", location); 535 536 location = rtw_get_rsvd_page_location(rtwdev, RSVD_QOS_NULL); 537 *(h2c_pkt + 4) = location; 538 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_QOS_NULL loc: %d\n", location); 539 540 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 541 } 542 543 static struct sk_buff * 544 rtw_beacon_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 545 { 546 struct sk_buff *skb_new; 547 548 if (vif->type != NL80211_IFTYPE_AP && 549 vif->type != NL80211_IFTYPE_ADHOC && 550 !ieee80211_vif_is_mesh(vif)) { 551 skb_new = alloc_skb(1, GFP_KERNEL); 552 if (!skb_new) 553 return NULL; 554 skb_put(skb_new, 1); 555 } else { 556 skb_new = ieee80211_beacon_get(hw, vif); 557 } 558 559 return skb_new; 560 } 561 562 static struct sk_buff *rtw_lps_pg_dpk_get(struct ieee80211_hw *hw) 563 { 564 struct rtw_dev *rtwdev = hw->priv; 565 struct rtw_chip_info *chip = rtwdev->chip; 566 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info; 567 struct rtw_lps_pg_dpk_hdr *dpk_hdr; 568 struct sk_buff *skb; 569 u32 size; 570 571 size = chip->tx_pkt_desc_sz + sizeof(*dpk_hdr); 572 skb = alloc_skb(size, GFP_KERNEL); 573 if (!skb) 574 return NULL; 575 576 skb_reserve(skb, chip->tx_pkt_desc_sz); 577 dpk_hdr = skb_put_zero(skb, sizeof(*dpk_hdr)); 578 dpk_hdr->dpk_ch = dpk_info->dpk_ch; 579 dpk_hdr->dpk_path_ok = dpk_info->dpk_path_ok[0]; 580 memcpy(dpk_hdr->dpk_txagc, dpk_info->dpk_txagc, 2); 581 memcpy(dpk_hdr->dpk_gs, dpk_info->dpk_gs, 4); 582 memcpy(dpk_hdr->coef, dpk_info->coef, 160); 583 584 return skb; 585 } 586 587 static struct sk_buff *rtw_lps_pg_info_get(struct ieee80211_hw *hw, 588 struct ieee80211_vif *vif) 589 { 590 struct rtw_dev *rtwdev = hw->priv; 591 struct rtw_chip_info *chip = rtwdev->chip; 592 struct rtw_lps_conf *conf = &rtwdev->lps_conf; 593 struct rtw_lps_pg_info_hdr *pg_info_hdr; 594 struct sk_buff *skb; 595 u32 size; 596 597 size = chip->tx_pkt_desc_sz + sizeof(*pg_info_hdr); 598 skb = alloc_skb(size, GFP_KERNEL); 599 if (!skb) 600 return NULL; 601 602 skb_reserve(skb, chip->tx_pkt_desc_sz); 603 pg_info_hdr = skb_put_zero(skb, sizeof(*pg_info_hdr)); 604 pg_info_hdr->tx_bu_page_count = rtwdev->fifo.rsvd_drv_pg_num; 605 pg_info_hdr->macid = find_first_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM); 606 pg_info_hdr->sec_cam_count = 607 rtw_sec_cam_pg_backup(rtwdev, pg_info_hdr->sec_cam); 608 609 conf->sec_cam_backup = pg_info_hdr->sec_cam_count != 0; 610 611 return skb; 612 } 613 614 static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, 615 struct ieee80211_vif *vif, 616 enum rtw_rsvd_packet_type type) 617 { 618 struct sk_buff *skb_new; 619 620 switch (type) { 621 case RSVD_BEACON: 622 skb_new = rtw_beacon_get(hw, vif); 623 break; 624 case RSVD_PS_POLL: 625 skb_new = ieee80211_pspoll_get(hw, vif); 626 break; 627 case RSVD_PROBE_RESP: 628 skb_new = ieee80211_proberesp_get(hw, vif); 629 break; 630 case RSVD_NULL: 631 skb_new = ieee80211_nullfunc_get(hw, vif, false); 632 break; 633 case RSVD_QOS_NULL: 634 skb_new = ieee80211_nullfunc_get(hw, vif, true); 635 break; 636 case RSVD_LPS_PG_DPK: 637 skb_new = rtw_lps_pg_dpk_get(hw); 638 break; 639 case RSVD_LPS_PG_INFO: 640 skb_new = rtw_lps_pg_info_get(hw, vif); 641 break; 642 default: 643 return NULL; 644 } 645 646 if (!skb_new) 647 return NULL; 648 649 return skb_new; 650 } 651 652 static void rtw_fill_rsvd_page_desc(struct rtw_dev *rtwdev, struct sk_buff *skb) 653 { 654 struct rtw_tx_pkt_info pkt_info; 655 struct rtw_chip_info *chip = rtwdev->chip; 656 u8 *pkt_desc; 657 658 memset(&pkt_info, 0, sizeof(pkt_info)); 659 rtw_rsvd_page_pkt_info_update(rtwdev, &pkt_info, skb); 660 pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); 661 memset(pkt_desc, 0, chip->tx_pkt_desc_sz); 662 rtw_tx_fill_tx_desc(&pkt_info, skb); 663 } 664 665 static inline u8 rtw_len_to_page(unsigned int len, u8 page_size) 666 { 667 return DIV_ROUND_UP(len, page_size); 668 } 669 670 static void rtw_rsvd_page_list_to_buf(struct rtw_dev *rtwdev, u8 page_size, 671 u8 page_margin, u32 page, u8 *buf, 672 struct rtw_rsvd_page *rsvd_pkt) 673 { 674 struct sk_buff *skb = rsvd_pkt->skb; 675 676 if (page >= 1) 677 memcpy(buf + page_margin + page_size * (page - 1), 678 skb->data, skb->len); 679 else 680 memcpy(buf, skb->data, skb->len); 681 } 682 683 void rtw_add_rsvd_page(struct rtw_dev *rtwdev, enum rtw_rsvd_packet_type type, 684 bool txdesc) 685 { 686 struct rtw_rsvd_page *rsvd_pkt; 687 688 lockdep_assert_held(&rtwdev->mutex); 689 690 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 691 if (rsvd_pkt->type == type) 692 return; 693 } 694 695 rsvd_pkt = kmalloc(sizeof(*rsvd_pkt), GFP_KERNEL); 696 if (!rsvd_pkt) 697 return; 698 699 rsvd_pkt->type = type; 700 rsvd_pkt->add_txdesc = txdesc; 701 list_add_tail(&rsvd_pkt->list, &rtwdev->rsvd_page_list); 702 } 703 704 void rtw_reset_rsvd_page(struct rtw_dev *rtwdev) 705 { 706 struct rtw_rsvd_page *rsvd_pkt, *tmp; 707 708 lockdep_assert_held(&rtwdev->mutex); 709 710 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) { 711 if (rsvd_pkt->type == RSVD_BEACON) 712 continue; 713 list_del(&rsvd_pkt->list); 714 kfree(rsvd_pkt); 715 } 716 } 717 718 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, 719 u8 *buf, u32 size) 720 { 721 u8 bckp[2]; 722 u8 val; 723 u16 rsvd_pg_head; 724 int ret; 725 726 lockdep_assert_held(&rtwdev->mutex); 727 728 if (!size) 729 return -EINVAL; 730 731 pg_addr &= BIT_MASK_BCN_HEAD_1_V1; 732 rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, pg_addr | BIT_BCN_VALID_V1); 733 734 val = rtw_read8(rtwdev, REG_CR + 1); 735 bckp[0] = val; 736 val |= BIT_ENSWBCN >> 8; 737 rtw_write8(rtwdev, REG_CR + 1, val); 738 739 val = rtw_read8(rtwdev, REG_FWHW_TXQ_CTRL + 2); 740 bckp[1] = val; 741 val &= ~(BIT_EN_BCNQ_DL >> 16); 742 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, val); 743 744 ret = rtw_hci_write_data_rsvd_page(rtwdev, buf, size); 745 if (ret) { 746 rtw_err(rtwdev, "failed to write data to rsvd page\n"); 747 goto restore; 748 } 749 750 if (!check_hw_ready(rtwdev, REG_FIFOPAGE_CTRL_2, BIT_BCN_VALID_V1, 1)) { 751 rtw_err(rtwdev, "error beacon valid\n"); 752 ret = -EBUSY; 753 } 754 755 restore: 756 rsvd_pg_head = rtwdev->fifo.rsvd_boundary; 757 rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, 758 rsvd_pg_head | BIT_BCN_VALID_V1); 759 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, bckp[1]); 760 rtw_write8(rtwdev, REG_CR + 1, bckp[0]); 761 762 return ret; 763 } 764 765 static int rtw_download_drv_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size) 766 { 767 u32 pg_size; 768 u32 pg_num = 0; 769 u16 pg_addr = 0; 770 771 pg_size = rtwdev->chip->page_size; 772 pg_num = size / pg_size + ((size & (pg_size - 1)) ? 1 : 0); 773 if (pg_num > rtwdev->fifo.rsvd_drv_pg_num) 774 return -ENOMEM; 775 776 pg_addr = rtwdev->fifo.rsvd_drv_addr; 777 778 return rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, size); 779 } 780 781 static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev, 782 struct ieee80211_vif *vif, u32 *size) 783 { 784 struct ieee80211_hw *hw = rtwdev->hw; 785 struct rtw_chip_info *chip = rtwdev->chip; 786 struct sk_buff *iter; 787 struct rtw_rsvd_page *rsvd_pkt; 788 u32 page = 0; 789 u8 total_page = 0; 790 u8 page_size, page_margin, tx_desc_sz; 791 u8 *buf; 792 793 page_size = chip->page_size; 794 tx_desc_sz = chip->tx_pkt_desc_sz; 795 page_margin = page_size - tx_desc_sz; 796 797 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 798 iter = rtw_get_rsvd_page_skb(hw, vif, rsvd_pkt->type); 799 if (!iter) { 800 rtw_err(rtwdev, "failed to build rsvd packet\n"); 801 goto release_skb; 802 } 803 804 /* Fill the tx_desc for the rsvd pkt that requires one. 805 * And iter->len will be added with size of tx_desc_sz. 806 */ 807 if (rsvd_pkt->add_txdesc) 808 rtw_fill_rsvd_page_desc(rtwdev, iter); 809 810 rsvd_pkt->skb = iter; 811 rsvd_pkt->page = total_page; 812 813 /* Reserved page is downloaded via TX path, and TX path will 814 * generate a tx_desc at the header to describe length of 815 * the buffer. If we are not counting page numbers with the 816 * size of tx_desc added at the first rsvd_pkt (usually a 817 * beacon, firmware default refer to the first page as the 818 * content of beacon), we could generate a buffer which size 819 * is smaller than the actual size of the whole rsvd_page 820 */ 821 if (total_page == 0) { 822 if (rsvd_pkt->type != RSVD_BEACON) { 823 rtw_err(rtwdev, "first page should be a beacon\n"); 824 goto release_skb; 825 } 826 total_page += rtw_len_to_page(iter->len + tx_desc_sz, 827 page_size); 828 } else { 829 total_page += rtw_len_to_page(iter->len, page_size); 830 } 831 } 832 833 if (total_page > rtwdev->fifo.rsvd_drv_pg_num) { 834 rtw_err(rtwdev, "rsvd page over size: %d\n", total_page); 835 goto release_skb; 836 } 837 838 *size = (total_page - 1) * page_size + page_margin; 839 buf = kzalloc(*size, GFP_KERNEL); 840 if (!buf) 841 goto release_skb; 842 843 /* Copy the content of each rsvd_pkt to the buf, and they should 844 * be aligned to the pages. 845 * 846 * Note that the first rsvd_pkt is a beacon no matter what vif->type. 847 * And that rsvd_pkt does not require tx_desc because when it goes 848 * through TX path, the TX path will generate one for it. 849 */ 850 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 851 rtw_rsvd_page_list_to_buf(rtwdev, page_size, page_margin, 852 page, buf, rsvd_pkt); 853 if (page == 0) 854 page += rtw_len_to_page(rsvd_pkt->skb->len + 855 tx_desc_sz, page_size); 856 else 857 page += rtw_len_to_page(rsvd_pkt->skb->len, page_size); 858 859 kfree_skb(rsvd_pkt->skb); 860 } 861 862 return buf; 863 864 release_skb: 865 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) 866 kfree_skb(rsvd_pkt->skb); 867 868 return NULL; 869 } 870 871 static int 872 rtw_download_beacon(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 873 { 874 struct ieee80211_hw *hw = rtwdev->hw; 875 struct sk_buff *skb; 876 int ret = 0; 877 878 skb = rtw_beacon_get(hw, vif); 879 if (!skb) { 880 rtw_err(rtwdev, "failed to get beacon skb\n"); 881 ret = -ENOMEM; 882 goto out; 883 } 884 885 ret = rtw_download_drv_rsvd_page(rtwdev, skb->data, skb->len); 886 if (ret) 887 rtw_err(rtwdev, "failed to download drv rsvd page\n"); 888 889 dev_kfree_skb(skb); 890 891 out: 892 return ret; 893 } 894 895 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 896 { 897 u8 *buf; 898 u32 size; 899 int ret; 900 901 buf = rtw_build_rsvd_page(rtwdev, vif, &size); 902 if (!buf) { 903 rtw_err(rtwdev, "failed to build rsvd page pkt\n"); 904 return -ENOMEM; 905 } 906 907 ret = rtw_download_drv_rsvd_page(rtwdev, buf, size); 908 if (ret) { 909 rtw_err(rtwdev, "failed to download drv rsvd page\n"); 910 goto free; 911 } 912 913 /* The last thing is to download the *ONLY* beacon again, because 914 * the previous tx_desc is to describe the total rsvd page. Download 915 * the beacon again to replace the TX desc header, and we will get 916 * a correct tx_desc for the beacon in the rsvd page. 917 */ 918 ret = rtw_download_beacon(rtwdev, vif); 919 if (ret) { 920 rtw_err(rtwdev, "failed to download beacon\n"); 921 goto free; 922 } 923 924 free: 925 kfree(buf); 926 927 return ret; 928 } 929 930 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, 931 u32 offset, u32 size, u32 *buf) 932 { 933 struct rtw_fifo_conf *fifo = &rtwdev->fifo; 934 u32 residue, i; 935 u16 start_pg; 936 u16 idx = 0; 937 u16 ctl; 938 u8 rcr; 939 940 if (size & 0x3) { 941 rtw_warn(rtwdev, "should be 4-byte aligned\n"); 942 return -EINVAL; 943 } 944 945 offset += fifo->rsvd_boundary << TX_PAGE_SIZE_SHIFT; 946 residue = offset & (FIFO_PAGE_SIZE - 1); 947 start_pg = offset >> FIFO_PAGE_SIZE_SHIFT; 948 start_pg += RSVD_PAGE_START_ADDR; 949 950 rcr = rtw_read8(rtwdev, REG_RCR + 2); 951 ctl = rtw_read16(rtwdev, REG_PKTBUF_DBG_CTRL) & 0xf000; 952 953 /* disable rx clock gate */ 954 rtw_write8(rtwdev, REG_RCR, rcr | BIT(3)); 955 956 do { 957 rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, start_pg | ctl); 958 959 for (i = FIFO_DUMP_ADDR + residue; 960 i < FIFO_DUMP_ADDR + FIFO_PAGE_SIZE; i += 4) { 961 buf[idx++] = rtw_read32(rtwdev, i); 962 size -= 4; 963 if (size == 0) 964 goto out; 965 } 966 967 residue = 0; 968 start_pg++; 969 } while (size); 970 971 out: 972 rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, ctl); 973 rtw_write8(rtwdev, REG_RCR + 2, rcr); 974 return 0; 975 } 976