1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2009-2012 Realtek Corporation.*/ 3 4 #ifndef __RTL_DEBUG_H__ 5 #define __RTL_DEBUG_H__ 6 7 /*-------------------------------------------------------------- 8 Debug level 9 --------------------------------------------------------------*/ 10 /* 11 *Fatal bug. 12 *For example, Tx/Rx/IO locked up, 13 *memory access violation, 14 *resource allocation failed, 15 *unexpected HW behavior, HW BUG 16 *and so on. 17 */ 18 /*#define DBG_EMERG 0 */ 19 20 /* 21 *Abnormal, rare, or unexpeted cases. 22 *For example, Packet/IO Ctl canceled, 23 *device suprisely unremoved and so on. 24 */ 25 #define DBG_WARNING 2 26 27 /* 28 *Normal case driver developer should 29 *open, we can see link status like 30 *assoc/AddBA/DHCP/adapter start and 31 *so on basic and useful infromations. 32 */ 33 #define DBG_DMESG 3 34 35 /* 36 *Normal case with useful information 37 *about current SW or HW state. 38 *For example, Tx/Rx descriptor to fill, 39 *Tx/Rx descriptor completed status, 40 *SW protocol state change, dynamic 41 *mechanism state change and so on. 42 */ 43 #define DBG_LOUD 4 44 45 /* 46 *Normal case with detail execution 47 *flow or information. 48 */ 49 #define DBG_TRACE 5 50 51 /*-------------------------------------------------------------- 52 Define the rt_trace components 53 --------------------------------------------------------------*/ 54 #define COMP_ERR BIT(0) 55 #define COMP_FW BIT(1) 56 #define COMP_INIT BIT(2) /*For init/deinit */ 57 #define COMP_RECV BIT(3) /*For Rx. */ 58 #define COMP_SEND BIT(4) /*For Tx. */ 59 #define COMP_MLME BIT(5) /*For MLME. */ 60 #define COMP_SCAN BIT(6) /*For Scan. */ 61 #define COMP_INTR BIT(7) /*For interrupt Related. */ 62 #define COMP_LED BIT(8) /*For LED. */ 63 #define COMP_SEC BIT(9) /*For sec. */ 64 #define COMP_BEACON BIT(10) /*For beacon. */ 65 #define COMP_RATE BIT(11) /*For rate. */ 66 #define COMP_RXDESC BIT(12) /*For rx desc. */ 67 #define COMP_DIG BIT(13) /*For DIG */ 68 #define COMP_TXAGC BIT(14) /*For Tx power */ 69 #define COMP_HIPWR BIT(15) /*For High Power Mechanism */ 70 #define COMP_POWER BIT(16) /*For lps/ips/aspm. */ 71 #define COMP_POWER_TRACKING BIT(17) /*For TX POWER TRACKING */ 72 #define COMP_BB_POWERSAVING BIT(18) 73 #define COMP_SWAS BIT(19) /*For SW Antenna Switch */ 74 #define COMP_RF BIT(20) /*For RF. */ 75 #define COMP_TURBO BIT(21) /*For EDCA TURBO. */ 76 #define COMP_RATR BIT(22) 77 #define COMP_CMD BIT(23) 78 #define COMP_EFUSE BIT(24) 79 #define COMP_QOS BIT(25) 80 #define COMP_MAC80211 BIT(26) 81 #define COMP_REGD BIT(27) 82 #define COMP_CHAN BIT(28) 83 #define COMP_USB BIT(29) 84 #define COMP_EASY_CONCURRENT COMP_USB /* reuse of this bit is OK */ 85 #define COMP_BT_COEXIST BIT(30) 86 #define COMP_IQK BIT(31) 87 #define COMP_TX_REPORT BIT_ULL(32) 88 89 /*-------------------------------------------------------------- 90 Define the rt_print components 91 --------------------------------------------------------------*/ 92 /* Define EEPROM and EFUSE check module bit*/ 93 #define EEPROM_W BIT(0) 94 #define EFUSE_PG BIT(1) 95 #define EFUSE_READ_ALL BIT(2) 96 97 /* Define init check for module bit*/ 98 #define INIT_EEPROM BIT(0) 99 #define INIT_TXPOWER BIT(1) 100 #define INIT_IQK BIT(2) 101 #define INIT_RF BIT(3) 102 103 /* Define PHY-BB/RF/MAC check module bit */ 104 #define PHY_BBR BIT(0) 105 #define PHY_BBW BIT(1) 106 #define PHY_RFR BIT(2) 107 #define PHY_RFW BIT(3) 108 #define PHY_MACR BIT(4) 109 #define PHY_MACW BIT(5) 110 #define PHY_ALLR BIT(6) 111 #define PHY_ALLW BIT(7) 112 #define PHY_TXPWR BIT(8) 113 #define PHY_PWRDIFF BIT(9) 114 115 /* Define Dynamic Mechanism check module bit --> FDM */ 116 #define WA_IOT BIT(0) 117 #define DM_PWDB BIT(1) 118 #define DM_MONITOR BIT(2) 119 #define DM_DIG BIT(3) 120 #define DM_EDCA_TURBO BIT(4) 121 122 #define DM_PWDB BIT(1) 123 124 enum dbgp_flag_e { 125 FQOS = 0, 126 FTX = 1, 127 FRX = 2, 128 FSEC = 3, 129 FMGNT = 4, 130 FMLME = 5, 131 FRESOURCE = 6, 132 FBEACON = 7, 133 FISR = 8, 134 FPHY = 9, 135 FMP = 10, 136 FEEPROM = 11, 137 FPWR = 12, 138 FDM = 13, 139 FDBGCTRL = 14, 140 FC2H = 15, 141 FBT = 16, 142 FINIT = 17, 143 FIOCTL = 18, 144 DBGP_TYPE_MAX 145 }; 146 147 #ifdef CONFIG_RTLWIFI_DEBUG 148 149 struct rtl_priv; 150 151 __printf(4, 5) 152 void _rtl_dbg_trace(struct rtl_priv *rtlpriv, u64 comp, int level, 153 const char *fmt, ...); 154 155 __printf(4, 5) 156 void _rtl_dbg_print(struct rtl_priv *rtlpriv, u64 comp, int level, 157 const char *fmt, ...); 158 159 void _rtl_dbg_print_data(struct rtl_priv *rtlpriv, u64 comp, int level, 160 const char *titlestring, 161 const void *hexdata, int hexdatalen); 162 163 #define RT_TRACE(rtlpriv, comp, level, fmt, ...) \ 164 _rtl_dbg_trace(rtlpriv, comp, level, \ 165 fmt, ##__VA_ARGS__) 166 167 #define RTPRINT(rtlpriv, dbgtype, dbgflag, fmt, ...) \ 168 _rtl_dbg_print(rtlpriv, dbgtype, dbgflag, fmt, ##__VA_ARGS__) 169 170 #define RT_PRINT_DATA(rtlpriv, _comp, _level, _titlestring, _hexdata, \ 171 _hexdatalen) \ 172 _rtl_dbg_print_data(rtlpriv, _comp, _level, \ 173 _titlestring, _hexdata, _hexdatalen) 174 175 #else 176 177 struct rtl_priv; 178 179 __printf(4, 5) 180 static inline void RT_TRACE(struct rtl_priv *rtlpriv, 181 u64 comp, int level, 182 const char *fmt, ...) 183 { 184 } 185 186 __printf(4, 5) 187 static inline void RTPRINT(struct rtl_priv *rtlpriv, 188 int dbgtype, int dbgflag, 189 const char *fmt, ...) 190 { 191 } 192 193 static inline void RT_PRINT_DATA(struct rtl_priv *rtlpriv, 194 u64 comp, int level, 195 const char *titlestring, 196 const void *hexdata, size_t hexdatalen) 197 { 198 } 199 200 #endif 201 202 #ifdef CONFIG_RTLWIFI_DEBUG 203 void rtl_debug_add_one(struct ieee80211_hw *hw); 204 void rtl_debug_remove_one(struct ieee80211_hw *hw); 205 void rtl_debugfs_add_topdir(void); 206 void rtl_debugfs_remove_topdir(void); 207 #else 208 #define rtl_debug_add_one(hw) 209 #define rtl_debug_remove_one(hw) 210 #define rtl_debugfs_add_topdir() 211 #define rtl_debugfs_remove_topdir() 212 #endif 213 #endif 214