1 /****************************************************************************** 2 * 3 * Copyright(c) 2012 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 /************************************************************** 26 * Description: 27 * 28 * This file is for RTL8192E Co-exist mechanism 29 * 30 * History 31 * 2012/11/15 Cosa first check in. 32 * 33 **************************************************************/ 34 35 /************************************************************** 36 * include files 37 **************************************************************/ 38 #include "halbt_precomp.h" 39 /************************************************************** 40 * Global variables, these are static variables 41 **************************************************************/ 42 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant; 43 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant; 44 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant; 45 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant; 46 47 static const char *const glbt_info_src_8192e_2ant[] = { 48 "BT Info[wifi fw]", 49 "BT Info[bt rsp]", 50 "BT Info[bt auto report]", 51 }; 52 53 static u32 glcoex_ver_date_8192e_2ant = 20130902; 54 static u32 glcoex_ver_8192e_2ant = 0x34; 55 56 /************************************************************** 57 * local function proto type if needed 58 **************************************************************/ 59 /************************************************************** 60 * local function start with btc8192e2ant_ 61 **************************************************************/ 62 static u8 btc8192e2ant_bt_rssi_state(struct btc_coexist *btcoexist, 63 u8 level_num, u8 rssi_thresh, 64 u8 rssi_thresh1) 65 { 66 struct rtl_priv *rtlpriv = btcoexist->adapter; 67 int bt_rssi = 0; 68 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; 69 70 bt_rssi = coex_sta->bt_rssi; 71 72 if (level_num == 2) { 73 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 74 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 75 if (bt_rssi >= 76 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 77 bt_rssi_state = BTC_RSSI_STATE_HIGH; 78 else 79 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 80 } else { 81 if (bt_rssi < rssi_thresh) 82 bt_rssi_state = BTC_RSSI_STATE_LOW; 83 else 84 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 85 } 86 } else if (level_num == 3) { 87 if (rssi_thresh > rssi_thresh1) { 88 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 89 "[BTCoex], BT Rssi thresh error!!\n"); 90 return coex_sta->pre_bt_rssi_state; 91 } 92 93 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 94 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 95 if (bt_rssi >= 96 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 97 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 98 else 99 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 100 } else if ((coex_sta->pre_bt_rssi_state == 101 BTC_RSSI_STATE_MEDIUM) || 102 (coex_sta->pre_bt_rssi_state == 103 BTC_RSSI_STATE_STAY_MEDIUM)) { 104 if (bt_rssi >= (rssi_thresh1 + 105 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 106 bt_rssi_state = BTC_RSSI_STATE_HIGH; 107 else if (bt_rssi < rssi_thresh) 108 bt_rssi_state = BTC_RSSI_STATE_LOW; 109 else 110 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 111 } else { 112 if (bt_rssi < rssi_thresh1) 113 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 114 else 115 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 116 } 117 } 118 119 coex_sta->pre_bt_rssi_state = bt_rssi_state; 120 121 return bt_rssi_state; 122 } 123 124 static u8 btc8192e2ant_wifi_rssi_state(struct btc_coexist *btcoexist, 125 u8 index, u8 level_num, u8 rssi_thresh, 126 u8 rssi_thresh1) 127 { 128 struct rtl_priv *rtlpriv = btcoexist->adapter; 129 int wifi_rssi = 0; 130 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; 131 132 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 133 134 if (level_num == 2) { 135 if ((coex_sta->pre_wifi_rssi_state[index] == 136 BTC_RSSI_STATE_LOW) || 137 (coex_sta->pre_wifi_rssi_state[index] == 138 BTC_RSSI_STATE_STAY_LOW)) { 139 if (wifi_rssi >= 140 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 141 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 142 else 143 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 144 } else { 145 if (wifi_rssi < rssi_thresh) 146 wifi_rssi_state = BTC_RSSI_STATE_LOW; 147 else 148 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 149 } 150 } else if (level_num == 3) { 151 if (rssi_thresh > rssi_thresh1) { 152 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 153 "[BTCoex], wifi RSSI thresh error!!\n"); 154 return coex_sta->pre_wifi_rssi_state[index]; 155 } 156 157 if ((coex_sta->pre_wifi_rssi_state[index] == 158 BTC_RSSI_STATE_LOW) || 159 (coex_sta->pre_wifi_rssi_state[index] == 160 BTC_RSSI_STATE_STAY_LOW)) { 161 if (wifi_rssi >= 162 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 163 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 164 else 165 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 166 } else if ((coex_sta->pre_wifi_rssi_state[index] == 167 BTC_RSSI_STATE_MEDIUM) || 168 (coex_sta->pre_wifi_rssi_state[index] == 169 BTC_RSSI_STATE_STAY_MEDIUM)) { 170 if (wifi_rssi >= (rssi_thresh1 + 171 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 172 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 173 else if (wifi_rssi < rssi_thresh) 174 wifi_rssi_state = BTC_RSSI_STATE_LOW; 175 else 176 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 177 } else { 178 if (wifi_rssi < rssi_thresh1) 179 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 180 else 181 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 182 } 183 } 184 185 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; 186 187 return wifi_rssi_state; 188 } 189 190 static void btc8192e2ant_monitor_bt_enable_disable(struct btc_coexist 191 *btcoexist) 192 { 193 struct rtl_priv *rtlpriv = btcoexist->adapter; 194 static bool pre_bt_disabled; 195 static u32 bt_disable_cnt; 196 bool bt_active = true, bt_disabled = false; 197 198 /* This function check if bt is disabled */ 199 200 if (coex_sta->high_priority_tx == 0 && 201 coex_sta->high_priority_rx == 0 && 202 coex_sta->low_priority_tx == 0 && 203 coex_sta->low_priority_rx == 0) 204 bt_active = false; 205 206 if (coex_sta->high_priority_tx == 0xffff && 207 coex_sta->high_priority_rx == 0xffff && 208 coex_sta->low_priority_tx == 0xffff && 209 coex_sta->low_priority_rx == 0xffff) 210 bt_active = false; 211 212 if (bt_active) { 213 bt_disable_cnt = 0; 214 bt_disabled = false; 215 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 216 &bt_disabled); 217 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 218 "[BTCoex], BT is enabled !!\n"); 219 } else { 220 bt_disable_cnt++; 221 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 222 "[BTCoex], bt all counters = 0, %d times!!\n", 223 bt_disable_cnt); 224 if (bt_disable_cnt >= 2) { 225 bt_disabled = true; 226 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 227 &bt_disabled); 228 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 229 "[BTCoex], BT is disabled !!\n"); 230 } 231 } 232 if (pre_bt_disabled != bt_disabled) { 233 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 234 "[BTCoex], BT is from %s to %s!!\n", 235 (pre_bt_disabled ? "disabled" : "enabled"), 236 (bt_disabled ? "disabled" : "enabled")); 237 pre_bt_disabled = bt_disabled; 238 } 239 } 240 241 static u32 btc8192e2ant_decide_ra_mask(struct btc_coexist *btcoexist, 242 u8 ss_type, u32 ra_mask_type) 243 { 244 u32 dis_ra_mask = 0x0; 245 246 switch (ra_mask_type) { 247 case 0: /* normal mode */ 248 if (ss_type == 2) 249 dis_ra_mask = 0x0; /* enable 2ss */ 250 else 251 dis_ra_mask = 0xfff00000; /* disable 2ss */ 252 break; 253 case 1: /* disable cck 1/2 */ 254 if (ss_type == 2) 255 dis_ra_mask = 0x00000003; /* enable 2ss */ 256 else 257 dis_ra_mask = 0xfff00003; /* disable 2ss */ 258 break; 259 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ 260 if (ss_type == 2) 261 dis_ra_mask = 0x0001f1f7; /* enable 2ss */ 262 else 263 dis_ra_mask = 0xfff1f1f7; /* disable 2ss */ 264 break; 265 default: 266 break; 267 } 268 269 return dis_ra_mask; 270 } 271 272 static void btc8192e2ant_update_ra_mask(struct btc_coexist *btcoexist, 273 bool force_exec, u32 dis_rate_mask) 274 { 275 coex_dm->cur_ra_mask = dis_rate_mask; 276 277 if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) 278 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, 279 &coex_dm->cur_ra_mask); 280 coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; 281 } 282 283 static void btc8192e2ant_auto_rate_fallback_retry(struct btc_coexist *btcoexist, 284 bool force_exec, u8 type) 285 { 286 bool wifi_under_b_mode = false; 287 288 coex_dm->cur_arfr_type = type; 289 290 if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { 291 switch (coex_dm->cur_arfr_type) { 292 case 0: /* normal mode */ 293 btcoexist->btc_write_4byte(btcoexist, 0x430, 294 coex_dm->backup_arfr_cnt1); 295 btcoexist->btc_write_4byte(btcoexist, 0x434, 296 coex_dm->backup_arfr_cnt2); 297 break; 298 case 1: 299 btcoexist->btc_get(btcoexist, 300 BTC_GET_BL_WIFI_UNDER_B_MODE, 301 &wifi_under_b_mode); 302 if (wifi_under_b_mode) { 303 btcoexist->btc_write_4byte(btcoexist, 0x430, 304 0x0); 305 btcoexist->btc_write_4byte(btcoexist, 0x434, 306 0x01010101); 307 } else { 308 btcoexist->btc_write_4byte(btcoexist, 0x430, 309 0x0); 310 btcoexist->btc_write_4byte(btcoexist, 0x434, 311 0x04030201); 312 } 313 break; 314 default: 315 break; 316 } 317 } 318 319 coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; 320 } 321 322 static void btc8192e2ant_retry_limit(struct btc_coexist *btcoexist, 323 bool force_exec, u8 type) 324 { 325 coex_dm->cur_retry_limit_type = type; 326 327 if (force_exec || (coex_dm->pre_retry_limit_type != 328 coex_dm->cur_retry_limit_type)) { 329 switch (coex_dm->cur_retry_limit_type) { 330 case 0: /* normal mode */ 331 btcoexist->btc_write_2byte(btcoexist, 0x42a, 332 coex_dm->backup_retry_limit); 333 break; 334 case 1: /* retry limit = 8 */ 335 btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808); 336 break; 337 default: 338 break; 339 } 340 } 341 342 coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; 343 } 344 345 static void btc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist, 346 bool force_exec, u8 type) 347 { 348 coex_dm->cur_ampdu_time_type = type; 349 350 if (force_exec || (coex_dm->pre_ampdu_time_type != 351 coex_dm->cur_ampdu_time_type)) { 352 switch (coex_dm->cur_ampdu_time_type) { 353 case 0: /* normal mode */ 354 btcoexist->btc_write_1byte(btcoexist, 0x456, 355 coex_dm->backup_ampdu_maxtime); 356 break; 357 case 1: /* AMPDU time = 0x38 * 32us */ 358 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38); 359 break; 360 default: 361 break; 362 } 363 } 364 365 coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; 366 } 367 368 static void btc8192e2ant_limited_tx(struct btc_coexist *btcoexist, 369 bool force_exec, u8 ra_mask_type, 370 u8 arfr_type, u8 retry_limit_type, 371 u8 ampdu_time_type) 372 { 373 u32 dis_ra_mask = 0x0; 374 375 coex_dm->cur_ra_mask_type = ra_mask_type; 376 dis_ra_mask = 377 btc8192e2ant_decide_ra_mask(btcoexist, coex_dm->cur_ss_type, 378 ra_mask_type); 379 btc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask); 380 btc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec, arfr_type); 381 btc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type); 382 btc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdu_time_type); 383 } 384 385 static void btc8192e2ant_limited_rx(struct btc_coexist *btcoexist, 386 bool force_exec, bool rej_ap_agg_pkt, 387 bool bt_ctrl_agg_buf_size, 388 u8 agg_buf_size) 389 { 390 bool reject_rx_agg = rej_ap_agg_pkt; 391 bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; 392 u8 rx_agg_size = agg_buf_size; 393 394 /********************************************* 395 * Rx Aggregation related setting 396 *********************************************/ 397 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, 398 &reject_rx_agg); 399 /* decide BT control aggregation buf size or not */ 400 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, 401 &bt_ctrl_rx_agg_size); 402 /* aggregation buf size, only work 403 * when BT control Rx aggregation size. 404 */ 405 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); 406 /* real update aggregation setting */ 407 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); 408 } 409 410 static void btc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist) 411 { 412 struct rtl_priv *rtlpriv = btcoexist->adapter; 413 u32 reg_hp_txrx, reg_lp_txrx, u32tmp; 414 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; 415 416 reg_hp_txrx = 0x770; 417 reg_lp_txrx = 0x774; 418 419 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); 420 reg_hp_tx = u32tmp & MASKLWORD; 421 reg_hp_rx = (u32tmp & MASKHWORD) >> 16; 422 423 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); 424 reg_lp_tx = u32tmp & MASKLWORD; 425 reg_lp_rx = (u32tmp & MASKHWORD) >> 16; 426 427 coex_sta->high_priority_tx = reg_hp_tx; 428 coex_sta->high_priority_rx = reg_hp_rx; 429 coex_sta->low_priority_tx = reg_lp_tx; 430 coex_sta->low_priority_rx = reg_lp_rx; 431 432 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 433 "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 434 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); 435 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 436 "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 437 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); 438 439 /* reset counter */ 440 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); 441 } 442 443 static void btc8192e2ant_query_bt_info(struct btc_coexist *btcoexist) 444 { 445 struct rtl_priv *rtlpriv = btcoexist->adapter; 446 u8 h2c_parameter[1] = {0}; 447 448 coex_sta->c2h_bt_info_req_sent = true; 449 450 h2c_parameter[0] |= BIT0; /* trigger */ 451 452 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 453 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n", 454 h2c_parameter[0]); 455 456 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); 457 } 458 459 static 460 bool btc8192e2ant_is_wifi_status_changed(struct btc_coexist *btcoexist) 461 { 462 static bool pre_wifi_busy = false, pre_under_4way = false, 463 pre_bt_hs_on = false; 464 bool wifi_busy = false, under_4way = false, bt_hs_on = false; 465 bool wifi_connected = false; 466 467 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 468 &wifi_connected); 469 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 470 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 471 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, 472 &under_4way); 473 474 if (wifi_connected) { 475 if (wifi_busy != pre_wifi_busy) { 476 pre_wifi_busy = wifi_busy; 477 return true; 478 } 479 if (under_4way != pre_under_4way) { 480 pre_under_4way = under_4way; 481 return true; 482 } 483 if (bt_hs_on != pre_bt_hs_on) { 484 pre_bt_hs_on = bt_hs_on; 485 return true; 486 } 487 } 488 489 return false; 490 } 491 492 static void btc8192e2ant_update_bt_link_info(struct btc_coexist *btcoexist) 493 { 494 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 495 bool bt_hs_on = false; 496 497 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 498 499 bt_link_info->bt_link_exist = coex_sta->bt_link_exist; 500 bt_link_info->sco_exist = coex_sta->sco_exist; 501 bt_link_info->a2dp_exist = coex_sta->a2dp_exist; 502 bt_link_info->pan_exist = coex_sta->pan_exist; 503 bt_link_info->hid_exist = coex_sta->hid_exist; 504 505 /* work around for HS mode. */ 506 if (bt_hs_on) { 507 bt_link_info->pan_exist = true; 508 bt_link_info->bt_link_exist = true; 509 } 510 511 /* check if Sco only */ 512 if (bt_link_info->sco_exist && 513 !bt_link_info->a2dp_exist && 514 !bt_link_info->pan_exist && 515 !bt_link_info->hid_exist) 516 bt_link_info->sco_only = true; 517 else 518 bt_link_info->sco_only = false; 519 520 /* check if A2dp only */ 521 if (!bt_link_info->sco_exist && 522 bt_link_info->a2dp_exist && 523 !bt_link_info->pan_exist && 524 !bt_link_info->hid_exist) 525 bt_link_info->a2dp_only = true; 526 else 527 bt_link_info->a2dp_only = false; 528 529 /* check if Pan only */ 530 if (!bt_link_info->sco_exist && 531 !bt_link_info->a2dp_exist && 532 bt_link_info->pan_exist && 533 !bt_link_info->hid_exist) 534 bt_link_info->pan_only = true; 535 else 536 bt_link_info->pan_only = false; 537 538 /* check if Hid only */ 539 if (!bt_link_info->sco_exist && 540 !bt_link_info->a2dp_exist && 541 !bt_link_info->pan_exist && 542 bt_link_info->hid_exist) 543 bt_link_info->hid_only = true; 544 else 545 bt_link_info->hid_only = false; 546 } 547 548 static u8 btc8192e2ant_action_algorithm(struct btc_coexist *btcoexist) 549 { 550 struct rtl_priv *rtlpriv = btcoexist->adapter; 551 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 552 struct btc_stack_info *stack_info = &btcoexist->stack_info; 553 bool bt_hs_on = false; 554 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED; 555 u8 num_of_diff_profile = 0; 556 557 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 558 559 if (!bt_link_info->bt_link_exist) { 560 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 561 "No BT link exists!!!\n"); 562 return algorithm; 563 } 564 565 if (bt_link_info->sco_exist) 566 num_of_diff_profile++; 567 if (bt_link_info->hid_exist) 568 num_of_diff_profile++; 569 if (bt_link_info->pan_exist) 570 num_of_diff_profile++; 571 if (bt_link_info->a2dp_exist) 572 num_of_diff_profile++; 573 574 if (num_of_diff_profile == 1) { 575 if (bt_link_info->sco_exist) { 576 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 577 "SCO only\n"); 578 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 579 } else { 580 if (bt_link_info->hid_exist) { 581 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 582 "HID only\n"); 583 algorithm = BT_8192E_2ANT_COEX_ALGO_HID; 584 } else if (bt_link_info->a2dp_exist) { 585 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 586 "A2DP only\n"); 587 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP; 588 } else if (bt_link_info->pan_exist) { 589 if (bt_hs_on) { 590 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 591 DBG_LOUD, 592 "PAN(HS) only\n"); 593 algorithm = 594 BT_8192E_2ANT_COEX_ALGO_PANHS; 595 } else { 596 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 597 DBG_LOUD, 598 "PAN(EDR) only\n"); 599 algorithm = 600 BT_8192E_2ANT_COEX_ALGO_PANEDR; 601 } 602 } 603 } 604 } else if (num_of_diff_profile == 2) { 605 if (bt_link_info->sco_exist) { 606 if (bt_link_info->hid_exist) { 607 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 608 "SCO + HID\n"); 609 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 610 } else if (bt_link_info->a2dp_exist) { 611 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 612 "SCO + A2DP ==> SCO\n"); 613 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 614 } else if (bt_link_info->pan_exist) { 615 if (bt_hs_on) { 616 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 617 DBG_LOUD, 618 "SCO + PAN(HS)\n"); 619 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 620 } else { 621 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 622 DBG_LOUD, 623 "SCO + PAN(EDR)\n"); 624 algorithm = 625 BT_8192E_2ANT_COEX_ALGO_SCO_PAN; 626 } 627 } 628 } else { 629 if (bt_link_info->hid_exist && 630 bt_link_info->a2dp_exist) { 631 if (stack_info->num_of_hid >= 2) { 632 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 633 DBG_LOUD, 634 "HID*2 + A2DP\n"); 635 algorithm = 636 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 637 } else { 638 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 639 DBG_LOUD, 640 "HID + A2DP\n"); 641 algorithm = 642 BT_8192E_2ANT_COEX_ALGO_HID_A2DP; 643 } 644 } else if (bt_link_info->hid_exist && 645 bt_link_info->pan_exist) { 646 if (bt_hs_on) { 647 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 648 DBG_LOUD, 649 "HID + PAN(HS)\n"); 650 algorithm = BT_8192E_2ANT_COEX_ALGO_HID; 651 } else { 652 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 653 DBG_LOUD, 654 "HID + PAN(EDR)\n"); 655 algorithm = 656 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 657 } 658 } else if (bt_link_info->pan_exist && 659 bt_link_info->a2dp_exist) { 660 if (bt_hs_on) { 661 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 662 DBG_LOUD, 663 "A2DP + PAN(HS)\n"); 664 algorithm = 665 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS; 666 } else { 667 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 668 DBG_LOUD, 669 "A2DP + PAN(EDR)\n"); 670 algorithm = 671 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP; 672 } 673 } 674 } 675 } else if (num_of_diff_profile == 3) { 676 if (bt_link_info->sco_exist) { 677 if (bt_link_info->hid_exist && 678 bt_link_info->a2dp_exist) { 679 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 680 "SCO + HID + A2DP ==> HID\n"); 681 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 682 } else if (bt_link_info->hid_exist && 683 bt_link_info->pan_exist) { 684 if (bt_hs_on) { 685 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 686 DBG_LOUD, 687 "SCO + HID + PAN(HS)\n"); 688 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 689 } else { 690 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 691 DBG_LOUD, 692 "SCO + HID + PAN(EDR)\n"); 693 algorithm = 694 BT_8192E_2ANT_COEX_ALGO_SCO_PAN; 695 } 696 } else if (bt_link_info->pan_exist && 697 bt_link_info->a2dp_exist) { 698 if (bt_hs_on) { 699 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 700 DBG_LOUD, 701 "SCO + A2DP + PAN(HS)\n"); 702 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 703 } else { 704 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 705 DBG_LOUD, 706 "SCO + A2DP + PAN(EDR)\n"); 707 algorithm = 708 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 709 } 710 } 711 } else { 712 if (bt_link_info->hid_exist && 713 bt_link_info->pan_exist && 714 bt_link_info->a2dp_exist) { 715 if (bt_hs_on) { 716 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 717 DBG_LOUD, 718 "HID + A2DP + PAN(HS)\n"); 719 algorithm = 720 BT_8192E_2ANT_COEX_ALGO_HID_A2DP; 721 } else { 722 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 723 DBG_LOUD, 724 "HID + A2DP + PAN(EDR)\n"); 725 algorithm = 726 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 727 } 728 } 729 } 730 } else if (num_of_diff_profile >= 3) { 731 if (bt_link_info->sco_exist) { 732 if (bt_link_info->hid_exist && 733 bt_link_info->pan_exist && 734 bt_link_info->a2dp_exist) { 735 if (bt_hs_on) { 736 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 737 DBG_LOUD, 738 "ErrorSCO+HID+A2DP+PAN(HS)\n"); 739 740 } else { 741 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 742 DBG_LOUD, 743 "SCO+HID+A2DP+PAN(EDR)\n"); 744 algorithm = 745 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 746 } 747 } 748 } 749 } 750 751 return algorithm; 752 } 753 754 static void btc8192e2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist, 755 u8 dac_swing_lvl) 756 { 757 struct rtl_priv *rtlpriv = btcoexist->adapter; 758 u8 h2c_parameter[1] = {0}; 759 760 /* There are several type of dacswing 761 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 762 */ 763 h2c_parameter[0] = dac_swing_lvl; 764 765 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 766 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl); 767 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 768 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]); 769 770 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); 771 } 772 773 static void btc8192e2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist, 774 u8 dec_bt_pwr_lvl) 775 { 776 struct rtl_priv *rtlpriv = btcoexist->adapter; 777 u8 h2c_parameter[1] = {0}; 778 779 h2c_parameter[0] = dec_bt_pwr_lvl; 780 781 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 782 "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n", 783 dec_bt_pwr_lvl, h2c_parameter[0]); 784 785 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); 786 } 787 788 static void btc8192e2ant_dec_bt_pwr(struct btc_coexist *btcoexist, 789 bool force_exec, u8 dec_bt_pwr_lvl) 790 { 791 struct rtl_priv *rtlpriv = btcoexist->adapter; 792 793 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 794 "[BTCoex], %s Dec BT power level = %d\n", 795 force_exec ? "force to" : "", dec_bt_pwr_lvl); 796 coex_dm->cur_dec_bt_pwr = dec_bt_pwr_lvl; 797 798 if (!force_exec) { 799 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 800 "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n", 801 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr); 802 } 803 btc8192e2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr); 804 805 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr; 806 } 807 808 static void btc8192e2ant_set_bt_auto_report(struct btc_coexist *btcoexist, 809 bool enable_auto_report) 810 { 811 struct rtl_priv *rtlpriv = btcoexist->adapter; 812 u8 h2c_parameter[1] = {0}; 813 814 h2c_parameter[0] = 0; 815 816 if (enable_auto_report) 817 h2c_parameter[0] |= BIT0; 818 819 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 820 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n", 821 (enable_auto_report ? "Enabled!!" : "Disabled!!"), 822 h2c_parameter[0]); 823 824 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); 825 } 826 827 static void btc8192e2ant_bt_auto_report(struct btc_coexist *btcoexist, 828 bool force_exec, 829 bool enable_auto_report) 830 { 831 struct rtl_priv *rtlpriv = btcoexist->adapter; 832 833 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 834 "[BTCoex], %s BT Auto report = %s\n", 835 (force_exec ? "force to" : ""), 836 ((enable_auto_report) ? "Enabled" : "Disabled")); 837 coex_dm->cur_bt_auto_report = enable_auto_report; 838 839 if (!force_exec) { 840 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 841 "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", 842 coex_dm->pre_bt_auto_report, 843 coex_dm->cur_bt_auto_report); 844 845 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) 846 return; 847 } 848 btc8192e2ant_set_bt_auto_report(btcoexist, 849 coex_dm->cur_bt_auto_report); 850 851 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; 852 } 853 854 static void btc8192e2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist, 855 bool force_exec, u8 fw_dac_swing_lvl) 856 { 857 struct rtl_priv *rtlpriv = btcoexist->adapter; 858 859 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 860 "[BTCoex], %s set FW Dac Swing level = %d\n", 861 (force_exec ? "force to" : ""), fw_dac_swing_lvl); 862 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; 863 864 if (!force_exec) { 865 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 866 "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", 867 coex_dm->pre_fw_dac_swing_lvl, 868 coex_dm->cur_fw_dac_swing_lvl); 869 870 if (coex_dm->pre_fw_dac_swing_lvl == 871 coex_dm->cur_fw_dac_swing_lvl) 872 return; 873 } 874 875 btc8192e2ant_set_fw_dac_swing_level(btcoexist, 876 coex_dm->cur_fw_dac_swing_lvl); 877 878 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; 879 } 880 881 static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist, 882 bool rx_rf_shrink_on) 883 { 884 struct rtl_priv *rtlpriv = btcoexist->adapter; 885 886 if (rx_rf_shrink_on) { 887 /* Shrink RF Rx LPF corner */ 888 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 889 "[BTCoex], Shrink RF Rx LPF corner!!\n"); 890 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 891 0xfffff, 0xffffc); 892 } else { 893 /* Resume RF Rx LPF corner 894 * After initialized, we can use coex_dm->btRf0x1eBackup 895 */ 896 if (btcoexist->initilized) { 897 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 898 "[BTCoex], Resume RF Rx LPF corner!!\n"); 899 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 900 0xfffff, 901 coex_dm->bt_rf0x1e_backup); 902 } 903 } 904 } 905 906 static void btc8192e2ant_rf_shrink(struct btc_coexist *btcoexist, 907 bool force_exec, bool rx_rf_shrink_on) 908 { 909 struct rtl_priv *rtlpriv = btcoexist->adapter; 910 911 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 912 "[BTCoex], %s turn Rx RF Shrink = %s\n", 913 (force_exec ? "force to" : ""), 914 ((rx_rf_shrink_on) ? "ON" : "OFF")); 915 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; 916 917 if (!force_exec) { 918 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 919 "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n", 920 coex_dm->pre_rf_rx_lpf_shrink, 921 coex_dm->cur_rf_rx_lpf_shrink); 922 923 if (coex_dm->pre_rf_rx_lpf_shrink == 924 coex_dm->cur_rf_rx_lpf_shrink) 925 return; 926 } 927 btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist, 928 coex_dm->cur_rf_rx_lpf_shrink); 929 930 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; 931 } 932 933 static void btc8192e2ant_set_dac_swing_reg(struct btc_coexist *btcoexist, 934 u32 level) 935 { 936 struct rtl_priv *rtlpriv = btcoexist->adapter; 937 u8 val = (u8)level; 938 939 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 940 "[BTCoex], Write SwDacSwing = 0x%x\n", level); 941 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val); 942 } 943 944 static void btc8192e2ant_set_sw_full_swing(struct btc_coexist *btcoexist, 945 bool sw_dac_swing_on, 946 u32 sw_dac_swing_lvl) 947 { 948 if (sw_dac_swing_on) 949 btc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); 950 else 951 btc8192e2ant_set_dac_swing_reg(btcoexist, 0x18); 952 } 953 954 static void btc8192e2ant_dac_swing(struct btc_coexist *btcoexist, 955 bool force_exec, bool dac_swing_on, 956 u32 dac_swing_lvl) 957 { 958 struct rtl_priv *rtlpriv = btcoexist->adapter; 959 960 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 961 "[BTCoex], %s turn DacSwing=%s, dac_swing_lvl = 0x%x\n", 962 (force_exec ? "force to" : ""), 963 ((dac_swing_on) ? "ON" : "OFF"), dac_swing_lvl); 964 coex_dm->cur_dac_swing_on = dac_swing_on; 965 coex_dm->cur_dac_swing_lvl = dac_swing_lvl; 966 967 if (!force_exec) { 968 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 969 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ", 970 coex_dm->pre_dac_swing_on, 971 coex_dm->pre_dac_swing_lvl); 972 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 973 "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n", 974 coex_dm->cur_dac_swing_on, 975 coex_dm->cur_dac_swing_lvl); 976 977 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && 978 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl)) 979 return; 980 } 981 mdelay(30); 982 btc8192e2ant_set_sw_full_swing(btcoexist, dac_swing_on, dac_swing_lvl); 983 984 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; 985 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; 986 } 987 988 static void btc8192e2ant_set_agc_table(struct btc_coexist *btcoexist, 989 bool agc_table_en) 990 { 991 struct rtl_priv *rtlpriv = btcoexist->adapter; 992 993 /* BB AGC Gain Table */ 994 if (agc_table_en) { 995 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 996 "[BTCoex], BB Agc Table On!\n"); 997 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001); 998 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001); 999 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001); 1000 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001); 1001 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001); 1002 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001); 1003 } else { 1004 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1005 "[BTCoex], BB Agc Table Off!\n"); 1006 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001); 1007 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001); 1008 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001); 1009 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001); 1010 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001); 1011 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001); 1012 } 1013 } 1014 1015 static void btc8192e2ant_agc_table(struct btc_coexist *btcoexist, 1016 bool force_exec, bool agc_table_en) 1017 { 1018 struct rtl_priv *rtlpriv = btcoexist->adapter; 1019 1020 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1021 "[BTCoex], %s %s Agc Table\n", 1022 (force_exec ? "force to" : ""), 1023 ((agc_table_en) ? "Enable" : "Disable")); 1024 coex_dm->cur_agc_table_en = agc_table_en; 1025 1026 if (!force_exec) { 1027 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1028 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", 1029 coex_dm->pre_agc_table_en, 1030 coex_dm->cur_agc_table_en); 1031 1032 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) 1033 return; 1034 } 1035 btc8192e2ant_set_agc_table(btcoexist, agc_table_en); 1036 1037 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; 1038 } 1039 1040 static void btc8192e2ant_set_coex_table(struct btc_coexist *btcoexist, 1041 u32 val0x6c0, u32 val0x6c4, 1042 u32 val0x6c8, u8 val0x6cc) 1043 { 1044 struct rtl_priv *rtlpriv = btcoexist->adapter; 1045 1046 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1047 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0); 1048 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); 1049 1050 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1051 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4); 1052 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); 1053 1054 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1055 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8); 1056 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); 1057 1058 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1059 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc); 1060 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); 1061 } 1062 1063 static void btc8192e2ant_coex_table(struct btc_coexist *btcoexist, 1064 bool force_exec, u32 val0x6c0, u32 val0x6c4, 1065 u32 val0x6c8, u8 val0x6cc) 1066 { 1067 struct rtl_priv *rtlpriv = btcoexist->adapter; 1068 1069 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1070 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ", 1071 (force_exec ? "force to" : ""), val0x6c0); 1072 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1073 "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n", 1074 val0x6c4, val0x6c8, val0x6cc); 1075 coex_dm->cur_val0x6c0 = val0x6c0; 1076 coex_dm->cur_val0x6c4 = val0x6c4; 1077 coex_dm->cur_val0x6c8 = val0x6c8; 1078 coex_dm->cur_val0x6cc = val0x6cc; 1079 1080 if (!force_exec) { 1081 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1082 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ", 1083 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4); 1084 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1085 "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n", 1086 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc); 1087 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1088 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x\n", 1089 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4); 1090 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1091 "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n", 1092 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc); 1093 1094 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && 1095 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && 1096 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && 1097 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) 1098 return; 1099 } 1100 btc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, 1101 val0x6cc); 1102 1103 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; 1104 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; 1105 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; 1106 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; 1107 } 1108 1109 static void btc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist, 1110 bool force_exec, u8 type) 1111 { 1112 switch (type) { 1113 case 0: 1114 btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 1115 0x5a5a5a5a, 0xffffff, 0x3); 1116 break; 1117 case 1: 1118 btc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a, 1119 0x5a5a5a5a, 0xffffff, 0x3); 1120 break; 1121 case 2: 1122 btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 1123 0x5ffb5ffb, 0xffffff, 0x3); 1124 break; 1125 case 3: 1126 btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff, 1127 0x5fdb5fdb, 0xffffff, 0x3); 1128 break; 1129 case 4: 1130 btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff, 1131 0x5ffb5ffb, 0xffffff, 0x3); 1132 break; 1133 default: 1134 break; 1135 } 1136 } 1137 1138 static void btc8192e2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist, 1139 bool enable) 1140 { 1141 struct rtl_priv *rtlpriv = btcoexist->adapter; 1142 u8 h2c_parameter[1] = {0}; 1143 1144 if (enable) 1145 h2c_parameter[0] |= BIT0; /* function enable */ 1146 1147 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1148 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n", 1149 h2c_parameter[0]); 1150 1151 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); 1152 } 1153 1154 static void btc8192e2ant_ignore_wlan_act(struct btc_coexist *btcoexist, 1155 bool force_exec, bool enable) 1156 { 1157 struct rtl_priv *rtlpriv = btcoexist->adapter; 1158 1159 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1160 "[BTCoex], %s turn Ignore WlanAct %s\n", 1161 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF")); 1162 coex_dm->cur_ignore_wlan_act = enable; 1163 1164 if (!force_exec) { 1165 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1166 "[BTCoex], bPreIgnoreWlanAct = %d ", 1167 coex_dm->pre_ignore_wlan_act); 1168 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1169 "bCurIgnoreWlanAct = %d!!\n", 1170 coex_dm->cur_ignore_wlan_act); 1171 1172 if (coex_dm->pre_ignore_wlan_act == 1173 coex_dm->cur_ignore_wlan_act) 1174 return; 1175 } 1176 btc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable); 1177 1178 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; 1179 } 1180 1181 static void btc8192e2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1, 1182 u8 byte2, u8 byte3, u8 byte4, u8 byte5) 1183 { 1184 struct rtl_priv *rtlpriv = btcoexist->adapter; 1185 1186 u8 h2c_parameter[5] = {0}; 1187 1188 h2c_parameter[0] = byte1; 1189 h2c_parameter[1] = byte2; 1190 h2c_parameter[2] = byte3; 1191 h2c_parameter[3] = byte4; 1192 h2c_parameter[4] = byte5; 1193 1194 coex_dm->ps_tdma_para[0] = byte1; 1195 coex_dm->ps_tdma_para[1] = byte2; 1196 coex_dm->ps_tdma_para[2] = byte3; 1197 coex_dm->ps_tdma_para[3] = byte4; 1198 coex_dm->ps_tdma_para[4] = byte5; 1199 1200 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1201 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n", 1202 h2c_parameter[0], 1203 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 | 1204 h2c_parameter[3] << 8 | h2c_parameter[4]); 1205 1206 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); 1207 } 1208 1209 static void btc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist, 1210 bool shrink_rx_lpf, bool low_penalty_ra, 1211 bool limited_dig, bool btlan_constrain) 1212 { 1213 btc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); 1214 } 1215 1216 static void btc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist, 1217 bool agc_table_shift, bool adc_backoff, 1218 bool sw_dac_swing, u32 dac_swing_lvl) 1219 { 1220 btc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); 1221 btc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, 1222 dac_swing_lvl); 1223 } 1224 1225 static void btc8192e2ant_ps_tdma(struct btc_coexist *btcoexist, 1226 bool force_exec, bool turn_on, u8 type) 1227 { 1228 struct rtl_priv *rtlpriv = btcoexist->adapter; 1229 1230 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1231 "[BTCoex], %s turn %s PS TDMA, type=%d\n", 1232 (force_exec ? "force to" : ""), 1233 (turn_on ? "ON" : "OFF"), type); 1234 coex_dm->cur_ps_tdma_on = turn_on; 1235 coex_dm->cur_ps_tdma = type; 1236 1237 if (!force_exec) { 1238 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1239 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", 1240 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on); 1241 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1242 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", 1243 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma); 1244 1245 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && 1246 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) 1247 return; 1248 } 1249 if (turn_on) { 1250 switch (type) { 1251 case 1: 1252 default: 1253 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1254 0x1a, 0xe1, 0x90); 1255 break; 1256 case 2: 1257 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1258 0x12, 0xe1, 0x90); 1259 break; 1260 case 3: 1261 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1262 0x3, 0xf1, 0x90); 1263 break; 1264 case 4: 1265 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10, 1266 0x3, 0xf1, 0x90); 1267 break; 1268 case 5: 1269 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1270 0x1a, 0x60, 0x90); 1271 break; 1272 case 6: 1273 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1274 0x12, 0x60, 0x90); 1275 break; 1276 case 7: 1277 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1278 0x3, 0x70, 0x90); 1279 break; 1280 case 8: 1281 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10, 1282 0x3, 0x70, 0x90); 1283 break; 1284 case 9: 1285 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1286 0x1a, 0xe1, 0x10); 1287 break; 1288 case 10: 1289 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1290 0x12, 0xe1, 0x10); 1291 break; 1292 case 11: 1293 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1294 0x3, 0xf1, 0x10); 1295 break; 1296 case 12: 1297 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10, 1298 0x3, 0xf1, 0x10); 1299 break; 1300 case 13: 1301 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1302 0x1a, 0xe0, 0x10); 1303 break; 1304 case 14: 1305 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1306 0x12, 0xe0, 0x10); 1307 break; 1308 case 15: 1309 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1310 0x3, 0xf0, 0x10); 1311 break; 1312 case 16: 1313 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1314 0x3, 0xf0, 0x10); 1315 break; 1316 case 17: 1317 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x61, 0x20, 1318 0x03, 0x10, 0x10); 1319 break; 1320 case 18: 1321 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5, 1322 0x5, 0xe1, 0x90); 1323 break; 1324 case 19: 1325 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25, 1326 0x25, 0xe1, 0x90); 1327 break; 1328 case 20: 1329 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25, 1330 0x25, 0x60, 0x90); 1331 break; 1332 case 21: 1333 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15, 1334 0x03, 0x70, 0x90); 1335 break; 1336 case 71: 1337 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1338 0x1a, 0xe1, 0x90); 1339 break; 1340 } 1341 } else { 1342 /* disable PS tdma */ 1343 switch (type) { 1344 default: 1345 case 0: 1346 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0, 0x0, 1347 0x0, 0x0); 1348 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); 1349 break; 1350 case 1: 1351 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0, 1352 0x8, 0x0); 1353 mdelay(5); 1354 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); 1355 break; 1356 } 1357 } 1358 1359 /* update pre state */ 1360 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; 1361 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; 1362 } 1363 1364 static void btc8192e2ant_set_switch_ss_type(struct btc_coexist *btcoexist, 1365 u8 ss_type) 1366 { 1367 struct rtl_priv *rtlpriv = btcoexist->adapter; 1368 u8 mimops = BTC_MIMO_PS_DYNAMIC; 1369 u32 dis_ra_mask = 0x0; 1370 1371 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1372 "[BTCoex], REAL set SS Type = %d\n", ss_type); 1373 1374 dis_ra_mask = btc8192e2ant_decide_ra_mask(btcoexist, ss_type, 1375 coex_dm->cur_ra_mask_type); 1376 btc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask); 1377 1378 if (ss_type == 1) { 1379 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1380 /* switch ofdm path */ 1381 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11); 1382 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1); 1383 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111); 1384 /* switch cck patch */ 1385 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); 1386 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); 1387 mimops = BTC_MIMO_PS_STATIC; 1388 } else if (ss_type == 2) { 1389 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); 1390 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33); 1391 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3); 1392 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313); 1393 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); 1394 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); 1395 mimops = BTC_MIMO_PS_DYNAMIC; 1396 } 1397 /* set rx 1ss or 2ss */ 1398 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops); 1399 } 1400 1401 static void btc8192e2ant_switch_ss_type(struct btc_coexist *btcoexist, 1402 bool force_exec, u8 new_ss_type) 1403 { 1404 struct rtl_priv *rtlpriv = btcoexist->adapter; 1405 1406 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1407 "[BTCoex], %s Switch SS Type = %d\n", 1408 (force_exec ? "force to" : ""), new_ss_type); 1409 coex_dm->cur_ss_type = new_ss_type; 1410 1411 if (!force_exec) { 1412 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type) 1413 return; 1414 } 1415 btc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type); 1416 1417 coex_dm->pre_ss_type = coex_dm->cur_ss_type; 1418 } 1419 1420 static void btc8192e2ant_coex_all_off(struct btc_coexist *btcoexist) 1421 { 1422 /* fw all off */ 1423 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1424 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1425 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1426 1427 /* sw all off */ 1428 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1429 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1430 1431 /* hw all off */ 1432 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); 1433 } 1434 1435 static void btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist) 1436 { 1437 /* force to reset coex mechanism */ 1438 1439 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1440 btc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); 1441 btc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); 1442 1443 btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); 1444 btc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2); 1445 1446 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1447 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1448 } 1449 1450 static void btc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist) 1451 { 1452 bool low_pwr_disable = true; 1453 1454 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1455 &low_pwr_disable); 1456 1457 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1458 1459 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 1460 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); 1461 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1462 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1463 1464 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1465 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1466 } 1467 1468 static bool btc8192e2ant_is_common_action(struct btc_coexist *btcoexist) 1469 { 1470 struct rtl_priv *rtlpriv = btcoexist->adapter; 1471 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 1472 bool common = false, wifi_connected = false, wifi_busy = false; 1473 bool bt_hs_on = false, low_pwr_disable = false; 1474 1475 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 1476 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 1477 &wifi_connected); 1478 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 1479 1480 if (bt_link_info->sco_exist || bt_link_info->hid_exist) 1481 btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0); 1482 else 1483 btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); 1484 1485 if (!wifi_connected) { 1486 low_pwr_disable = false; 1487 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1488 &low_pwr_disable); 1489 1490 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1491 "[BTCoex], Wifi non-connected idle!!\n"); 1492 1493 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 1494 coex_dm->bt_status) || 1495 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 1496 coex_dm->bt_status)) { 1497 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1498 btc8192e2ant_coex_table_with_type(btcoexist, 1499 NORMAL_EXEC, 1); 1500 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); 1501 } else { 1502 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1503 btc8192e2ant_coex_table_with_type(btcoexist, 1504 NORMAL_EXEC, 0); 1505 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1506 } 1507 1508 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1509 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1510 1511 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, 1512 false); 1513 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 1514 0x18); 1515 1516 common = true; 1517 } else { 1518 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 1519 coex_dm->bt_status) { 1520 low_pwr_disable = false; 1521 btcoexist->btc_set(btcoexist, 1522 BTC_SET_ACT_DISABLE_LOW_POWER, 1523 &low_pwr_disable); 1524 1525 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1526 "Wifi connected + BT non connected-idle!!\n"); 1527 1528 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1529 btc8192e2ant_coex_table_with_type(btcoexist, 1530 NORMAL_EXEC, 1); 1531 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); 1532 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1533 NORMAL_EXEC, 6); 1534 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1535 1536 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 1537 false, false); 1538 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1539 false, 0x18); 1540 1541 common = true; 1542 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 1543 coex_dm->bt_status) { 1544 low_pwr_disable = true; 1545 btcoexist->btc_set(btcoexist, 1546 BTC_SET_ACT_DISABLE_LOW_POWER, 1547 &low_pwr_disable); 1548 1549 if (bt_hs_on) 1550 return false; 1551 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1552 "Wifi connected + BT connected-idle!!\n"); 1553 1554 btc8192e2ant_switch_ss_type(btcoexist, 1555 NORMAL_EXEC, 2); 1556 btc8192e2ant_coex_table_with_type(btcoexist, 1557 NORMAL_EXEC, 1); 1558 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1559 false, 0); 1560 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1561 NORMAL_EXEC, 6); 1562 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1563 1564 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 1565 false, false); 1566 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1567 false, 0x18); 1568 1569 common = true; 1570 } else { 1571 low_pwr_disable = true; 1572 btcoexist->btc_set(btcoexist, 1573 BTC_SET_ACT_DISABLE_LOW_POWER, 1574 &low_pwr_disable); 1575 1576 if (wifi_busy) { 1577 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1578 "Wifi Connected-Busy + BT Busy!!\n"); 1579 common = false; 1580 } else { 1581 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1582 "Wifi Connected-Idle + BT Busy!!\n"); 1583 1584 btc8192e2ant_switch_ss_type(btcoexist, 1585 NORMAL_EXEC, 1); 1586 btc8192e2ant_coex_table_with_type(btcoexist, 1587 NORMAL_EXEC, 1588 2); 1589 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1590 true, 21); 1591 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1592 NORMAL_EXEC, 6); 1593 btc8192e2ant_dec_bt_pwr(btcoexist, 1594 NORMAL_EXEC, 0); 1595 btc8192e2ant_sw_mechanism1(btcoexist, false, 1596 false, false, false); 1597 btc8192e2ant_sw_mechanism2(btcoexist, false, 1598 false, false, 0x18); 1599 common = true; 1600 } 1601 } 1602 } 1603 return common; 1604 } 1605 1606 static void btc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist, 1607 bool sco_hid, bool tx_pause, 1608 u8 max_interval) 1609 { 1610 struct rtl_priv *rtlpriv = btcoexist->adapter; 1611 static int up, dn, m, n, wait_cnt; 1612 /* 0: no change, +1: increase WiFi duration, 1613 * -1: decrease WiFi duration 1614 */ 1615 int result; 1616 u8 retry_cnt = 0; 1617 1618 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1619 "[BTCoex], TdmaDurationAdjust()\n"); 1620 1621 if (!coex_dm->auto_tdma_adjust) { 1622 coex_dm->auto_tdma_adjust = true; 1623 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1624 "[BTCoex], first run TdmaDurationAdjust()!!\n"); 1625 if (sco_hid) { 1626 if (tx_pause) { 1627 if (max_interval == 1) { 1628 btc8192e2ant_ps_tdma(btcoexist, 1629 NORMAL_EXEC, 1630 true, 13); 1631 coex_dm->tdma_adj_type = 13; 1632 } else if (max_interval == 2) { 1633 btc8192e2ant_ps_tdma(btcoexist, 1634 NORMAL_EXEC, 1635 true, 14); 1636 coex_dm->tdma_adj_type = 14; 1637 } else { 1638 btc8192e2ant_ps_tdma(btcoexist, 1639 NORMAL_EXEC, 1640 true, 15); 1641 coex_dm->tdma_adj_type = 15; 1642 } 1643 } else { 1644 if (max_interval == 1) { 1645 btc8192e2ant_ps_tdma(btcoexist, 1646 NORMAL_EXEC, 1647 true, 9); 1648 coex_dm->tdma_adj_type = 9; 1649 } else if (max_interval == 2) { 1650 btc8192e2ant_ps_tdma(btcoexist, 1651 NORMAL_EXEC, 1652 true, 10); 1653 coex_dm->tdma_adj_type = 10; 1654 } else { 1655 btc8192e2ant_ps_tdma(btcoexist, 1656 NORMAL_EXEC, 1657 true, 11); 1658 coex_dm->tdma_adj_type = 11; 1659 } 1660 } 1661 } else { 1662 if (tx_pause) { 1663 if (max_interval == 1) { 1664 btc8192e2ant_ps_tdma(btcoexist, 1665 NORMAL_EXEC, 1666 true, 5); 1667 coex_dm->tdma_adj_type = 5; 1668 } else if (max_interval == 2) { 1669 btc8192e2ant_ps_tdma(btcoexist, 1670 NORMAL_EXEC, 1671 true, 6); 1672 coex_dm->tdma_adj_type = 6; 1673 } else { 1674 btc8192e2ant_ps_tdma(btcoexist, 1675 NORMAL_EXEC, 1676 true, 7); 1677 coex_dm->tdma_adj_type = 7; 1678 } 1679 } else { 1680 if (max_interval == 1) { 1681 btc8192e2ant_ps_tdma(btcoexist, 1682 NORMAL_EXEC, 1683 true, 1); 1684 coex_dm->tdma_adj_type = 1; 1685 } else if (max_interval == 2) { 1686 btc8192e2ant_ps_tdma(btcoexist, 1687 NORMAL_EXEC, 1688 true, 2); 1689 coex_dm->tdma_adj_type = 2; 1690 } else { 1691 btc8192e2ant_ps_tdma(btcoexist, 1692 NORMAL_EXEC, 1693 true, 3); 1694 coex_dm->tdma_adj_type = 3; 1695 } 1696 } 1697 } 1698 1699 up = 0; 1700 dn = 0; 1701 m = 1; 1702 n = 3; 1703 result = 0; 1704 wait_cnt = 0; 1705 } else { 1706 /* accquire the BT TRx retry count from BT_Info byte2 */ 1707 retry_cnt = coex_sta->bt_retry_cnt; 1708 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1709 "[BTCoex], retry_cnt = %d\n", retry_cnt); 1710 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1711 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n", 1712 up, dn, m, n, wait_cnt); 1713 result = 0; 1714 wait_cnt++; 1715 /* no retry in the last 2-second duration */ 1716 if (retry_cnt == 0) { 1717 up++; 1718 dn--; 1719 1720 if (dn <= 0) 1721 dn = 0; 1722 1723 if (up >= n) { 1724 wait_cnt = 0; 1725 n = 3; 1726 up = 0; 1727 dn = 0; 1728 result = 1; 1729 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1730 "[BTCoex]Increase wifi duration!!\n"); 1731 } 1732 } else if (retry_cnt <= 3) { 1733 up--; 1734 dn++; 1735 1736 if (up <= 0) 1737 up = 0; 1738 1739 if (dn == 2) { 1740 if (wait_cnt <= 2) 1741 m++; 1742 else 1743 m = 1; 1744 1745 if (m >= 20) 1746 m = 20; 1747 1748 n = 3 * m; 1749 up = 0; 1750 dn = 0; 1751 wait_cnt = 0; 1752 result = -1; 1753 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1754 "Reduce wifi duration for retry<3\n"); 1755 } 1756 } else { 1757 if (wait_cnt == 1) 1758 m++; 1759 else 1760 m = 1; 1761 1762 if (m >= 20) 1763 m = 20; 1764 1765 n = 3*m; 1766 up = 0; 1767 dn = 0; 1768 wait_cnt = 0; 1769 result = -1; 1770 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1771 "Decrease wifi duration for retryCounter>3!!\n"); 1772 } 1773 1774 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1775 "[BTCoex], max Interval = %d\n", max_interval); 1776 } 1777 1778 /* if current PsTdma not match with 1779 * the recorded one (when scan, dhcp...), 1780 * then we have to adjust it back to the previous record one. 1781 */ 1782 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) { 1783 bool scan = false, link = false, roam = false; 1784 1785 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1786 "[BTCoex], PsTdma type mismatch!!!, "); 1787 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1788 "curPsTdma=%d, recordPsTdma=%d\n", 1789 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type); 1790 1791 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 1792 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 1793 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 1794 1795 if (!scan && !link && !roam) 1796 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1797 true, coex_dm->tdma_adj_type); 1798 else 1799 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1800 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); 1801 } 1802 } 1803 1804 /* SCO only or SCO+PAN(HS) */ 1805 static void btc8192e2ant_action_sco(struct btc_coexist *btcoexist) 1806 { 1807 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 1808 u32 wifi_bw; 1809 1810 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1811 1812 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1813 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1814 1815 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1816 1817 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); 1818 1819 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1820 1821 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1822 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1823 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1824 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); 1825 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1826 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1827 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1828 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1829 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1830 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1831 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1832 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1833 } 1834 1835 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1836 1837 /* sw mechanism */ 1838 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1839 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1840 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1841 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1842 false, false); 1843 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1844 false, 0x6); 1845 } else { 1846 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1847 false, false); 1848 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1849 false, 0x6); 1850 } 1851 } else { 1852 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1853 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1854 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1855 false, false); 1856 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1857 false, 0x6); 1858 } else { 1859 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1860 false, false); 1861 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1862 false, 0x6); 1863 } 1864 } 1865 } 1866 1867 static void btc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist) 1868 { 1869 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 1870 u32 wifi_bw; 1871 1872 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1873 1874 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1875 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1876 1877 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1878 1879 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); 1880 1881 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1882 1883 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1884 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1885 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1886 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); 1887 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1888 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1889 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1890 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 1891 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1892 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1893 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1894 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 1895 } 1896 1897 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1898 1899 /* sw mechanism */ 1900 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1901 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1902 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1903 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1904 false, false); 1905 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1906 false, 0x6); 1907 } else { 1908 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1909 false, false); 1910 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1911 false, 0x6); 1912 } 1913 } else { 1914 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1915 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1916 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1917 false, false); 1918 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1919 false, 0x6); 1920 } else { 1921 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1922 false, false); 1923 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1924 false, 0x6); 1925 } 1926 } 1927 } 1928 1929 static void btc8192e2ant_action_hid(struct btc_coexist *btcoexist) 1930 { 1931 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 1932 u32 wifi_bw; 1933 1934 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1935 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1936 1937 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1938 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1939 1940 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1941 1942 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1943 1944 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 1945 1946 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1947 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1948 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1949 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); 1950 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1951 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1952 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1953 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1954 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1955 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1956 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1957 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1958 } 1959 1960 /* sw mechanism */ 1961 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1962 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1963 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1964 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1965 false, false); 1966 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1967 false, 0x18); 1968 } else { 1969 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1970 false, false); 1971 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1972 false, 0x18); 1973 } 1974 } else { 1975 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1976 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1977 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1978 false, false); 1979 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1980 false, 0x18); 1981 } else { 1982 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1983 false, false); 1984 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1985 false, 0x18); 1986 } 1987 } 1988 } 1989 1990 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ 1991 static void btc8192e2ant_action_a2dp(struct btc_coexist *btcoexist) 1992 { 1993 struct rtl_priv *rtlpriv = btcoexist->adapter; 1994 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 1995 u32 wifi_bw; 1996 bool long_dist = false; 1997 1998 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1999 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2000 2001 if ((bt_rssi_state == BTC_RSSI_STATE_LOW || 2002 bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) && 2003 (wifi_rssi_state == BTC_RSSI_STATE_LOW || 2004 wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2005 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2006 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n"); 2007 long_dist = true; 2008 } 2009 if (long_dist) { 2010 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 2011 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 2012 0x4); 2013 } else { 2014 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2015 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 2016 0x8); 2017 } 2018 2019 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2020 2021 if (long_dist) 2022 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); 2023 else 2024 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2025 2026 if (long_dist) { 2027 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17); 2028 coex_dm->auto_tdma_adjust = false; 2029 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2030 } else { 2031 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2032 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2033 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2034 true, 1); 2035 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2036 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2037 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2038 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2039 false, 1); 2040 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2041 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2042 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2043 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2044 false, 1); 2045 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2046 } 2047 } 2048 2049 /* sw mechanism */ 2050 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2051 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2052 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2053 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2054 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2055 false, false); 2056 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2057 false, 0x18); 2058 } else { 2059 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2060 false, false); 2061 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2062 false, 0x18); 2063 } 2064 } else { 2065 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2066 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2067 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2068 false, false); 2069 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2070 false, 0x18); 2071 } else { 2072 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2073 false, false); 2074 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2075 false, 0x18); 2076 } 2077 } 2078 } 2079 2080 static void btc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist) 2081 { 2082 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2083 u32 wifi_bw; 2084 2085 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2086 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2087 2088 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2089 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2090 2091 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2092 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2093 2094 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2095 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2096 btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2); 2097 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2098 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2099 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2100 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2); 2101 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2102 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2103 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2104 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2); 2105 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2106 } 2107 2108 /* sw mechanism */ 2109 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2110 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2111 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2112 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2113 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2114 false, false); 2115 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2116 true, 0x6); 2117 } else { 2118 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2119 false, false); 2120 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2121 true, 0x6); 2122 } 2123 } else { 2124 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2125 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2126 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2127 false, false); 2128 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2129 true, 0x6); 2130 } else { 2131 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2132 false, false); 2133 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2134 true, 0x6); 2135 } 2136 } 2137 } 2138 2139 static void btc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist) 2140 { 2141 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2142 u32 wifi_bw; 2143 2144 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2145 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2146 2147 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2148 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2149 2150 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2151 2152 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2153 2154 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2155 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2156 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2157 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); 2158 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2159 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2160 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2161 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); 2162 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2163 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2164 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2165 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); 2166 } 2167 2168 /* sw mechanism */ 2169 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2170 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2171 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2172 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2173 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2174 false, false); 2175 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2176 false, 0x18); 2177 } else { 2178 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2179 false, false); 2180 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2181 false, 0x18); 2182 } 2183 } else { 2184 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2185 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2186 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2187 false, false); 2188 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2189 false, 0x18); 2190 } else { 2191 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2192 false, false); 2193 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2194 false, 0x18); 2195 } 2196 } 2197 } 2198 2199 /* PAN(HS) only */ 2200 static void btc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist) 2201 { 2202 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2203 u32 wifi_bw; 2204 2205 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2206 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2207 2208 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2209 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2210 2211 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2212 2213 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2214 2215 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2216 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2217 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2218 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2219 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2220 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2221 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2222 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2223 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2224 } 2225 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 2226 2227 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2228 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2229 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2230 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2231 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2232 false, false); 2233 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2234 false, 0x18); 2235 } else { 2236 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2237 false, false); 2238 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2239 false, 0x18); 2240 } 2241 } else { 2242 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2243 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2244 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2245 false, false); 2246 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2247 false, 0x18); 2248 } else { 2249 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2250 false, false); 2251 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2252 false, 0x18); 2253 } 2254 } 2255 } 2256 2257 /* PAN(EDR)+A2DP */ 2258 static void btc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist) 2259 { 2260 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2261 u32 wifi_bw; 2262 2263 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2264 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2265 2266 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2267 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2268 2269 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2270 2271 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2272 2273 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2274 2275 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2276 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2277 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2278 btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3); 2279 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2280 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2281 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2282 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3); 2283 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2284 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2285 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2286 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3); 2287 } 2288 2289 /* sw mechanism */ 2290 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2291 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2292 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2293 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2294 false, false); 2295 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2296 false, 0x18); 2297 } else { 2298 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2299 false, false); 2300 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2301 false, 0x18); 2302 } 2303 } else { 2304 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2305 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2306 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2307 false, false); 2308 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2309 false, 0x18); 2310 } else { 2311 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2312 false, false); 2313 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2314 false, 0x18); 2315 } 2316 } 2317 } 2318 2319 static void btc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist) 2320 { 2321 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2322 u32 wifi_bw; 2323 2324 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2325 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2326 2327 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2328 2329 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2330 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2331 2332 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2333 2334 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2335 2336 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2337 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2338 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2339 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); 2340 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2341 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2342 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2343 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 2344 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2345 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2346 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2347 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2348 true, 10); 2349 } 2350 2351 /* sw mechanism */ 2352 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2353 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2354 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2355 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2356 false, false); 2357 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2358 false, 0x18); 2359 } else { 2360 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2361 false, false); 2362 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2363 false, 0x18); 2364 } 2365 } else { 2366 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2367 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2368 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2369 false, false); 2370 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2371 false, 0x18); 2372 } else { 2373 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2374 false, false); 2375 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2376 false, 0x18); 2377 } 2378 } 2379 } 2380 2381 /* HID+A2DP+PAN(EDR) */ 2382 static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist) 2383 { 2384 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2385 u32 wifi_bw; 2386 2387 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2388 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2389 2390 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2391 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2392 2393 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2394 2395 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2396 2397 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2398 2399 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2400 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2401 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2402 btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3); 2403 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2404 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2405 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2406 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); 2407 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2408 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2409 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2410 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); 2411 } 2412 2413 /* sw mechanism */ 2414 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2415 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2416 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2417 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2418 false, false); 2419 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2420 false, 0x18); 2421 } else { 2422 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2423 false, false); 2424 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2425 false, 0x18); 2426 } 2427 } else { 2428 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2429 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2430 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2431 false, false); 2432 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2433 false, 0x18); 2434 } else { 2435 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2436 false, false); 2437 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2438 false, 0x18); 2439 } 2440 } 2441 } 2442 2443 static void btc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist) 2444 { 2445 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2446 u32 wifi_bw; 2447 2448 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2449 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2450 2451 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2452 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2453 2454 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2455 2456 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2457 2458 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2459 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2460 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2461 btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2); 2462 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2463 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2464 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2465 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); 2466 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2467 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2468 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2469 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); 2470 } 2471 2472 /* sw mechanism */ 2473 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2474 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2475 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2476 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2477 false, false); 2478 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2479 false, 0x18); 2480 } else { 2481 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2482 false, false); 2483 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2484 false, 0x18); 2485 } 2486 } else { 2487 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2488 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2489 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2490 false, false); 2491 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2492 false, 0x18); 2493 } else { 2494 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2495 false, false); 2496 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2497 false, 0x18); 2498 } 2499 } 2500 } 2501 2502 static void btc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist) 2503 { 2504 struct rtl_priv *rtlpriv = btcoexist->adapter; 2505 u8 algorithm = 0; 2506 2507 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2508 "[BTCoex], RunCoexistMechanism()===>\n"); 2509 2510 if (btcoexist->manual_control) { 2511 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2512 "[BTCoex], return for Manual CTRL <===\n"); 2513 return; 2514 } 2515 2516 if (coex_sta->under_ips) { 2517 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2518 "[BTCoex], wifi is under IPS !!!\n"); 2519 return; 2520 } 2521 2522 algorithm = btc8192e2ant_action_algorithm(btcoexist); 2523 if (coex_sta->c2h_bt_inquiry_page && 2524 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) { 2525 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2526 "[BTCoex], BT is under inquiry/page scan !!\n"); 2527 btc8192e2ant_action_bt_inquiry(btcoexist); 2528 return; 2529 } 2530 2531 coex_dm->cur_algorithm = algorithm; 2532 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2533 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm); 2534 2535 if (btc8192e2ant_is_common_action(btcoexist)) { 2536 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2537 "[BTCoex], Action 2-Ant common\n"); 2538 coex_dm->auto_tdma_adjust = false; 2539 } else { 2540 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { 2541 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2542 "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n", 2543 coex_dm->pre_algorithm, 2544 coex_dm->cur_algorithm); 2545 coex_dm->auto_tdma_adjust = false; 2546 } 2547 switch (coex_dm->cur_algorithm) { 2548 case BT_8192E_2ANT_COEX_ALGO_SCO: 2549 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2550 "Action 2-Ant, algorithm = SCO\n"); 2551 btc8192e2ant_action_sco(btcoexist); 2552 break; 2553 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN: 2554 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2555 "Action 2-Ant, algorithm = SCO+PAN(EDR)\n"); 2556 btc8192e2ant_action_sco_pan(btcoexist); 2557 break; 2558 case BT_8192E_2ANT_COEX_ALGO_HID: 2559 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2560 "Action 2-Ant, algorithm = HID\n"); 2561 btc8192e2ant_action_hid(btcoexist); 2562 break; 2563 case BT_8192E_2ANT_COEX_ALGO_A2DP: 2564 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2565 "Action 2-Ant, algorithm = A2DP\n"); 2566 btc8192e2ant_action_a2dp(btcoexist); 2567 break; 2568 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS: 2569 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2570 "Action 2-Ant, algorithm = A2DP+PAN(HS)\n"); 2571 btc8192e2ant_action_a2dp_pan_hs(btcoexist); 2572 break; 2573 case BT_8192E_2ANT_COEX_ALGO_PANEDR: 2574 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2575 "Action 2-Ant, algorithm = PAN(EDR)\n"); 2576 btc8192e2ant_action_pan_edr(btcoexist); 2577 break; 2578 case BT_8192E_2ANT_COEX_ALGO_PANHS: 2579 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2580 "Action 2-Ant, algorithm = HS mode\n"); 2581 btc8192e2ant_action_pan_hs(btcoexist); 2582 break; 2583 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP: 2584 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2585 "Action 2-Ant, algorithm = PAN+A2DP\n"); 2586 btc8192e2ant_action_pan_edr_a2dp(btcoexist); 2587 break; 2588 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID: 2589 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2590 "Action 2-Ant, algorithm = PAN(EDR)+HID\n"); 2591 btc8192e2ant_action_pan_edr_hid(btcoexist); 2592 break; 2593 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR: 2594 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2595 "Action 2-Ant, algorithm = HID+A2DP+PAN\n"); 2596 btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist); 2597 break; 2598 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP: 2599 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2600 "Action 2-Ant, algorithm = HID+A2DP\n"); 2601 btc8192e2ant_action_hid_a2dp(btcoexist); 2602 break; 2603 default: 2604 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2605 "Action 2-Ant, algorithm = unknown!!\n"); 2606 /* btc8192e2ant_coex_all_off(btcoexist); */ 2607 break; 2608 } 2609 coex_dm->pre_algorithm = coex_dm->cur_algorithm; 2610 } 2611 } 2612 2613 static void btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist, 2614 bool backup) 2615 { 2616 struct rtl_priv *rtlpriv = btcoexist->adapter; 2617 u16 u16tmp = 0; 2618 u8 u8tmp = 0; 2619 2620 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2621 "[BTCoex], 2Ant Init HW Config!!\n"); 2622 2623 if (backup) { 2624 /* backup rf 0x1e value */ 2625 coex_dm->bt_rf0x1e_backup = 2626 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 2627 0x1e, 0xfffff); 2628 2629 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, 2630 0x430); 2631 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, 2632 0x434); 2633 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( 2634 btcoexist, 2635 0x42a); 2636 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte( 2637 btcoexist, 2638 0x456); 2639 } 2640 2641 /* antenna sw ctrl to bt */ 2642 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6); 2643 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24); 2644 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700); 2645 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); 2646 if (btcoexist->chip_interface == BTC_INTF_USB) 2647 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); 2648 else 2649 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); 2650 2651 btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); 2652 2653 /* antenna switch control parameter */ 2654 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); 2655 2656 /* coex parameters */ 2657 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); 2658 /* 0x790[5:0] = 0x5 */ 2659 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); 2660 u8tmp &= 0xc0; 2661 u8tmp |= 0x5; 2662 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); 2663 2664 /* enable counter statistics */ 2665 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); 2666 2667 /* enable PTA */ 2668 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); 2669 /* enable mailbox interface */ 2670 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40); 2671 u16tmp |= BIT9; 2672 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp); 2673 2674 /* enable PTA I2C mailbox */ 2675 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101); 2676 u8tmp |= BIT4; 2677 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp); 2678 2679 /* enable bt clock when wifi is disabled. */ 2680 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93); 2681 u8tmp |= BIT0; 2682 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp); 2683 /* enable bt clock when suspend. */ 2684 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); 2685 u8tmp |= BIT0; 2686 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); 2687 } 2688 2689 /************************************************************ 2690 * extern function start with ex_btc8192e2ant_ 2691 ************************************************************/ 2692 2693 void ex_btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist) 2694 { 2695 btc8192e2ant_init_hwconfig(btcoexist, true); 2696 } 2697 2698 void ex_btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist) 2699 { 2700 struct rtl_priv *rtlpriv = btcoexist->adapter; 2701 2702 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2703 "[BTCoex], Coex Mechanism Init!!\n"); 2704 btc8192e2ant_init_coex_dm(btcoexist); 2705 } 2706 2707 void ex_btc8192e2ant_display_coex_info(struct btc_coexist *btcoexist, 2708 struct seq_file *m) 2709 { 2710 struct btc_board_info *board_info = &btcoexist->board_info; 2711 struct btc_stack_info *stack_info = &btcoexist->stack_info; 2712 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; 2713 u16 u16tmp[4]; 2714 u32 u32tmp[4]; 2715 bool roam = false, scan = false, link = false, wifi_under_5g = false; 2716 bool bt_hs_on = false, wifi_busy = false; 2717 int wifi_rssi = 0, bt_hs_rssi = 0; 2718 u32 wifi_bw, wifi_traffic_dir; 2719 u8 wifi_dot11_chnl, wifi_hs_chnl; 2720 u32 fw_ver = 0, bt_patch_ver = 0; 2721 2722 seq_puts(m, "\n ============[BT Coexist info]============"); 2723 2724 if (btcoexist->manual_control) { 2725 seq_puts(m, "\n ===========[Under Manual Control]==========="); 2726 seq_puts(m, "\n =========================================="); 2727 } 2728 2729 seq_printf(m, "\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", 2730 board_info->pg_ant_num, board_info->btdm_ant_num); 2731 2732 seq_printf(m, "\n %-35s = %s / %d", "BT stack/ hci ext ver", 2733 ((stack_info->profile_notified) ? "Yes" : "No"), 2734 stack_info->hci_version); 2735 2736 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); 2737 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 2738 seq_printf(m, "\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", 2739 "CoexVer/ FwVer/ PatchVer", 2740 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, 2741 fw_ver, bt_patch_ver, bt_patch_ver); 2742 2743 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 2744 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL, 2745 &wifi_dot11_chnl); 2746 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl); 2747 seq_printf(m, "\n %-35s = %d / %d(%d)", 2748 "Dot11 channel / HsMode(HsChnl)", 2749 wifi_dot11_chnl, bt_hs_on, wifi_hs_chnl); 2750 2751 seq_printf(m, "\n %-35s = %3ph ", 2752 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info); 2753 2754 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 2755 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi); 2756 seq_printf(m, "\n %-35s = %d/ %d", 2757 "Wifi rssi/ HS rssi", wifi_rssi, bt_hs_rssi); 2758 2759 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 2760 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 2761 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 2762 seq_printf(m, "\n %-35s = %d/ %d/ %d ", 2763 "Wifi link/ roam/ scan", link, roam, scan); 2764 2765 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); 2766 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2767 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 2768 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 2769 &wifi_traffic_dir); 2770 seq_printf(m, "\n %-35s = %s / %s/ %s ", 2771 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"), 2772 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" : 2773 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))), 2774 ((!wifi_busy) ? "idle" : 2775 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ? 2776 "uplink" : "downlink"))); 2777 2778 seq_printf(m, "\n %-35s = [%s/ %d/ %d] ", 2779 "BT [status/ rssi/ retryCnt]", 2780 ((btcoexist->bt_info.bt_disabled) ? ("disabled") : 2781 ((coex_sta->c2h_bt_inquiry_page) ? 2782 ("inquiry/page scan") : 2783 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 2784 coex_dm->bt_status) ? "non-connected idle" : 2785 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 2786 coex_dm->bt_status) ? "connected-idle" : "busy")))), 2787 coex_sta->bt_rssi, coex_sta->bt_retry_cnt); 2788 2789 seq_printf(m, "\n %-35s = %d / %d / %d / %d", 2790 "SCO/HID/PAN/A2DP", stack_info->sco_exist, 2791 stack_info->hid_exist, stack_info->pan_exist, 2792 stack_info->a2dp_exist); 2793 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO, m); 2794 2795 bt_info_ext = coex_sta->bt_info_ext; 2796 seq_printf(m, "\n %-35s = %s", 2797 "BT Info A2DP rate", 2798 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate"); 2799 2800 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) { 2801 if (coex_sta->bt_info_c2h_cnt[i]) { 2802 seq_printf(m, "\n %-35s = %7ph(%d)", 2803 glbt_info_src_8192e_2ant[i], 2804 coex_sta->bt_info_c2h[i], 2805 coex_sta->bt_info_c2h_cnt[i]); 2806 } 2807 } 2808 2809 seq_printf(m, "\n %-35s = %s/%s", 2810 "PS state, IPS/LPS", 2811 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")), 2812 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF"))); 2813 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD, m); 2814 2815 seq_printf(m, "\n %-35s = 0x%x ", "SS Type", 2816 coex_dm->cur_ss_type); 2817 2818 /* Sw mechanism */ 2819 seq_printf(m, "\n %-35s", 2820 "============[Sw mechanism]============"); 2821 seq_printf(m, "\n %-35s = %d/ %d/ %d ", 2822 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink, 2823 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig); 2824 seq_printf(m, "\n %-35s = %d/ %d/ %d(0x%x) ", 2825 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", 2826 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, 2827 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); 2828 2829 seq_printf(m, "\n %-35s = 0x%x ", "Rate Mask", 2830 btcoexist->bt_info.ra_mask); 2831 2832 /* Fw mechanism */ 2833 seq_printf(m, "\n %-35s", 2834 "============[Fw mechanism]============"); 2835 2836 ps_tdma_case = coex_dm->cur_ps_tdma; 2837 seq_printf(m, 2838 "\n %-35s = %5ph case-%d (auto:%d)", 2839 "PS TDMA", coex_dm->ps_tdma_para, 2840 ps_tdma_case, coex_dm->auto_tdma_adjust); 2841 2842 seq_printf(m, "\n %-35s = %d/ %d ", 2843 "DecBtPwr/ IgnWlanAct", 2844 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act); 2845 2846 /* Hw setting */ 2847 seq_printf(m, "\n %-35s", 2848 "============[Hw setting]============"); 2849 2850 seq_printf(m, "\n %-35s = 0x%x", 2851 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup); 2852 2853 seq_printf(m, "\n %-35s = 0x%x/0x%x/0x%x/0x%x", 2854 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1, 2855 coex_dm->backup_arfr_cnt2, coex_dm->backup_retry_limit, 2856 coex_dm->backup_ampdu_maxtime); 2857 2858 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); 2859 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); 2860 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); 2861 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); 2862 seq_printf(m, "\n %-35s = 0x%x/0x%x/0x%x/0x%x", 2863 "0x430/0x434/0x42a/0x456", 2864 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); 2865 2866 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04); 2867 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04); 2868 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c); 2869 seq_printf(m, "\n %-35s = 0x%x/ 0x%x/ 0x%x", 2870 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]); 2871 2872 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); 2873 seq_printf(m, "\n %-35s = 0x%x", "0x778", u8tmp[0]); 2874 2875 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c); 2876 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930); 2877 seq_printf(m, "\n %-35s = 0x%x/ 0x%x", 2878 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]); 2879 2880 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); 2881 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f); 2882 seq_printf(m, "\n %-35s = 0x%x/ 0x%x", 2883 "0x40/ 0x4f", u8tmp[0], u8tmp[1]); 2884 2885 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); 2886 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); 2887 seq_printf(m, "\n %-35s = 0x%x/ 0x%x", 2888 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]); 2889 2890 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); 2891 seq_printf(m, "\n %-35s = 0x%x", "0xc50(dig)", 2892 u32tmp[0]); 2893 2894 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); 2895 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); 2896 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); 2897 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); 2898 seq_printf(m, 2899 "\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", 2900 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", 2901 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); 2902 2903 seq_printf(m, "\n %-35s = %d/ %d", 2904 "0x770(hp rx[31:16]/tx[15:0])", 2905 coex_sta->high_priority_rx, coex_sta->high_priority_tx); 2906 seq_printf(m, "\n %-35s = %d/ %d", 2907 "0x774(lp rx[31:16]/tx[15:0])", 2908 coex_sta->low_priority_rx, coex_sta->low_priority_tx); 2909 if (btcoexist->auto_report_2ant) 2910 btc8192e2ant_monitor_bt_ctr(btcoexist); 2911 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS, m); 2912 } 2913 2914 void ex_btc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type) 2915 { 2916 struct rtl_priv *rtlpriv = btcoexist->adapter; 2917 2918 if (BTC_IPS_ENTER == type) { 2919 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2920 "[BTCoex], IPS ENTER notify\n"); 2921 coex_sta->under_ips = true; 2922 btc8192e2ant_coex_all_off(btcoexist); 2923 } else if (BTC_IPS_LEAVE == type) { 2924 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2925 "[BTCoex], IPS LEAVE notify\n"); 2926 coex_sta->under_ips = false; 2927 } 2928 } 2929 2930 void ex_btc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type) 2931 { 2932 struct rtl_priv *rtlpriv = btcoexist->adapter; 2933 2934 if (BTC_LPS_ENABLE == type) { 2935 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2936 "[BTCoex], LPS ENABLE notify\n"); 2937 coex_sta->under_lps = true; 2938 } else if (BTC_LPS_DISABLE == type) { 2939 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2940 "[BTCoex], LPS DISABLE notify\n"); 2941 coex_sta->under_lps = false; 2942 } 2943 } 2944 2945 void ex_btc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type) 2946 { 2947 struct rtl_priv *rtlpriv = btcoexist->adapter; 2948 2949 if (BTC_SCAN_START == type) 2950 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2951 "[BTCoex], SCAN START notify\n"); 2952 else if (BTC_SCAN_FINISH == type) 2953 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2954 "[BTCoex], SCAN FINISH notify\n"); 2955 } 2956 2957 void ex_btc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type) 2958 { 2959 struct rtl_priv *rtlpriv = btcoexist->adapter; 2960 2961 if (BTC_ASSOCIATE_START == type) 2962 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2963 "[BTCoex], CONNECT START notify\n"); 2964 else if (BTC_ASSOCIATE_FINISH == type) 2965 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2966 "[BTCoex], CONNECT FINISH notify\n"); 2967 } 2968 2969 void ex_btc8192e2ant_media_status_notify(struct btc_coexist *btcoexist, 2970 u8 type) 2971 { 2972 struct rtl_priv *rtlpriv = btcoexist->adapter; 2973 u8 h2c_parameter[3] = {0}; 2974 u32 wifi_bw; 2975 u8 wifi_center_chnl; 2976 2977 if (btcoexist->manual_control || 2978 btcoexist->stop_coex_dm || 2979 btcoexist->bt_info.bt_disabled) 2980 return; 2981 2982 if (BTC_MEDIA_CONNECT == type) 2983 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2984 "[BTCoex], MEDIA connect notify\n"); 2985 else 2986 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2987 "[BTCoex], MEDIA disconnect notify\n"); 2988 2989 /* only 2.4G we need to inform bt the chnl mask */ 2990 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, 2991 &wifi_center_chnl); 2992 if ((BTC_MEDIA_CONNECT == type) && 2993 (wifi_center_chnl <= 14)) { 2994 h2c_parameter[0] = 0x1; 2995 h2c_parameter[1] = wifi_center_chnl; 2996 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2997 if (BTC_WIFI_BW_HT40 == wifi_bw) 2998 h2c_parameter[2] = 0x30; 2999 else 3000 h2c_parameter[2] = 0x20; 3001 } 3002 3003 coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; 3004 coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; 3005 coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; 3006 3007 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3008 "[BTCoex], FW write 0x66 = 0x%x\n", 3009 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 | 3010 h2c_parameter[2]); 3011 3012 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); 3013 } 3014 3015 void ex_btc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist, 3016 u8 type) 3017 { 3018 struct rtl_priv *rtlpriv = btcoexist->adapter; 3019 3020 if (type == BTC_PACKET_DHCP) 3021 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3022 "[BTCoex], DHCP Packet notify\n"); 3023 } 3024 3025 void ex_btc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist, 3026 u8 *tmp_buf, u8 length) 3027 { 3028 struct rtl_priv *rtlpriv = btcoexist->adapter; 3029 u8 bt_info = 0; 3030 u8 i, rsp_source = 0; 3031 bool bt_busy = false, limited_dig = false; 3032 bool wifi_connected = false; 3033 3034 coex_sta->c2h_bt_info_req_sent = false; 3035 3036 rsp_source = tmp_buf[0] & 0xf; 3037 if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX) 3038 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW; 3039 coex_sta->bt_info_c2h_cnt[rsp_source]++; 3040 3041 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3042 "[BTCoex], Bt info[%d], length=%d, hex data = [", 3043 rsp_source, length); 3044 for (i = 0; i < length; i++) { 3045 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; 3046 if (i == 1) 3047 bt_info = tmp_buf[i]; 3048 if (i == length-1) 3049 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3050 "0x%02x]\n", tmp_buf[i]); 3051 else 3052 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3053 "0x%02x, ", tmp_buf[i]); 3054 } 3055 3056 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) { 3057 /* [3:0] */ 3058 coex_sta->bt_retry_cnt = 3059 coex_sta->bt_info_c2h[rsp_source][2] & 0xf; 3060 3061 coex_sta->bt_rssi = 3062 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; 3063 3064 coex_sta->bt_info_ext = 3065 coex_sta->bt_info_c2h[rsp_source][4]; 3066 3067 /* Here we need to resend some wifi info to BT 3068 * because bt is reset and loss of the info. 3069 */ 3070 if ((coex_sta->bt_info_ext & BIT1)) { 3071 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3072 "bit1, send wifi BW&Chnl to BT!!\n"); 3073 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 3074 &wifi_connected); 3075 if (wifi_connected) 3076 ex_btc8192e2ant_media_status_notify( 3077 btcoexist, 3078 BTC_MEDIA_CONNECT); 3079 else 3080 ex_btc8192e2ant_media_status_notify( 3081 btcoexist, 3082 BTC_MEDIA_DISCONNECT); 3083 } 3084 3085 if ((coex_sta->bt_info_ext & BIT3)) { 3086 if (!btcoexist->manual_control && 3087 !btcoexist->stop_coex_dm) { 3088 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3089 "bit3, BT NOT ignore Wlan active!\n"); 3090 btc8192e2ant_ignore_wlan_act(btcoexist, 3091 FORCE_EXEC, 3092 false); 3093 } 3094 } else { 3095 /* BT already NOT ignore Wlan active, 3096 * do nothing here. 3097 */ 3098 } 3099 3100 if (!btcoexist->auto_report_2ant) { 3101 if (!(coex_sta->bt_info_ext & BIT4)) 3102 btc8192e2ant_bt_auto_report(btcoexist, 3103 FORCE_EXEC, 3104 true); 3105 } 3106 } 3107 3108 /* check BIT2 first ==> check if bt is under inquiry or page scan */ 3109 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE) 3110 coex_sta->c2h_bt_inquiry_page = true; 3111 else 3112 coex_sta->c2h_bt_inquiry_page = false; 3113 3114 /* set link exist status */ 3115 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) { 3116 coex_sta->bt_link_exist = false; 3117 coex_sta->pan_exist = false; 3118 coex_sta->a2dp_exist = false; 3119 coex_sta->hid_exist = false; 3120 coex_sta->sco_exist = false; 3121 } else {/* connection exists */ 3122 coex_sta->bt_link_exist = true; 3123 if (bt_info & BT_INFO_8192E_2ANT_B_FTP) 3124 coex_sta->pan_exist = true; 3125 else 3126 coex_sta->pan_exist = false; 3127 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP) 3128 coex_sta->a2dp_exist = true; 3129 else 3130 coex_sta->a2dp_exist = false; 3131 if (bt_info & BT_INFO_8192E_2ANT_B_HID) 3132 coex_sta->hid_exist = true; 3133 else 3134 coex_sta->hid_exist = false; 3135 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) 3136 coex_sta->sco_exist = true; 3137 else 3138 coex_sta->sco_exist = false; 3139 } 3140 3141 btc8192e2ant_update_bt_link_info(btcoexist); 3142 3143 if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) { 3144 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE; 3145 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3146 "[BTCoex], BT Non-Connected idle!!!\n"); 3147 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) { 3148 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE; 3149 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3150 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n"); 3151 } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) || 3152 (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) { 3153 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY; 3154 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3155 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n"); 3156 } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) { 3157 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY; 3158 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3159 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n"); 3160 } else { 3161 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX; 3162 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3163 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n"); 3164 } 3165 3166 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || 3167 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || 3168 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { 3169 bt_busy = true; 3170 limited_dig = true; 3171 } else { 3172 bt_busy = false; 3173 limited_dig = false; 3174 } 3175 3176 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); 3177 3178 coex_dm->limited_dig = limited_dig; 3179 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); 3180 3181 btc8192e2ant_run_coexist_mechanism(btcoexist); 3182 } 3183 3184 void ex_btc8192e2ant_halt_notify(struct btc_coexist *btcoexist) 3185 { 3186 struct rtl_priv *rtlpriv = btcoexist->adapter; 3187 3188 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, "[BTCoex], Halt notify\n"); 3189 3190 btc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); 3191 ex_btc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); 3192 } 3193 3194 void ex_btc8192e2ant_periodical(struct btc_coexist *btcoexist) 3195 { 3196 struct rtl_priv *rtlpriv = btcoexist->adapter; 3197 static u8 dis_ver_info_cnt; 3198 u32 fw_ver = 0, bt_patch_ver = 0; 3199 struct btc_board_info *board_info = &btcoexist->board_info; 3200 struct btc_stack_info *stack_info = &btcoexist->stack_info; 3201 3202 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3203 "=======================Periodical=======================\n"); 3204 if (dis_ver_info_cnt <= 5) { 3205 dis_ver_info_cnt += 1; 3206 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3207 "************************************************\n"); 3208 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3209 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", 3210 board_info->pg_ant_num, board_info->btdm_ant_num, 3211 board_info->btdm_ant_pos); 3212 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3213 "BT stack/ hci ext ver = %s / %d\n", 3214 ((stack_info->profile_notified) ? "Yes" : "No"), 3215 stack_info->hci_version); 3216 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, 3217 &bt_patch_ver); 3218 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 3219 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3220 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", 3221 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, 3222 fw_ver, bt_patch_ver, bt_patch_ver); 3223 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3224 "************************************************\n"); 3225 } 3226 3227 if (!btcoexist->auto_report_2ant) { 3228 btc8192e2ant_query_bt_info(btcoexist); 3229 btc8192e2ant_monitor_bt_ctr(btcoexist); 3230 btc8192e2ant_monitor_bt_enable_disable(btcoexist); 3231 } else { 3232 if (btc8192e2ant_is_wifi_status_changed(btcoexist) || 3233 coex_dm->auto_tdma_adjust) 3234 btc8192e2ant_run_coexist_mechanism(btcoexist); 3235 } 3236 } 3237