1 /* 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 /* 20 Module: rt2500usb 21 Abstract: rt2500usb device specific routines. 22 Supported chipsets: RT2570. 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/etherdevice.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/slab.h> 30 #include <linux/usb.h> 31 32 #include "rt2x00.h" 33 #include "rt2x00usb.h" 34 #include "rt2500usb.h" 35 36 /* 37 * Allow hardware encryption to be disabled. 38 */ 39 static bool modparam_nohwcrypt; 40 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 41 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 42 43 /* 44 * Register access. 45 * All access to the CSR registers will go through the methods 46 * rt2500usb_register_read and rt2500usb_register_write. 47 * BBP and RF register require indirect register access, 48 * and use the CSR registers BBPCSR and RFCSR to achieve this. 49 * These indirect registers work with busy bits, 50 * and we will try maximal REGISTER_USB_BUSY_COUNT times to access 51 * the register while taking a REGISTER_BUSY_DELAY us delay 52 * between each attampt. When the busy bit is still set at that time, 53 * the access attempt is considered to have failed, 54 * and we will print an error. 55 * If the csr_mutex is already held then the _lock variants must 56 * be used instead. 57 */ 58 static void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 59 const unsigned int offset, 60 u16 *value) 61 { 62 __le16 reg; 63 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 64 USB_VENDOR_REQUEST_IN, offset, 65 ®, sizeof(reg)); 66 *value = le16_to_cpu(reg); 67 } 68 69 static void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, 70 const unsigned int offset, 71 u16 *value) 72 { 73 __le16 reg; 74 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, 75 USB_VENDOR_REQUEST_IN, offset, 76 ®, sizeof(reg), REGISTER_TIMEOUT); 77 *value = le16_to_cpu(reg); 78 } 79 80 static void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 81 const unsigned int offset, 82 u16 value) 83 { 84 __le16 reg = cpu_to_le16(value); 85 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 86 USB_VENDOR_REQUEST_OUT, offset, 87 ®, sizeof(reg)); 88 } 89 90 static void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, 91 const unsigned int offset, 92 u16 value) 93 { 94 __le16 reg = cpu_to_le16(value); 95 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, 96 USB_VENDOR_REQUEST_OUT, offset, 97 ®, sizeof(reg), REGISTER_TIMEOUT); 98 } 99 100 static void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, 101 const unsigned int offset, 102 void *value, const u16 length) 103 { 104 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 105 USB_VENDOR_REQUEST_OUT, offset, 106 value, length); 107 } 108 109 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, 110 const unsigned int offset, 111 struct rt2x00_field16 field, 112 u16 *reg) 113 { 114 unsigned int i; 115 116 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { 117 rt2500usb_register_read_lock(rt2x00dev, offset, reg); 118 if (!rt2x00_get_field16(*reg, field)) 119 return 1; 120 udelay(REGISTER_BUSY_DELAY); 121 } 122 123 rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n", 124 offset, *reg); 125 *reg = ~0; 126 127 return 0; 128 } 129 130 #define WAIT_FOR_BBP(__dev, __reg) \ 131 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg)) 132 #define WAIT_FOR_RF(__dev, __reg) \ 133 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg)) 134 135 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, 136 const unsigned int word, const u8 value) 137 { 138 u16 reg; 139 140 mutex_lock(&rt2x00dev->csr_mutex); 141 142 /* 143 * Wait until the BBP becomes available, afterwards we 144 * can safely write the new data into the register. 145 */ 146 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 147 reg = 0; 148 rt2x00_set_field16(®, PHY_CSR7_DATA, value); 149 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 150 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); 151 152 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 153 } 154 155 mutex_unlock(&rt2x00dev->csr_mutex); 156 } 157 158 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, 159 const unsigned int word, u8 *value) 160 { 161 u16 reg; 162 163 mutex_lock(&rt2x00dev->csr_mutex); 164 165 /* 166 * Wait until the BBP becomes available, afterwards we 167 * can safely write the read request into the register. 168 * After the data has been written, we wait until hardware 169 * returns the correct value, if at any time the register 170 * doesn't become available in time, reg will be 0xffffffff 171 * which means we return 0xff to the caller. 172 */ 173 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 174 reg = 0; 175 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 176 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); 177 178 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 179 180 if (WAIT_FOR_BBP(rt2x00dev, ®)) 181 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); 182 } 183 184 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); 185 186 mutex_unlock(&rt2x00dev->csr_mutex); 187 } 188 189 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, 190 const unsigned int word, const u32 value) 191 { 192 u16 reg; 193 194 mutex_lock(&rt2x00dev->csr_mutex); 195 196 /* 197 * Wait until the RF becomes available, afterwards we 198 * can safely write the new data into the register. 199 */ 200 if (WAIT_FOR_RF(rt2x00dev, ®)) { 201 reg = 0; 202 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); 203 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); 204 205 reg = 0; 206 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); 207 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); 208 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); 209 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); 210 211 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); 212 rt2x00_rf_write(rt2x00dev, word, value); 213 } 214 215 mutex_unlock(&rt2x00dev->csr_mutex); 216 } 217 218 #ifdef CONFIG_RT2X00_LIB_DEBUGFS 219 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 220 const unsigned int offset, 221 u32 *value) 222 { 223 u16 tmp; 224 225 rt2500usb_register_read(rt2x00dev, offset, &tmp); 226 *value = tmp; 227 } 228 229 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 230 const unsigned int offset, 231 u32 value) 232 { 233 rt2500usb_register_write(rt2x00dev, offset, value); 234 } 235 236 static const struct rt2x00debug rt2500usb_rt2x00debug = { 237 .owner = THIS_MODULE, 238 .csr = { 239 .read = _rt2500usb_register_read, 240 .write = _rt2500usb_register_write, 241 .flags = RT2X00DEBUGFS_OFFSET, 242 .word_base = CSR_REG_BASE, 243 .word_size = sizeof(u16), 244 .word_count = CSR_REG_SIZE / sizeof(u16), 245 }, 246 .eeprom = { 247 .read = rt2x00_eeprom_read, 248 .write = rt2x00_eeprom_write, 249 .word_base = EEPROM_BASE, 250 .word_size = sizeof(u16), 251 .word_count = EEPROM_SIZE / sizeof(u16), 252 }, 253 .bbp = { 254 .read = rt2500usb_bbp_read, 255 .write = rt2500usb_bbp_write, 256 .word_base = BBP_BASE, 257 .word_size = sizeof(u8), 258 .word_count = BBP_SIZE / sizeof(u8), 259 }, 260 .rf = { 261 .read = rt2x00_rf_read, 262 .write = rt2500usb_rf_write, 263 .word_base = RF_BASE, 264 .word_size = sizeof(u32), 265 .word_count = RF_SIZE / sizeof(u32), 266 }, 267 }; 268 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 269 270 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev) 271 { 272 u16 reg; 273 274 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 275 return rt2x00_get_field16(reg, MAC_CSR19_VAL7); 276 } 277 278 #ifdef CONFIG_RT2X00_LIB_LEDS 279 static void rt2500usb_brightness_set(struct led_classdev *led_cdev, 280 enum led_brightness brightness) 281 { 282 struct rt2x00_led *led = 283 container_of(led_cdev, struct rt2x00_led, led_dev); 284 unsigned int enabled = brightness != LED_OFF; 285 u16 reg; 286 287 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); 288 289 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) 290 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); 291 else if (led->type == LED_TYPE_ACTIVITY) 292 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); 293 294 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); 295 } 296 297 static int rt2500usb_blink_set(struct led_classdev *led_cdev, 298 unsigned long *delay_on, 299 unsigned long *delay_off) 300 { 301 struct rt2x00_led *led = 302 container_of(led_cdev, struct rt2x00_led, led_dev); 303 u16 reg; 304 305 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); 306 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); 307 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); 308 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); 309 310 return 0; 311 } 312 313 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, 314 struct rt2x00_led *led, 315 enum led_type type) 316 { 317 led->rt2x00dev = rt2x00dev; 318 led->type = type; 319 led->led_dev.brightness_set = rt2500usb_brightness_set; 320 led->led_dev.blink_set = rt2500usb_blink_set; 321 led->flags = LED_INITIALIZED; 322 } 323 #endif /* CONFIG_RT2X00_LIB_LEDS */ 324 325 /* 326 * Configuration handlers. 327 */ 328 329 /* 330 * rt2500usb does not differentiate between shared and pairwise 331 * keys, so we should use the same function for both key types. 332 */ 333 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, 334 struct rt2x00lib_crypto *crypto, 335 struct ieee80211_key_conf *key) 336 { 337 u32 mask; 338 u16 reg; 339 enum cipher curr_cipher; 340 341 if (crypto->cmd == SET_KEY) { 342 /* 343 * Disallow to set WEP key other than with index 0, 344 * it is known that not work at least on some hardware. 345 * SW crypto will be used in that case. 346 */ 347 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || 348 key->cipher == WLAN_CIPHER_SUITE_WEP104) && 349 key->keyidx != 0) 350 return -EOPNOTSUPP; 351 352 /* 353 * Pairwise key will always be entry 0, but this 354 * could collide with a shared key on the same 355 * position... 356 */ 357 mask = TXRX_CSR0_KEY_ID.bit_mask; 358 359 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 360 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM); 361 reg &= mask; 362 363 if (reg && reg == mask) 364 return -ENOSPC; 365 366 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 367 368 key->hw_key_idx += reg ? ffz(reg) : 0; 369 /* 370 * Hardware requires that all keys use the same cipher 371 * (e.g. TKIP-only, AES-only, but not TKIP+AES). 372 * If this is not the first key, compare the cipher with the 373 * first one and fall back to SW crypto if not the same. 374 */ 375 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher) 376 return -EOPNOTSUPP; 377 378 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx), 379 crypto->key, sizeof(crypto->key)); 380 381 /* 382 * The driver does not support the IV/EIV generation 383 * in hardware. However it demands the data to be provided 384 * both separately as well as inside the frame. 385 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib 386 * to ensure rt2x00lib will not strip the data from the 387 * frame after the copy, now we must tell mac80211 388 * to generate the IV/EIV data. 389 */ 390 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 391 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 392 } 393 394 /* 395 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate 396 * a particular key is valid. 397 */ 398 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 399 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher); 400 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 401 402 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 403 if (crypto->cmd == SET_KEY) 404 mask |= 1 << key->hw_key_idx; 405 else if (crypto->cmd == DISABLE_KEY) 406 mask &= ~(1 << key->hw_key_idx); 407 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask); 408 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 409 410 return 0; 411 } 412 413 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, 414 const unsigned int filter_flags) 415 { 416 u16 reg; 417 418 /* 419 * Start configuration steps. 420 * Note that the version error will always be dropped 421 * and broadcast frames will always be accepted since 422 * there is no filter for it at this time. 423 */ 424 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 425 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, 426 !(filter_flags & FIF_FCSFAIL)); 427 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, 428 !(filter_flags & FIF_PLCPFAIL)); 429 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, 430 !(filter_flags & FIF_CONTROL)); 431 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, 432 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags)); 433 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, 434 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags) && 435 !rt2x00dev->intf_ap_count); 436 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); 437 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, 438 !(filter_flags & FIF_ALLMULTI)); 439 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); 440 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 441 } 442 443 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, 444 struct rt2x00_intf *intf, 445 struct rt2x00intf_conf *conf, 446 const unsigned int flags) 447 { 448 unsigned int bcn_preload; 449 u16 reg; 450 451 if (flags & CONFIG_UPDATE_TYPE) { 452 /* 453 * Enable beacon config 454 */ 455 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); 456 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); 457 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); 458 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, 459 2 * (conf->type != NL80211_IFTYPE_STATION)); 460 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); 461 462 /* 463 * Enable synchronisation. 464 */ 465 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 466 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); 467 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 468 469 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 470 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); 471 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 472 } 473 474 if (flags & CONFIG_UPDATE_MAC) 475 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, 476 (3 * sizeof(__le16))); 477 478 if (flags & CONFIG_UPDATE_BSSID) 479 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, 480 (3 * sizeof(__le16))); 481 } 482 483 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, 484 struct rt2x00lib_erp *erp, 485 u32 changed) 486 { 487 u16 reg; 488 489 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 490 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); 491 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, 492 !!erp->short_preamble); 493 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 494 } 495 496 if (changed & BSS_CHANGED_BASIC_RATES) 497 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, 498 erp->basic_rates); 499 500 if (changed & BSS_CHANGED_BEACON_INT) { 501 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 502 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, 503 erp->beacon_int * 4); 504 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 505 } 506 507 if (changed & BSS_CHANGED_ERP_SLOT) { 508 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); 509 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); 510 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); 511 } 512 } 513 514 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, 515 struct antenna_setup *ant) 516 { 517 u8 r2; 518 u8 r14; 519 u16 csr5; 520 u16 csr6; 521 522 /* 523 * We should never come here because rt2x00lib is supposed 524 * to catch this and send us the correct antenna explicitely. 525 */ 526 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || 527 ant->tx == ANTENNA_SW_DIVERSITY); 528 529 rt2500usb_bbp_read(rt2x00dev, 2, &r2); 530 rt2500usb_bbp_read(rt2x00dev, 14, &r14); 531 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); 532 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); 533 534 /* 535 * Configure the TX antenna. 536 */ 537 switch (ant->tx) { 538 case ANTENNA_HW_DIVERSITY: 539 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); 540 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); 541 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); 542 break; 543 case ANTENNA_A: 544 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); 545 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); 546 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); 547 break; 548 case ANTENNA_B: 549 default: 550 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); 551 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); 552 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); 553 break; 554 } 555 556 /* 557 * Configure the RX antenna. 558 */ 559 switch (ant->rx) { 560 case ANTENNA_HW_DIVERSITY: 561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); 562 break; 563 case ANTENNA_A: 564 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); 565 break; 566 case ANTENNA_B: 567 default: 568 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); 569 break; 570 } 571 572 /* 573 * RT2525E and RT5222 need to flip TX I/Q 574 */ 575 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { 576 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); 577 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); 578 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); 579 580 /* 581 * RT2525E does not need RX I/Q Flip. 582 */ 583 if (rt2x00_rf(rt2x00dev, RF2525E)) 584 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); 585 } else { 586 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); 587 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); 588 } 589 590 rt2500usb_bbp_write(rt2x00dev, 2, r2); 591 rt2500usb_bbp_write(rt2x00dev, 14, r14); 592 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); 593 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); 594 } 595 596 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, 597 struct rf_channel *rf, const int txpower) 598 { 599 /* 600 * Set TXpower. 601 */ 602 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 603 604 /* 605 * For RT2525E we should first set the channel to half band higher. 606 */ 607 if (rt2x00_rf(rt2x00dev, RF2525E)) { 608 static const u32 vals[] = { 609 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, 610 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, 611 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, 612 0x00000902, 0x00000906 613 }; 614 615 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); 616 if (rf->rf4) 617 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 618 } 619 620 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); 621 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); 622 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); 623 if (rf->rf4) 624 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 625 } 626 627 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, 628 const int txpower) 629 { 630 u32 rf3; 631 632 rt2x00_rf_read(rt2x00dev, 3, &rf3); 633 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 634 rt2500usb_rf_write(rt2x00dev, 3, rf3); 635 } 636 637 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev, 638 struct rt2x00lib_conf *libconf) 639 { 640 enum dev_state state = 641 (libconf->conf->flags & IEEE80211_CONF_PS) ? 642 STATE_SLEEP : STATE_AWAKE; 643 u16 reg; 644 645 if (state == STATE_SLEEP) { 646 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 647 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 648 rt2x00dev->beacon_int - 20); 649 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP, 650 libconf->conf->listen_interval - 1); 651 652 /* We must first disable autowake before it can be enabled */ 653 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 654 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 655 656 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1); 657 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 658 } else { 659 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 660 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 661 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 662 } 663 664 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); 665 } 666 667 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, 668 struct rt2x00lib_conf *libconf, 669 const unsigned int flags) 670 { 671 if (flags & IEEE80211_CONF_CHANGE_CHANNEL) 672 rt2500usb_config_channel(rt2x00dev, &libconf->rf, 673 libconf->conf->power_level); 674 if ((flags & IEEE80211_CONF_CHANGE_POWER) && 675 !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) 676 rt2500usb_config_txpower(rt2x00dev, 677 libconf->conf->power_level); 678 if (flags & IEEE80211_CONF_CHANGE_PS) 679 rt2500usb_config_ps(rt2x00dev, libconf); 680 } 681 682 /* 683 * Link tuning 684 */ 685 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, 686 struct link_qual *qual) 687 { 688 u16 reg; 689 690 /* 691 * Update FCS error count from register. 692 */ 693 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); 694 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); 695 696 /* 697 * Update False CCA count from register. 698 */ 699 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); 700 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); 701 } 702 703 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev, 704 struct link_qual *qual) 705 { 706 u16 eeprom; 707 u16 value; 708 709 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); 710 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); 711 rt2500usb_bbp_write(rt2x00dev, 24, value); 712 713 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); 714 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); 715 rt2500usb_bbp_write(rt2x00dev, 25, value); 716 717 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); 718 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); 719 rt2500usb_bbp_write(rt2x00dev, 61, value); 720 721 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); 722 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); 723 rt2500usb_bbp_write(rt2x00dev, 17, value); 724 725 qual->vgc_level = value; 726 } 727 728 /* 729 * Queue handlers. 730 */ 731 static void rt2500usb_start_queue(struct data_queue *queue) 732 { 733 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 734 u16 reg; 735 736 switch (queue->qid) { 737 case QID_RX: 738 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 739 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 0); 740 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 741 break; 742 case QID_BEACON: 743 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 744 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 745 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 746 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 747 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 748 break; 749 default: 750 break; 751 } 752 } 753 754 static void rt2500usb_stop_queue(struct data_queue *queue) 755 { 756 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 757 u16 reg; 758 759 switch (queue->qid) { 760 case QID_RX: 761 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 762 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 763 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 764 break; 765 case QID_BEACON: 766 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 767 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 768 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 769 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 770 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 771 break; 772 default: 773 break; 774 } 775 } 776 777 /* 778 * Initialization functions. 779 */ 780 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) 781 { 782 u16 reg; 783 784 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, 785 USB_MODE_TEST, REGISTER_TIMEOUT); 786 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, 787 0x00f0, REGISTER_TIMEOUT); 788 789 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 790 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 791 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 792 793 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); 794 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); 795 796 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 797 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); 798 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); 799 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 800 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 801 802 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 803 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 804 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 805 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 806 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 807 808 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); 809 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); 810 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); 811 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); 812 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); 813 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); 814 815 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); 816 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); 817 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); 818 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); 819 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); 820 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); 821 822 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); 823 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); 824 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); 825 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); 826 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); 827 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); 828 829 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); 830 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); 831 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); 832 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); 833 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); 834 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); 835 836 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 837 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 838 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); 839 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 840 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 841 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 842 843 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); 844 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); 845 846 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) 847 return -EBUSY; 848 849 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 850 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 851 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 852 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); 853 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 854 855 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) { 856 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); 857 rt2x00_set_field16(®, PHY_CSR2_LNA, 0); 858 } else { 859 reg = 0; 860 rt2x00_set_field16(®, PHY_CSR2_LNA, 1); 861 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); 862 } 863 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); 864 865 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); 866 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); 867 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); 868 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); 869 870 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); 871 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, 872 rt2x00dev->rx->data_size); 873 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); 874 875 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 876 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE); 877 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 878 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0); 879 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 880 881 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 882 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); 883 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 884 885 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); 886 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); 887 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); 888 889 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); 890 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); 891 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); 892 893 return 0; 894 } 895 896 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) 897 { 898 unsigned int i; 899 u8 value; 900 901 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { 902 rt2500usb_bbp_read(rt2x00dev, 0, &value); 903 if ((value != 0xff) && (value != 0x00)) 904 return 0; 905 udelay(REGISTER_BUSY_DELAY); 906 } 907 908 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n"); 909 return -EACCES; 910 } 911 912 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) 913 { 914 unsigned int i; 915 u16 eeprom; 916 u8 value; 917 u8 reg_id; 918 919 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) 920 return -EACCES; 921 922 rt2500usb_bbp_write(rt2x00dev, 3, 0x02); 923 rt2500usb_bbp_write(rt2x00dev, 4, 0x19); 924 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); 925 rt2500usb_bbp_write(rt2x00dev, 15, 0x30); 926 rt2500usb_bbp_write(rt2x00dev, 16, 0xac); 927 rt2500usb_bbp_write(rt2x00dev, 18, 0x18); 928 rt2500usb_bbp_write(rt2x00dev, 19, 0xff); 929 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); 930 rt2500usb_bbp_write(rt2x00dev, 21, 0x08); 931 rt2500usb_bbp_write(rt2x00dev, 22, 0x08); 932 rt2500usb_bbp_write(rt2x00dev, 23, 0x08); 933 rt2500usb_bbp_write(rt2x00dev, 24, 0x80); 934 rt2500usb_bbp_write(rt2x00dev, 25, 0x50); 935 rt2500usb_bbp_write(rt2x00dev, 26, 0x08); 936 rt2500usb_bbp_write(rt2x00dev, 27, 0x23); 937 rt2500usb_bbp_write(rt2x00dev, 30, 0x10); 938 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); 939 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); 940 rt2500usb_bbp_write(rt2x00dev, 34, 0x12); 941 rt2500usb_bbp_write(rt2x00dev, 35, 0x50); 942 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); 943 rt2500usb_bbp_write(rt2x00dev, 40, 0x02); 944 rt2500usb_bbp_write(rt2x00dev, 41, 0x60); 945 rt2500usb_bbp_write(rt2x00dev, 53, 0x10); 946 rt2500usb_bbp_write(rt2x00dev, 54, 0x18); 947 rt2500usb_bbp_write(rt2x00dev, 56, 0x08); 948 rt2500usb_bbp_write(rt2x00dev, 57, 0x10); 949 rt2500usb_bbp_write(rt2x00dev, 58, 0x08); 950 rt2500usb_bbp_write(rt2x00dev, 61, 0x60); 951 rt2500usb_bbp_write(rt2x00dev, 62, 0x10); 952 rt2500usb_bbp_write(rt2x00dev, 75, 0xff); 953 954 for (i = 0; i < EEPROM_BBP_SIZE; i++) { 955 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); 956 957 if (eeprom != 0xffff && eeprom != 0x0000) { 958 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); 959 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); 960 rt2500usb_bbp_write(rt2x00dev, reg_id, value); 961 } 962 } 963 964 return 0; 965 } 966 967 /* 968 * Device state switch handlers. 969 */ 970 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) 971 { 972 /* 973 * Initialize all registers. 974 */ 975 if (unlikely(rt2500usb_init_registers(rt2x00dev) || 976 rt2500usb_init_bbp(rt2x00dev))) 977 return -EIO; 978 979 return 0; 980 } 981 982 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) 983 { 984 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); 985 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); 986 987 /* 988 * Disable synchronisation. 989 */ 990 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); 991 992 rt2x00usb_disable_radio(rt2x00dev); 993 } 994 995 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, 996 enum dev_state state) 997 { 998 u16 reg; 999 u16 reg2; 1000 unsigned int i; 1001 char put_to_sleep; 1002 char bbp_state; 1003 char rf_state; 1004 1005 put_to_sleep = (state != STATE_AWAKE); 1006 1007 reg = 0; 1008 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); 1009 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); 1010 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); 1011 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1012 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); 1013 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1014 1015 /* 1016 * Device is not guaranteed to be in the requested state yet. 1017 * We must wait until the register indicates that the 1018 * device has entered the correct state. 1019 */ 1020 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { 1021 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); 1022 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); 1023 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); 1024 if (bbp_state == state && rf_state == state) 1025 return 0; 1026 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1027 msleep(30); 1028 } 1029 1030 return -EBUSY; 1031 } 1032 1033 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, 1034 enum dev_state state) 1035 { 1036 int retval = 0; 1037 1038 switch (state) { 1039 case STATE_RADIO_ON: 1040 retval = rt2500usb_enable_radio(rt2x00dev); 1041 break; 1042 case STATE_RADIO_OFF: 1043 rt2500usb_disable_radio(rt2x00dev); 1044 break; 1045 case STATE_RADIO_IRQ_ON: 1046 case STATE_RADIO_IRQ_OFF: 1047 /* No support, but no error either */ 1048 break; 1049 case STATE_DEEP_SLEEP: 1050 case STATE_SLEEP: 1051 case STATE_STANDBY: 1052 case STATE_AWAKE: 1053 retval = rt2500usb_set_state(rt2x00dev, state); 1054 break; 1055 default: 1056 retval = -ENOTSUPP; 1057 break; 1058 } 1059 1060 if (unlikely(retval)) 1061 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n", 1062 state, retval); 1063 1064 return retval; 1065 } 1066 1067 /* 1068 * TX descriptor initialization 1069 */ 1070 static void rt2500usb_write_tx_desc(struct queue_entry *entry, 1071 struct txentry_desc *txdesc) 1072 { 1073 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1074 __le32 *txd = (__le32 *) entry->skb->data; 1075 u32 word; 1076 1077 /* 1078 * Start writing the descriptor words. 1079 */ 1080 rt2x00_desc_read(txd, 0, &word); 1081 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); 1082 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, 1083 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); 1084 rt2x00_set_field32(&word, TXD_W0_ACK, 1085 test_bit(ENTRY_TXD_ACK, &txdesc->flags)); 1086 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, 1087 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); 1088 rt2x00_set_field32(&word, TXD_W0_OFDM, 1089 (txdesc->rate_mode == RATE_MODE_OFDM)); 1090 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, 1091 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); 1092 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs); 1093 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length); 1094 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher); 1095 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx); 1096 rt2x00_desc_write(txd, 0, word); 1097 1098 rt2x00_desc_read(txd, 1, &word); 1099 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset); 1100 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs); 1101 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min); 1102 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max); 1103 rt2x00_desc_write(txd, 1, word); 1104 1105 rt2x00_desc_read(txd, 2, &word); 1106 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal); 1107 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service); 1108 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, 1109 txdesc->u.plcp.length_low); 1110 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, 1111 txdesc->u.plcp.length_high); 1112 rt2x00_desc_write(txd, 2, word); 1113 1114 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) { 1115 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]); 1116 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]); 1117 } 1118 1119 /* 1120 * Register descriptor details in skb frame descriptor. 1121 */ 1122 skbdesc->flags |= SKBDESC_DESC_IN_SKB; 1123 skbdesc->desc = txd; 1124 skbdesc->desc_len = TXD_DESC_SIZE; 1125 } 1126 1127 /* 1128 * TX data initialization 1129 */ 1130 static void rt2500usb_beacondone(struct urb *urb); 1131 1132 static void rt2500usb_write_beacon(struct queue_entry *entry, 1133 struct txentry_desc *txdesc) 1134 { 1135 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1136 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); 1137 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1138 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint); 1139 int length; 1140 u16 reg, reg0; 1141 1142 /* 1143 * Disable beaconing while we are reloading the beacon data, 1144 * otherwise we might be sending out invalid data. 1145 */ 1146 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 1147 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 1148 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1149 1150 /* 1151 * Add space for the descriptor in front of the skb. 1152 */ 1153 skb_push(entry->skb, TXD_DESC_SIZE); 1154 memset(entry->skb->data, 0, TXD_DESC_SIZE); 1155 1156 /* 1157 * Write the TX descriptor for the beacon. 1158 */ 1159 rt2500usb_write_tx_desc(entry, txdesc); 1160 1161 /* 1162 * Dump beacon to userspace through debugfs. 1163 */ 1164 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry); 1165 1166 /* 1167 * USB devices cannot blindly pass the skb->len as the 1168 * length of the data to usb_fill_bulk_urb. Pass the skb 1169 * to the driver to determine what the length should be. 1170 */ 1171 length = rt2x00dev->ops->lib->get_tx_data_len(entry); 1172 1173 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, 1174 entry->skb->data, length, rt2500usb_beacondone, 1175 entry); 1176 1177 /* 1178 * Second we need to create the guardian byte. 1179 * We only need a single byte, so lets recycle 1180 * the 'flags' field we are not using for beacons. 1181 */ 1182 bcn_priv->guardian_data = 0; 1183 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, 1184 &bcn_priv->guardian_data, 1, rt2500usb_beacondone, 1185 entry); 1186 1187 /* 1188 * Send out the guardian byte. 1189 */ 1190 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); 1191 1192 /* 1193 * Enable beaconing again. 1194 */ 1195 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 1196 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 1197 reg0 = reg; 1198 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 1199 /* 1200 * Beacon generation will fail initially. 1201 * To prevent this we need to change the TXRX_CSR19 1202 * register several times (reg0 is the same as reg 1203 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0 1204 * and 1 in reg). 1205 */ 1206 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1207 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1208 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1209 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1210 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1211 } 1212 1213 static int rt2500usb_get_tx_data_len(struct queue_entry *entry) 1214 { 1215 int length; 1216 1217 /* 1218 * The length _must_ be a multiple of 2, 1219 * but it must _not_ be a multiple of the USB packet size. 1220 */ 1221 length = roundup(entry->skb->len, 2); 1222 length += (2 * !(length % entry->queue->usb_maxpacket)); 1223 1224 return length; 1225 } 1226 1227 /* 1228 * RX control handlers 1229 */ 1230 static void rt2500usb_fill_rxdone(struct queue_entry *entry, 1231 struct rxdone_entry_desc *rxdesc) 1232 { 1233 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1234 struct queue_entry_priv_usb *entry_priv = entry->priv_data; 1235 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1236 __le32 *rxd = 1237 (__le32 *)(entry->skb->data + 1238 (entry_priv->urb->actual_length - 1239 entry->queue->desc_size)); 1240 u32 word0; 1241 u32 word1; 1242 1243 /* 1244 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of 1245 * frame data in rt2x00usb. 1246 */ 1247 memcpy(skbdesc->desc, rxd, skbdesc->desc_len); 1248 rxd = (__le32 *)skbdesc->desc; 1249 1250 /* 1251 * It is now safe to read the descriptor on all architectures. 1252 */ 1253 rt2x00_desc_read(rxd, 0, &word0); 1254 rt2x00_desc_read(rxd, 1, &word1); 1255 1256 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) 1257 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; 1258 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) 1259 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; 1260 1261 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER); 1262 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR)) 1263 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY; 1264 1265 if (rxdesc->cipher != CIPHER_NONE) { 1266 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]); 1267 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]); 1268 rxdesc->dev_flags |= RXDONE_CRYPTO_IV; 1269 1270 /* ICV is located at the end of frame */ 1271 1272 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; 1273 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) 1274 rxdesc->flags |= RX_FLAG_DECRYPTED; 1275 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) 1276 rxdesc->flags |= RX_FLAG_MMIC_ERROR; 1277 } 1278 1279 /* 1280 * Obtain the status about this packet. 1281 * When frame was received with an OFDM bitrate, 1282 * the signal is the PLCP value. If it was received with 1283 * a CCK bitrate the signal is the rate in 100kbit/s. 1284 */ 1285 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); 1286 rxdesc->rssi = 1287 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset; 1288 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); 1289 1290 if (rt2x00_get_field32(word0, RXD_W0_OFDM)) 1291 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; 1292 else 1293 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; 1294 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) 1295 rxdesc->dev_flags |= RXDONE_MY_BSS; 1296 1297 /* 1298 * Adjust the skb memory window to the frame boundaries. 1299 */ 1300 skb_trim(entry->skb, rxdesc->size); 1301 } 1302 1303 /* 1304 * Interrupt functions. 1305 */ 1306 static void rt2500usb_beacondone(struct urb *urb) 1307 { 1308 struct queue_entry *entry = (struct queue_entry *)urb->context; 1309 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1310 1311 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) 1312 return; 1313 1314 /* 1315 * Check if this was the guardian beacon, 1316 * if that was the case we need to send the real beacon now. 1317 * Otherwise we should free the sk_buffer, the device 1318 * should be doing the rest of the work now. 1319 */ 1320 if (bcn_priv->guardian_urb == urb) { 1321 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); 1322 } else if (bcn_priv->urb == urb) { 1323 dev_kfree_skb(entry->skb); 1324 entry->skb = NULL; 1325 } 1326 } 1327 1328 /* 1329 * Device probe functions. 1330 */ 1331 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) 1332 { 1333 u16 word; 1334 u8 *mac; 1335 u8 bbp; 1336 1337 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); 1338 1339 /* 1340 * Start validation of the data that has been read. 1341 */ 1342 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); 1343 rt2x00lib_set_mac_address(rt2x00dev, mac); 1344 1345 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); 1346 if (word == 0xffff) { 1347 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); 1348 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 1349 ANTENNA_SW_DIVERSITY); 1350 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 1351 ANTENNA_SW_DIVERSITY); 1352 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 1353 LED_MODE_DEFAULT); 1354 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); 1355 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); 1356 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); 1357 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 1358 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); 1359 } 1360 1361 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); 1362 if (word == 0xffff) { 1363 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); 1364 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); 1365 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); 1366 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); 1367 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); 1368 } 1369 1370 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); 1371 if (word == 0xffff) { 1372 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, 1373 DEFAULT_RSSI_OFFSET); 1374 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); 1375 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n", 1376 word); 1377 } 1378 1379 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); 1380 if (word == 0xffff) { 1381 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); 1382 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); 1383 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word); 1384 } 1385 1386 /* 1387 * Switch lower vgc bound to current BBP R17 value, 1388 * lower the value a bit for better quality. 1389 */ 1390 rt2500usb_bbp_read(rt2x00dev, 17, &bbp); 1391 bbp -= 6; 1392 1393 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); 1394 if (word == 0xffff) { 1395 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); 1396 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1397 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1398 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); 1399 } else { 1400 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1401 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1402 } 1403 1404 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); 1405 if (word == 0xffff) { 1406 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); 1407 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); 1408 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); 1409 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word); 1410 } 1411 1412 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); 1413 if (word == 0xffff) { 1414 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); 1415 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); 1416 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); 1417 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word); 1418 } 1419 1420 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); 1421 if (word == 0xffff) { 1422 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); 1423 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); 1424 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); 1425 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word); 1426 } 1427 1428 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); 1429 if (word == 0xffff) { 1430 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); 1431 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); 1432 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); 1433 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word); 1434 } 1435 1436 return 0; 1437 } 1438 1439 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) 1440 { 1441 u16 reg; 1442 u16 value; 1443 u16 eeprom; 1444 1445 /* 1446 * Read EEPROM word for configuration. 1447 */ 1448 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 1449 1450 /* 1451 * Identify RF chipset. 1452 */ 1453 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1454 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); 1455 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1456 1457 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) { 1458 rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n"); 1459 return -ENODEV; 1460 } 1461 1462 if (!rt2x00_rf(rt2x00dev, RF2522) && 1463 !rt2x00_rf(rt2x00dev, RF2523) && 1464 !rt2x00_rf(rt2x00dev, RF2524) && 1465 !rt2x00_rf(rt2x00dev, RF2525) && 1466 !rt2x00_rf(rt2x00dev, RF2525E) && 1467 !rt2x00_rf(rt2x00dev, RF5222)) { 1468 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n"); 1469 return -ENODEV; 1470 } 1471 1472 /* 1473 * Identify default antenna configuration. 1474 */ 1475 rt2x00dev->default_ant.tx = 1476 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); 1477 rt2x00dev->default_ant.rx = 1478 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); 1479 1480 /* 1481 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. 1482 * I am not 100% sure about this, but the legacy drivers do not 1483 * indicate antenna swapping in software is required when 1484 * diversity is enabled. 1485 */ 1486 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) 1487 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; 1488 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) 1489 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; 1490 1491 /* 1492 * Store led mode, for correct led behaviour. 1493 */ 1494 #ifdef CONFIG_RT2X00_LIB_LEDS 1495 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); 1496 1497 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); 1498 if (value == LED_MODE_TXRX_ACTIVITY || 1499 value == LED_MODE_DEFAULT || 1500 value == LED_MODE_ASUS) 1501 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, 1502 LED_TYPE_ACTIVITY); 1503 #endif /* CONFIG_RT2X00_LIB_LEDS */ 1504 1505 /* 1506 * Detect if this device has an hardware controlled radio. 1507 */ 1508 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 1509 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags); 1510 1511 /* 1512 * Read the RSSI <-> dBm offset information. 1513 */ 1514 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); 1515 rt2x00dev->rssi_offset = 1516 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); 1517 1518 return 0; 1519 } 1520 1521 /* 1522 * RF value list for RF2522 1523 * Supports: 2.4 GHz 1524 */ 1525 static const struct rf_channel rf_vals_bg_2522[] = { 1526 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, 1527 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, 1528 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, 1529 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, 1530 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, 1531 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, 1532 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, 1533 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, 1534 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, 1535 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, 1536 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, 1537 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, 1538 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, 1539 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, 1540 }; 1541 1542 /* 1543 * RF value list for RF2523 1544 * Supports: 2.4 GHz 1545 */ 1546 static const struct rf_channel rf_vals_bg_2523[] = { 1547 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, 1548 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, 1549 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, 1550 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, 1551 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, 1552 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, 1553 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, 1554 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, 1555 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, 1556 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, 1557 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, 1558 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, 1559 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, 1560 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, 1561 }; 1562 1563 /* 1564 * RF value list for RF2524 1565 * Supports: 2.4 GHz 1566 */ 1567 static const struct rf_channel rf_vals_bg_2524[] = { 1568 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, 1569 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, 1570 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, 1571 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, 1572 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, 1573 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, 1574 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, 1575 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, 1576 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, 1577 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, 1578 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, 1579 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, 1580 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, 1581 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, 1582 }; 1583 1584 /* 1585 * RF value list for RF2525 1586 * Supports: 2.4 GHz 1587 */ 1588 static const struct rf_channel rf_vals_bg_2525[] = { 1589 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, 1590 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, 1591 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, 1592 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, 1593 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, 1594 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, 1595 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, 1596 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, 1597 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, 1598 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, 1599 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, 1600 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, 1601 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, 1602 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, 1603 }; 1604 1605 /* 1606 * RF value list for RF2525e 1607 * Supports: 2.4 GHz 1608 */ 1609 static const struct rf_channel rf_vals_bg_2525e[] = { 1610 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, 1611 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, 1612 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, 1613 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, 1614 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, 1615 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, 1616 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, 1617 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, 1618 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, 1619 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, 1620 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, 1621 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, 1622 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, 1623 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, 1624 }; 1625 1626 /* 1627 * RF value list for RF5222 1628 * Supports: 2.4 GHz & 5.2 GHz 1629 */ 1630 static const struct rf_channel rf_vals_5222[] = { 1631 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, 1632 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, 1633 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, 1634 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, 1635 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, 1636 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, 1637 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, 1638 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, 1639 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, 1640 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, 1641 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, 1642 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, 1643 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, 1644 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, 1645 1646 /* 802.11 UNI / HyperLan 2 */ 1647 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, 1648 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, 1649 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, 1650 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, 1651 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, 1652 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, 1653 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, 1654 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, 1655 1656 /* 802.11 HyperLan 2 */ 1657 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, 1658 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, 1659 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, 1660 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, 1661 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, 1662 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, 1663 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, 1664 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, 1665 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, 1666 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, 1667 1668 /* 802.11 UNII */ 1669 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, 1670 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, 1671 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, 1672 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, 1673 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, 1674 }; 1675 1676 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) 1677 { 1678 struct hw_mode_spec *spec = &rt2x00dev->spec; 1679 struct channel_info *info; 1680 char *tx_power; 1681 unsigned int i; 1682 1683 /* 1684 * Initialize all hw fields. 1685 * 1686 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are 1687 * capable of sending the buffered frames out after the DTIM 1688 * transmission using rt2x00lib_beacondone. This will send out 1689 * multicast and broadcast traffic immediately instead of buffering it 1690 * infinitly and thus dropping it after some time. 1691 */ 1692 ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK); 1693 ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS); 1694 ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS); 1695 ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM); 1696 1697 /* 1698 * Disable powersaving as default. 1699 */ 1700 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 1701 1702 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1703 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1704 rt2x00_eeprom_addr(rt2x00dev, 1705 EEPROM_MAC_ADDR_0)); 1706 1707 /* 1708 * Initialize hw_mode information. 1709 */ 1710 spec->supported_bands = SUPPORT_BAND_2GHZ; 1711 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 1712 1713 if (rt2x00_rf(rt2x00dev, RF2522)) { 1714 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); 1715 spec->channels = rf_vals_bg_2522; 1716 } else if (rt2x00_rf(rt2x00dev, RF2523)) { 1717 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); 1718 spec->channels = rf_vals_bg_2523; 1719 } else if (rt2x00_rf(rt2x00dev, RF2524)) { 1720 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); 1721 spec->channels = rf_vals_bg_2524; 1722 } else if (rt2x00_rf(rt2x00dev, RF2525)) { 1723 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); 1724 spec->channels = rf_vals_bg_2525; 1725 } else if (rt2x00_rf(rt2x00dev, RF2525E)) { 1726 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); 1727 spec->channels = rf_vals_bg_2525e; 1728 } else if (rt2x00_rf(rt2x00dev, RF5222)) { 1729 spec->supported_bands |= SUPPORT_BAND_5GHZ; 1730 spec->num_channels = ARRAY_SIZE(rf_vals_5222); 1731 spec->channels = rf_vals_5222; 1732 } 1733 1734 /* 1735 * Create channel information array 1736 */ 1737 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL); 1738 if (!info) 1739 return -ENOMEM; 1740 1741 spec->channels_info = info; 1742 1743 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); 1744 for (i = 0; i < 14; i++) { 1745 info[i].max_power = MAX_TXPOWER; 1746 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); 1747 } 1748 1749 if (spec->num_channels > 14) { 1750 for (i = 14; i < spec->num_channels; i++) { 1751 info[i].max_power = MAX_TXPOWER; 1752 info[i].default_power1 = DEFAULT_TXPOWER; 1753 } 1754 } 1755 1756 return 0; 1757 } 1758 1759 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) 1760 { 1761 int retval; 1762 u16 reg; 1763 1764 /* 1765 * Allocate eeprom data. 1766 */ 1767 retval = rt2500usb_validate_eeprom(rt2x00dev); 1768 if (retval) 1769 return retval; 1770 1771 retval = rt2500usb_init_eeprom(rt2x00dev); 1772 if (retval) 1773 return retval; 1774 1775 /* 1776 * Enable rfkill polling by setting GPIO direction of the 1777 * rfkill switch GPIO pin correctly. 1778 */ 1779 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 1780 rt2x00_set_field16(®, MAC_CSR19_DIR0, 0); 1781 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg); 1782 1783 /* 1784 * Initialize hw specifications. 1785 */ 1786 retval = rt2500usb_probe_hw_mode(rt2x00dev); 1787 if (retval) 1788 return retval; 1789 1790 /* 1791 * This device requires the atim queue 1792 */ 1793 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags); 1794 __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags); 1795 if (!modparam_nohwcrypt) { 1796 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags); 1797 __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags); 1798 } 1799 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags); 1800 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags); 1801 1802 /* 1803 * Set the rssi offset. 1804 */ 1805 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; 1806 1807 return 0; 1808 } 1809 1810 static const struct ieee80211_ops rt2500usb_mac80211_ops = { 1811 .tx = rt2x00mac_tx, 1812 .start = rt2x00mac_start, 1813 .stop = rt2x00mac_stop, 1814 .add_interface = rt2x00mac_add_interface, 1815 .remove_interface = rt2x00mac_remove_interface, 1816 .config = rt2x00mac_config, 1817 .configure_filter = rt2x00mac_configure_filter, 1818 .set_tim = rt2x00mac_set_tim, 1819 .set_key = rt2x00mac_set_key, 1820 .sw_scan_start = rt2x00mac_sw_scan_start, 1821 .sw_scan_complete = rt2x00mac_sw_scan_complete, 1822 .get_stats = rt2x00mac_get_stats, 1823 .bss_info_changed = rt2x00mac_bss_info_changed, 1824 .conf_tx = rt2x00mac_conf_tx, 1825 .rfkill_poll = rt2x00mac_rfkill_poll, 1826 .flush = rt2x00mac_flush, 1827 .set_antenna = rt2x00mac_set_antenna, 1828 .get_antenna = rt2x00mac_get_antenna, 1829 .get_ringparam = rt2x00mac_get_ringparam, 1830 .tx_frames_pending = rt2x00mac_tx_frames_pending, 1831 }; 1832 1833 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { 1834 .probe_hw = rt2500usb_probe_hw, 1835 .initialize = rt2x00usb_initialize, 1836 .uninitialize = rt2x00usb_uninitialize, 1837 .clear_entry = rt2x00usb_clear_entry, 1838 .set_device_state = rt2500usb_set_device_state, 1839 .rfkill_poll = rt2500usb_rfkill_poll, 1840 .link_stats = rt2500usb_link_stats, 1841 .reset_tuner = rt2500usb_reset_tuner, 1842 .watchdog = rt2x00usb_watchdog, 1843 .start_queue = rt2500usb_start_queue, 1844 .kick_queue = rt2x00usb_kick_queue, 1845 .stop_queue = rt2500usb_stop_queue, 1846 .flush_queue = rt2x00usb_flush_queue, 1847 .write_tx_desc = rt2500usb_write_tx_desc, 1848 .write_beacon = rt2500usb_write_beacon, 1849 .get_tx_data_len = rt2500usb_get_tx_data_len, 1850 .fill_rxdone = rt2500usb_fill_rxdone, 1851 .config_shared_key = rt2500usb_config_key, 1852 .config_pairwise_key = rt2500usb_config_key, 1853 .config_filter = rt2500usb_config_filter, 1854 .config_intf = rt2500usb_config_intf, 1855 .config_erp = rt2500usb_config_erp, 1856 .config_ant = rt2500usb_config_ant, 1857 .config = rt2500usb_config, 1858 }; 1859 1860 static void rt2500usb_queue_init(struct data_queue *queue) 1861 { 1862 switch (queue->qid) { 1863 case QID_RX: 1864 queue->limit = 32; 1865 queue->data_size = DATA_FRAME_SIZE; 1866 queue->desc_size = RXD_DESC_SIZE; 1867 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1868 break; 1869 1870 case QID_AC_VO: 1871 case QID_AC_VI: 1872 case QID_AC_BE: 1873 case QID_AC_BK: 1874 queue->limit = 32; 1875 queue->data_size = DATA_FRAME_SIZE; 1876 queue->desc_size = TXD_DESC_SIZE; 1877 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1878 break; 1879 1880 case QID_BEACON: 1881 queue->limit = 1; 1882 queue->data_size = MGMT_FRAME_SIZE; 1883 queue->desc_size = TXD_DESC_SIZE; 1884 queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn); 1885 break; 1886 1887 case QID_ATIM: 1888 queue->limit = 8; 1889 queue->data_size = DATA_FRAME_SIZE; 1890 queue->desc_size = TXD_DESC_SIZE; 1891 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1892 break; 1893 1894 default: 1895 BUG(); 1896 break; 1897 } 1898 } 1899 1900 static const struct rt2x00_ops rt2500usb_ops = { 1901 .name = KBUILD_MODNAME, 1902 .max_ap_intf = 1, 1903 .eeprom_size = EEPROM_SIZE, 1904 .rf_size = RF_SIZE, 1905 .tx_queues = NUM_TX_QUEUES, 1906 .queue_init = rt2500usb_queue_init, 1907 .lib = &rt2500usb_rt2x00_ops, 1908 .hw = &rt2500usb_mac80211_ops, 1909 #ifdef CONFIG_RT2X00_LIB_DEBUGFS 1910 .debugfs = &rt2500usb_rt2x00debug, 1911 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1912 }; 1913 1914 /* 1915 * rt2500usb module information. 1916 */ 1917 static struct usb_device_id rt2500usb_device_table[] = { 1918 /* ASUS */ 1919 { USB_DEVICE(0x0b05, 0x1706) }, 1920 { USB_DEVICE(0x0b05, 0x1707) }, 1921 /* Belkin */ 1922 { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */ 1923 { USB_DEVICE(0x050d, 0x7051) }, 1924 /* Cisco Systems */ 1925 { USB_DEVICE(0x13b1, 0x000d) }, 1926 { USB_DEVICE(0x13b1, 0x0011) }, 1927 { USB_DEVICE(0x13b1, 0x001a) }, 1928 /* Conceptronic */ 1929 { USB_DEVICE(0x14b2, 0x3c02) }, 1930 /* D-LINK */ 1931 { USB_DEVICE(0x2001, 0x3c00) }, 1932 /* Gigabyte */ 1933 { USB_DEVICE(0x1044, 0x8001) }, 1934 { USB_DEVICE(0x1044, 0x8007) }, 1935 /* Hercules */ 1936 { USB_DEVICE(0x06f8, 0xe000) }, 1937 /* Melco */ 1938 { USB_DEVICE(0x0411, 0x005e) }, 1939 { USB_DEVICE(0x0411, 0x0066) }, 1940 { USB_DEVICE(0x0411, 0x0067) }, 1941 { USB_DEVICE(0x0411, 0x008b) }, 1942 { USB_DEVICE(0x0411, 0x0097) }, 1943 /* MSI */ 1944 { USB_DEVICE(0x0db0, 0x6861) }, 1945 { USB_DEVICE(0x0db0, 0x6865) }, 1946 { USB_DEVICE(0x0db0, 0x6869) }, 1947 /* Ralink */ 1948 { USB_DEVICE(0x148f, 0x1706) }, 1949 { USB_DEVICE(0x148f, 0x2570) }, 1950 { USB_DEVICE(0x148f, 0x9020) }, 1951 /* Sagem */ 1952 { USB_DEVICE(0x079b, 0x004b) }, 1953 /* Siemens */ 1954 { USB_DEVICE(0x0681, 0x3c06) }, 1955 /* SMC */ 1956 { USB_DEVICE(0x0707, 0xee13) }, 1957 /* Spairon */ 1958 { USB_DEVICE(0x114b, 0x0110) }, 1959 /* SURECOM */ 1960 { USB_DEVICE(0x0769, 0x11f3) }, 1961 /* Trust */ 1962 { USB_DEVICE(0x0eb0, 0x9020) }, 1963 /* VTech */ 1964 { USB_DEVICE(0x0f88, 0x3012) }, 1965 /* Zinwell */ 1966 { USB_DEVICE(0x5a57, 0x0260) }, 1967 { 0, } 1968 }; 1969 1970 MODULE_AUTHOR(DRV_PROJECT); 1971 MODULE_VERSION(DRV_VERSION); 1972 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); 1973 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); 1974 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); 1975 MODULE_LICENSE("GPL"); 1976 1977 static int rt2500usb_probe(struct usb_interface *usb_intf, 1978 const struct usb_device_id *id) 1979 { 1980 return rt2x00usb_probe(usb_intf, &rt2500usb_ops); 1981 } 1982 1983 static struct usb_driver rt2500usb_driver = { 1984 .name = KBUILD_MODNAME, 1985 .id_table = rt2500usb_device_table, 1986 .probe = rt2500usb_probe, 1987 .disconnect = rt2x00usb_disconnect, 1988 .suspend = rt2x00usb_suspend, 1989 .resume = rt2x00usb_resume, 1990 .reset_resume = rt2x00usb_resume, 1991 .disable_hub_initiated_lpm = 1, 1992 }; 1993 1994 module_usb_driver(rt2500usb_driver); 1995