1*b1906ceaSLachlan Hodges /* SPDX-License-Identifier: GPL-2.0-only */ 2*b1906ceaSLachlan Hodges /* 3*b1906ceaSLachlan Hodges * Copyright (c) 2017-2026 Morse Micro 4*b1906ceaSLachlan Hodges */ 5*b1906ceaSLachlan Hodges 6*b1906ceaSLachlan Hodges #ifndef _MM81X_YAPS_HW_H_ 7*b1906ceaSLachlan Hodges #define _MM81X_YAPS_HW_H_ 8*b1906ceaSLachlan Hodges 9*b1906ceaSLachlan Hodges #include <linux/types.h> 10*b1906ceaSLachlan Hodges #include <linux/crc7.h> 11*b1906ceaSLachlan Hodges 12*b1906ceaSLachlan Hodges #define MM81X_INT_YAPS_FC_PKT_WAITING_IRQN 0 13*b1906ceaSLachlan Hodges #define MM81X_INT_YAPS_FC_PACKET_FREED_UP_IRQN 1 14*b1906ceaSLachlan Hodges 15*b1906ceaSLachlan Hodges struct mm81x_yaps_hw_table { 16*b1906ceaSLachlan Hodges /* NOTE: We need these padding bytes for yaps to work */ 17*b1906ceaSLachlan Hodges u8 padding[4]; 18*b1906ceaSLachlan Hodges __le32 ysl_addr; 19*b1906ceaSLachlan Hodges __le32 yds_addr; 20*b1906ceaSLachlan Hodges __le32 status_regs_addr; 21*b1906ceaSLachlan Hodges 22*b1906ceaSLachlan Hodges /* Alloc pool sizes */ 23*b1906ceaSLachlan Hodges __le16 tc_tx_pool_size; 24*b1906ceaSLachlan Hodges __le16 fc_rx_pool_size; 25*b1906ceaSLachlan Hodges u8 tc_cmd_pool_size; 26*b1906ceaSLachlan Hodges u8 tc_beacon_pool_size; 27*b1906ceaSLachlan Hodges u8 tc_mgmt_pool_size; 28*b1906ceaSLachlan Hodges u8 fc_resp_pool_size; 29*b1906ceaSLachlan Hodges u8 fc_tx_sts_pool_size; 30*b1906ceaSLachlan Hodges u8 fc_aux_pool_size; 31*b1906ceaSLachlan Hodges 32*b1906ceaSLachlan Hodges /* To chip/from chip queue sizes */ 33*b1906ceaSLachlan Hodges u8 tc_tx_q_size; 34*b1906ceaSLachlan Hodges u8 tc_cmd_q_size; 35*b1906ceaSLachlan Hodges u8 tc_beacon_q_size; 36*b1906ceaSLachlan Hodges u8 tc_mgmt_q_size; 37*b1906ceaSLachlan Hodges u8 fc_q_size; 38*b1906ceaSLachlan Hodges u8 fc_done_q_size; 39*b1906ceaSLachlan Hodges 40*b1906ceaSLachlan Hodges __le16 yaps_reserved_page_size; 41*b1906ceaSLachlan Hodges __le16 reserved_unused; 42*b1906ceaSLachlan Hodges } __packed; 43*b1906ceaSLachlan Hodges 44*b1906ceaSLachlan Hodges struct mm81x; 45*b1906ceaSLachlan Hodges 46*b1906ceaSLachlan Hodges void mm81x_yaps_hw_enable_irqs(struct mm81x *mors, bool enable); 47*b1906ceaSLachlan Hodges int mm81x_yaps_hw_init(struct mm81x *mors); 48*b1906ceaSLachlan Hodges void mm81x_yaps_hw_finish(struct mm81x *mors); 49*b1906ceaSLachlan Hodges void mm81x_yaps_hw_read_table(struct mm81x *mors, 50*b1906ceaSLachlan Hodges struct mm81x_yaps_hw_table *tbl_ptr); 51*b1906ceaSLachlan Hodges 52*b1906ceaSLachlan Hodges #endif /* !_MM81X_YAPS_HW_H_ */ 53