xref: /linux/drivers/net/wireless/morsemicro/mm81x/hif.h (revision 91ec2035134982b98fab0609a9fd8480e8217dc1)
1*b1906ceaSLachlan Hodges /* SPDX-License-Identifier: GPL-2.0-only */
2*b1906ceaSLachlan Hodges /*
3*b1906ceaSLachlan Hodges  * Copyright (c) 2017-2026 Morse Micro
4*b1906ceaSLachlan Hodges  */
5*b1906ceaSLachlan Hodges 
6*b1906ceaSLachlan Hodges #ifndef _MM81X_HIF_H_
7*b1906ceaSLachlan Hodges #define _MM81X_HIF_H_
8*b1906ceaSLachlan Hodges 
9*b1906ceaSLachlan Hodges #include "core.h"
10*b1906ceaSLachlan Hodges 
11*b1906ceaSLachlan Hodges struct mm81x_skbq;
12*b1906ceaSLachlan Hodges 
13*b1906ceaSLachlan Hodges #define MM81X_HIF_BYPASS_TX_STATUS_IRQ_NUM (15)
14*b1906ceaSLachlan Hodges #define MM81X_HIF_BYPASS_CMD_RESP_IRQ_NUM (29)
15*b1906ceaSLachlan Hodges #define MM81X_HIF_IRQ_BYPASS_TX_STATUS_AVAILABLE \
16*b1906ceaSLachlan Hodges 	BIT(MM81X_HIF_BYPASS_TX_STATUS_IRQ_NUM)
17*b1906ceaSLachlan Hodges #define MM81X_HIF_IRQ_BYPASS_CMD_RESP_AVAILABLE \
18*b1906ceaSLachlan Hodges 	BIT(MM81X_HIF_BYPASS_CMD_RESP_IRQ_NUM)
19*b1906ceaSLachlan Hodges 
20*b1906ceaSLachlan Hodges /* Hardware IF interrupt mask. We may use any interrupts in this range */
21*b1906ceaSLachlan Hodges #define MM81X_HIF_IRQ_MASK_ALL                                       \
22*b1906ceaSLachlan Hodges 	(GENMASK(13, 0) | MM81X_HIF_IRQ_BYPASS_TX_STATUS_AVAILABLE | \
23*b1906ceaSLachlan Hodges 	 MM81X_HIF_IRQ_BYPASS_CMD_RESP_AVAILABLE)
24*b1906ceaSLachlan Hodges 
25*b1906ceaSLachlan Hodges enum mm81x_hif_flags {
26*b1906ceaSLachlan Hodges 	MM81X_HIF_FLAGS_DIR_TO_HOST = BIT(0),
27*b1906ceaSLachlan Hodges 	MM81X_HIF_FLAGS_DIR_TO_CHIP = BIT(1),
28*b1906ceaSLachlan Hodges 	MM81X_HIF_FLAGS_COMMAND = BIT(2),
29*b1906ceaSLachlan Hodges 	MM81X_HIF_FLAGS_BEACON = BIT(3),
30*b1906ceaSLachlan Hodges 	MM81X_HIF_FLAGS_DATA = BIT(4)
31*b1906ceaSLachlan Hodges };
32*b1906ceaSLachlan Hodges 
33*b1906ceaSLachlan Hodges struct mm81x_hif_ops {
34*b1906ceaSLachlan Hodges 	int (*init)(struct mm81x *mors);
35*b1906ceaSLachlan Hodges 	void (*flush_tx_data)(struct mm81x *mors);
36*b1906ceaSLachlan Hodges 	void (*flush_cmds)(struct mm81x *mors);
37*b1906ceaSLachlan Hodges 	void (*finish)(struct mm81x *mors);
38*b1906ceaSLachlan Hodges 	void (*skbq_get_tx_qs)(struct mm81x *mors, struct mm81x_skbq **qs,
39*b1906ceaSLachlan Hodges 			       int *num_qs);
40*b1906ceaSLachlan Hodges 	struct mm81x_skbq *(*get_tx_cmd_queue)(struct mm81x *mors);
41*b1906ceaSLachlan Hodges 	struct mm81x_skbq *(*get_tx_beacon_queue)(struct mm81x *mors);
42*b1906ceaSLachlan Hodges 	struct mm81x_skbq *(*get_tx_mgmt_queue)(struct mm81x *mors);
43*b1906ceaSLachlan Hodges 	struct mm81x_skbq *(*get_tx_data_queue)(struct mm81x *mors, int aci);
44*b1906ceaSLachlan Hodges 	int (*handle_irq)(struct mm81x *mors, u32 status);
45*b1906ceaSLachlan Hodges 	int (*get_tx_buffered_count)(struct mm81x *mors);
46*b1906ceaSLachlan Hodges 	int (*get_tx_status_pending_count)(struct mm81x *mors);
47*b1906ceaSLachlan Hodges };
48*b1906ceaSLachlan Hodges 
mm81x_hif_clear_events(struct mm81x * mors)49*b1906ceaSLachlan Hodges static inline void mm81x_hif_clear_events(struct mm81x *mors)
50*b1906ceaSLachlan Hodges {
51*b1906ceaSLachlan Hodges 	mors->hif.event_flags = 0;
52*b1906ceaSLachlan Hodges }
53*b1906ceaSLachlan Hodges 
mm81x_hif_init(struct mm81x * mors)54*b1906ceaSLachlan Hodges static inline int mm81x_hif_init(struct mm81x *mors)
55*b1906ceaSLachlan Hodges {
56*b1906ceaSLachlan Hodges 	return mors->hif.ops->init(mors);
57*b1906ceaSLachlan Hodges }
58*b1906ceaSLachlan Hodges 
mm81x_hif_flush_tx_data(struct mm81x * mors)59*b1906ceaSLachlan Hodges static inline void mm81x_hif_flush_tx_data(struct mm81x *mors)
60*b1906ceaSLachlan Hodges {
61*b1906ceaSLachlan Hodges 	mors->hif.ops->flush_tx_data(mors);
62*b1906ceaSLachlan Hodges }
63*b1906ceaSLachlan Hodges 
mm81x_hif_flush_cmds(struct mm81x * mors)64*b1906ceaSLachlan Hodges static inline void mm81x_hif_flush_cmds(struct mm81x *mors)
65*b1906ceaSLachlan Hodges {
66*b1906ceaSLachlan Hodges 	mors->hif.ops->flush_cmds(mors);
67*b1906ceaSLachlan Hodges }
68*b1906ceaSLachlan Hodges 
mm81x_hif_finish(struct mm81x * mors)69*b1906ceaSLachlan Hodges static inline void mm81x_hif_finish(struct mm81x *mors)
70*b1906ceaSLachlan Hodges {
71*b1906ceaSLachlan Hodges 	mors->hif.ops->finish(mors);
72*b1906ceaSLachlan Hodges }
73*b1906ceaSLachlan Hodges 
mm81x_hif_skbq_get_tx_qs(struct mm81x * mors,struct mm81x_skbq ** qs,int * num_qs)74*b1906ceaSLachlan Hodges static inline void mm81x_hif_skbq_get_tx_qs(struct mm81x *mors,
75*b1906ceaSLachlan Hodges 					    struct mm81x_skbq **qs, int *num_qs)
76*b1906ceaSLachlan Hodges {
77*b1906ceaSLachlan Hodges 	mors->hif.ops->skbq_get_tx_qs(mors, qs, num_qs);
78*b1906ceaSLachlan Hodges }
79*b1906ceaSLachlan Hodges 
mm81x_hif_get_tx_cmd_queue(struct mm81x * mors)80*b1906ceaSLachlan Hodges static inline struct mm81x_skbq *mm81x_hif_get_tx_cmd_queue(struct mm81x *mors)
81*b1906ceaSLachlan Hodges {
82*b1906ceaSLachlan Hodges 	return mors->hif.ops->get_tx_cmd_queue(mors);
83*b1906ceaSLachlan Hodges }
84*b1906ceaSLachlan Hodges 
85*b1906ceaSLachlan Hodges static inline struct mm81x_skbq *
mm81x_hif_get_tx_beacon_queue(struct mm81x * mors)86*b1906ceaSLachlan Hodges mm81x_hif_get_tx_beacon_queue(struct mm81x *mors)
87*b1906ceaSLachlan Hodges {
88*b1906ceaSLachlan Hodges 	return mors->hif.ops->get_tx_beacon_queue(mors);
89*b1906ceaSLachlan Hodges }
90*b1906ceaSLachlan Hodges 
mm81x_hif_get_tx_mgmt_queue(struct mm81x * mors)91*b1906ceaSLachlan Hodges static inline struct mm81x_skbq *mm81x_hif_get_tx_mgmt_queue(struct mm81x *mors)
92*b1906ceaSLachlan Hodges {
93*b1906ceaSLachlan Hodges 	return mors->hif.ops->get_tx_mgmt_queue(mors);
94*b1906ceaSLachlan Hodges }
95*b1906ceaSLachlan Hodges 
mm81x_hif_get_tx_data_queue(struct mm81x * mors,int aci)96*b1906ceaSLachlan Hodges static inline struct mm81x_skbq *mm81x_hif_get_tx_data_queue(struct mm81x *mors,
97*b1906ceaSLachlan Hodges 							     int aci)
98*b1906ceaSLachlan Hodges {
99*b1906ceaSLachlan Hodges 	return mors->hif.ops->get_tx_data_queue(mors, aci);
100*b1906ceaSLachlan Hodges }
101*b1906ceaSLachlan Hodges 
mm81x_hif_handle_irq(struct mm81x * mors,u32 status)102*b1906ceaSLachlan Hodges static inline int mm81x_hif_handle_irq(struct mm81x *mors, u32 status)
103*b1906ceaSLachlan Hodges {
104*b1906ceaSLachlan Hodges 	return mors->hif.ops->handle_irq(mors, status);
105*b1906ceaSLachlan Hodges }
106*b1906ceaSLachlan Hodges 
mm81x_hif_get_tx_buffered_count(struct mm81x * mors)107*b1906ceaSLachlan Hodges static inline int mm81x_hif_get_tx_buffered_count(struct mm81x *mors)
108*b1906ceaSLachlan Hodges {
109*b1906ceaSLachlan Hodges 	return mors->hif.ops->get_tx_buffered_count(mors);
110*b1906ceaSLachlan Hodges }
111*b1906ceaSLachlan Hodges 
mm81x_hif_get_tx_status_pending_count(struct mm81x * mors)112*b1906ceaSLachlan Hodges static inline int mm81x_hif_get_tx_status_pending_count(struct mm81x *mors)
113*b1906ceaSLachlan Hodges {
114*b1906ceaSLachlan Hodges 	return mors->hif.ops->get_tx_status_pending_count(mors);
115*b1906ceaSLachlan Hodges }
116*b1906ceaSLachlan Hodges 
117*b1906ceaSLachlan Hodges #endif /* _MM81X_HIF_H_ */
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