1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries. 4 * All rights reserved. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/mmc/sdio_func.h> 9 #include <linux/mmc/sdio_ids.h> 10 #include <linux/mmc/host.h> 11 #include <linux/mmc/sdio.h> 12 #include <linux/of_irq.h> 13 14 #include "netdev.h" 15 #include "cfg80211.h" 16 17 #define SDIO_MODALIAS "wilc1000_sdio" 18 19 static const struct sdio_device_id wilc_sdio_ids[] = { 20 { SDIO_DEVICE(SDIO_VENDOR_ID_MICROCHIP_WILC, SDIO_DEVICE_ID_MICROCHIP_WILC1000) }, 21 { }, 22 }; 23 MODULE_DEVICE_TABLE(sdio, wilc_sdio_ids); 24 25 #define WILC_SDIO_BLOCK_SIZE 512 26 27 static int wilc_sdio_init(struct wilc *wilc, bool resume); 28 static int wilc_sdio_deinit(struct wilc *wilc); 29 30 struct wilc_sdio { 31 bool irq_gpio; 32 u32 block_size; 33 bool isinit; 34 u8 *cmd53_buf; 35 }; 36 37 struct sdio_cmd52 { 38 u32 read_write: 1; 39 u32 function: 3; 40 u32 raw: 1; 41 u32 address: 17; 42 u32 data: 8; 43 }; 44 45 struct sdio_cmd53 { 46 u32 read_write: 1; 47 u32 function: 3; 48 u32 block_mode: 1; 49 u32 increment: 1; 50 u32 address: 17; 51 u32 count: 9; 52 u8 *buffer; 53 u32 block_size; 54 bool use_global_buf; 55 }; 56 57 static const struct wilc_hif_func wilc_hif_sdio; 58 59 static void wilc_sdio_interrupt(struct sdio_func *func) 60 { 61 sdio_release_host(func); 62 wilc_handle_isr(sdio_get_drvdata(func)); 63 sdio_claim_host(func); 64 } 65 66 static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd) 67 { 68 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev); 69 int ret; 70 u8 data; 71 72 sdio_claim_host(func); 73 74 func->num = cmd->function; 75 if (cmd->read_write) { /* write */ 76 if (cmd->raw) { 77 sdio_writeb(func, cmd->data, cmd->address, &ret); 78 data = sdio_readb(func, cmd->address, &ret); 79 cmd->data = data; 80 } else { 81 sdio_writeb(func, cmd->data, cmd->address, &ret); 82 } 83 } else { /* read */ 84 data = sdio_readb(func, cmd->address, &ret); 85 cmd->data = data; 86 } 87 88 sdio_release_host(func); 89 90 if (ret) 91 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret); 92 return ret; 93 } 94 95 static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd) 96 { 97 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev); 98 int size, ret; 99 struct wilc_sdio *sdio_priv = wilc->bus_data; 100 u8 *buf = cmd->buffer; 101 102 sdio_claim_host(func); 103 104 func->num = cmd->function; 105 func->cur_blksize = cmd->block_size; 106 if (cmd->block_mode) 107 size = cmd->count * cmd->block_size; 108 else 109 size = cmd->count; 110 111 if (cmd->use_global_buf) { 112 if (size > sizeof(u32)) { 113 ret = -EINVAL; 114 goto out; 115 } 116 buf = sdio_priv->cmd53_buf; 117 } 118 119 if (cmd->read_write) { /* write */ 120 if (cmd->use_global_buf) 121 memcpy(buf, cmd->buffer, size); 122 123 ret = sdio_memcpy_toio(func, cmd->address, buf, size); 124 } else { /* read */ 125 ret = sdio_memcpy_fromio(func, buf, cmd->address, size); 126 127 if (cmd->use_global_buf) 128 memcpy(cmd->buffer, buf, size); 129 } 130 out: 131 sdio_release_host(func); 132 133 if (ret) 134 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret); 135 136 return ret; 137 } 138 139 static int wilc_sdio_probe(struct sdio_func *func, 140 const struct sdio_device_id *id) 141 { 142 struct wilc_sdio *sdio_priv; 143 struct wilc_vif *vif; 144 struct wilc *wilc; 145 int ret; 146 147 148 sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL); 149 if (!sdio_priv) 150 return -ENOMEM; 151 152 sdio_priv->cmd53_buf = kzalloc(sizeof(u32), GFP_KERNEL); 153 if (!sdio_priv->cmd53_buf) { 154 ret = -ENOMEM; 155 goto free; 156 } 157 158 ret = wilc_cfg80211_init(&wilc, &func->dev, WILC_HIF_SDIO, 159 &wilc_hif_sdio); 160 if (ret) 161 goto free; 162 163 if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) { 164 struct device_node *np = func->card->dev.of_node; 165 int irq_num = of_irq_get(np, 0); 166 167 if (irq_num > 0) { 168 wilc->dev_irq_num = irq_num; 169 sdio_priv->irq_gpio = true; 170 } 171 } 172 173 sdio_set_drvdata(func, wilc); 174 wilc->bus_data = sdio_priv; 175 wilc->dev = &func->dev; 176 177 wilc->rtc_clk = devm_clk_get_optional_enabled(&func->card->dev, "rtc"); 178 if (IS_ERR(wilc->rtc_clk)) { 179 ret = PTR_ERR(wilc->rtc_clk); 180 goto dispose_irq; 181 } 182 183 wilc_sdio_init(wilc, false); 184 185 ret = wilc_get_chipid(wilc); 186 if (ret) 187 goto dispose_irq; 188 189 ret = wilc_cfg80211_register(wilc); 190 if (ret) 191 goto dispose_irq; 192 193 ret = wilc_load_mac_from_nv(wilc); 194 if (ret) { 195 pr_err("Can not retrieve MAC address from chip\n"); 196 goto unregister_wiphy; 197 } 198 199 wilc_sdio_deinit(wilc); 200 201 vif = wilc_netdev_ifc_init(wilc, "wlan%d", WILC_STATION_MODE, 202 NL80211_IFTYPE_STATION, false); 203 if (IS_ERR(vif)) { 204 ret = PTR_ERR(vif); 205 goto unregister_wiphy; 206 } 207 208 dev_info(&func->dev, "Driver Initializing success\n"); 209 return 0; 210 211 unregister_wiphy: 212 wiphy_unregister(wilc->wiphy); 213 dispose_irq: 214 irq_dispose_mapping(wilc->dev_irq_num); 215 wilc_netdev_cleanup(wilc); 216 wiphy_free(wilc->wiphy); 217 free: 218 kfree(sdio_priv->cmd53_buf); 219 kfree(sdio_priv); 220 return ret; 221 } 222 223 static void wilc_sdio_remove(struct sdio_func *func) 224 { 225 struct wilc *wilc = sdio_get_drvdata(func); 226 struct wilc_sdio *sdio_priv = wilc->bus_data; 227 228 wilc_netdev_cleanup(wilc); 229 wiphy_unregister(wilc->wiphy); 230 wiphy_free(wilc->wiphy); 231 kfree(sdio_priv->cmd53_buf); 232 kfree(sdio_priv); 233 } 234 235 static int wilc_sdio_reset(struct wilc *wilc) 236 { 237 struct sdio_cmd52 cmd; 238 int ret; 239 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 240 241 cmd.read_write = 1; 242 cmd.function = 0; 243 cmd.raw = 0; 244 cmd.address = SDIO_CCCR_ABORT; 245 cmd.data = WILC_SDIO_CCCR_ABORT_RESET; 246 ret = wilc_sdio_cmd52(wilc, &cmd); 247 if (ret) { 248 dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n"); 249 return ret; 250 } 251 return 0; 252 } 253 254 static bool wilc_sdio_is_init(struct wilc *wilc) 255 { 256 struct wilc_sdio *sdio_priv = wilc->bus_data; 257 258 return sdio_priv->isinit; 259 } 260 261 static int wilc_sdio_enable_interrupt(struct wilc *dev) 262 { 263 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); 264 int ret = 0; 265 266 sdio_claim_host(func); 267 ret = sdio_claim_irq(func, wilc_sdio_interrupt); 268 sdio_release_host(func); 269 270 if (ret < 0) { 271 dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret); 272 ret = -EIO; 273 } 274 return ret; 275 } 276 277 static void wilc_sdio_disable_interrupt(struct wilc *dev) 278 { 279 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); 280 int ret; 281 282 sdio_claim_host(func); 283 ret = sdio_release_irq(func); 284 if (ret < 0) 285 dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret); 286 sdio_release_host(func); 287 } 288 289 /******************************************** 290 * 291 * Function 0 292 * 293 ********************************************/ 294 295 static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr) 296 { 297 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 298 struct sdio_cmd52 cmd; 299 int ret; 300 301 /** 302 * Review: BIG ENDIAN 303 **/ 304 cmd.read_write = 1; 305 cmd.function = 0; 306 cmd.raw = 0; 307 cmd.address = WILC_SDIO_FBR_CSA_REG; 308 cmd.data = (u8)adr; 309 ret = wilc_sdio_cmd52(wilc, &cmd); 310 if (ret) { 311 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 312 cmd.address); 313 return ret; 314 } 315 316 cmd.address = WILC_SDIO_FBR_CSA_REG + 1; 317 cmd.data = (u8)(adr >> 8); 318 ret = wilc_sdio_cmd52(wilc, &cmd); 319 if (ret) { 320 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 321 cmd.address); 322 return ret; 323 } 324 325 cmd.address = WILC_SDIO_FBR_CSA_REG + 2; 326 cmd.data = (u8)(adr >> 16); 327 ret = wilc_sdio_cmd52(wilc, &cmd); 328 if (ret) { 329 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 330 cmd.address); 331 return ret; 332 } 333 334 return 0; 335 } 336 337 static int wilc_sdio_set_block_size(struct wilc *wilc, u8 func_num, 338 u32 block_size) 339 { 340 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 341 struct sdio_cmd52 cmd; 342 int ret; 343 344 cmd.read_write = 1; 345 cmd.function = 0; 346 cmd.raw = 0; 347 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE; 348 cmd.data = (u8)block_size; 349 ret = wilc_sdio_cmd52(wilc, &cmd); 350 if (ret) { 351 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 352 cmd.address); 353 return ret; 354 } 355 356 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE + 1; 357 cmd.data = (u8)(block_size >> 8); 358 ret = wilc_sdio_cmd52(wilc, &cmd); 359 if (ret) { 360 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 361 cmd.address); 362 return ret; 363 } 364 365 return 0; 366 } 367 368 /******************************************** 369 * 370 * Sdio interfaces 371 * 372 ********************************************/ 373 static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) 374 { 375 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 376 struct wilc_sdio *sdio_priv = wilc->bus_data; 377 int ret; 378 379 cpu_to_le32s(&data); 380 381 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */ 382 struct sdio_cmd52 cmd; 383 384 cmd.read_write = 1; 385 cmd.function = 0; 386 cmd.raw = 0; 387 cmd.address = addr; 388 cmd.data = data; 389 ret = wilc_sdio_cmd52(wilc, &cmd); 390 if (ret) 391 dev_err(&func->dev, 392 "Failed cmd 52, read reg (%08x) ...\n", addr); 393 } else { 394 struct sdio_cmd53 cmd; 395 396 /** 397 * set the AHB address 398 **/ 399 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 400 if (ret) 401 return ret; 402 403 cmd.read_write = 1; 404 cmd.function = 0; 405 cmd.address = WILC_SDIO_FBR_DATA_REG; 406 cmd.block_mode = 0; 407 cmd.increment = 1; 408 cmd.count = sizeof(u32); 409 cmd.buffer = (u8 *)&data; 410 cmd.use_global_buf = true; 411 cmd.block_size = sdio_priv->block_size; 412 ret = wilc_sdio_cmd53(wilc, &cmd); 413 if (ret) 414 dev_err(&func->dev, 415 "Failed cmd53, write reg (%08x)...\n", addr); 416 } 417 418 return ret; 419 } 420 421 static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) 422 { 423 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 424 struct wilc_sdio *sdio_priv = wilc->bus_data; 425 u32 block_size = sdio_priv->block_size; 426 struct sdio_cmd53 cmd; 427 int nblk, nleft, ret; 428 429 cmd.read_write = 1; 430 if (addr > 0) { 431 /** 432 * func 0 access 433 **/ 434 cmd.function = 0; 435 cmd.address = WILC_SDIO_FBR_DATA_REG; 436 } else { 437 /** 438 * func 1 access 439 **/ 440 cmd.function = 1; 441 cmd.address = WILC_SDIO_F1_DATA_REG; 442 } 443 444 size = ALIGN(size, 4); 445 nblk = size / block_size; 446 nleft = size % block_size; 447 448 cmd.use_global_buf = false; 449 if (nblk > 0) { 450 cmd.block_mode = 1; 451 cmd.increment = 1; 452 cmd.count = nblk; 453 cmd.buffer = buf; 454 cmd.block_size = block_size; 455 if (addr > 0) { 456 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 457 if (ret) 458 return ret; 459 } 460 ret = wilc_sdio_cmd53(wilc, &cmd); 461 if (ret) { 462 dev_err(&func->dev, 463 "Failed cmd53 [%x], block send...\n", addr); 464 return ret; 465 } 466 if (addr > 0) 467 addr += nblk * block_size; 468 buf += nblk * block_size; 469 } 470 471 if (nleft > 0) { 472 cmd.block_mode = 0; 473 cmd.increment = 1; 474 cmd.count = nleft; 475 cmd.buffer = buf; 476 477 cmd.block_size = block_size; 478 479 if (addr > 0) { 480 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 481 if (ret) 482 return ret; 483 } 484 ret = wilc_sdio_cmd53(wilc, &cmd); 485 if (ret) { 486 dev_err(&func->dev, 487 "Failed cmd53 [%x], bytes send...\n", addr); 488 return ret; 489 } 490 } 491 492 return 0; 493 } 494 495 static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) 496 { 497 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 498 struct wilc_sdio *sdio_priv = wilc->bus_data; 499 int ret; 500 501 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */ 502 struct sdio_cmd52 cmd; 503 504 cmd.read_write = 0; 505 cmd.function = 0; 506 cmd.raw = 0; 507 cmd.address = addr; 508 ret = wilc_sdio_cmd52(wilc, &cmd); 509 if (ret) { 510 dev_err(&func->dev, 511 "Failed cmd 52, read reg (%08x) ...\n", addr); 512 return ret; 513 } 514 *data = cmd.data; 515 } else { 516 struct sdio_cmd53 cmd; 517 518 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 519 if (ret) 520 return ret; 521 522 cmd.read_write = 0; 523 cmd.function = 0; 524 cmd.address = WILC_SDIO_FBR_DATA_REG; 525 cmd.block_mode = 0; 526 cmd.increment = 1; 527 cmd.count = sizeof(u32); 528 cmd.buffer = (u8 *)data; 529 cmd.use_global_buf = true; 530 531 cmd.block_size = sdio_priv->block_size; 532 ret = wilc_sdio_cmd53(wilc, &cmd); 533 if (ret) { 534 dev_err(&func->dev, 535 "Failed cmd53, read reg (%08x)...\n", addr); 536 return ret; 537 } 538 } 539 540 le32_to_cpus(data); 541 return 0; 542 } 543 544 static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) 545 { 546 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 547 struct wilc_sdio *sdio_priv = wilc->bus_data; 548 u32 block_size = sdio_priv->block_size; 549 struct sdio_cmd53 cmd; 550 int nblk, nleft, ret; 551 552 cmd.read_write = 0; 553 if (addr > 0) { 554 /** 555 * func 0 access 556 **/ 557 cmd.function = 0; 558 cmd.address = WILC_SDIO_FBR_DATA_REG; 559 } else { 560 /** 561 * func 1 access 562 **/ 563 cmd.function = 1; 564 cmd.address = WILC_SDIO_F1_DATA_REG; 565 } 566 567 size = ALIGN(size, 4); 568 nblk = size / block_size; 569 nleft = size % block_size; 570 571 cmd.use_global_buf = false; 572 if (nblk > 0) { 573 cmd.block_mode = 1; 574 cmd.increment = 1; 575 cmd.count = nblk; 576 cmd.buffer = buf; 577 cmd.block_size = block_size; 578 if (addr > 0) { 579 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 580 if (ret) 581 return ret; 582 } 583 ret = wilc_sdio_cmd53(wilc, &cmd); 584 if (ret) { 585 dev_err(&func->dev, 586 "Failed cmd53 [%x], block read...\n", addr); 587 return ret; 588 } 589 if (addr > 0) 590 addr += nblk * block_size; 591 buf += nblk * block_size; 592 } /* if (nblk > 0) */ 593 594 if (nleft > 0) { 595 cmd.block_mode = 0; 596 cmd.increment = 1; 597 cmd.count = nleft; 598 cmd.buffer = buf; 599 600 cmd.block_size = block_size; 601 602 if (addr > 0) { 603 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 604 if (ret) 605 return ret; 606 } 607 ret = wilc_sdio_cmd53(wilc, &cmd); 608 if (ret) { 609 dev_err(&func->dev, 610 "Failed cmd53 [%x], bytes read...\n", addr); 611 return ret; 612 } 613 } 614 615 return 0; 616 } 617 618 /******************************************** 619 * 620 * Bus interfaces 621 * 622 ********************************************/ 623 624 static int wilc_sdio_deinit(struct wilc *wilc) 625 { 626 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 627 struct wilc_sdio *sdio_priv = wilc->bus_data; 628 struct sdio_cmd52 cmd; 629 int ret; 630 631 cmd.read_write = 1; 632 cmd.function = 0; 633 cmd.raw = 1; 634 635 /* Disable all functions interrupts */ 636 cmd.address = SDIO_CCCR_IENx; 637 cmd.data = 0; 638 ret = wilc_sdio_cmd52(wilc, &cmd); 639 if (ret) { 640 dev_err(&func->dev, "Failed to disable functions interrupts\n"); 641 return ret; 642 } 643 644 /* Disable all functions */ 645 cmd.address = SDIO_CCCR_IOEx; 646 cmd.data = 0; 647 ret = wilc_sdio_cmd52(wilc, &cmd); 648 if (ret) { 649 dev_err(&func->dev, 650 "Failed to reset all functions\n"); 651 return ret; 652 } 653 654 /* Disable CSA */ 655 cmd.read_write = 0; 656 cmd.address = SDIO_FBR_BASE(1); 657 ret = wilc_sdio_cmd52(wilc, &cmd); 658 if (ret) { 659 dev_err(&func->dev, 660 "Failed to read CSA for function 1\n"); 661 return ret; 662 } 663 cmd.read_write = 1; 664 cmd.address = SDIO_FBR_BASE(1); 665 cmd.data &= ~SDIO_FBR_ENABLE_CSA; 666 ret = wilc_sdio_cmd52(wilc, &cmd); 667 if (ret) { 668 dev_err(&func->dev, 669 "Failed to disable CSA for function 1\n"); 670 return ret; 671 } 672 673 sdio_priv->isinit = false; 674 return 0; 675 } 676 677 static int wilc_sdio_init(struct wilc *wilc, bool resume) 678 { 679 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 680 struct wilc_sdio *sdio_priv = wilc->bus_data; 681 struct sdio_cmd52 cmd; 682 int loop, ret; 683 684 /** 685 * function 0 csa enable 686 **/ 687 cmd.read_write = 1; 688 cmd.function = 0; 689 cmd.raw = 1; 690 cmd.address = SDIO_FBR_BASE(1); 691 cmd.data = SDIO_FBR_ENABLE_CSA; 692 ret = wilc_sdio_cmd52(wilc, &cmd); 693 if (ret) { 694 dev_err(&func->dev, "Fail cmd 52, enable csa...\n"); 695 return ret; 696 } 697 698 /** 699 * function 0 block size 700 **/ 701 ret = wilc_sdio_set_block_size(wilc, 0, WILC_SDIO_BLOCK_SIZE); 702 if (ret) { 703 dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n"); 704 return ret; 705 } 706 sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE; 707 708 /** 709 * enable func1 IO 710 **/ 711 cmd.read_write = 1; 712 cmd.function = 0; 713 cmd.raw = 1; 714 cmd.address = SDIO_CCCR_IOEx; 715 cmd.data = WILC_SDIO_CCCR_IO_EN_FUNC1; 716 ret = wilc_sdio_cmd52(wilc, &cmd); 717 if (ret) { 718 dev_err(&func->dev, 719 "Fail cmd 52, set IOE register...\n"); 720 return ret; 721 } 722 723 /** 724 * make sure func 1 is up 725 **/ 726 cmd.read_write = 0; 727 cmd.function = 0; 728 cmd.raw = 0; 729 cmd.address = SDIO_CCCR_IORx; 730 loop = 3; 731 do { 732 cmd.data = 0; 733 ret = wilc_sdio_cmd52(wilc, &cmd); 734 if (ret) { 735 dev_err(&func->dev, 736 "Fail cmd 52, get IOR register...\n"); 737 return ret; 738 } 739 if (cmd.data == WILC_SDIO_CCCR_IO_EN_FUNC1) 740 break; 741 } while (loop--); 742 743 if (loop <= 0) { 744 dev_err(&func->dev, "Fail func 1 is not ready...\n"); 745 return -EINVAL; 746 } 747 748 /** 749 * func 1 is ready, set func 1 block size 750 **/ 751 ret = wilc_sdio_set_block_size(wilc, 1, WILC_SDIO_BLOCK_SIZE); 752 if (ret) { 753 dev_err(&func->dev, "Fail set func 1 block size...\n"); 754 return ret; 755 } 756 757 /** 758 * func 1 interrupt enable 759 **/ 760 cmd.read_write = 1; 761 cmd.function = 0; 762 cmd.raw = 1; 763 cmd.address = SDIO_CCCR_IENx; 764 cmd.data = WILC_SDIO_CCCR_IEN_MASTER | WILC_SDIO_CCCR_IEN_FUNC1; 765 ret = wilc_sdio_cmd52(wilc, &cmd); 766 if (ret) { 767 dev_err(&func->dev, "Fail cmd 52, set IEN register...\n"); 768 return ret; 769 } 770 771 sdio_priv->isinit = true; 772 return 0; 773 } 774 775 static int wilc_sdio_read_size(struct wilc *wilc, u32 *size) 776 { 777 u32 tmp; 778 struct sdio_cmd52 cmd; 779 780 /** 781 * Read DMA count in words 782 **/ 783 cmd.read_write = 0; 784 cmd.function = 0; 785 cmd.raw = 0; 786 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG; 787 cmd.data = 0; 788 wilc_sdio_cmd52(wilc, &cmd); 789 tmp = cmd.data; 790 791 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG + 1; 792 cmd.data = 0; 793 wilc_sdio_cmd52(wilc, &cmd); 794 tmp |= (cmd.data << 8); 795 796 *size = tmp; 797 return 0; 798 } 799 800 static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status) 801 { 802 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 803 struct wilc_sdio *sdio_priv = wilc->bus_data; 804 u32 tmp; 805 u8 irq_flags; 806 struct sdio_cmd52 cmd; 807 808 wilc_sdio_read_size(wilc, &tmp); 809 810 /** 811 * Read IRQ flags 812 **/ 813 if (!sdio_priv->irq_gpio) { 814 cmd.function = 1; 815 cmd.address = WILC_SDIO_EXT_IRQ_FLAG_REG; 816 } else { 817 cmd.function = 0; 818 cmd.address = is_wilc1000(wilc->chipid) ? 819 WILC1000_SDIO_IRQ_FLAG_REG : 820 WILC3000_SDIO_IRQ_FLAG_REG; 821 } 822 cmd.raw = 0; 823 cmd.read_write = 0; 824 cmd.data = 0; 825 wilc_sdio_cmd52(wilc, &cmd); 826 irq_flags = cmd.data; 827 828 if (sdio_priv->irq_gpio) 829 irq_flags &= is_wilc1000(wilc->chipid) ? 0x1f : 0x0f; 830 831 tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data); 832 833 if (FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags)) 834 dev_err(&func->dev, "Unexpected interrupt (1) int=%lx\n", 835 FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags)); 836 837 *int_status = tmp; 838 839 return 0; 840 } 841 842 static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val) 843 { 844 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 845 struct wilc_sdio *sdio_priv = wilc->bus_data; 846 int ret; 847 u32 reg = 0; 848 849 if (sdio_priv->irq_gpio) 850 reg = val & (BIT(MAX_NUM_INT) - 1); 851 852 if (is_wilc1000(wilc->chipid)) { 853 /* select VMM table 0 */ 854 if (val & SEL_VMM_TBL0) 855 reg |= BIT(5); 856 /* select VMM table 1 */ 857 if (val & SEL_VMM_TBL1) 858 reg |= BIT(6); 859 /* enable VMM */ 860 if (val & EN_VMM) 861 reg |= BIT(7); 862 } else { 863 if (sdio_priv->irq_gpio && reg) { 864 struct sdio_cmd52 cmd; 865 866 cmd.read_write = 1; 867 cmd.function = 0; 868 cmd.raw = 0; 869 cmd.address = WILC3000_SDIO_IRQ_FLAG_REG; 870 cmd.data = reg; 871 872 ret = wilc_sdio_cmd52(wilc, &cmd); 873 if (ret) { 874 dev_err(&func->dev, 875 "Failed cmd52, set 0xfe data (%d) ...\n", 876 __LINE__); 877 return ret; 878 } 879 } 880 881 reg = 0; 882 /* select VMM table 0 */ 883 if (val & SEL_VMM_TBL0) 884 reg |= BIT(0); 885 /* select VMM table 1 */ 886 if (val & SEL_VMM_TBL1) 887 reg |= BIT(1); 888 /* enable VMM */ 889 if (val & EN_VMM) 890 reg |= BIT(2); 891 } 892 893 if (reg) { 894 struct sdio_cmd52 cmd; 895 896 cmd.read_write = 1; 897 cmd.function = 0; 898 cmd.raw = 0; 899 cmd.address = is_wilc1000(wilc->chipid) ? 900 WILC1000_SDIO_IRQ_CLEAR_FLAG_REG : 901 WILC3000_SDIO_VMM_TBL_CTRL_REG; 902 cmd.data = reg; 903 904 ret = wilc_sdio_cmd52(wilc, &cmd); 905 if (ret) { 906 dev_err(&func->dev, 907 "Failed cmd52, set (%02x) data (%d) ...\n", 908 cmd.address, __LINE__); 909 return ret; 910 } 911 } 912 return 0; 913 } 914 915 static int wilc_sdio_sync_ext(struct wilc *wilc, int nint) 916 { 917 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 918 struct wilc_sdio *sdio_priv = wilc->bus_data; 919 920 if (nint > MAX_NUM_INT) { 921 dev_err(&func->dev, "Too many interrupts (%d)...\n", nint); 922 return -EINVAL; 923 } 924 925 if (sdio_priv->irq_gpio) { 926 u32 reg; 927 int ret, i; 928 929 /** 930 * interrupt pin mux select 931 **/ 932 ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, ®); 933 if (ret) { 934 dev_err(&func->dev, "Failed read reg (%08x)...\n", 935 WILC_PIN_MUX_0); 936 return ret; 937 } 938 reg |= BIT(8); 939 ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg); 940 if (ret) { 941 dev_err(&func->dev, "Failed write reg (%08x)...\n", 942 WILC_PIN_MUX_0); 943 return ret; 944 } 945 946 /** 947 * interrupt enable 948 **/ 949 ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, ®); 950 if (ret) { 951 dev_err(&func->dev, "Failed read reg (%08x)...\n", 952 WILC_INTR_ENABLE); 953 return ret; 954 } 955 956 for (i = 0; (i < 5) && (nint > 0); i++, nint--) 957 reg |= BIT((27 + i)); 958 ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg); 959 if (ret) { 960 dev_err(&func->dev, "Failed write reg (%08x)...\n", 961 WILC_INTR_ENABLE); 962 return ret; 963 } 964 if (nint) { 965 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); 966 if (ret) { 967 dev_err(&func->dev, 968 "Failed read reg (%08x)...\n", 969 WILC_INTR2_ENABLE); 970 return ret; 971 } 972 973 for (i = 0; (i < 3) && (nint > 0); i++, nint--) 974 reg |= BIT(i); 975 976 ret = wilc_sdio_write_reg(wilc, WILC_INTR2_ENABLE, reg); 977 if (ret) { 978 dev_err(&func->dev, 979 "Failed write reg (%08x)...\n", 980 WILC_INTR2_ENABLE); 981 return ret; 982 } 983 } 984 } 985 return 0; 986 } 987 988 /* Global sdio HIF function table */ 989 static const struct wilc_hif_func wilc_hif_sdio = { 990 .hif_init = wilc_sdio_init, 991 .hif_deinit = wilc_sdio_deinit, 992 .hif_read_reg = wilc_sdio_read_reg, 993 .hif_write_reg = wilc_sdio_write_reg, 994 .hif_block_rx = wilc_sdio_read, 995 .hif_block_tx = wilc_sdio_write, 996 .hif_read_int = wilc_sdio_read_int, 997 .hif_clear_int_ext = wilc_sdio_clear_int_ext, 998 .hif_read_size = wilc_sdio_read_size, 999 .hif_block_tx_ext = wilc_sdio_write, 1000 .hif_block_rx_ext = wilc_sdio_read, 1001 .hif_sync_ext = wilc_sdio_sync_ext, 1002 .enable_interrupt = wilc_sdio_enable_interrupt, 1003 .disable_interrupt = wilc_sdio_disable_interrupt, 1004 .hif_reset = wilc_sdio_reset, 1005 .hif_is_init = wilc_sdio_is_init, 1006 }; 1007 1008 static int wilc_sdio_suspend(struct device *dev) 1009 { 1010 struct sdio_func *func = dev_to_sdio_func(dev); 1011 struct wilc *wilc = sdio_get_drvdata(func); 1012 int ret; 1013 1014 dev_info(dev, "sdio suspend\n"); 1015 1016 if (!wilc->initialized) 1017 return 0; 1018 1019 if (!IS_ERR(wilc->rtc_clk)) 1020 clk_disable_unprepare(wilc->rtc_clk); 1021 1022 ret = host_sleep_notify(wilc); 1023 if (ret) { 1024 clk_prepare_enable(wilc->rtc_clk); 1025 return ret; 1026 } 1027 1028 wilc_sdio_disable_interrupt(wilc); 1029 1030 return sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 1031 } 1032 1033 static int wilc_sdio_resume(struct device *dev) 1034 { 1035 struct sdio_func *func = dev_to_sdio_func(dev); 1036 struct wilc *wilc = sdio_get_drvdata(func); 1037 1038 dev_info(dev, "sdio resume\n"); 1039 1040 if (!wilc->initialized) 1041 return 0; 1042 1043 if (!IS_ERR(wilc->rtc_clk)) 1044 clk_prepare_enable(wilc->rtc_clk); 1045 1046 wilc_sdio_init(wilc, true); 1047 wilc_sdio_enable_interrupt(wilc); 1048 1049 return host_wakeup_notify(wilc); 1050 } 1051 1052 static const struct of_device_id wilc_of_match[] = { 1053 { .compatible = "microchip,wilc1000", }, 1054 { /* sentinel */ } 1055 }; 1056 MODULE_DEVICE_TABLE(of, wilc_of_match); 1057 1058 static const struct dev_pm_ops wilc_sdio_pm_ops = { 1059 .suspend = wilc_sdio_suspend, 1060 .resume = wilc_sdio_resume, 1061 }; 1062 1063 static struct sdio_driver wilc_sdio_driver = { 1064 .name = SDIO_MODALIAS, 1065 .id_table = wilc_sdio_ids, 1066 .probe = wilc_sdio_probe, 1067 .remove = wilc_sdio_remove, 1068 .drv = { 1069 .pm = &wilc_sdio_pm_ops, 1070 .of_match_table = wilc_of_match, 1071 } 1072 }; 1073 module_sdio_driver(wilc_sdio_driver); 1074 1075 MODULE_DESCRIPTION("Atmel WILC1000 SDIO wireless driver"); 1076 MODULE_LICENSE("GPL"); 1077