1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries. 4 * All rights reserved. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/mmc/sdio_func.h> 9 #include <linux/mmc/sdio_ids.h> 10 #include <linux/mmc/host.h> 11 #include <linux/mmc/sdio.h> 12 #include <linux/of_irq.h> 13 14 #include "netdev.h" 15 #include "cfg80211.h" 16 17 #define SDIO_MODALIAS "wilc1000_sdio" 18 19 static const struct sdio_device_id wilc_sdio_ids[] = { 20 { SDIO_DEVICE(SDIO_VENDOR_ID_MICROCHIP_WILC, SDIO_DEVICE_ID_MICROCHIP_WILC1000) }, 21 { }, 22 }; 23 MODULE_DEVICE_TABLE(sdio, wilc_sdio_ids); 24 25 #define WILC_SDIO_BLOCK_SIZE 512 26 27 static int wilc_sdio_init(struct wilc *wilc, bool resume); 28 static int wilc_sdio_deinit(struct wilc *wilc); 29 30 struct wilc_sdio { 31 bool irq_gpio; 32 u32 block_size; 33 bool isinit; 34 u8 *cmd53_buf; 35 }; 36 37 struct sdio_cmd52 { 38 u32 read_write: 1; 39 u32 function: 3; 40 u32 raw: 1; 41 u32 address: 17; 42 u32 data: 8; 43 }; 44 45 struct sdio_cmd53 { 46 u32 read_write: 1; 47 u32 function: 3; 48 u32 block_mode: 1; 49 u32 increment: 1; 50 u32 address: 17; 51 u32 count: 9; 52 u8 *buffer; 53 u32 block_size; 54 bool use_global_buf; 55 }; 56 57 static const struct wilc_hif_func wilc_hif_sdio; 58 59 static void wilc_sdio_interrupt(struct sdio_func *func) 60 { 61 sdio_release_host(func); 62 wilc_handle_isr(sdio_get_drvdata(func)); 63 sdio_claim_host(func); 64 } 65 66 static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd) 67 { 68 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev); 69 int ret; 70 u8 data; 71 72 sdio_claim_host(func); 73 74 func->num = cmd->function; 75 if (cmd->read_write) { /* write */ 76 if (cmd->raw) { 77 sdio_writeb(func, cmd->data, cmd->address, &ret); 78 data = sdio_readb(func, cmd->address, &ret); 79 cmd->data = data; 80 } else { 81 sdio_writeb(func, cmd->data, cmd->address, &ret); 82 } 83 } else { /* read */ 84 data = sdio_readb(func, cmd->address, &ret); 85 cmd->data = data; 86 } 87 88 sdio_release_host(func); 89 90 if (ret) 91 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret); 92 return ret; 93 } 94 95 static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd) 96 { 97 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev); 98 int size, ret; 99 struct wilc_sdio *sdio_priv = wilc->bus_data; 100 u8 *buf = cmd->buffer; 101 102 sdio_claim_host(func); 103 104 func->num = cmd->function; 105 func->cur_blksize = cmd->block_size; 106 if (cmd->block_mode) 107 size = cmd->count * cmd->block_size; 108 else 109 size = cmd->count; 110 111 if (cmd->use_global_buf) { 112 if (size > sizeof(u32)) { 113 ret = -EINVAL; 114 goto out; 115 } 116 buf = sdio_priv->cmd53_buf; 117 } 118 119 if (cmd->read_write) { /* write */ 120 if (cmd->use_global_buf) 121 memcpy(buf, cmd->buffer, size); 122 123 ret = sdio_memcpy_toio(func, cmd->address, buf, size); 124 } else { /* read */ 125 ret = sdio_memcpy_fromio(func, buf, cmd->address, size); 126 127 if (cmd->use_global_buf) 128 memcpy(cmd->buffer, buf, size); 129 } 130 out: 131 sdio_release_host(func); 132 133 if (ret) 134 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret); 135 136 return ret; 137 } 138 139 static int wilc_sdio_probe(struct sdio_func *func, 140 const struct sdio_device_id *id) 141 { 142 struct wilc_sdio *sdio_priv; 143 struct wilc_vif *vif; 144 struct wilc *wilc; 145 int ret; 146 147 148 sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL); 149 if (!sdio_priv) 150 return -ENOMEM; 151 152 sdio_priv->cmd53_buf = kzalloc(sizeof(u32), GFP_KERNEL); 153 if (!sdio_priv->cmd53_buf) { 154 ret = -ENOMEM; 155 goto free; 156 } 157 158 ret = wilc_cfg80211_init(&wilc, &func->dev, WILC_HIF_SDIO, 159 &wilc_hif_sdio); 160 if (ret) 161 goto free; 162 163 if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) { 164 struct device_node *np = func->card->dev.of_node; 165 int irq_num = of_irq_get(np, 0); 166 167 if (irq_num > 0) { 168 wilc->dev_irq_num = irq_num; 169 sdio_priv->irq_gpio = true; 170 } 171 } 172 173 sdio_set_drvdata(func, wilc); 174 wilc->bus_data = sdio_priv; 175 wilc->dev = &func->dev; 176 177 wilc->rtc_clk = devm_clk_get_optional_enabled(&func->card->dev, "rtc"); 178 if (IS_ERR(wilc->rtc_clk)) { 179 ret = PTR_ERR(wilc->rtc_clk); 180 goto dispose_irq; 181 } 182 183 wilc_sdio_init(wilc, false); 184 185 ret = wilc_get_chipid(wilc); 186 if (ret) 187 goto dispose_irq; 188 189 ret = wilc_cfg80211_register(wilc); 190 if (ret) 191 goto dispose_irq; 192 193 ret = wilc_load_mac_from_nv(wilc); 194 if (ret) { 195 pr_err("Can not retrieve MAC address from chip\n"); 196 goto dispose_irq; 197 } 198 199 wilc_sdio_deinit(wilc); 200 201 vif = wilc_netdev_ifc_init(wilc, "wlan%d", WILC_STATION_MODE, 202 NL80211_IFTYPE_STATION, false); 203 if (IS_ERR(vif)) { 204 ret = PTR_ERR(vif); 205 goto dispose_irq; 206 } 207 208 dev_info(&func->dev, "Driver Initializing success\n"); 209 return 0; 210 211 dispose_irq: 212 irq_dispose_mapping(wilc->dev_irq_num); 213 wilc_netdev_cleanup(wilc); 214 free: 215 kfree(sdio_priv->cmd53_buf); 216 kfree(sdio_priv); 217 return ret; 218 } 219 220 static void wilc_sdio_remove(struct sdio_func *func) 221 { 222 struct wilc *wilc = sdio_get_drvdata(func); 223 struct wilc_sdio *sdio_priv = wilc->bus_data; 224 225 wilc_netdev_cleanup(wilc); 226 kfree(sdio_priv->cmd53_buf); 227 kfree(sdio_priv); 228 } 229 230 static int wilc_sdio_reset(struct wilc *wilc) 231 { 232 struct sdio_cmd52 cmd; 233 int ret; 234 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 235 236 cmd.read_write = 1; 237 cmd.function = 0; 238 cmd.raw = 0; 239 cmd.address = SDIO_CCCR_ABORT; 240 cmd.data = WILC_SDIO_CCCR_ABORT_RESET; 241 ret = wilc_sdio_cmd52(wilc, &cmd); 242 if (ret) { 243 dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n"); 244 return ret; 245 } 246 return 0; 247 } 248 249 static bool wilc_sdio_is_init(struct wilc *wilc) 250 { 251 struct wilc_sdio *sdio_priv = wilc->bus_data; 252 253 return sdio_priv->isinit; 254 } 255 256 static int wilc_sdio_enable_interrupt(struct wilc *dev) 257 { 258 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); 259 int ret = 0; 260 261 sdio_claim_host(func); 262 ret = sdio_claim_irq(func, wilc_sdio_interrupt); 263 sdio_release_host(func); 264 265 if (ret < 0) { 266 dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret); 267 ret = -EIO; 268 } 269 return ret; 270 } 271 272 static void wilc_sdio_disable_interrupt(struct wilc *dev) 273 { 274 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); 275 int ret; 276 277 sdio_claim_host(func); 278 ret = sdio_release_irq(func); 279 if (ret < 0) 280 dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret); 281 sdio_release_host(func); 282 } 283 284 /******************************************** 285 * 286 * Function 0 287 * 288 ********************************************/ 289 290 static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr) 291 { 292 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 293 struct sdio_cmd52 cmd; 294 int ret; 295 296 /** 297 * Review: BIG ENDIAN 298 **/ 299 cmd.read_write = 1; 300 cmd.function = 0; 301 cmd.raw = 0; 302 cmd.address = WILC_SDIO_FBR_CSA_REG; 303 cmd.data = (u8)adr; 304 ret = wilc_sdio_cmd52(wilc, &cmd); 305 if (ret) { 306 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 307 cmd.address); 308 return ret; 309 } 310 311 cmd.address = WILC_SDIO_FBR_CSA_REG + 1; 312 cmd.data = (u8)(adr >> 8); 313 ret = wilc_sdio_cmd52(wilc, &cmd); 314 if (ret) { 315 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 316 cmd.address); 317 return ret; 318 } 319 320 cmd.address = WILC_SDIO_FBR_CSA_REG + 2; 321 cmd.data = (u8)(adr >> 16); 322 ret = wilc_sdio_cmd52(wilc, &cmd); 323 if (ret) { 324 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 325 cmd.address); 326 return ret; 327 } 328 329 return 0; 330 } 331 332 static int wilc_sdio_set_block_size(struct wilc *wilc, u8 func_num, 333 u32 block_size) 334 { 335 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 336 struct sdio_cmd52 cmd; 337 int ret; 338 339 cmd.read_write = 1; 340 cmd.function = 0; 341 cmd.raw = 0; 342 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE; 343 cmd.data = (u8)block_size; 344 ret = wilc_sdio_cmd52(wilc, &cmd); 345 if (ret) { 346 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 347 cmd.address); 348 return ret; 349 } 350 351 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE + 1; 352 cmd.data = (u8)(block_size >> 8); 353 ret = wilc_sdio_cmd52(wilc, &cmd); 354 if (ret) { 355 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 356 cmd.address); 357 return ret; 358 } 359 360 return 0; 361 } 362 363 /******************************************** 364 * 365 * Sdio interfaces 366 * 367 ********************************************/ 368 static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) 369 { 370 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 371 struct wilc_sdio *sdio_priv = wilc->bus_data; 372 int ret; 373 374 cpu_to_le32s(&data); 375 376 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */ 377 struct sdio_cmd52 cmd; 378 379 cmd.read_write = 1; 380 cmd.function = 0; 381 cmd.raw = 0; 382 cmd.address = addr; 383 cmd.data = data; 384 ret = wilc_sdio_cmd52(wilc, &cmd); 385 if (ret) 386 dev_err(&func->dev, 387 "Failed cmd 52, read reg (%08x) ...\n", addr); 388 } else { 389 struct sdio_cmd53 cmd; 390 391 /** 392 * set the AHB address 393 **/ 394 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 395 if (ret) 396 return ret; 397 398 cmd.read_write = 1; 399 cmd.function = 0; 400 cmd.address = WILC_SDIO_FBR_DATA_REG; 401 cmd.block_mode = 0; 402 cmd.increment = 1; 403 cmd.count = sizeof(u32); 404 cmd.buffer = (u8 *)&data; 405 cmd.use_global_buf = true; 406 cmd.block_size = sdio_priv->block_size; 407 ret = wilc_sdio_cmd53(wilc, &cmd); 408 if (ret) 409 dev_err(&func->dev, 410 "Failed cmd53, write reg (%08x)...\n", addr); 411 } 412 413 return ret; 414 } 415 416 static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) 417 { 418 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 419 struct wilc_sdio *sdio_priv = wilc->bus_data; 420 u32 block_size = sdio_priv->block_size; 421 struct sdio_cmd53 cmd; 422 int nblk, nleft, ret; 423 424 cmd.read_write = 1; 425 if (addr > 0) { 426 /** 427 * func 0 access 428 **/ 429 cmd.function = 0; 430 cmd.address = WILC_SDIO_FBR_DATA_REG; 431 } else { 432 /** 433 * func 1 access 434 **/ 435 cmd.function = 1; 436 cmd.address = WILC_SDIO_F1_DATA_REG; 437 } 438 439 size = ALIGN(size, 4); 440 nblk = size / block_size; 441 nleft = size % block_size; 442 443 cmd.use_global_buf = false; 444 if (nblk > 0) { 445 cmd.block_mode = 1; 446 cmd.increment = 1; 447 cmd.count = nblk; 448 cmd.buffer = buf; 449 cmd.block_size = block_size; 450 if (addr > 0) { 451 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 452 if (ret) 453 return ret; 454 } 455 ret = wilc_sdio_cmd53(wilc, &cmd); 456 if (ret) { 457 dev_err(&func->dev, 458 "Failed cmd53 [%x], block send...\n", addr); 459 return ret; 460 } 461 if (addr > 0) 462 addr += nblk * block_size; 463 buf += nblk * block_size; 464 } 465 466 if (nleft > 0) { 467 cmd.block_mode = 0; 468 cmd.increment = 1; 469 cmd.count = nleft; 470 cmd.buffer = buf; 471 472 cmd.block_size = block_size; 473 474 if (addr > 0) { 475 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 476 if (ret) 477 return ret; 478 } 479 ret = wilc_sdio_cmd53(wilc, &cmd); 480 if (ret) { 481 dev_err(&func->dev, 482 "Failed cmd53 [%x], bytes send...\n", addr); 483 return ret; 484 } 485 } 486 487 return 0; 488 } 489 490 static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) 491 { 492 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 493 struct wilc_sdio *sdio_priv = wilc->bus_data; 494 int ret; 495 496 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */ 497 struct sdio_cmd52 cmd; 498 499 cmd.read_write = 0; 500 cmd.function = 0; 501 cmd.raw = 0; 502 cmd.address = addr; 503 ret = wilc_sdio_cmd52(wilc, &cmd); 504 if (ret) { 505 dev_err(&func->dev, 506 "Failed cmd 52, read reg (%08x) ...\n", addr); 507 return ret; 508 } 509 *data = cmd.data; 510 } else { 511 struct sdio_cmd53 cmd; 512 513 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 514 if (ret) 515 return ret; 516 517 cmd.read_write = 0; 518 cmd.function = 0; 519 cmd.address = WILC_SDIO_FBR_DATA_REG; 520 cmd.block_mode = 0; 521 cmd.increment = 1; 522 cmd.count = sizeof(u32); 523 cmd.buffer = (u8 *)data; 524 cmd.use_global_buf = true; 525 526 cmd.block_size = sdio_priv->block_size; 527 ret = wilc_sdio_cmd53(wilc, &cmd); 528 if (ret) { 529 dev_err(&func->dev, 530 "Failed cmd53, read reg (%08x)...\n", addr); 531 return ret; 532 } 533 } 534 535 le32_to_cpus(data); 536 return 0; 537 } 538 539 static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) 540 { 541 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 542 struct wilc_sdio *sdio_priv = wilc->bus_data; 543 u32 block_size = sdio_priv->block_size; 544 struct sdio_cmd53 cmd; 545 int nblk, nleft, ret; 546 547 cmd.read_write = 0; 548 if (addr > 0) { 549 /** 550 * func 0 access 551 **/ 552 cmd.function = 0; 553 cmd.address = WILC_SDIO_FBR_DATA_REG; 554 } else { 555 /** 556 * func 1 access 557 **/ 558 cmd.function = 1; 559 cmd.address = WILC_SDIO_F1_DATA_REG; 560 } 561 562 size = ALIGN(size, 4); 563 nblk = size / block_size; 564 nleft = size % block_size; 565 566 cmd.use_global_buf = false; 567 if (nblk > 0) { 568 cmd.block_mode = 1; 569 cmd.increment = 1; 570 cmd.count = nblk; 571 cmd.buffer = buf; 572 cmd.block_size = block_size; 573 if (addr > 0) { 574 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 575 if (ret) 576 return ret; 577 } 578 ret = wilc_sdio_cmd53(wilc, &cmd); 579 if (ret) { 580 dev_err(&func->dev, 581 "Failed cmd53 [%x], block read...\n", addr); 582 return ret; 583 } 584 if (addr > 0) 585 addr += nblk * block_size; 586 buf += nblk * block_size; 587 } /* if (nblk > 0) */ 588 589 if (nleft > 0) { 590 cmd.block_mode = 0; 591 cmd.increment = 1; 592 cmd.count = nleft; 593 cmd.buffer = buf; 594 595 cmd.block_size = block_size; 596 597 if (addr > 0) { 598 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 599 if (ret) 600 return ret; 601 } 602 ret = wilc_sdio_cmd53(wilc, &cmd); 603 if (ret) { 604 dev_err(&func->dev, 605 "Failed cmd53 [%x], bytes read...\n", addr); 606 return ret; 607 } 608 } 609 610 return 0; 611 } 612 613 /******************************************** 614 * 615 * Bus interfaces 616 * 617 ********************************************/ 618 619 static int wilc_sdio_deinit(struct wilc *wilc) 620 { 621 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 622 struct wilc_sdio *sdio_priv = wilc->bus_data; 623 struct sdio_cmd52 cmd; 624 int ret; 625 626 cmd.read_write = 1; 627 cmd.function = 0; 628 cmd.raw = 1; 629 630 /* Disable all functions interrupts */ 631 cmd.address = SDIO_CCCR_IENx; 632 cmd.data = 0; 633 ret = wilc_sdio_cmd52(wilc, &cmd); 634 if (ret) { 635 dev_err(&func->dev, "Failed to disable functions interrupts\n"); 636 return ret; 637 } 638 639 /* Disable all functions */ 640 cmd.address = SDIO_CCCR_IOEx; 641 cmd.data = 0; 642 ret = wilc_sdio_cmd52(wilc, &cmd); 643 if (ret) { 644 dev_err(&func->dev, 645 "Failed to reset all functions\n"); 646 return ret; 647 } 648 649 /* Disable CSA */ 650 cmd.read_write = 0; 651 cmd.address = SDIO_FBR_BASE(1); 652 ret = wilc_sdio_cmd52(wilc, &cmd); 653 if (ret) { 654 dev_err(&func->dev, 655 "Failed to read CSA for function 1\n"); 656 return ret; 657 } 658 cmd.read_write = 1; 659 cmd.address = SDIO_FBR_BASE(1); 660 cmd.data &= ~SDIO_FBR_ENABLE_CSA; 661 ret = wilc_sdio_cmd52(wilc, &cmd); 662 if (ret) { 663 dev_err(&func->dev, 664 "Failed to disable CSA for function 1\n"); 665 return ret; 666 } 667 668 sdio_priv->isinit = false; 669 return 0; 670 } 671 672 static int wilc_sdio_init(struct wilc *wilc, bool resume) 673 { 674 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 675 struct wilc_sdio *sdio_priv = wilc->bus_data; 676 struct sdio_cmd52 cmd; 677 int loop, ret; 678 679 /** 680 * function 0 csa enable 681 **/ 682 cmd.read_write = 1; 683 cmd.function = 0; 684 cmd.raw = 1; 685 cmd.address = SDIO_FBR_BASE(1); 686 cmd.data = SDIO_FBR_ENABLE_CSA; 687 ret = wilc_sdio_cmd52(wilc, &cmd); 688 if (ret) { 689 dev_err(&func->dev, "Fail cmd 52, enable csa...\n"); 690 return ret; 691 } 692 693 /** 694 * function 0 block size 695 **/ 696 ret = wilc_sdio_set_block_size(wilc, 0, WILC_SDIO_BLOCK_SIZE); 697 if (ret) { 698 dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n"); 699 return ret; 700 } 701 sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE; 702 703 /** 704 * enable func1 IO 705 **/ 706 cmd.read_write = 1; 707 cmd.function = 0; 708 cmd.raw = 1; 709 cmd.address = SDIO_CCCR_IOEx; 710 cmd.data = WILC_SDIO_CCCR_IO_EN_FUNC1; 711 ret = wilc_sdio_cmd52(wilc, &cmd); 712 if (ret) { 713 dev_err(&func->dev, 714 "Fail cmd 52, set IOE register...\n"); 715 return ret; 716 } 717 718 /** 719 * make sure func 1 is up 720 **/ 721 cmd.read_write = 0; 722 cmd.function = 0; 723 cmd.raw = 0; 724 cmd.address = SDIO_CCCR_IORx; 725 loop = 3; 726 do { 727 cmd.data = 0; 728 ret = wilc_sdio_cmd52(wilc, &cmd); 729 if (ret) { 730 dev_err(&func->dev, 731 "Fail cmd 52, get IOR register...\n"); 732 return ret; 733 } 734 if (cmd.data == WILC_SDIO_CCCR_IO_EN_FUNC1) 735 break; 736 } while (loop--); 737 738 if (loop <= 0) { 739 dev_err(&func->dev, "Fail func 1 is not ready...\n"); 740 return -EINVAL; 741 } 742 743 /** 744 * func 1 is ready, set func 1 block size 745 **/ 746 ret = wilc_sdio_set_block_size(wilc, 1, WILC_SDIO_BLOCK_SIZE); 747 if (ret) { 748 dev_err(&func->dev, "Fail set func 1 block size...\n"); 749 return ret; 750 } 751 752 /** 753 * func 1 interrupt enable 754 **/ 755 cmd.read_write = 1; 756 cmd.function = 0; 757 cmd.raw = 1; 758 cmd.address = SDIO_CCCR_IENx; 759 cmd.data = WILC_SDIO_CCCR_IEN_MASTER | WILC_SDIO_CCCR_IEN_FUNC1; 760 ret = wilc_sdio_cmd52(wilc, &cmd); 761 if (ret) { 762 dev_err(&func->dev, "Fail cmd 52, set IEN register...\n"); 763 return ret; 764 } 765 766 sdio_priv->isinit = true; 767 return 0; 768 } 769 770 static int wilc_sdio_read_size(struct wilc *wilc, u32 *size) 771 { 772 u32 tmp; 773 struct sdio_cmd52 cmd; 774 775 /** 776 * Read DMA count in words 777 **/ 778 cmd.read_write = 0; 779 cmd.function = 0; 780 cmd.raw = 0; 781 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG; 782 cmd.data = 0; 783 wilc_sdio_cmd52(wilc, &cmd); 784 tmp = cmd.data; 785 786 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG + 1; 787 cmd.data = 0; 788 wilc_sdio_cmd52(wilc, &cmd); 789 tmp |= (cmd.data << 8); 790 791 *size = tmp; 792 return 0; 793 } 794 795 static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status) 796 { 797 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 798 struct wilc_sdio *sdio_priv = wilc->bus_data; 799 u32 tmp; 800 u8 irq_flags; 801 struct sdio_cmd52 cmd; 802 803 wilc_sdio_read_size(wilc, &tmp); 804 805 /** 806 * Read IRQ flags 807 **/ 808 if (!sdio_priv->irq_gpio) { 809 cmd.function = 1; 810 cmd.address = WILC_SDIO_EXT_IRQ_FLAG_REG; 811 } else { 812 cmd.function = 0; 813 cmd.address = is_wilc1000(wilc->chipid) ? 814 WILC1000_SDIO_IRQ_FLAG_REG : 815 WILC3000_SDIO_IRQ_FLAG_REG; 816 } 817 cmd.raw = 0; 818 cmd.read_write = 0; 819 cmd.data = 0; 820 wilc_sdio_cmd52(wilc, &cmd); 821 irq_flags = cmd.data; 822 823 if (sdio_priv->irq_gpio) 824 irq_flags &= is_wilc1000(wilc->chipid) ? 0x1f : 0x0f; 825 826 tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data); 827 828 if (FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags)) 829 dev_err(&func->dev, "Unexpected interrupt (1) int=%lx\n", 830 FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags)); 831 832 *int_status = tmp; 833 834 return 0; 835 } 836 837 static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val) 838 { 839 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 840 struct wilc_sdio *sdio_priv = wilc->bus_data; 841 int ret; 842 u32 reg = 0; 843 844 if (sdio_priv->irq_gpio) 845 reg = val & (BIT(MAX_NUM_INT) - 1); 846 847 if (is_wilc1000(wilc->chipid)) { 848 /* select VMM table 0 */ 849 if (val & SEL_VMM_TBL0) 850 reg |= BIT(5); 851 /* select VMM table 1 */ 852 if (val & SEL_VMM_TBL1) 853 reg |= BIT(6); 854 /* enable VMM */ 855 if (val & EN_VMM) 856 reg |= BIT(7); 857 } else { 858 if (sdio_priv->irq_gpio && reg) { 859 struct sdio_cmd52 cmd; 860 861 cmd.read_write = 1; 862 cmd.function = 0; 863 cmd.raw = 0; 864 cmd.address = WILC3000_SDIO_IRQ_FLAG_REG; 865 cmd.data = reg; 866 867 ret = wilc_sdio_cmd52(wilc, &cmd); 868 if (ret) { 869 dev_err(&func->dev, 870 "Failed cmd52, set 0xfe data (%d) ...\n", 871 __LINE__); 872 return ret; 873 } 874 } 875 876 reg = 0; 877 /* select VMM table 0 */ 878 if (val & SEL_VMM_TBL0) 879 reg |= BIT(0); 880 /* select VMM table 1 */ 881 if (val & SEL_VMM_TBL1) 882 reg |= BIT(1); 883 /* enable VMM */ 884 if (val & EN_VMM) 885 reg |= BIT(2); 886 } 887 888 if (reg) { 889 struct sdio_cmd52 cmd; 890 891 cmd.read_write = 1; 892 cmd.function = 0; 893 cmd.raw = 0; 894 cmd.address = is_wilc1000(wilc->chipid) ? 895 WILC1000_SDIO_IRQ_CLEAR_FLAG_REG : 896 WILC3000_SDIO_VMM_TBL_CTRL_REG; 897 cmd.data = reg; 898 899 ret = wilc_sdio_cmd52(wilc, &cmd); 900 if (ret) { 901 dev_err(&func->dev, 902 "Failed cmd52, set (%02x) data (%d) ...\n", 903 cmd.address, __LINE__); 904 return ret; 905 } 906 } 907 return 0; 908 } 909 910 static int wilc_sdio_sync_ext(struct wilc *wilc, int nint) 911 { 912 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 913 struct wilc_sdio *sdio_priv = wilc->bus_data; 914 915 if (nint > MAX_NUM_INT) { 916 dev_err(&func->dev, "Too many interrupts (%d)...\n", nint); 917 return -EINVAL; 918 } 919 920 if (sdio_priv->irq_gpio) { 921 u32 reg; 922 int ret, i; 923 924 /** 925 * interrupt pin mux select 926 **/ 927 ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, ®); 928 if (ret) { 929 dev_err(&func->dev, "Failed read reg (%08x)...\n", 930 WILC_PIN_MUX_0); 931 return ret; 932 } 933 reg |= BIT(8); 934 ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg); 935 if (ret) { 936 dev_err(&func->dev, "Failed write reg (%08x)...\n", 937 WILC_PIN_MUX_0); 938 return ret; 939 } 940 941 /** 942 * interrupt enable 943 **/ 944 ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, ®); 945 if (ret) { 946 dev_err(&func->dev, "Failed read reg (%08x)...\n", 947 WILC_INTR_ENABLE); 948 return ret; 949 } 950 951 for (i = 0; (i < 5) && (nint > 0); i++, nint--) 952 reg |= BIT((27 + i)); 953 ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg); 954 if (ret) { 955 dev_err(&func->dev, "Failed write reg (%08x)...\n", 956 WILC_INTR_ENABLE); 957 return ret; 958 } 959 if (nint) { 960 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); 961 if (ret) { 962 dev_err(&func->dev, 963 "Failed read reg (%08x)...\n", 964 WILC_INTR2_ENABLE); 965 return ret; 966 } 967 968 for (i = 0; (i < 3) && (nint > 0); i++, nint--) 969 reg |= BIT(i); 970 971 ret = wilc_sdio_write_reg(wilc, WILC_INTR2_ENABLE, reg); 972 if (ret) { 973 dev_err(&func->dev, 974 "Failed write reg (%08x)...\n", 975 WILC_INTR2_ENABLE); 976 return ret; 977 } 978 } 979 } 980 return 0; 981 } 982 983 /* Global sdio HIF function table */ 984 static const struct wilc_hif_func wilc_hif_sdio = { 985 .hif_init = wilc_sdio_init, 986 .hif_deinit = wilc_sdio_deinit, 987 .hif_read_reg = wilc_sdio_read_reg, 988 .hif_write_reg = wilc_sdio_write_reg, 989 .hif_block_rx = wilc_sdio_read, 990 .hif_block_tx = wilc_sdio_write, 991 .hif_read_int = wilc_sdio_read_int, 992 .hif_clear_int_ext = wilc_sdio_clear_int_ext, 993 .hif_read_size = wilc_sdio_read_size, 994 .hif_block_tx_ext = wilc_sdio_write, 995 .hif_block_rx_ext = wilc_sdio_read, 996 .hif_sync_ext = wilc_sdio_sync_ext, 997 .enable_interrupt = wilc_sdio_enable_interrupt, 998 .disable_interrupt = wilc_sdio_disable_interrupt, 999 .hif_reset = wilc_sdio_reset, 1000 .hif_is_init = wilc_sdio_is_init, 1001 }; 1002 1003 static int wilc_sdio_suspend(struct device *dev) 1004 { 1005 struct sdio_func *func = dev_to_sdio_func(dev); 1006 struct wilc *wilc = sdio_get_drvdata(func); 1007 int ret; 1008 1009 dev_info(dev, "sdio suspend\n"); 1010 1011 if (!wilc->initialized) 1012 return 0; 1013 1014 if (!IS_ERR(wilc->rtc_clk)) 1015 clk_disable_unprepare(wilc->rtc_clk); 1016 1017 ret = host_sleep_notify(wilc); 1018 if (ret) { 1019 clk_prepare_enable(wilc->rtc_clk); 1020 return ret; 1021 } 1022 1023 wilc_sdio_disable_interrupt(wilc); 1024 1025 return sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 1026 } 1027 1028 static int wilc_sdio_resume(struct device *dev) 1029 { 1030 struct sdio_func *func = dev_to_sdio_func(dev); 1031 struct wilc *wilc = sdio_get_drvdata(func); 1032 1033 dev_info(dev, "sdio resume\n"); 1034 1035 if (!wilc->initialized) 1036 return 0; 1037 1038 if (!IS_ERR(wilc->rtc_clk)) 1039 clk_prepare_enable(wilc->rtc_clk); 1040 1041 wilc_sdio_init(wilc, true); 1042 wilc_sdio_enable_interrupt(wilc); 1043 1044 return host_wakeup_notify(wilc); 1045 } 1046 1047 static const struct of_device_id wilc_of_match[] = { 1048 { .compatible = "microchip,wilc1000", }, 1049 { /* sentinel */ } 1050 }; 1051 MODULE_DEVICE_TABLE(of, wilc_of_match); 1052 1053 static const struct dev_pm_ops wilc_sdio_pm_ops = { 1054 .suspend = wilc_sdio_suspend, 1055 .resume = wilc_sdio_resume, 1056 }; 1057 1058 static struct sdio_driver wilc_sdio_driver = { 1059 .name = SDIO_MODALIAS, 1060 .id_table = wilc_sdio_ids, 1061 .probe = wilc_sdio_probe, 1062 .remove = wilc_sdio_remove, 1063 .drv = { 1064 .pm = &wilc_sdio_pm_ops, 1065 .of_match_table = wilc_of_match, 1066 } 1067 }; 1068 module_sdio_driver(wilc_sdio_driver); 1069 1070 MODULE_DESCRIPTION("Atmel WILC1000 SDIO wireless driver"); 1071 MODULE_LICENSE("GPL"); 1072