1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries. 4 * All rights reserved. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/mmc/sdio_func.h> 9 #include <linux/mmc/sdio_ids.h> 10 #include <linux/mmc/host.h> 11 #include <linux/mmc/sdio.h> 12 #include <linux/of_irq.h> 13 14 #include "netdev.h" 15 #include "cfg80211.h" 16 17 #define SDIO_MODALIAS "wilc1000_sdio" 18 19 static const struct sdio_device_id wilc_sdio_ids[] = { 20 { SDIO_DEVICE(SDIO_VENDOR_ID_MICROCHIP_WILC, SDIO_DEVICE_ID_MICROCHIP_WILC1000) }, 21 { }, 22 }; 23 MODULE_DEVICE_TABLE(sdio, wilc_sdio_ids); 24 25 #define WILC_SDIO_BLOCK_SIZE 512 26 27 static int wilc_sdio_init(struct wilc *wilc, bool resume); 28 static int wilc_sdio_deinit(struct wilc *wilc); 29 30 struct wilc_sdio { 31 bool irq_gpio; 32 u32 block_size; 33 bool isinit; 34 u8 *cmd53_buf; 35 }; 36 37 struct sdio_cmd52 { 38 u32 read_write: 1; 39 u32 function: 3; 40 u32 raw: 1; 41 u32 address: 17; 42 u32 data: 8; 43 }; 44 45 struct sdio_cmd53 { 46 u32 read_write: 1; 47 u32 function: 3; 48 u32 block_mode: 1; 49 u32 increment: 1; 50 u32 address: 17; 51 u32 count: 9; 52 u8 *buffer; 53 u32 block_size; 54 bool use_global_buf; 55 }; 56 57 static const struct wilc_hif_func wilc_hif_sdio; 58 59 static void wilc_sdio_interrupt(struct sdio_func *func) 60 { 61 sdio_release_host(func); 62 wilc_handle_isr(sdio_get_drvdata(func)); 63 sdio_claim_host(func); 64 } 65 66 static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd) 67 { 68 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev); 69 int ret; 70 u8 data; 71 72 sdio_claim_host(func); 73 74 func->num = cmd->function; 75 if (cmd->read_write) { /* write */ 76 if (cmd->raw) { 77 sdio_writeb(func, cmd->data, cmd->address, &ret); 78 data = sdio_readb(func, cmd->address, &ret); 79 cmd->data = data; 80 } else { 81 sdio_writeb(func, cmd->data, cmd->address, &ret); 82 } 83 } else { /* read */ 84 data = sdio_readb(func, cmd->address, &ret); 85 cmd->data = data; 86 } 87 88 sdio_release_host(func); 89 90 if (ret) 91 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret); 92 return ret; 93 } 94 95 static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd) 96 { 97 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev); 98 int size, ret; 99 struct wilc_sdio *sdio_priv = wilc->bus_data; 100 u8 *buf = cmd->buffer; 101 102 sdio_claim_host(func); 103 104 func->num = cmd->function; 105 func->cur_blksize = cmd->block_size; 106 if (cmd->block_mode) 107 size = cmd->count * cmd->block_size; 108 else 109 size = cmd->count; 110 111 if (cmd->use_global_buf) { 112 if (size > sizeof(u32)) { 113 ret = -EINVAL; 114 goto out; 115 } 116 buf = sdio_priv->cmd53_buf; 117 } 118 119 if (cmd->read_write) { /* write */ 120 if (cmd->use_global_buf) 121 memcpy(buf, cmd->buffer, size); 122 123 ret = sdio_memcpy_toio(func, cmd->address, buf, size); 124 } else { /* read */ 125 ret = sdio_memcpy_fromio(func, buf, cmd->address, size); 126 127 if (cmd->use_global_buf) 128 memcpy(cmd->buffer, buf, size); 129 } 130 out: 131 sdio_release_host(func); 132 133 if (ret) 134 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret); 135 136 return ret; 137 } 138 139 static int wilc_sdio_probe(struct sdio_func *func, 140 const struct sdio_device_id *id) 141 { 142 struct wilc_sdio *sdio_priv; 143 struct wilc_vif *vif; 144 struct wilc *wilc; 145 int ret; 146 147 148 sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL); 149 if (!sdio_priv) 150 return -ENOMEM; 151 152 sdio_priv->cmd53_buf = kzalloc(sizeof(u32), GFP_KERNEL); 153 if (!sdio_priv->cmd53_buf) { 154 ret = -ENOMEM; 155 goto free; 156 } 157 158 ret = wilc_cfg80211_init(&wilc, &func->dev, WILC_HIF_SDIO, 159 &wilc_hif_sdio); 160 if (ret) 161 goto free; 162 163 if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) { 164 struct device_node *np = func->card->dev.of_node; 165 int irq_num = of_irq_get(np, 0); 166 167 if (irq_num > 0) { 168 wilc->dev_irq_num = irq_num; 169 sdio_priv->irq_gpio = true; 170 } 171 } 172 173 sdio_set_drvdata(func, wilc); 174 wilc->bus_data = sdio_priv; 175 wilc->dev = &func->dev; 176 177 wilc->rtc_clk = devm_clk_get_optional(&func->card->dev, "rtc"); 178 if (IS_ERR(wilc->rtc_clk)) { 179 ret = PTR_ERR(wilc->rtc_clk); 180 goto dispose_irq; 181 } 182 clk_prepare_enable(wilc->rtc_clk); 183 184 wilc_sdio_init(wilc, false); 185 186 ret = wilc_load_mac_from_nv(wilc); 187 if (ret) { 188 pr_err("Can not retrieve MAC address from chip\n"); 189 goto clk_disable_unprepare; 190 } 191 192 wilc_sdio_deinit(wilc); 193 194 vif = wilc_netdev_ifc_init(wilc, "wlan%d", WILC_STATION_MODE, 195 NL80211_IFTYPE_STATION, false); 196 if (IS_ERR(vif)) { 197 ret = PTR_ERR(vif); 198 goto clk_disable_unprepare; 199 } 200 201 dev_info(&func->dev, "Driver Initializing success\n"); 202 return 0; 203 204 clk_disable_unprepare: 205 clk_disable_unprepare(wilc->rtc_clk); 206 dispose_irq: 207 irq_dispose_mapping(wilc->dev_irq_num); 208 wilc_netdev_cleanup(wilc); 209 free: 210 kfree(sdio_priv->cmd53_buf); 211 kfree(sdio_priv); 212 return ret; 213 } 214 215 static void wilc_sdio_remove(struct sdio_func *func) 216 { 217 struct wilc *wilc = sdio_get_drvdata(func); 218 struct wilc_sdio *sdio_priv = wilc->bus_data; 219 220 clk_disable_unprepare(wilc->rtc_clk); 221 wilc_netdev_cleanup(wilc); 222 kfree(sdio_priv->cmd53_buf); 223 kfree(sdio_priv); 224 } 225 226 static int wilc_sdio_reset(struct wilc *wilc) 227 { 228 struct sdio_cmd52 cmd; 229 int ret; 230 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 231 232 cmd.read_write = 1; 233 cmd.function = 0; 234 cmd.raw = 0; 235 cmd.address = SDIO_CCCR_ABORT; 236 cmd.data = WILC_SDIO_CCCR_ABORT_RESET; 237 ret = wilc_sdio_cmd52(wilc, &cmd); 238 if (ret) { 239 dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n"); 240 return ret; 241 } 242 return 0; 243 } 244 245 static bool wilc_sdio_is_init(struct wilc *wilc) 246 { 247 struct wilc_sdio *sdio_priv = wilc->bus_data; 248 249 return sdio_priv->isinit; 250 } 251 252 static int wilc_sdio_enable_interrupt(struct wilc *dev) 253 { 254 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); 255 int ret = 0; 256 257 sdio_claim_host(func); 258 ret = sdio_claim_irq(func, wilc_sdio_interrupt); 259 sdio_release_host(func); 260 261 if (ret < 0) { 262 dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret); 263 ret = -EIO; 264 } 265 return ret; 266 } 267 268 static void wilc_sdio_disable_interrupt(struct wilc *dev) 269 { 270 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); 271 int ret; 272 273 sdio_claim_host(func); 274 ret = sdio_release_irq(func); 275 if (ret < 0) 276 dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret); 277 sdio_release_host(func); 278 } 279 280 /******************************************** 281 * 282 * Function 0 283 * 284 ********************************************/ 285 286 static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr) 287 { 288 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 289 struct sdio_cmd52 cmd; 290 int ret; 291 292 /** 293 * Review: BIG ENDIAN 294 **/ 295 cmd.read_write = 1; 296 cmd.function = 0; 297 cmd.raw = 0; 298 cmd.address = WILC_SDIO_FBR_CSA_REG; 299 cmd.data = (u8)adr; 300 ret = wilc_sdio_cmd52(wilc, &cmd); 301 if (ret) { 302 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 303 cmd.address); 304 return ret; 305 } 306 307 cmd.address = WILC_SDIO_FBR_CSA_REG + 1; 308 cmd.data = (u8)(adr >> 8); 309 ret = wilc_sdio_cmd52(wilc, &cmd); 310 if (ret) { 311 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 312 cmd.address); 313 return ret; 314 } 315 316 cmd.address = WILC_SDIO_FBR_CSA_REG + 2; 317 cmd.data = (u8)(adr >> 16); 318 ret = wilc_sdio_cmd52(wilc, &cmd); 319 if (ret) { 320 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 321 cmd.address); 322 return ret; 323 } 324 325 return 0; 326 } 327 328 static int wilc_sdio_set_block_size(struct wilc *wilc, u8 func_num, 329 u32 block_size) 330 { 331 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 332 struct sdio_cmd52 cmd; 333 int ret; 334 335 cmd.read_write = 1; 336 cmd.function = 0; 337 cmd.raw = 0; 338 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE; 339 cmd.data = (u8)block_size; 340 ret = wilc_sdio_cmd52(wilc, &cmd); 341 if (ret) { 342 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 343 cmd.address); 344 return ret; 345 } 346 347 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE + 1; 348 cmd.data = (u8)(block_size >> 8); 349 ret = wilc_sdio_cmd52(wilc, &cmd); 350 if (ret) { 351 dev_err(&func->dev, "Failed cmd52, set %04x data...\n", 352 cmd.address); 353 return ret; 354 } 355 356 return 0; 357 } 358 359 /******************************************** 360 * 361 * Sdio interfaces 362 * 363 ********************************************/ 364 static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) 365 { 366 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 367 struct wilc_sdio *sdio_priv = wilc->bus_data; 368 int ret; 369 370 cpu_to_le32s(&data); 371 372 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */ 373 struct sdio_cmd52 cmd; 374 375 cmd.read_write = 1; 376 cmd.function = 0; 377 cmd.raw = 0; 378 cmd.address = addr; 379 cmd.data = data; 380 ret = wilc_sdio_cmd52(wilc, &cmd); 381 if (ret) 382 dev_err(&func->dev, 383 "Failed cmd 52, read reg (%08x) ...\n", addr); 384 } else { 385 struct sdio_cmd53 cmd; 386 387 /** 388 * set the AHB address 389 **/ 390 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 391 if (ret) 392 return ret; 393 394 cmd.read_write = 1; 395 cmd.function = 0; 396 cmd.address = WILC_SDIO_FBR_DATA_REG; 397 cmd.block_mode = 0; 398 cmd.increment = 1; 399 cmd.count = sizeof(u32); 400 cmd.buffer = (u8 *)&data; 401 cmd.use_global_buf = true; 402 cmd.block_size = sdio_priv->block_size; 403 ret = wilc_sdio_cmd53(wilc, &cmd); 404 if (ret) 405 dev_err(&func->dev, 406 "Failed cmd53, write reg (%08x)...\n", addr); 407 } 408 409 return ret; 410 } 411 412 static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) 413 { 414 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 415 struct wilc_sdio *sdio_priv = wilc->bus_data; 416 u32 block_size = sdio_priv->block_size; 417 struct sdio_cmd53 cmd; 418 int nblk, nleft, ret; 419 420 cmd.read_write = 1; 421 if (addr > 0) { 422 /** 423 * func 0 access 424 **/ 425 cmd.function = 0; 426 cmd.address = WILC_SDIO_FBR_DATA_REG; 427 } else { 428 /** 429 * func 1 access 430 **/ 431 cmd.function = 1; 432 cmd.address = WILC_SDIO_F1_DATA_REG; 433 } 434 435 size = ALIGN(size, 4); 436 nblk = size / block_size; 437 nleft = size % block_size; 438 439 cmd.use_global_buf = false; 440 if (nblk > 0) { 441 cmd.block_mode = 1; 442 cmd.increment = 1; 443 cmd.count = nblk; 444 cmd.buffer = buf; 445 cmd.block_size = block_size; 446 if (addr > 0) { 447 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 448 if (ret) 449 return ret; 450 } 451 ret = wilc_sdio_cmd53(wilc, &cmd); 452 if (ret) { 453 dev_err(&func->dev, 454 "Failed cmd53 [%x], block send...\n", addr); 455 return ret; 456 } 457 if (addr > 0) 458 addr += nblk * block_size; 459 buf += nblk * block_size; 460 } 461 462 if (nleft > 0) { 463 cmd.block_mode = 0; 464 cmd.increment = 1; 465 cmd.count = nleft; 466 cmd.buffer = buf; 467 468 cmd.block_size = block_size; 469 470 if (addr > 0) { 471 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 472 if (ret) 473 return ret; 474 } 475 ret = wilc_sdio_cmd53(wilc, &cmd); 476 if (ret) { 477 dev_err(&func->dev, 478 "Failed cmd53 [%x], bytes send...\n", addr); 479 return ret; 480 } 481 } 482 483 return 0; 484 } 485 486 static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) 487 { 488 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 489 struct wilc_sdio *sdio_priv = wilc->bus_data; 490 int ret; 491 492 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */ 493 struct sdio_cmd52 cmd; 494 495 cmd.read_write = 0; 496 cmd.function = 0; 497 cmd.raw = 0; 498 cmd.address = addr; 499 ret = wilc_sdio_cmd52(wilc, &cmd); 500 if (ret) { 501 dev_err(&func->dev, 502 "Failed cmd 52, read reg (%08x) ...\n", addr); 503 return ret; 504 } 505 *data = cmd.data; 506 } else { 507 struct sdio_cmd53 cmd; 508 509 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 510 if (ret) 511 return ret; 512 513 cmd.read_write = 0; 514 cmd.function = 0; 515 cmd.address = WILC_SDIO_FBR_DATA_REG; 516 cmd.block_mode = 0; 517 cmd.increment = 1; 518 cmd.count = sizeof(u32); 519 cmd.buffer = (u8 *)data; 520 cmd.use_global_buf = true; 521 522 cmd.block_size = sdio_priv->block_size; 523 ret = wilc_sdio_cmd53(wilc, &cmd); 524 if (ret) { 525 dev_err(&func->dev, 526 "Failed cmd53, read reg (%08x)...\n", addr); 527 return ret; 528 } 529 } 530 531 le32_to_cpus(data); 532 return 0; 533 } 534 535 static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) 536 { 537 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 538 struct wilc_sdio *sdio_priv = wilc->bus_data; 539 u32 block_size = sdio_priv->block_size; 540 struct sdio_cmd53 cmd; 541 int nblk, nleft, ret; 542 543 cmd.read_write = 0; 544 if (addr > 0) { 545 /** 546 * func 0 access 547 **/ 548 cmd.function = 0; 549 cmd.address = WILC_SDIO_FBR_DATA_REG; 550 } else { 551 /** 552 * func 1 access 553 **/ 554 cmd.function = 1; 555 cmd.address = WILC_SDIO_F1_DATA_REG; 556 } 557 558 size = ALIGN(size, 4); 559 nblk = size / block_size; 560 nleft = size % block_size; 561 562 cmd.use_global_buf = false; 563 if (nblk > 0) { 564 cmd.block_mode = 1; 565 cmd.increment = 1; 566 cmd.count = nblk; 567 cmd.buffer = buf; 568 cmd.block_size = block_size; 569 if (addr > 0) { 570 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 571 if (ret) 572 return ret; 573 } 574 ret = wilc_sdio_cmd53(wilc, &cmd); 575 if (ret) { 576 dev_err(&func->dev, 577 "Failed cmd53 [%x], block read...\n", addr); 578 return ret; 579 } 580 if (addr > 0) 581 addr += nblk * block_size; 582 buf += nblk * block_size; 583 } /* if (nblk > 0) */ 584 585 if (nleft > 0) { 586 cmd.block_mode = 0; 587 cmd.increment = 1; 588 cmd.count = nleft; 589 cmd.buffer = buf; 590 591 cmd.block_size = block_size; 592 593 if (addr > 0) { 594 ret = wilc_sdio_set_func0_csa_address(wilc, addr); 595 if (ret) 596 return ret; 597 } 598 ret = wilc_sdio_cmd53(wilc, &cmd); 599 if (ret) { 600 dev_err(&func->dev, 601 "Failed cmd53 [%x], bytes read...\n", addr); 602 return ret; 603 } 604 } 605 606 return 0; 607 } 608 609 /******************************************** 610 * 611 * Bus interfaces 612 * 613 ********************************************/ 614 615 static int wilc_sdio_deinit(struct wilc *wilc) 616 { 617 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 618 struct wilc_sdio *sdio_priv = wilc->bus_data; 619 struct sdio_cmd52 cmd; 620 int ret; 621 622 cmd.read_write = 1; 623 cmd.function = 0; 624 cmd.raw = 1; 625 626 /* Disable all functions interrupts */ 627 cmd.address = SDIO_CCCR_IENx; 628 cmd.data = 0; 629 ret = wilc_sdio_cmd52(wilc, &cmd); 630 if (ret) { 631 dev_err(&func->dev, "Failed to disable functions interrupts\n"); 632 return ret; 633 } 634 635 /* Disable all functions */ 636 cmd.address = SDIO_CCCR_IOEx; 637 cmd.data = 0; 638 ret = wilc_sdio_cmd52(wilc, &cmd); 639 if (ret) { 640 dev_err(&func->dev, 641 "Failed to reset all functions\n"); 642 return ret; 643 } 644 645 /* Disable CSA */ 646 cmd.read_write = 0; 647 cmd.address = SDIO_FBR_BASE(1); 648 ret = wilc_sdio_cmd52(wilc, &cmd); 649 if (ret) { 650 dev_err(&func->dev, 651 "Failed to read CSA for function 1\n"); 652 return ret; 653 } 654 cmd.read_write = 1; 655 cmd.address = SDIO_FBR_BASE(1); 656 cmd.data &= ~SDIO_FBR_ENABLE_CSA; 657 ret = wilc_sdio_cmd52(wilc, &cmd); 658 if (ret) { 659 dev_err(&func->dev, 660 "Failed to disable CSA for function 1\n"); 661 return ret; 662 } 663 664 sdio_priv->isinit = false; 665 return 0; 666 } 667 668 static int wilc_sdio_init(struct wilc *wilc, bool resume) 669 { 670 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 671 struct wilc_sdio *sdio_priv = wilc->bus_data; 672 struct sdio_cmd52 cmd; 673 int loop, ret; 674 u32 chipid; 675 676 /** 677 * function 0 csa enable 678 **/ 679 cmd.read_write = 1; 680 cmd.function = 0; 681 cmd.raw = 1; 682 cmd.address = SDIO_FBR_BASE(1); 683 cmd.data = SDIO_FBR_ENABLE_CSA; 684 ret = wilc_sdio_cmd52(wilc, &cmd); 685 if (ret) { 686 dev_err(&func->dev, "Fail cmd 52, enable csa...\n"); 687 return ret; 688 } 689 690 /** 691 * function 0 block size 692 **/ 693 ret = wilc_sdio_set_block_size(wilc, 0, WILC_SDIO_BLOCK_SIZE); 694 if (ret) { 695 dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n"); 696 return ret; 697 } 698 sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE; 699 700 /** 701 * enable func1 IO 702 **/ 703 cmd.read_write = 1; 704 cmd.function = 0; 705 cmd.raw = 1; 706 cmd.address = SDIO_CCCR_IOEx; 707 cmd.data = WILC_SDIO_CCCR_IO_EN_FUNC1; 708 ret = wilc_sdio_cmd52(wilc, &cmd); 709 if (ret) { 710 dev_err(&func->dev, 711 "Fail cmd 52, set IOE register...\n"); 712 return ret; 713 } 714 715 /** 716 * make sure func 1 is up 717 **/ 718 cmd.read_write = 0; 719 cmd.function = 0; 720 cmd.raw = 0; 721 cmd.address = SDIO_CCCR_IORx; 722 loop = 3; 723 do { 724 cmd.data = 0; 725 ret = wilc_sdio_cmd52(wilc, &cmd); 726 if (ret) { 727 dev_err(&func->dev, 728 "Fail cmd 52, get IOR register...\n"); 729 return ret; 730 } 731 if (cmd.data == WILC_SDIO_CCCR_IO_EN_FUNC1) 732 break; 733 } while (loop--); 734 735 if (loop <= 0) { 736 dev_err(&func->dev, "Fail func 1 is not ready...\n"); 737 return -EINVAL; 738 } 739 740 /** 741 * func 1 is ready, set func 1 block size 742 **/ 743 ret = wilc_sdio_set_block_size(wilc, 1, WILC_SDIO_BLOCK_SIZE); 744 if (ret) { 745 dev_err(&func->dev, "Fail set func 1 block size...\n"); 746 return ret; 747 } 748 749 /** 750 * func 1 interrupt enable 751 **/ 752 cmd.read_write = 1; 753 cmd.function = 0; 754 cmd.raw = 1; 755 cmd.address = SDIO_CCCR_IENx; 756 cmd.data = WILC_SDIO_CCCR_IEN_MASTER | WILC_SDIO_CCCR_IEN_FUNC1; 757 ret = wilc_sdio_cmd52(wilc, &cmd); 758 if (ret) { 759 dev_err(&func->dev, "Fail cmd 52, set IEN register...\n"); 760 return ret; 761 } 762 763 /** 764 * make sure can read back chip id correctly 765 **/ 766 if (!resume) { 767 ret = wilc_sdio_read_reg(wilc, WILC_CHIPID, &chipid); 768 if (ret) { 769 dev_err(&func->dev, "Fail cmd read chip id...\n"); 770 return ret; 771 } 772 dev_err(&func->dev, "chipid (%08x)\n", chipid); 773 } 774 775 sdio_priv->isinit = true; 776 return 0; 777 } 778 779 static int wilc_sdio_read_size(struct wilc *wilc, u32 *size) 780 { 781 u32 tmp; 782 struct sdio_cmd52 cmd; 783 784 /** 785 * Read DMA count in words 786 **/ 787 cmd.read_write = 0; 788 cmd.function = 0; 789 cmd.raw = 0; 790 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG; 791 cmd.data = 0; 792 wilc_sdio_cmd52(wilc, &cmd); 793 tmp = cmd.data; 794 795 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG + 1; 796 cmd.data = 0; 797 wilc_sdio_cmd52(wilc, &cmd); 798 tmp |= (cmd.data << 8); 799 800 *size = tmp; 801 return 0; 802 } 803 804 static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status) 805 { 806 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 807 struct wilc_sdio *sdio_priv = wilc->bus_data; 808 u32 tmp; 809 u8 irq_flags; 810 struct sdio_cmd52 cmd; 811 812 wilc_sdio_read_size(wilc, &tmp); 813 814 /** 815 * Read IRQ flags 816 **/ 817 if (!sdio_priv->irq_gpio) { 818 cmd.function = 1; 819 cmd.address = WILC_SDIO_EXT_IRQ_FLAG_REG; 820 } else { 821 cmd.function = 0; 822 cmd.address = WILC_SDIO_IRQ_FLAG_REG; 823 } 824 cmd.raw = 0; 825 cmd.read_write = 0; 826 cmd.data = 0; 827 wilc_sdio_cmd52(wilc, &cmd); 828 irq_flags = cmd.data; 829 tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data); 830 831 if (FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags)) 832 dev_err(&func->dev, "Unexpected interrupt (1) int=%lx\n", 833 FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags)); 834 835 *int_status = tmp; 836 837 return 0; 838 } 839 840 static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val) 841 { 842 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 843 struct wilc_sdio *sdio_priv = wilc->bus_data; 844 int ret; 845 u32 reg = 0; 846 847 if (sdio_priv->irq_gpio) 848 reg = val & (BIT(MAX_NUM_INT) - 1); 849 850 /* select VMM table 0 */ 851 if (val & SEL_VMM_TBL0) 852 reg |= BIT(5); 853 /* select VMM table 1 */ 854 if (val & SEL_VMM_TBL1) 855 reg |= BIT(6); 856 /* enable VMM */ 857 if (val & EN_VMM) 858 reg |= BIT(7); 859 if (reg) { 860 struct sdio_cmd52 cmd; 861 862 cmd.read_write = 1; 863 cmd.function = 0; 864 cmd.raw = 0; 865 cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG; 866 cmd.data = reg; 867 868 ret = wilc_sdio_cmd52(wilc, &cmd); 869 if (ret) { 870 dev_err(&func->dev, 871 "Failed cmd52, set (%02x) data (%d) ...\n", 872 cmd.address, __LINE__); 873 return ret; 874 } 875 } 876 return 0; 877 } 878 879 static int wilc_sdio_sync_ext(struct wilc *wilc, int nint) 880 { 881 struct sdio_func *func = dev_to_sdio_func(wilc->dev); 882 struct wilc_sdio *sdio_priv = wilc->bus_data; 883 884 if (nint > MAX_NUM_INT) { 885 dev_err(&func->dev, "Too many interrupts (%d)...\n", nint); 886 return -EINVAL; 887 } 888 889 if (sdio_priv->irq_gpio) { 890 u32 reg; 891 int ret, i; 892 893 /** 894 * interrupt pin mux select 895 **/ 896 ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, ®); 897 if (ret) { 898 dev_err(&func->dev, "Failed read reg (%08x)...\n", 899 WILC_PIN_MUX_0); 900 return ret; 901 } 902 reg |= BIT(8); 903 ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg); 904 if (ret) { 905 dev_err(&func->dev, "Failed write reg (%08x)...\n", 906 WILC_PIN_MUX_0); 907 return ret; 908 } 909 910 /** 911 * interrupt enable 912 **/ 913 ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, ®); 914 if (ret) { 915 dev_err(&func->dev, "Failed read reg (%08x)...\n", 916 WILC_INTR_ENABLE); 917 return ret; 918 } 919 920 for (i = 0; (i < 5) && (nint > 0); i++, nint--) 921 reg |= BIT((27 + i)); 922 ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg); 923 if (ret) { 924 dev_err(&func->dev, "Failed write reg (%08x)...\n", 925 WILC_INTR_ENABLE); 926 return ret; 927 } 928 if (nint) { 929 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); 930 if (ret) { 931 dev_err(&func->dev, 932 "Failed read reg (%08x)...\n", 933 WILC_INTR2_ENABLE); 934 return ret; 935 } 936 937 for (i = 0; (i < 3) && (nint > 0); i++, nint--) 938 reg |= BIT(i); 939 940 ret = wilc_sdio_write_reg(wilc, WILC_INTR2_ENABLE, reg); 941 if (ret) { 942 dev_err(&func->dev, 943 "Failed write reg (%08x)...\n", 944 WILC_INTR2_ENABLE); 945 return ret; 946 } 947 } 948 } 949 return 0; 950 } 951 952 /* Global sdio HIF function table */ 953 static const struct wilc_hif_func wilc_hif_sdio = { 954 .hif_init = wilc_sdio_init, 955 .hif_deinit = wilc_sdio_deinit, 956 .hif_read_reg = wilc_sdio_read_reg, 957 .hif_write_reg = wilc_sdio_write_reg, 958 .hif_block_rx = wilc_sdio_read, 959 .hif_block_tx = wilc_sdio_write, 960 .hif_read_int = wilc_sdio_read_int, 961 .hif_clear_int_ext = wilc_sdio_clear_int_ext, 962 .hif_read_size = wilc_sdio_read_size, 963 .hif_block_tx_ext = wilc_sdio_write, 964 .hif_block_rx_ext = wilc_sdio_read, 965 .hif_sync_ext = wilc_sdio_sync_ext, 966 .enable_interrupt = wilc_sdio_enable_interrupt, 967 .disable_interrupt = wilc_sdio_disable_interrupt, 968 .hif_reset = wilc_sdio_reset, 969 .hif_is_init = wilc_sdio_is_init, 970 }; 971 972 static int wilc_sdio_suspend(struct device *dev) 973 { 974 struct sdio_func *func = dev_to_sdio_func(dev); 975 struct wilc *wilc = sdio_get_drvdata(func); 976 int ret; 977 978 dev_info(dev, "sdio suspend\n"); 979 980 if (!wilc->initialized) 981 return 0; 982 983 if (!IS_ERR(wilc->rtc_clk)) 984 clk_disable_unprepare(wilc->rtc_clk); 985 986 host_sleep_notify(wilc); 987 988 wilc_sdio_disable_interrupt(wilc); 989 990 ret = wilc_sdio_reset(wilc); 991 if (ret) { 992 dev_err(&func->dev, "Fail reset sdio\n"); 993 return ret; 994 } 995 996 return 0; 997 } 998 999 static int wilc_sdio_resume(struct device *dev) 1000 { 1001 struct sdio_func *func = dev_to_sdio_func(dev); 1002 struct wilc *wilc = sdio_get_drvdata(func); 1003 1004 dev_info(dev, "sdio resume\n"); 1005 1006 if (!wilc->initialized) 1007 return 0; 1008 1009 if (!IS_ERR(wilc->rtc_clk)) 1010 clk_prepare_enable(wilc->rtc_clk); 1011 1012 wilc_sdio_init(wilc, true); 1013 wilc_sdio_enable_interrupt(wilc); 1014 1015 host_wakeup_notify(wilc); 1016 1017 return 0; 1018 } 1019 1020 static const struct of_device_id wilc_of_match[] = { 1021 { .compatible = "microchip,wilc1000", }, 1022 { /* sentinel */ } 1023 }; 1024 MODULE_DEVICE_TABLE(of, wilc_of_match); 1025 1026 static const struct dev_pm_ops wilc_sdio_pm_ops = { 1027 .suspend = wilc_sdio_suspend, 1028 .resume = wilc_sdio_resume, 1029 }; 1030 1031 static struct sdio_driver wilc_sdio_driver = { 1032 .name = SDIO_MODALIAS, 1033 .id_table = wilc_sdio_ids, 1034 .probe = wilc_sdio_probe, 1035 .remove = wilc_sdio_remove, 1036 .drv = { 1037 .pm = &wilc_sdio_pm_ops, 1038 .of_match_table = wilc_of_match, 1039 } 1040 }; 1041 module_sdio_driver(wilc_sdio_driver); 1042 1043 MODULE_DESCRIPTION("Atmel WILC1000 SDIO wireless driver"); 1044 MODULE_LICENSE("GPL"); 1045