1 /* 2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> 3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include "mt7601u.h" 16 #include "trace.h" 17 #include <linux/etherdevice.h> 18 19 static void 20 mt76_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate) 21 { 22 u8 idx = MT76_GET(MT_TXWI_RATE_MCS, rate); 23 24 txrate->idx = 0; 25 txrate->flags = 0; 26 txrate->count = 1; 27 28 switch (MT76_GET(MT_TXWI_RATE_PHY_MODE, rate)) { 29 case MT_PHY_TYPE_OFDM: 30 txrate->idx = idx + 4; 31 return; 32 case MT_PHY_TYPE_CCK: 33 if (idx >= 8) 34 idx -= 8; 35 36 txrate->idx = idx; 37 return; 38 case MT_PHY_TYPE_HT_GF: 39 txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD; 40 /* fall through */ 41 case MT_PHY_TYPE_HT: 42 txrate->flags |= IEEE80211_TX_RC_MCS; 43 txrate->idx = idx; 44 break; 45 default: 46 WARN_ON(1); 47 return; 48 } 49 50 if (MT76_GET(MT_TXWI_RATE_BW, rate) == MT_PHY_BW_40) 51 txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; 52 53 if (rate & MT_TXWI_RATE_SGI) 54 txrate->flags |= IEEE80211_TX_RC_SHORT_GI; 55 } 56 57 static void 58 mt76_mac_fill_tx_status(struct mt7601u_dev *dev, struct ieee80211_tx_info *info, 59 struct mt76_tx_status *st) 60 { 61 struct ieee80211_tx_rate *rate = info->status.rates; 62 int cur_idx, last_rate; 63 int i; 64 65 last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1); 66 mt76_mac_process_tx_rate(&rate[last_rate], st->rate); 67 if (last_rate < IEEE80211_TX_MAX_RATES - 1) 68 rate[last_rate + 1].idx = -1; 69 70 cur_idx = rate[last_rate].idx + st->retry; 71 for (i = 0; i <= last_rate; i++) { 72 rate[i].flags = rate[last_rate].flags; 73 rate[i].idx = max_t(int, 0, cur_idx - i); 74 rate[i].count = 1; 75 } 76 77 if (last_rate > 0) 78 rate[last_rate - 1].count = st->retry + 1 - last_rate; 79 80 info->status.ampdu_len = 1; 81 info->status.ampdu_ack_len = st->success; 82 83 if (st->is_probe) 84 info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE; 85 86 if (st->aggr) 87 info->flags |= IEEE80211_TX_CTL_AMPDU | 88 IEEE80211_TX_STAT_AMPDU; 89 90 if (!st->ack_req) 91 info->flags |= IEEE80211_TX_CTL_NO_ACK; 92 else if (st->success) 93 info->flags |= IEEE80211_TX_STAT_ACK; 94 } 95 96 u16 mt76_mac_tx_rate_val(struct mt7601u_dev *dev, 97 const struct ieee80211_tx_rate *rate, u8 *nss_val) 98 { 99 u16 rateval; 100 u8 phy, rate_idx; 101 u8 nss = 1; 102 u8 bw = 0; 103 104 if (rate->flags & IEEE80211_TX_RC_MCS) { 105 rate_idx = rate->idx; 106 nss = 1 + (rate->idx >> 3); 107 phy = MT_PHY_TYPE_HT; 108 if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD) 109 phy = MT_PHY_TYPE_HT_GF; 110 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) 111 bw = 1; 112 } else { 113 const struct ieee80211_rate *r; 114 int band = dev->chandef.chan->band; 115 u16 val; 116 117 r = &dev->hw->wiphy->bands[band]->bitrates[rate->idx]; 118 if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 119 val = r->hw_value_short; 120 else 121 val = r->hw_value; 122 123 phy = val >> 8; 124 rate_idx = val & 0xff; 125 bw = 0; 126 } 127 128 rateval = MT76_SET(MT_RXWI_RATE_MCS, rate_idx); 129 rateval |= MT76_SET(MT_RXWI_RATE_PHY, phy); 130 rateval |= MT76_SET(MT_RXWI_RATE_BW, bw); 131 if (rate->flags & IEEE80211_TX_RC_SHORT_GI) 132 rateval |= MT_RXWI_RATE_SGI; 133 134 *nss_val = nss; 135 return rateval; 136 } 137 138 void mt76_mac_wcid_set_rate(struct mt7601u_dev *dev, struct mt76_wcid *wcid, 139 const struct ieee80211_tx_rate *rate) 140 { 141 unsigned long flags; 142 143 spin_lock_irqsave(&dev->lock, flags); 144 wcid->tx_rate = mt76_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss); 145 wcid->tx_rate_set = true; 146 spin_unlock_irqrestore(&dev->lock, flags); 147 } 148 149 struct mt76_tx_status mt7601u_mac_fetch_tx_status(struct mt7601u_dev *dev) 150 { 151 struct mt76_tx_status stat = {}; 152 u32 val; 153 154 val = mt7601u_rr(dev, MT_TX_STAT_FIFO); 155 stat.valid = !!(val & MT_TX_STAT_FIFO_VALID); 156 stat.success = !!(val & MT_TX_STAT_FIFO_SUCCESS); 157 stat.aggr = !!(val & MT_TX_STAT_FIFO_AGGR); 158 stat.ack_req = !!(val & MT_TX_STAT_FIFO_ACKREQ); 159 stat.pktid = MT76_GET(MT_TX_STAT_FIFO_PID_TYPE, val); 160 stat.wcid = MT76_GET(MT_TX_STAT_FIFO_WCID, val); 161 stat.rate = MT76_GET(MT_TX_STAT_FIFO_RATE, val); 162 163 return stat; 164 } 165 166 void mt76_send_tx_status(struct mt7601u_dev *dev, struct mt76_tx_status *stat) 167 { 168 struct ieee80211_tx_info info = {}; 169 struct ieee80211_sta *sta = NULL; 170 struct mt76_wcid *wcid = NULL; 171 void *msta; 172 173 rcu_read_lock(); 174 if (stat->wcid < ARRAY_SIZE(dev->wcid)) 175 wcid = rcu_dereference(dev->wcid[stat->wcid]); 176 177 if (wcid) { 178 msta = container_of(wcid, struct mt76_sta, wcid); 179 sta = container_of(msta, struct ieee80211_sta, 180 drv_priv); 181 } 182 183 mt76_mac_fill_tx_status(dev, &info, stat); 184 ieee80211_tx_status_noskb(dev->hw, sta, &info); 185 rcu_read_unlock(); 186 } 187 188 void mt7601u_mac_set_protection(struct mt7601u_dev *dev, bool legacy_prot, 189 int ht_mode) 190 { 191 int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION; 192 bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); 193 u32 prot[6]; 194 bool ht_rts[4] = {}; 195 int i; 196 197 prot[0] = MT_PROT_NAV_SHORT | 198 MT_PROT_TXOP_ALLOW_ALL | 199 MT_PROT_RTS_THR_EN; 200 prot[1] = prot[0]; 201 if (legacy_prot) 202 prot[1] |= MT_PROT_CTRL_CTS2SELF; 203 204 prot[2] = prot[4] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_BW20; 205 prot[3] = prot[5] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_ALL; 206 207 if (legacy_prot) { 208 prot[2] |= MT_PROT_RATE_CCK_11; 209 prot[3] |= MT_PROT_RATE_CCK_11; 210 prot[4] |= MT_PROT_RATE_CCK_11; 211 prot[5] |= MT_PROT_RATE_CCK_11; 212 } else { 213 prot[2] |= MT_PROT_RATE_OFDM_24; 214 prot[3] |= MT_PROT_RATE_DUP_OFDM_24; 215 prot[4] |= MT_PROT_RATE_OFDM_24; 216 prot[5] |= MT_PROT_RATE_DUP_OFDM_24; 217 } 218 219 switch (mode) { 220 case IEEE80211_HT_OP_MODE_PROTECTION_NONE: 221 break; 222 223 case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER: 224 ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true; 225 break; 226 227 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: 228 ht_rts[1] = ht_rts[3] = true; 229 break; 230 231 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: 232 ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true; 233 break; 234 } 235 236 if (non_gf) 237 ht_rts[2] = ht_rts[3] = true; 238 239 for (i = 0; i < 4; i++) 240 if (ht_rts[i]) 241 prot[i + 2] |= MT_PROT_CTRL_RTS_CTS; 242 243 for (i = 0; i < 6; i++) 244 mt7601u_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]); 245 } 246 247 void mt7601u_mac_set_short_preamble(struct mt7601u_dev *dev, bool short_preamb) 248 { 249 if (short_preamb) 250 mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT); 251 else 252 mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT); 253 } 254 255 void mt7601u_mac_config_tsf(struct mt7601u_dev *dev, bool enable, int interval) 256 { 257 u32 val = mt7601u_rr(dev, MT_BEACON_TIME_CFG); 258 259 val &= ~(MT_BEACON_TIME_CFG_TIMER_EN | 260 MT_BEACON_TIME_CFG_SYNC_MODE | 261 MT_BEACON_TIME_CFG_TBTT_EN); 262 263 if (!enable) { 264 mt7601u_wr(dev, MT_BEACON_TIME_CFG, val); 265 return; 266 } 267 268 val &= ~MT_BEACON_TIME_CFG_INTVAL; 269 val |= MT76_SET(MT_BEACON_TIME_CFG_INTVAL, interval << 4) | 270 MT_BEACON_TIME_CFG_TIMER_EN | 271 MT_BEACON_TIME_CFG_SYNC_MODE | 272 MT_BEACON_TIME_CFG_TBTT_EN; 273 } 274 275 static void mt7601u_check_mac_err(struct mt7601u_dev *dev) 276 { 277 u32 val = mt7601u_rr(dev, 0x10f4); 278 279 if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5)))) 280 return; 281 282 dev_err(dev->dev, "Error: MAC specific condition occurred\n"); 283 284 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); 285 udelay(10); 286 mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); 287 } 288 289 void mt7601u_mac_work(struct work_struct *work) 290 { 291 struct mt7601u_dev *dev = container_of(work, struct mt7601u_dev, 292 mac_work.work); 293 struct { 294 u32 addr_base; 295 u32 span; 296 u64 *stat_base; 297 } spans[] = { 298 { MT_RX_STA_CNT0, 3, dev->stats.rx_stat }, 299 { MT_TX_STA_CNT0, 3, dev->stats.tx_stat }, 300 { MT_TX_AGG_STAT, 1, dev->stats.aggr_stat }, 301 { MT_MPDU_DENSITY_CNT, 1, dev->stats.zero_len_del }, 302 { MT_TX_AGG_CNT_BASE0, 8, &dev->stats.aggr_n[0] }, 303 { MT_TX_AGG_CNT_BASE1, 8, &dev->stats.aggr_n[16] }, 304 }; 305 u32 sum, n; 306 int i, j, k; 307 308 /* Note: using MCU_RANDOM_READ is actually slower then reading all the 309 * registers by hand. MCU takes ca. 20ms to complete read of 24 310 * registers while reading them one by one will takes roughly 311 * 24*200us =~ 5ms. 312 */ 313 314 k = 0; 315 n = 0; 316 sum = 0; 317 for (i = 0; i < ARRAY_SIZE(spans); i++) 318 for (j = 0; j < spans[i].span; j++) { 319 u32 val = mt7601u_rr(dev, spans[i].addr_base + j * 4); 320 321 spans[i].stat_base[j * 2] += val & 0xffff; 322 spans[i].stat_base[j * 2 + 1] += val >> 16; 323 324 /* Calculate average AMPDU length */ 325 if (spans[i].addr_base != MT_TX_AGG_CNT_BASE0 && 326 spans[i].addr_base != MT_TX_AGG_CNT_BASE1) 327 continue; 328 329 n += (val >> 16) + (val & 0xffff); 330 sum += (val & 0xffff) * (1 + k * 2) + 331 (val >> 16) * (2 + k * 2); 332 k++; 333 } 334 335 atomic_set(&dev->avg_ampdu_len, n ? DIV_ROUND_CLOSEST(sum, n) : 1); 336 337 mt7601u_check_mac_err(dev); 338 339 ieee80211_queue_delayed_work(dev->hw, &dev->mac_work, 10 * HZ); 340 } 341 342 void 343 mt7601u_mac_wcid_setup(struct mt7601u_dev *dev, u8 idx, u8 vif_idx, u8 *mac) 344 { 345 u8 zmac[ETH_ALEN] = {}; 346 u32 attr; 347 348 attr = MT76_SET(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) | 349 MT76_SET(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8)); 350 351 mt76_wr(dev, MT_WCID_ATTR(idx), attr); 352 353 if (mac) 354 memcpy(zmac, mac, sizeof(zmac)); 355 356 mt7601u_addr_wr(dev, MT_WCID_ADDR(idx), zmac); 357 } 358 359 void mt7601u_mac_set_ampdu_factor(struct mt7601u_dev *dev) 360 { 361 struct ieee80211_sta *sta; 362 struct mt76_wcid *wcid; 363 void *msta; 364 u8 min_factor = 3; 365 int i; 366 367 rcu_read_lock(); 368 for (i = 0; i < ARRAY_SIZE(dev->wcid); i++) { 369 wcid = rcu_dereference(dev->wcid[i]); 370 if (!wcid) 371 continue; 372 373 msta = container_of(wcid, struct mt76_sta, wcid); 374 sta = container_of(msta, struct ieee80211_sta, drv_priv); 375 376 min_factor = min(min_factor, sta->ht_cap.ampdu_factor); 377 } 378 rcu_read_unlock(); 379 380 mt7601u_wr(dev, MT_MAX_LEN_CFG, 0xa0fff | 381 MT76_SET(MT_MAX_LEN_CFG_AMPDU, min_factor)); 382 } 383 384 static void 385 mt76_mac_process_rate(struct ieee80211_rx_status *status, u16 rate) 386 { 387 u8 idx = MT76_GET(MT_RXWI_RATE_MCS, rate); 388 389 switch (MT76_GET(MT_RXWI_RATE_PHY, rate)) { 390 case MT_PHY_TYPE_OFDM: 391 if (WARN_ON(idx >= 8)) 392 idx = 0; 393 idx += 4; 394 395 status->rate_idx = idx; 396 return; 397 case MT_PHY_TYPE_CCK: 398 if (idx >= 8) { 399 idx -= 8; 400 status->flag |= RX_FLAG_SHORTPRE; 401 } 402 403 if (WARN_ON(idx >= 4)) 404 idx = 0; 405 406 status->rate_idx = idx; 407 return; 408 case MT_PHY_TYPE_HT_GF: 409 status->flag |= RX_FLAG_HT_GF; 410 /* fall through */ 411 case MT_PHY_TYPE_HT: 412 status->flag |= RX_FLAG_HT; 413 status->rate_idx = idx; 414 break; 415 default: 416 WARN_ON(1); 417 return; 418 } 419 420 if (rate & MT_RXWI_RATE_SGI) 421 status->flag |= RX_FLAG_SHORT_GI; 422 423 if (rate & MT_RXWI_RATE_STBC) 424 status->flag |= 1 << RX_FLAG_STBC_SHIFT; 425 426 if (rate & MT_RXWI_RATE_BW) 427 status->flag |= RX_FLAG_40MHZ; 428 } 429 430 static void 431 mt7601u_rx_monitor_beacon(struct mt7601u_dev *dev, struct mt7601u_rxwi *rxwi, 432 u16 rate, int rssi) 433 { 434 dev->bcn_freq_off = rxwi->freq_off; 435 dev->bcn_phy_mode = MT76_GET(MT_RXWI_RATE_PHY, rate); 436 dev->avg_rssi = (dev->avg_rssi * 15) / 16 + (rssi << 8); 437 } 438 439 static int 440 mt7601u_rx_is_our_beacon(struct mt7601u_dev *dev, u8 *data) 441 { 442 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)data; 443 444 return ieee80211_is_beacon(hdr->frame_control) && 445 ether_addr_equal(hdr->addr2, dev->ap_bssid); 446 } 447 448 u32 mt76_mac_process_rx(struct mt7601u_dev *dev, struct sk_buff *skb, 449 u8 *data, void *rxi) 450 { 451 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 452 struct mt7601u_rxwi *rxwi = rxi; 453 u32 len, ctl = le32_to_cpu(rxwi->ctl); 454 u16 rate = le16_to_cpu(rxwi->rate); 455 int rssi; 456 457 len = MT76_GET(MT_RXWI_CTL_MPDU_LEN, ctl); 458 if (len < 10) 459 return 0; 460 461 if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) { 462 status->flag |= RX_FLAG_DECRYPTED; 463 status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED; 464 } 465 466 status->chains = BIT(0); 467 rssi = mt7601u_phy_get_rssi(dev, rxwi, rate); 468 status->chain_signal[0] = status->signal = rssi; 469 status->freq = dev->chandef.chan->center_freq; 470 status->band = dev->chandef.chan->band; 471 472 mt76_mac_process_rate(status, rate); 473 474 spin_lock_bh(&dev->con_mon_lock); 475 if (mt7601u_rx_is_our_beacon(dev, data)) 476 mt7601u_rx_monitor_beacon(dev, rxwi, rate, rssi); 477 else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_U2M)) 478 dev->avg_rssi = (dev->avg_rssi * 15) / 16 + (rssi << 8); 479 spin_unlock_bh(&dev->con_mon_lock); 480 481 return len; 482 } 483 484 static enum mt76_cipher_type 485 mt76_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data) 486 { 487 memset(key_data, 0, 32); 488 if (!key) 489 return MT_CIPHER_NONE; 490 491 if (key->keylen > 32) 492 return MT_CIPHER_NONE; 493 494 memcpy(key_data, key->key, key->keylen); 495 496 switch (key->cipher) { 497 case WLAN_CIPHER_SUITE_WEP40: 498 return MT_CIPHER_WEP40; 499 case WLAN_CIPHER_SUITE_WEP104: 500 return MT_CIPHER_WEP104; 501 case WLAN_CIPHER_SUITE_TKIP: 502 return MT_CIPHER_TKIP; 503 case WLAN_CIPHER_SUITE_CCMP: 504 return MT_CIPHER_AES_CCMP; 505 default: 506 return MT_CIPHER_NONE; 507 } 508 } 509 510 int mt76_mac_wcid_set_key(struct mt7601u_dev *dev, u8 idx, 511 struct ieee80211_key_conf *key) 512 { 513 enum mt76_cipher_type cipher; 514 u8 key_data[32]; 515 u8 iv_data[8]; 516 u32 val; 517 518 cipher = mt76_mac_get_key_info(key, key_data); 519 if (cipher == MT_CIPHER_NONE && key) 520 return -EINVAL; 521 522 trace_set_key(dev, idx); 523 524 mt7601u_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data)); 525 526 memset(iv_data, 0, sizeof(iv_data)); 527 if (key) { 528 iv_data[3] = key->keyidx << 6; 529 if (cipher >= MT_CIPHER_TKIP) { 530 /* Note: start with 1 to comply with spec, 531 * (see comment on common/cmm_wpa.c:4291). 532 */ 533 iv_data[0] |= 1; 534 iv_data[3] |= 0x20; 535 } 536 } 537 mt7601u_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data)); 538 539 val = mt7601u_rr(dev, MT_WCID_ATTR(idx)); 540 val &= ~MT_WCID_ATTR_PKEY_MODE & ~MT_WCID_ATTR_PKEY_MODE_EXT; 541 val |= MT76_SET(MT_WCID_ATTR_PKEY_MODE, cipher & 7) | 542 MT76_SET(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3); 543 val &= ~MT_WCID_ATTR_PAIRWISE; 544 val |= MT_WCID_ATTR_PAIRWISE * 545 !!(key && key->flags & IEEE80211_KEY_FLAG_PAIRWISE); 546 mt7601u_wr(dev, MT_WCID_ATTR(idx), val); 547 548 return 0; 549 } 550 551 int mt76_mac_shared_key_setup(struct mt7601u_dev *dev, u8 vif_idx, u8 key_idx, 552 struct ieee80211_key_conf *key) 553 { 554 enum mt76_cipher_type cipher; 555 u8 key_data[32]; 556 u32 val; 557 558 cipher = mt76_mac_get_key_info(key, key_data); 559 if (cipher == MT_CIPHER_NONE && key) 560 return -EINVAL; 561 562 trace_set_shared_key(dev, vif_idx, key_idx); 563 564 mt7601u_wr_copy(dev, MT_SKEY(vif_idx, key_idx), 565 key_data, sizeof(key_data)); 566 567 val = mt76_rr(dev, MT_SKEY_MODE(vif_idx)); 568 val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx)); 569 val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx); 570 mt76_wr(dev, MT_SKEY_MODE(vif_idx), val); 571 572 return 0; 573 } 574