1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #ifndef __MT7996_H 7 #define __MT7996_H 8 9 #include <linux/interrupt.h> 10 #include <linux/ktime.h> 11 #include "../mt76_connac.h" 12 #include "regs.h" 13 14 #define MT7996_MAX_RADIOS 3 15 #define MT7996_MAX_INTERFACES 19 /* per-band */ 16 #define MT7996_MAX_WMM_SETS 4 17 #define MT7996_WTBL_BMC_SIZE (is_mt7992(&dev->mt76) ? 32 : 64) 18 #define MT7996_WTBL_RESERVED (mt7996_wtbl_size(dev) - 1) 19 #define MT7996_WTBL_STA (MT7996_WTBL_RESERVED - \ 20 mt7996_max_interface_num(dev)) 21 22 #define MT7996_WATCHDOG_TIME (HZ / 10) 23 #define MT7996_RESET_TIMEOUT (30 * HZ) 24 25 #define MT7996_TX_RING_SIZE 2048 26 #define MT7996_TX_MCU_RING_SIZE 256 27 #define MT7996_TX_FWDL_RING_SIZE 128 28 29 #define MT7996_RX_RING_SIZE 1536 30 #define MT7996_RX_MCU_RING_SIZE 512 31 #define MT7996_RX_MCU_RING_SIZE_WA 1024 32 33 #define MT7996_FIRMWARE_WA "mediatek/mt7996/mt7996_wa.bin" 34 #define MT7996_FIRMWARE_WM "mediatek/mt7996/mt7996_wm.bin" 35 #define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin" 36 #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin" 37 38 #define MT7996_FIRMWARE_WA_233 "mediatek/mt7996/mt7996_wa_233.bin" 39 #define MT7996_FIRMWARE_WM_233 "mediatek/mt7996/mt7996_wm_233.bin" 40 #define MT7996_FIRMWARE_DSP_233 MT7996_FIRMWARE_DSP 41 #define MT7996_ROM_PATCH_233 "mediatek/mt7996/mt7996_rom_patch_233.bin" 42 43 #define MT7992_FIRMWARE_WA "mediatek/mt7996/mt7992_wa.bin" 44 #define MT7992_FIRMWARE_WM "mediatek/mt7996/mt7992_wm.bin" 45 #define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin" 46 #define MT7992_ROM_PATCH "mediatek/mt7996/mt7992_rom_patch.bin" 47 48 #define MT7992_FIRMWARE_WA_23 "mediatek/mt7996/mt7992_wa_23.bin" 49 #define MT7992_FIRMWARE_WM_23 "mediatek/mt7996/mt7992_wm_23.bin" 50 #define MT7992_FIRMWARE_DSP_23 "mediatek/mt7996/mt7992_dsp_23.bin" 51 #define MT7992_ROM_PATCH_23 "mediatek/mt7996/mt7992_rom_patch_23.bin" 52 53 #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin" 54 #define MT7996_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7996_eeprom_2i5i6i.bin" 55 #define MT7996_EEPROM_DEFAULT_233 "mediatek/mt7996/mt7996_eeprom_233.bin" 56 #define MT7996_EEPROM_DEFAULT_233_INT "mediatek/mt7996/mt7996_eeprom_233_2i5i6i.bin" 57 58 #define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom.bin" 59 #define MT7992_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7992_eeprom_2i5i.bin" 60 #define MT7992_EEPROM_DEFAULT_MIX "mediatek/mt7996/mt7992_eeprom_2i5e.bin" 61 #define MT7992_EEPROM_DEFAULT_23 "mediatek/mt7996/mt7992_eeprom_23.bin" 62 #define MT7992_EEPROM_DEFAULT_23_INT "mediatek/mt7996/mt7992_eeprom_23_2i5i.bin" 63 64 #define MT7996_EEPROM_SIZE 7680 65 #define MT7996_EEPROM_BLOCK_SIZE 16 66 #define MT7996_TOKEN_SIZE 16384 67 #define MT7996_HW_TOKEN_SIZE 8192 68 69 #define MT7996_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 70 #define MT7996_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 71 #define MT7996_IBF_MAX_NC 2 72 #define MT7996_IBF_TIMEOUT 0x18 73 #define MT7996_IBF_TIMEOUT_LEGACY 0x48 74 75 #define MT7992_CFEND_RATE_DEFAULT 0x4b /* OFDM 6M */ 76 #define MT7992_IBF_TIMEOUT 0xff 77 78 #define MT7996_SKU_RATE_NUM 417 79 #define MT7996_SKU_PATH_NUM 494 80 81 #define MT7996_MAX_TWT_AGRT 16 82 #define MT7996_MAX_STA_TWT_AGRT 8 83 #define MT7996_MIN_TWT_DUR 64 84 #define MT7996_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 3) 85 86 /* NOTE: used to map mt76_rates. idx may change if firmware expands table */ 87 #define MT7996_BASIC_RATES_TBL 31 88 #define MT7996_BEACON_RATES_TBL 25 89 90 #define MT7996_THERMAL_THROTTLE_MAX 100 91 #define MT7996_CDEV_THROTTLE_MAX 99 92 #define MT7996_CRIT_TEMP_IDX 0 93 #define MT7996_MAX_TEMP_IDX 1 94 #define MT7996_CRIT_TEMP 110 95 #define MT7996_MAX_TEMP 120 96 97 #define MT7996_RRO_MAX_SESSION 1024 98 #define MT7996_RRO_WINDOW_MAX_LEN 1024 99 #define MT7996_RRO_ADDR_ELEM_LEN 128 100 #define MT7996_RRO_BA_BITMAP_LEN 2 101 #define MT7996_RRO_BA_BITMAP_CR_SIZE ((MT7996_RRO_MAX_SESSION * 128) / \ 102 MT7996_RRO_BA_BITMAP_LEN) 103 #define MT7996_RRO_BA_BITMAP_SESSION_SIZE (MT7996_RRO_MAX_SESSION / \ 104 MT7996_RRO_ADDR_ELEM_LEN) 105 #define MT7996_RRO_WINDOW_MAX_SIZE (MT7996_RRO_WINDOW_MAX_LEN * \ 106 MT7996_RRO_BA_BITMAP_SESSION_SIZE) 107 108 #define MT7996_RX_BUF_SIZE (1800 + \ 109 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 110 #define MT7996_RX_MSDU_PAGE_SIZE (128 + \ 111 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 112 113 struct mt7996_vif; 114 struct mt7996_sta; 115 struct mt7996_dfs_pulse; 116 struct mt7996_dfs_pattern; 117 118 enum mt7996_ram_type { 119 MT7996_RAM_TYPE_WM, 120 MT7996_RAM_TYPE_WA, 121 MT7996_RAM_TYPE_DSP, 122 }; 123 124 enum mt7996_var_type { 125 MT7996_VAR_TYPE_444, 126 MT7996_VAR_TYPE_233, 127 }; 128 129 enum mt7992_var_type { 130 MT7992_VAR_TYPE_44, 131 MT7992_VAR_TYPE_23, 132 }; 133 134 enum mt7996_fem_type { 135 MT7996_FEM_EXT, 136 MT7996_FEM_INT, 137 MT7996_FEM_MIX, 138 }; 139 140 enum mt7996_txq_id { 141 MT7996_TXQ_FWDL = 16, 142 MT7996_TXQ_MCU_WM, 143 MT7996_TXQ_BAND0, 144 MT7996_TXQ_BAND1, 145 MT7996_TXQ_MCU_WA, 146 MT7996_TXQ_BAND2, 147 }; 148 149 enum mt7996_rxq_id { 150 MT7996_RXQ_MCU_WM = 0, 151 MT7996_RXQ_MCU_WA, 152 MT7996_RXQ_MCU_WA_MAIN = 2, 153 MT7996_RXQ_MCU_WA_EXT = 3, /* for mt7992 */ 154 MT7996_RXQ_MCU_WA_TRI = 3, 155 MT7996_RXQ_BAND0 = 4, 156 MT7996_RXQ_BAND1 = 5, /* for mt7992 */ 157 MT7996_RXQ_BAND2 = 5, 158 MT7996_RXQ_RRO_BAND0 = 8, 159 MT7996_RXQ_RRO_BAND1 = 8,/* unused */ 160 MT7996_RXQ_RRO_BAND2 = 6, 161 MT7996_RXQ_MSDU_PG_BAND0 = 10, 162 MT7996_RXQ_MSDU_PG_BAND1 = 11, 163 MT7996_RXQ_MSDU_PG_BAND2 = 12, 164 MT7996_RXQ_TXFREE0 = 9, 165 MT7996_RXQ_TXFREE1 = 9, 166 MT7996_RXQ_TXFREE2 = 7, 167 MT7996_RXQ_RRO_IND = 0, 168 }; 169 170 struct mt7996_twt_flow { 171 struct list_head list; 172 u64 start_tsf; 173 u64 tsf; 174 u32 duration; 175 u16 wcid; 176 __le16 mantissa; 177 u8 exp; 178 u8 table_id; 179 u8 id; 180 u8 protection:1; 181 u8 flowtype:1; 182 u8 trigger:1; 183 u8 sched:1; 184 }; 185 186 DECLARE_EWMA(avg_signal, 10, 8) 187 188 struct mt7996_sta_link { 189 struct mt76_wcid wcid; /* must be first */ 190 191 struct mt7996_sta *sta; 192 193 struct list_head rc_list; 194 u32 airtime_ac[8]; 195 196 int ack_signal; 197 struct ewma_avg_signal avg_ack_signal; 198 199 unsigned long changed; 200 201 struct mt76_connac_sta_key_conf bip; 202 203 struct { 204 u8 flowid_mask; 205 struct mt7996_twt_flow flow[MT7996_MAX_STA_TWT_AGRT]; 206 } twt; 207 208 struct rcu_head rcu_head; 209 }; 210 211 struct mt7996_sta { 212 struct mt7996_sta_link deflink; /* must be first */ 213 struct mt7996_sta_link __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS]; 214 u8 deflink_id; 215 216 struct mt7996_vif *vif; 217 }; 218 219 struct mt7996_vif_link { 220 struct mt76_vif_link mt76; /* must be first */ 221 222 struct mt7996_sta_link msta_link; 223 struct mt7996_phy *phy; 224 225 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 226 struct cfg80211_bitrate_mask bitrate_mask; 227 }; 228 229 struct mt7996_vif { 230 struct mt7996_vif_link deflink; /* must be first */ 231 struct mt76_vif_data mt76; 232 }; 233 234 /* crash-dump */ 235 struct mt7996_crash_data { 236 guid_t guid; 237 struct timespec64 timestamp; 238 239 u8 *memdump_buf; 240 size_t memdump_buf_len; 241 }; 242 243 struct mt7996_hif { 244 struct list_head list; 245 246 struct device *dev; 247 void __iomem *regs; 248 int irq; 249 }; 250 251 struct mt7996_wed_rro_addr { 252 u32 head_low; 253 u32 head_high : 4; 254 u32 count: 11; 255 u32 oor: 1; 256 u32 rsv : 8; 257 u32 signature : 8; 258 }; 259 260 struct mt7996_wed_rro_session_id { 261 struct list_head list; 262 u16 id; 263 }; 264 265 struct mt7996_phy { 266 struct mt76_phy *mt76; 267 struct mt7996_dev *dev; 268 269 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 270 271 struct thermal_cooling_device *cdev; 272 u8 cdev_state; 273 u8 throttle_state; 274 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */ 275 276 u32 rxfilter; 277 u64 omac_mask; 278 279 u16 noise; 280 281 s16 coverage_class; 282 u8 slottime; 283 284 u8 rdd_state; 285 286 u16 beacon_rate; 287 288 u32 rx_ampdu_ts; 289 u32 ampdu_ref; 290 int txpower; 291 292 struct mt76_mib_stats mib; 293 struct mt76_channel_state state_ts; 294 295 u16 orig_chainmask; 296 297 bool has_aux_rx; 298 bool counter_reset; 299 }; 300 301 struct mt7996_dev { 302 union { /* must be first */ 303 struct mt76_dev mt76; 304 struct mt76_phy mphy; 305 }; 306 307 struct mt7996_phy *radio_phy[MT7996_MAX_RADIOS]; 308 struct wiphy_radio radios[MT7996_MAX_RADIOS]; 309 struct wiphy_radio_freq_range radio_freqs[MT7996_MAX_RADIOS]; 310 311 struct mt7996_hif *hif2; 312 struct mt7996_reg_desc reg; 313 u8 q_id[MT7996_MAX_QUEUE]; 314 u32 q_int_mask[MT7996_MAX_QUEUE]; 315 u32 q_wfdma_mask; 316 317 const struct mt76_bus_ops *bus_ops; 318 struct mt7996_phy phy; 319 320 /* monitor rx chain configured channel */ 321 struct cfg80211_chan_def rdd2_chandef; 322 struct mt7996_phy *rdd2_phy; 323 324 u16 chainmask; 325 u8 chainshift[__MT_MAX_BAND]; 326 u32 hif_idx; 327 328 struct work_struct init_work; 329 struct work_struct rc_work; 330 struct work_struct dump_work; 331 struct work_struct reset_work; 332 wait_queue_head_t reset_wait; 333 struct { 334 u32 state; 335 u32 wa_reset_count; 336 u32 wm_reset_count; 337 bool hw_full_reset:1; 338 bool hw_init_done:1; 339 bool restart:1; 340 } recovery; 341 342 /* protects coredump data */ 343 struct mutex dump_mutex; 344 #ifdef CONFIG_DEV_COREDUMP 345 struct { 346 struct mt7996_crash_data *crash_data; 347 } coredump; 348 #endif 349 350 struct list_head sta_rc_list; 351 struct list_head twt_list; 352 353 u32 hw_pattern; 354 355 bool flash_mode:1; 356 bool has_eht:1; 357 bool has_rro:1; 358 359 struct { 360 struct { 361 void *ptr; 362 dma_addr_t phy_addr; 363 } ba_bitmap[MT7996_RRO_BA_BITMAP_LEN]; 364 struct { 365 void *ptr; 366 dma_addr_t phy_addr; 367 } addr_elem[MT7996_RRO_ADDR_ELEM_LEN]; 368 struct { 369 void *ptr; 370 dma_addr_t phy_addr; 371 } session; 372 373 struct work_struct work; 374 struct list_head poll_list; 375 spinlock_t lock; 376 } wed_rro; 377 378 bool ibf; 379 u8 fw_debug_wm; 380 u8 fw_debug_wa; 381 u8 fw_debug_bin; 382 u16 fw_debug_seq; 383 384 struct dentry *debugfs_dir; 385 struct rchan *relay_fwlog; 386 387 struct { 388 u16 table_mask; 389 u8 n_agrt; 390 } twt; 391 392 spinlock_t reg_lock; 393 394 u8 wtbl_size_group; 395 struct { 396 u8 type:4; 397 u8 fem:4; 398 } var; 399 }; 400 401 enum { 402 WFDMA0 = 0x0, 403 WFDMA1, 404 WFDMA_EXT, 405 __MT_WFDMA_MAX, 406 }; 407 408 enum { 409 MT_RX_SEL0, 410 MT_RX_SEL1, 411 MT_RX_SEL2, /* monitor chain */ 412 }; 413 414 enum mt7996_rdd_cmd { 415 RDD_STOP, 416 RDD_START, 417 RDD_DET_MODE, 418 RDD_RADAR_EMULATE, 419 RDD_START_TXQ = 20, 420 RDD_CAC_START = 50, 421 RDD_CAC_END, 422 RDD_NORMAL_START, 423 RDD_DISABLE_DFS_CAL, 424 RDD_PULSE_DBG, 425 RDD_READ_PULSE, 426 RDD_RESUME_BF, 427 RDD_IRQ_OFF, 428 }; 429 430 static inline struct mt7996_dev * 431 mt7996_hw_dev(struct ieee80211_hw *hw) 432 { 433 struct mt76_phy *phy = hw->priv; 434 435 return container_of(phy->dev, struct mt7996_dev, mt76); 436 } 437 438 static inline struct mt7996_phy * 439 __mt7996_phy(struct mt7996_dev *dev, enum mt76_band_id band) 440 { 441 struct mt76_phy *phy = dev->mt76.phys[band]; 442 443 if (!phy) 444 return NULL; 445 446 return phy->priv; 447 } 448 449 static inline struct mt7996_phy * 450 mt7996_phy2(struct mt7996_dev *dev) 451 { 452 return __mt7996_phy(dev, MT_BAND1); 453 } 454 455 static inline struct mt7996_phy * 456 mt7996_phy3(struct mt7996_dev *dev) 457 { 458 return __mt7996_phy(dev, MT_BAND2); 459 } 460 461 static inline bool 462 mt7996_band_valid(struct mt7996_dev *dev, u8 band) 463 { 464 if (is_mt7992(&dev->mt76)) 465 return band <= MT_BAND1; 466 467 return band <= MT_BAND2; 468 } 469 470 static inline bool 471 mt7996_has_background_radar(struct mt7996_dev *dev) 472 { 473 switch (mt76_chip(&dev->mt76)) { 474 case 0x7990: 475 if (dev->var.type == MT7996_VAR_TYPE_233) 476 return false; 477 break; 478 case 0x7992: 479 if (dev->var.type == MT7992_VAR_TYPE_23) 480 return false; 481 break; 482 default: 483 return false; 484 } 485 486 return true; 487 } 488 489 static inline struct mt7996_phy * 490 mt7996_band_phy(struct mt7996_dev *dev, enum nl80211_band band) 491 { 492 struct mt76_phy *mphy; 493 494 mphy = dev->mt76.band_phys[band]; 495 if (!mphy) 496 return NULL; 497 498 return mphy->priv; 499 } 500 501 static inline struct mt7996_vif_link * 502 mt7996_vif_link(struct mt7996_dev *dev, struct ieee80211_vif *vif, int link_id) 503 { 504 return (struct mt7996_vif_link *)mt76_vif_link(&dev->mt76, vif, link_id); 505 } 506 507 static inline struct mt7996_phy * 508 mt7996_vif_link_phy(struct mt7996_vif_link *link) 509 { 510 struct mt76_phy *mphy = mt76_vif_link_phy(&link->mt76); 511 512 if (!mphy) 513 return NULL; 514 515 return mphy->priv; 516 } 517 518 static inline struct mt7996_vif_link * 519 mt7996_vif_conf_link(struct mt7996_dev *dev, struct ieee80211_vif *vif, 520 struct ieee80211_bss_conf *link_conf) 521 { 522 return (struct mt7996_vif_link *)mt76_vif_conf_link(&dev->mt76, vif, 523 link_conf); 524 } 525 526 #define mt7996_for_each_phy(dev, phy) \ 527 for (int __i = 0; __i < ARRAY_SIZE((dev)->radio_phy); __i++) \ 528 if (((phy) = (dev)->radio_phy[__i]) != NULL) 529 530 extern const struct ieee80211_ops mt7996_ops; 531 extern struct pci_driver mt7996_pci_driver; 532 extern struct pci_driver mt7996_hif_driver; 533 534 struct mt7996_dev *mt7996_mmio_probe(struct device *pdev, 535 void __iomem *mem_base, u32 device_id); 536 void mt7996_wfsys_reset(struct mt7996_dev *dev); 537 irqreturn_t mt7996_irq_handler(int irq, void *dev_instance); 538 u64 __mt7996_get_tsf(struct ieee80211_hw *hw, struct mt7996_vif_link *link); 539 int mt7996_register_device(struct mt7996_dev *dev); 540 void mt7996_unregister_device(struct mt7996_dev *dev); 541 int mt7996_vif_link_add(struct mt76_phy *mphy, struct ieee80211_vif *vif, 542 struct ieee80211_bss_conf *link_conf, 543 struct mt76_vif_link *mlink); 544 void mt7996_vif_link_remove(struct mt76_phy *mphy, struct ieee80211_vif *vif, 545 struct ieee80211_bss_conf *link_conf, 546 struct mt76_vif_link *mlink); 547 int mt7996_eeprom_init(struct mt7996_dev *dev); 548 int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy); 549 int mt7996_eeprom_get_target_power(struct mt7996_dev *dev, 550 struct ieee80211_channel *chan); 551 s8 mt7996_eeprom_get_power_delta(struct mt7996_dev *dev, int band); 552 int mt7996_dma_init(struct mt7996_dev *dev); 553 void mt7996_dma_reset(struct mt7996_dev *dev, bool force); 554 void mt7996_dma_prefetch(struct mt7996_dev *dev); 555 void mt7996_dma_cleanup(struct mt7996_dev *dev); 556 void mt7996_dma_start(struct mt7996_dev *dev, bool reset, bool wed_reset); 557 int mt7996_init_tx_queues(struct mt7996_phy *phy, int idx, 558 int n_desc, int ring_base, struct mtk_wed_device *wed); 559 void mt7996_init_txpower(struct mt7996_phy *phy); 560 int mt7996_txbf_init(struct mt7996_dev *dev); 561 void mt7996_reset(struct mt7996_dev *dev); 562 int mt7996_run(struct mt7996_phy *phy); 563 int mt7996_mcu_init(struct mt7996_dev *dev); 564 int mt7996_mcu_init_firmware(struct mt7996_dev *dev); 565 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 566 struct mt7996_vif_link *link, 567 struct mt7996_twt_flow *flow, 568 int cmd); 569 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 570 struct ieee80211_bss_conf *link_conf, 571 struct mt76_vif_link *mlink, bool enable); 572 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 573 struct ieee80211_bss_conf *link_conf, 574 struct mt76_vif_link *mlink, 575 struct mt7996_sta_link *msta_link, int enable); 576 int mt7996_mcu_add_sta(struct mt7996_dev *dev, 577 struct ieee80211_bss_conf *link_conf, 578 struct ieee80211_link_sta *link_sta, 579 struct mt7996_vif_link *link, 580 struct mt7996_sta_link *msta_link, 581 int conn_state, bool newly); 582 int mt7996_mcu_teardown_mld_sta(struct mt7996_dev *dev, 583 struct mt7996_vif_link *link, 584 struct mt7996_sta_link *msta_link); 585 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 586 struct ieee80211_ampdu_params *params, 587 struct mt7996_vif_link *link, 588 struct mt7996_sta_link *msta_link, bool enable); 589 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 590 struct ieee80211_ampdu_params *params, 591 struct mt7996_vif_link *link, bool enable); 592 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 593 struct mt76_vif_link *mlink, 594 struct cfg80211_he_bss_color *he_bss_color); 595 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 596 struct ieee80211_bss_conf *link_conf); 597 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 598 struct ieee80211_bss_conf *link_conf, 599 struct mt7996_vif_link *link, u32 changed); 600 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, 601 struct mt7996_vif_link *link, 602 struct ieee80211_he_obss_pd *he_obss_pd); 603 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, 604 struct ieee80211_vif *vif, 605 struct ieee80211_bss_conf *link_conf, 606 struct ieee80211_link_sta *link_sta, 607 struct mt7996_vif_link *link, 608 struct mt7996_sta_link *msta_link, bool changed); 609 int mt7996_set_channel(struct mt76_phy *mphy); 610 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag); 611 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 612 struct ieee80211_bss_conf *link_conf); 613 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 614 void *data, u16 version); 615 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, 616 struct ieee80211_link_sta *link_sta, 617 struct mt7996_vif_link *link, 618 struct mt7996_sta_link *msta_link, 619 void *data, u32 field); 620 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev); 621 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len); 622 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num); 623 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap); 624 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 set, u8 band); 625 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action); 626 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val); 627 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 628 const struct mt7996_dfs_pulse *pulse); 629 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 630 const struct mt7996_dfs_pattern *pattern); 631 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable); 632 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val); 633 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 634 struct ieee80211_bss_conf *link_conf); 635 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch); 636 int mt7996_mcu_get_temperature(struct mt7996_phy *phy); 637 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state); 638 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable); 639 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy); 640 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 641 u8 rx_sel, u8 val); 642 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 643 struct cfg80211_chan_def *chandef); 644 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 645 u16 rate_idx, bool beacon); 646 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set); 647 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans); 648 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val); 649 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); 650 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl); 651 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level); 652 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev); 653 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb); 654 void mt7996_mcu_exit(struct mt7996_dev *dev); 655 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag); 656 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id); 657 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled); 658 659 static inline u8 mt7996_max_interface_num(struct mt7996_dev *dev) 660 { 661 return min(MT7996_MAX_INTERFACES * (1 + mt7996_band_valid(dev, MT_BAND1) + 662 mt7996_band_valid(dev, MT_BAND2)), 663 MT7996_WTBL_BMC_SIZE); 664 } 665 666 static inline u16 mt7996_wtbl_size(struct mt7996_dev *dev) 667 { 668 return (dev->wtbl_size_group << 8) + MT7996_WTBL_BMC_SIZE; 669 } 670 671 void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg, 672 u32 clear, u32 set); 673 674 static inline void mt7996_irq_enable(struct mt7996_dev *dev, u32 mask) 675 { 676 if (dev->hif2) 677 mt7996_dual_hif_set_irq_mask(dev, false, 0, mask); 678 else 679 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 680 681 tasklet_schedule(&dev->mt76.irq_tasklet); 682 } 683 684 static inline void mt7996_irq_disable(struct mt7996_dev *dev, u32 mask) 685 { 686 if (dev->hif2) 687 mt7996_dual_hif_set_irq_mask(dev, true, mask, 0); 688 else 689 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 690 } 691 692 void mt7996_memcpy_fromio(struct mt7996_dev *dev, void *buf, u32 offset, 693 size_t len); 694 695 static inline u16 mt7996_rx_chainmask(struct mt7996_phy *phy) 696 { 697 int max_nss = hweight8(phy->mt76->hw->wiphy->available_antennas_tx); 698 int cur_nss = hweight8(phy->mt76->antenna_mask); 699 u16 tx_chainmask = phy->mt76->chainmask; 700 701 if (cur_nss != max_nss) 702 return tx_chainmask; 703 704 return tx_chainmask | (BIT(fls(tx_chainmask)) * phy->has_aux_rx); 705 } 706 707 void mt7996_mac_init(struct mt7996_dev *dev); 708 u32 mt7996_mac_wtbl_lmac_addr(struct mt7996_dev *dev, u16 wcid, u8 dw); 709 bool mt7996_mac_wtbl_update(struct mt7996_dev *dev, int idx, u32 mask); 710 void mt7996_mac_reset_counters(struct mt7996_phy *phy); 711 void mt7996_mac_cca_stats_reset(struct mt7996_phy *phy); 712 void mt7996_mac_enable_nf(struct mt7996_dev *dev, u8 band); 713 void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi, 714 struct sk_buff *skb, struct mt76_wcid *wcid, 715 struct ieee80211_key_conf *key, int pid, 716 enum mt76_txq_id qid, u32 changed); 717 void mt7996_mac_set_coverage_class(struct mt7996_phy *phy); 718 void mt7996_mac_work(struct work_struct *work); 719 void mt7996_mac_reset_work(struct work_struct *work); 720 void mt7996_mac_dump_work(struct work_struct *work); 721 void mt7996_mac_sta_rc_work(struct work_struct *work); 722 void mt7996_mac_update_stats(struct mt7996_phy *phy); 723 void mt7996_mac_twt_teardown_flow(struct mt7996_dev *dev, 724 struct mt7996_vif_link *link, 725 struct mt7996_sta_link *msta_link, 726 u8 flowid); 727 void mt7996_mac_add_twt_setup(struct ieee80211_hw *hw, 728 struct ieee80211_sta *sta, 729 struct ieee80211_twt_setup *twt); 730 int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 731 enum mt76_txq_id qid, struct mt76_wcid *wcid, 732 struct ieee80211_sta *sta, 733 struct mt76_tx_info *tx_info); 734 void mt7996_tx_token_put(struct mt7996_dev *dev); 735 void mt7996_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 736 struct sk_buff *skb, u32 *info); 737 bool mt7996_rx_check(struct mt76_dev *mdev, void *data, int len); 738 void mt7996_stats_work(struct work_struct *work); 739 int mt76_dfs_start_rdd(struct mt7996_dev *dev, bool force); 740 int mt7996_dfs_init_radar_detector(struct mt7996_phy *phy); 741 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy); 742 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy); 743 void mt7996_update_channel(struct mt76_phy *mphy); 744 int mt7996_init_debugfs(struct mt7996_dev *dev); 745 void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len); 746 bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len); 747 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 748 struct ieee80211_key_conf *key, int mcu_cmd, 749 struct mt76_wcid *wcid, enum set_key_cmd cmd); 750 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, 751 struct mt7996_vif_link *link, 752 struct mt7996_sta_link *msta_link, 753 struct ieee80211_key_conf *key); 754 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 755 struct ieee80211_vif *vif, 756 struct mt7996_vif_link *link, 757 struct mt7996_sta_link *msta_link); 758 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode); 759 #ifdef CONFIG_MAC80211_DEBUGFS 760 void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 761 struct ieee80211_sta *sta, struct dentry *dir); 762 #endif 763 int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, 764 bool hif2, int *irq); 765 u32 mt7996_wed_init_buf(void *ptr, dma_addr_t phys, int token_id); 766 767 #ifdef CONFIG_MTK_DEBUG 768 int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir); 769 #endif 770 771 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 772 int mt7996_dma_rro_init(struct mt7996_dev *dev); 773 #endif /* CONFIG_NET_MEDIATEK_SOC_WED */ 774 775 #endif 776