1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 #define fw_name(_dev, name, ...) ({ \ 14 char *_fw; \ 15 switch (mt76_chip(&(_dev)->mt76)) { \ 16 case MT7992_DEVICE_ID: \ 17 switch ((_dev)->var.type) { \ 18 case MT7992_VAR_TYPE_23: \ 19 _fw = MT7992_##name##_23; \ 20 break; \ 21 default: \ 22 _fw = MT7992_##name; \ 23 } \ 24 break; \ 25 case MT7990_DEVICE_ID: \ 26 _fw = MT7990_##name; \ 27 break; \ 28 case MT7996_DEVICE_ID: \ 29 default: \ 30 switch ((_dev)->var.type) { \ 31 case MT7996_VAR_TYPE_233: \ 32 _fw = MT7996_##name##_233; \ 33 break; \ 34 default: \ 35 _fw = MT7996_##name; \ 36 } \ 37 break; \ 38 } \ 39 _fw; \ 40 }) 41 42 struct mt7996_patch_hdr { 43 char build_date[16]; 44 char platform[4]; 45 __be32 hw_sw_ver; 46 __be32 patch_ver; 47 __be16 checksum; 48 u16 reserved; 49 struct { 50 __be32 patch_ver; 51 __be32 subsys; 52 __be32 feature; 53 __be32 n_region; 54 __be32 crc; 55 u32 reserved[11]; 56 } desc; 57 } __packed; 58 59 struct mt7996_patch_sec { 60 __be32 type; 61 __be32 offs; 62 __be32 size; 63 union { 64 __be32 spec[13]; 65 struct { 66 __be32 addr; 67 __be32 len; 68 __be32 sec_key_idx; 69 __be32 align_len; 70 u32 reserved[9]; 71 } info; 72 }; 73 } __packed; 74 75 struct mt7996_fw_trailer { 76 u8 chip_id; 77 u8 eco_code; 78 u8 n_region; 79 u8 format_ver; 80 u8 format_flag; 81 u8 reserved[2]; 82 char fw_ver[10]; 83 char build_date[15]; 84 u32 crc; 85 } __packed; 86 87 struct mt7996_fw_region { 88 __le32 decomp_crc; 89 __le32 decomp_len; 90 __le32 decomp_blk_sz; 91 u8 reserved[4]; 92 __le32 addr; 93 __le32 len; 94 u8 feature_set; 95 u8 reserved1[15]; 96 } __packed; 97 98 #define MCU_PATCH_ADDRESS 0x200000 99 100 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 101 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 102 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 103 104 static bool sr_scene_detect = true; 105 module_param(sr_scene_detect, bool, 0644); 106 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 107 108 static u8 109 mt7996_mcu_get_sta_nss(u16 mcs_map) 110 { 111 u8 nss; 112 113 for (nss = 8; nss > 0; nss--) { 114 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 115 116 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 117 break; 118 } 119 120 return nss - 1; 121 } 122 123 static void 124 mt7996_mcu_set_sta_he_mcs(struct ieee80211_link_sta *link_sta, 125 struct mt7996_vif_link *link, 126 __le16 *he_mcs, u16 mcs_map) 127 { 128 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 129 enum nl80211_band band = link->phy->mt76->chandef.chan->band; 130 const u16 *mask = link->bitrate_mask.control[band].he_mcs; 131 132 for (nss = 0; nss < max_nss; nss++) { 133 int mcs; 134 135 switch ((mcs_map >> (2 * nss)) & 0x3) { 136 case IEEE80211_HE_MCS_SUPPORT_0_11: 137 mcs = GENMASK(11, 0); 138 break; 139 case IEEE80211_HE_MCS_SUPPORT_0_9: 140 mcs = GENMASK(9, 0); 141 break; 142 case IEEE80211_HE_MCS_SUPPORT_0_7: 143 mcs = GENMASK(7, 0); 144 break; 145 default: 146 mcs = 0; 147 } 148 149 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 150 151 switch (mcs) { 152 case 0 ... 7: 153 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 154 break; 155 case 8 ... 9: 156 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 157 break; 158 case 10 ... 11: 159 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 160 break; 161 default: 162 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 163 break; 164 } 165 mcs_map &= ~(0x3 << (nss * 2)); 166 mcs_map |= mcs << (nss * 2); 167 } 168 169 *he_mcs = cpu_to_le16(mcs_map); 170 } 171 172 static void 173 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_link_sta *link_sta, 174 __le16 *vht_mcs, const u16 *mask) 175 { 176 u16 mcs, mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); 177 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 178 179 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 180 switch (mcs_map & 0x3) { 181 case IEEE80211_VHT_MCS_SUPPORT_0_9: 182 mcs = GENMASK(9, 0); 183 break; 184 case IEEE80211_VHT_MCS_SUPPORT_0_8: 185 mcs = GENMASK(8, 0); 186 break; 187 case IEEE80211_VHT_MCS_SUPPORT_0_7: 188 mcs = GENMASK(7, 0); 189 break; 190 default: 191 mcs = 0; 192 } 193 194 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 195 } 196 } 197 198 static void 199 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_link_sta *link_sta, 200 u8 *ht_mcs, const u8 *mask) 201 { 202 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 203 204 for (nss = 0; nss < max_nss; nss++) 205 ht_mcs[nss] = link_sta->ht_cap.mcs.rx_mask[nss] & mask[nss]; 206 } 207 208 static int 209 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 210 struct sk_buff *skb, int seq) 211 { 212 struct mt7996_mcu_rxd *rxd; 213 struct mt7996_mcu_uni_event *event; 214 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 215 int ret = 0; 216 217 if (!skb) { 218 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 219 cmd, seq); 220 return -ETIMEDOUT; 221 } 222 223 rxd = (struct mt7996_mcu_rxd *)skb->data; 224 if (seq != rxd->seq) 225 return -EAGAIN; 226 227 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 228 skb_pull(skb, sizeof(*rxd) - 4); 229 ret = *skb->data; 230 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 231 rxd->eid == MCU_UNI_EVENT_RESULT) { 232 skb_pull(skb, sizeof(*rxd)); 233 event = (struct mt7996_mcu_uni_event *)skb->data; 234 ret = le32_to_cpu(event->status); 235 /* skip invalid event */ 236 if (mcu_cmd != event->cid) 237 ret = -EAGAIN; 238 } else { 239 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 240 } 241 242 return ret; 243 } 244 245 static int 246 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 247 int cmd, int *wait_seq) 248 { 249 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 250 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 251 struct mt76_connac2_mcu_uni_txd *uni_txd; 252 struct mt76_connac2_mcu_txd *mcu_txd; 253 enum mt76_mcuq_id qid; 254 __le32 *txd; 255 u32 val; 256 u8 seq; 257 258 mdev->mcu.timeout = 20 * HZ; 259 260 seq = ++dev->mt76.mcu.msg_seq & 0xf; 261 if (!seq) 262 seq = ++dev->mt76.mcu.msg_seq & 0xf; 263 264 if (cmd == MCU_CMD(FW_SCATTER)) { 265 qid = MT_MCUQ_FWDL; 266 goto exit; 267 } 268 269 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 270 txd = (__le32 *)skb_push(skb, txd_len); 271 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state) && mt7996_has_wa(dev)) 272 qid = MT_MCUQ_WA; 273 else 274 qid = MT_MCUQ_WM; 275 276 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 277 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 278 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 279 txd[0] = cpu_to_le32(val); 280 281 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 282 txd[1] = cpu_to_le32(val); 283 284 if (cmd & __MCU_CMD_FIELD_UNI) { 285 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 286 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 287 uni_txd->cid = cpu_to_le16(mcu_cmd); 288 uni_txd->s2d_index = MCU_S2D_H2CN; 289 uni_txd->pkt_type = MCU_PKT_ID; 290 uni_txd->seq = seq; 291 292 if (cmd & __MCU_CMD_FIELD_QUERY) 293 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 294 else 295 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 296 297 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 298 uni_txd->s2d_index = MCU_S2D_H2CN; 299 else if (cmd & __MCU_CMD_FIELD_WA) 300 uni_txd->s2d_index = MCU_S2D_H2C; 301 else if (cmd & __MCU_CMD_FIELD_WM) 302 uni_txd->s2d_index = MCU_S2D_H2N; 303 304 goto exit; 305 } 306 307 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 308 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 309 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 310 MT_TX_MCU_PORT_RX_Q0)); 311 mcu_txd->pkt_type = MCU_PKT_ID; 312 mcu_txd->seq = seq; 313 314 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 315 mcu_txd->set_query = MCU_Q_NA; 316 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 317 if (mcu_txd->ext_cid) { 318 mcu_txd->ext_cid_ack = 1; 319 320 if (cmd & __MCU_CMD_FIELD_QUERY) 321 mcu_txd->set_query = MCU_Q_QUERY; 322 else 323 mcu_txd->set_query = MCU_Q_SET; 324 } 325 326 if (cmd & __MCU_CMD_FIELD_WA) 327 mcu_txd->s2d_index = MCU_S2D_H2C; 328 else 329 mcu_txd->s2d_index = MCU_S2D_H2N; 330 331 exit: 332 if (wait_seq) 333 *wait_seq = seq; 334 335 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 336 } 337 338 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 339 { 340 struct { 341 u8 _rsv[4]; 342 343 __le16 tag; 344 __le16 len; 345 __le32 args[3]; 346 } __packed req = { 347 .args = { 348 cpu_to_le32(a1), 349 cpu_to_le32(a2), 350 cpu_to_le32(a3), 351 }, 352 }; 353 354 if (mt7996_has_wa(dev)) 355 return mt76_mcu_send_msg(&dev->mt76, cmd, &req.args, 356 sizeof(req.args), false); 357 358 req.tag = cpu_to_le16(cmd == MCU_WA_PARAM_CMD(QUERY) ? UNI_CMD_SDO_QUERY : 359 UNI_CMD_SDO_SET); 360 req.len = cpu_to_le16(sizeof(req) - 4); 361 362 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(SDO), &req, 363 sizeof(req), false); 364 } 365 366 static void 367 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 368 { 369 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 370 return; 371 372 ieee80211_csa_finish(vif, 0); 373 } 374 375 static void 376 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 377 { 378 struct mt76_phy *mphy = &dev->mt76.phy; 379 struct mt7996_mcu_rdd_report *r; 380 381 r = (struct mt7996_mcu_rdd_report *)skb->data; 382 383 switch (r->rdd_idx) { 384 case MT_RDD_IDX_BAND2: 385 mphy = dev->mt76.phys[MT_BAND2]; 386 break; 387 case MT_RDD_IDX_BAND1: 388 mphy = dev->mt76.phys[MT_BAND1]; 389 break; 390 case MT_RDD_IDX_BACKGROUND: 391 if (!dev->rdd2_phy) 392 return; 393 mphy = dev->rdd2_phy->mt76; 394 break; 395 default: 396 dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx); 397 return; 398 } 399 400 if (!mphy) 401 return; 402 403 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND) 404 cfg80211_background_radar_event(mphy->hw->wiphy, 405 &dev->rdd2_chandef, 406 GFP_ATOMIC); 407 else 408 ieee80211_radar_detected(mphy->hw, NULL); 409 dev->hw_pattern++; 410 } 411 412 static void 413 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 414 { 415 #define UNI_EVENT_FW_LOG_FORMAT 0 416 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 417 const char *data = (char *)&rxd[1] + 4, *type; 418 struct tlv *tlv = (struct tlv *)data; 419 int len; 420 421 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 422 len = skb->len - sizeof(*rxd); 423 data = (char *)&rxd[1]; 424 goto out; 425 } 426 427 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 428 return; 429 430 data += sizeof(*tlv) + 4; 431 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 432 433 out: 434 switch (rxd->s2d_index) { 435 case 0: 436 if (mt7996_debugfs_rx_log(dev, data, len)) 437 return; 438 439 type = "WM"; 440 break; 441 case 2: 442 type = "WA"; 443 break; 444 default: 445 type = "unknown"; 446 break; 447 } 448 449 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 450 } 451 452 static void 453 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 454 { 455 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 456 return; 457 458 ieee80211_color_change_finish(vif, 0); 459 } 460 461 static void 462 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 463 { 464 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 465 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 466 struct header { 467 u8 band; 468 u8 rsv[3]; 469 }; 470 struct mt76_phy *mphy = &dev->mt76.phy; 471 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 472 const char *data = (char *)&rxd[1], *tail; 473 struct header *hdr = (struct header *)data; 474 struct tlv *tlv = (struct tlv *)(data + 4); 475 476 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 477 return; 478 479 if (hdr->band && dev->mt76.phys[hdr->band]) 480 mphy = dev->mt76.phys[hdr->band]; 481 482 tail = skb->data + skb->len; 483 data += sizeof(struct header); 484 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 485 switch (le16_to_cpu(tlv->tag)) { 486 case UNI_EVENT_IE_COUNTDOWN_CSA: 487 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 488 IEEE80211_IFACE_ITER_RESUME_ALL, 489 mt7996_mcu_csa_finish, mphy->hw); 490 break; 491 case UNI_EVENT_IE_COUNTDOWN_BCC: 492 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 493 IEEE80211_IFACE_ITER_RESUME_ALL, 494 mt7996_mcu_cca_finish, mphy->hw); 495 break; 496 } 497 498 data += le16_to_cpu(tlv->len); 499 tlv = (struct tlv *)data; 500 } 501 } 502 503 static int 504 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate) 505 { 506 switch (mcu_rate->tx_mode) { 507 case MT_PHY_TYPE_CCK: 508 case MT_PHY_TYPE_OFDM: 509 break; 510 case MT_PHY_TYPE_HT: 511 case MT_PHY_TYPE_HT_GF: 512 case MT_PHY_TYPE_VHT: 513 if (mcu_rate->tx_gi) 514 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 515 else 516 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 517 break; 518 case MT_PHY_TYPE_HE_SU: 519 case MT_PHY_TYPE_HE_EXT_SU: 520 case MT_PHY_TYPE_HE_TB: 521 case MT_PHY_TYPE_HE_MU: 522 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2) 523 return -EINVAL; 524 rate->he_gi = mcu_rate->tx_gi; 525 break; 526 case MT_PHY_TYPE_EHT_SU: 527 case MT_PHY_TYPE_EHT_TRIG: 528 case MT_PHY_TYPE_EHT_MU: 529 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2) 530 return -EINVAL; 531 rate->eht_gi = mcu_rate->tx_gi; 532 break; 533 default: 534 return -EINVAL; 535 } 536 537 return 0; 538 } 539 540 static void 541 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 542 { 543 struct mt7996_mcu_all_sta_info_event *res; 544 u16 i; 545 546 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 547 548 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 549 550 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 551 u8 ac; 552 u16 wlan_idx; 553 struct mt76_wcid *wcid; 554 555 switch (le16_to_cpu(res->tag)) { 556 case UNI_ALL_STA_TXRX_RATE: 557 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx); 558 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 559 560 if (!wcid) 561 break; 562 563 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i])) 564 dev_err(dev->mt76.dev, "Failed to update TX GI\n"); 565 break; 566 case UNI_ALL_STA_TXRX_ADM_STAT: 567 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 568 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 569 570 if (!wcid) 571 break; 572 573 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 574 wcid->stats.tx_bytes += 575 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 576 wcid->stats.rx_bytes += 577 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 578 } 579 break; 580 case UNI_ALL_STA_TXRX_MSDU_COUNT: 581 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 582 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 583 584 if (!wcid) 585 break; 586 587 wcid->stats.tx_packets += 588 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 589 wcid->stats.rx_packets += 590 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 591 break; 592 default: 593 break; 594 } 595 } 596 } 597 598 static void 599 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb) 600 { 601 #define THERMAL_NOTIFY_TAG 0x4 602 #define THERMAL_NOTIFY 0x2 603 struct mt76_phy *mphy = &dev->mt76.phy; 604 struct mt7996_mcu_thermal_notify *n; 605 struct mt7996_phy *phy; 606 607 n = (struct mt7996_mcu_thermal_notify *)skb->data; 608 609 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG) 610 return; 611 612 if (n->event_id != THERMAL_NOTIFY) 613 return; 614 615 if (n->band_idx > MT_BAND2) 616 return; 617 618 mphy = dev->mt76.phys[n->band_idx]; 619 if (!mphy) 620 return; 621 622 phy = (struct mt7996_phy *)mphy->priv; 623 phy->throttle_state = n->duty_percent; 624 } 625 626 static void 627 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 628 { 629 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 630 631 switch (rxd->ext_eid) { 632 case MCU_EXT_EVENT_FW_LOG_2_HOST: 633 mt7996_mcu_rx_log_message(dev, skb); 634 break; 635 default: 636 break; 637 } 638 } 639 640 static void 641 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 642 { 643 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 644 645 switch (rxd->eid) { 646 case MCU_EVENT_EXT: 647 mt7996_mcu_rx_ext_event(dev, skb); 648 break; 649 case MCU_UNI_EVENT_THERMAL: 650 mt7996_mcu_rx_thermal_notify(dev, skb); 651 break; 652 default: 653 break; 654 } 655 dev_kfree_skb(skb); 656 } 657 658 static void 659 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb) 660 { 661 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data; 662 663 if (!dev->has_rro) 664 return; 665 666 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4); 667 668 switch (le16_to_cpu(event->tag)) { 669 case UNI_WED_RRO_BA_SESSION_STATUS: { 670 struct mt7996_mcu_wed_rro_ba_event *e; 671 672 while (skb->len >= sizeof(*e)) { 673 struct mt76_rx_tid *tid; 674 struct mt76_wcid *wcid; 675 u16 idx; 676 677 e = (void *)skb->data; 678 idx = le16_to_cpu(e->wlan_id); 679 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) 680 break; 681 682 wcid = rcu_dereference(dev->mt76.wcid[idx]); 683 if (!wcid || !wcid->sta) 684 break; 685 686 if (e->tid >= ARRAY_SIZE(wcid->aggr)) 687 break; 688 689 tid = rcu_dereference(wcid->aggr[e->tid]); 690 if (!tid) 691 break; 692 693 tid->id = le16_to_cpu(e->id); 694 skb_pull(skb, sizeof(*e)); 695 } 696 break; 697 } 698 case UNI_WED_RRO_BA_SESSION_DELETE: { 699 struct mt7996_mcu_wed_rro_ba_delete_event *e; 700 701 while (skb->len >= sizeof(*e)) { 702 struct mt7996_wed_rro_session_id *session; 703 704 e = (void *)skb->data; 705 session = kzalloc(sizeof(*session), GFP_ATOMIC); 706 if (!session) 707 break; 708 709 session->id = le16_to_cpu(e->session_id); 710 711 spin_lock_bh(&dev->wed_rro.lock); 712 list_add_tail(&session->list, &dev->wed_rro.poll_list); 713 spin_unlock_bh(&dev->wed_rro.lock); 714 715 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work); 716 skb_pull(skb, sizeof(*e)); 717 } 718 break; 719 } 720 default: 721 break; 722 } 723 } 724 725 static void 726 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 727 { 728 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 729 730 switch (rxd->eid) { 731 case MCU_UNI_EVENT_FW_LOG_2_HOST: 732 mt7996_mcu_rx_log_message(dev, skb); 733 break; 734 case MCU_UNI_EVENT_IE_COUNTDOWN: 735 mt7996_mcu_ie_countdown(dev, skb); 736 break; 737 case MCU_UNI_EVENT_RDD_REPORT: 738 mt7996_mcu_rx_radar_detected(dev, skb); 739 break; 740 case MCU_UNI_EVENT_ALL_STA_INFO: 741 mt7996_mcu_rx_all_sta_info_event(dev, skb); 742 break; 743 case MCU_UNI_EVENT_WED_RRO: 744 mt7996_mcu_wed_rro_event(dev, skb); 745 break; 746 default: 747 break; 748 } 749 dev_kfree_skb(skb); 750 } 751 752 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 753 { 754 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 755 756 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 757 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 758 return; 759 } 760 761 /* WA still uses legacy event*/ 762 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 763 !rxd->seq) 764 mt7996_mcu_rx_unsolicited_event(dev, skb); 765 else 766 mt76_mcu_rx_event(&dev->mt76, skb); 767 } 768 769 static struct tlv * 770 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 771 { 772 struct tlv *ptlv = skb_put_zero(skb, len); 773 774 ptlv->tag = cpu_to_le16(tag); 775 ptlv->len = cpu_to_le16(len); 776 777 return ptlv; 778 } 779 780 static void 781 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 782 { 783 static const u8 rlm_ch_band[] = { 784 [NL80211_BAND_2GHZ] = 1, 785 [NL80211_BAND_5GHZ] = 2, 786 [NL80211_BAND_6GHZ] = 3, 787 }; 788 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 789 struct bss_rlm_tlv *ch; 790 struct tlv *tlv; 791 int freq1 = chandef->center_freq1; 792 793 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 794 795 ch = (struct bss_rlm_tlv *)tlv; 796 ch->control_channel = chandef->chan->hw_value; 797 ch->center_chan = ieee80211_frequency_to_channel(freq1); 798 ch->bw = mt76_connac_chan_bw(chandef); 799 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 800 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 801 ch->band = rlm_ch_band[chandef->chan->band]; 802 803 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 804 int freq2 = chandef->center_freq2; 805 806 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 807 } 808 } 809 810 static void 811 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 812 { 813 struct bss_ra_tlv *ra; 814 struct tlv *tlv; 815 816 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 817 818 ra = (struct bss_ra_tlv *)tlv; 819 ra->short_preamble = true; 820 } 821 822 static void 823 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 824 struct ieee80211_bss_conf *link_conf, 825 struct mt7996_phy *phy) 826 { 827 #define DEFAULT_HE_PE_DURATION 4 828 #define DEFAULT_HE_DURATION_RTS_THRES 1023 829 const struct ieee80211_sta_he_cap *cap; 830 struct bss_info_uni_he *he; 831 struct tlv *tlv; 832 833 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 834 835 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 836 837 he = (struct bss_info_uni_he *)tlv; 838 he->he_pe_duration = link_conf->htc_trig_based_pkt_ext; 839 if (!he->he_pe_duration) 840 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 841 842 he->he_rts_thres = cpu_to_le16(link_conf->frame_time_rts_th); 843 if (!he->he_rts_thres) 844 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 845 846 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 847 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 848 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 849 } 850 851 static void 852 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_bss_conf *link_conf, 853 bool enable) 854 { 855 struct bss_info_uni_mbssid *mbssid; 856 struct tlv *tlv; 857 858 if (!link_conf->bssid_indicator && enable) 859 return; 860 861 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 862 863 mbssid = (struct bss_info_uni_mbssid *)tlv; 864 865 if (enable) { 866 mbssid->max_indicator = link_conf->bssid_indicator; 867 mbssid->mbss_idx = link_conf->bssid_index; 868 mbssid->tx_bss_omac_idx = 0; 869 } 870 } 871 872 static void 873 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink, 874 struct mt7996_phy *phy) 875 { 876 struct bss_rate_tlv *bmc; 877 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 878 enum nl80211_band band = chandef->chan->band; 879 struct tlv *tlv; 880 u8 idx = mlink->mcast_rates_idx ? 881 mlink->mcast_rates_idx : mlink->basic_rates_idx; 882 883 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 884 885 bmc = (struct bss_rate_tlv *)tlv; 886 887 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 888 bmc->bc_fixed_rate = idx; 889 bmc->mc_fixed_rate = idx; 890 } 891 892 static void 893 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 894 { 895 struct bss_txcmd_tlv *txcmd; 896 struct tlv *tlv; 897 898 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 899 900 txcmd = (struct bss_txcmd_tlv *)tlv; 901 txcmd->txcmd_mode = en; 902 } 903 904 static void 905 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 906 { 907 struct bss_mld_tlv *mld; 908 struct tlv *tlv; 909 910 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 911 912 mld = (struct bss_mld_tlv *)tlv; 913 mld->group_mld_id = 0xff; 914 mld->own_mld_id = mlink->idx; 915 mld->remap_idx = 0xff; 916 } 917 918 static void 919 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 920 { 921 struct bss_sec_tlv *sec; 922 struct tlv *tlv; 923 924 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 925 926 sec = (struct bss_sec_tlv *)tlv; 927 sec->cipher = mlink->cipher; 928 } 929 930 static int 931 mt7996_mcu_muar_config(struct mt7996_dev *dev, struct mt76_vif_link *mlink, 932 const u8 *addr, bool bssid, bool enable) 933 { 934 #define UNI_MUAR_ENTRY 2 935 u32 idx = mlink->omac_idx - REPEATER_BSSID_START; 936 struct { 937 struct { 938 u8 band; 939 u8 __rsv[3]; 940 } hdr; 941 942 __le16 tag; 943 __le16 len; 944 945 bool smesh; 946 u8 bssid; 947 u8 index; 948 u8 entry_add; 949 u8 addr[ETH_ALEN]; 950 u8 __rsv[2]; 951 } __packed req = { 952 .hdr.band = mlink->band_idx, 953 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 954 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 955 .smesh = false, 956 .index = idx * 2 + bssid, 957 .entry_add = true, 958 }; 959 960 if (enable) 961 memcpy(req.addr, addr, ETH_ALEN); 962 963 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 964 sizeof(req), true); 965 } 966 967 static void 968 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 969 { 970 struct bss_ifs_time_tlv *ifs_time; 971 struct tlv *tlv; 972 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 973 974 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 975 976 ifs_time = (struct bss_ifs_time_tlv *)tlv; 977 ifs_time->slot_valid = true; 978 ifs_time->sifs_valid = true; 979 ifs_time->rifs_valid = true; 980 ifs_time->eifs_valid = true; 981 982 ifs_time->slot_time = cpu_to_le16(phy->slottime); 983 ifs_time->sifs_time = cpu_to_le16(10); 984 ifs_time->rifs_time = cpu_to_le16(2); 985 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 986 987 if (is_2ghz) { 988 ifs_time->eifs_cck_valid = true; 989 ifs_time->eifs_cck_time = cpu_to_le16(314); 990 } 991 } 992 993 static int 994 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 995 struct ieee80211_vif *vif, 996 struct ieee80211_bss_conf *link_conf, 997 struct mt76_vif_link *mvif, 998 struct mt76_phy *phy, u16 wlan_idx, 999 bool enable) 1000 { 1001 struct cfg80211_chan_def *chandef = &phy->chandef; 1002 struct mt76_connac_bss_basic_tlv *bss; 1003 u32 type = CONNECTION_INFRA_AP; 1004 u16 sta_wlan_idx = wlan_idx; 1005 struct ieee80211_sta *sta; 1006 struct tlv *tlv; 1007 int idx; 1008 1009 switch (vif->type) { 1010 case NL80211_IFTYPE_MESH_POINT: 1011 case NL80211_IFTYPE_AP: 1012 case NL80211_IFTYPE_MONITOR: 1013 break; 1014 case NL80211_IFTYPE_STATION: 1015 if (enable) { 1016 rcu_read_lock(); 1017 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 1018 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 1019 if (sta) { 1020 struct mt76_wcid *wcid; 1021 1022 wcid = (struct mt76_wcid *)sta->drv_priv; 1023 sta_wlan_idx = wcid->idx; 1024 } 1025 rcu_read_unlock(); 1026 } 1027 type = CONNECTION_INFRA_STA; 1028 break; 1029 case NL80211_IFTYPE_ADHOC: 1030 type = CONNECTION_IBSS_ADHOC; 1031 break; 1032 default: 1033 WARN_ON(1); 1034 break; 1035 } 1036 1037 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 1038 1039 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 1040 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1041 bss->dtim_period = link_conf->dtim_period; 1042 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 1043 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 1044 bss->conn_type = cpu_to_le32(type); 1045 bss->omac_idx = mvif->omac_idx; 1046 bss->band_idx = mvif->band_idx; 1047 bss->wmm_idx = mvif->wmm_idx; 1048 bss->conn_state = !enable; 1049 bss->active = enable; 1050 1051 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1052 bss->hw_bss_idx = idx; 1053 1054 if (vif->type == NL80211_IFTYPE_MONITOR) { 1055 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 1056 return 0; 1057 } 1058 1059 memcpy(bss->bssid, link_conf->bssid, ETH_ALEN); 1060 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1061 bss->dtim_period = vif->bss_conf.dtim_period; 1062 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 1063 chandef->chan->band, NULL); 1064 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, &vif->bss_conf, 1065 chandef->chan->band); 1066 1067 return 0; 1068 } 1069 1070 static struct sk_buff * 1071 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len) 1072 { 1073 struct bss_req_hdr hdr = { 1074 .bss_idx = mvif->idx, 1075 }; 1076 struct sk_buff *skb; 1077 1078 skb = mt76_mcu_msg_alloc(dev, NULL, len); 1079 if (!skb) 1080 return ERR_PTR(-ENOMEM); 1081 1082 skb_put_data(skb, &hdr, sizeof(hdr)); 1083 1084 return skb; 1085 } 1086 1087 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1088 struct ieee80211_bss_conf *link_conf, 1089 struct mt76_vif_link *mlink, 1090 struct mt7996_sta_link *msta_link, int enable) 1091 { 1092 struct mt7996_dev *dev = phy->dev; 1093 struct sk_buff *skb; 1094 1095 if (mlink->omac_idx >= REPEATER_BSSID_START) { 1096 mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 1097 mt7996_mcu_muar_config(dev, mlink, link_conf->bssid, true, enable); 1098 } 1099 1100 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1101 MT7996_BSS_UPDATE_MAX_SIZE); 1102 if (IS_ERR(skb)) 1103 return PTR_ERR(skb); 1104 1105 /* bss_basic must be first */ 1106 mt7996_mcu_bss_basic_tlv(skb, vif, link_conf, mlink, phy->mt76, 1107 msta_link->wcid.idx, enable); 1108 mt7996_mcu_bss_sec_tlv(skb, mlink); 1109 1110 if (vif->type == NL80211_IFTYPE_MONITOR) 1111 goto out; 1112 1113 if (enable) { 1114 mt7996_mcu_bss_rfch_tlv(skb, phy); 1115 mt7996_mcu_bss_bmc_tlv(skb, mlink, phy); 1116 mt7996_mcu_bss_ra_tlv(skb, phy); 1117 mt7996_mcu_bss_txcmd_tlv(skb, true); 1118 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1119 1120 if (vif->bss_conf.he_support) 1121 mt7996_mcu_bss_he_tlv(skb, vif, link_conf, phy); 1122 1123 /* this tag is necessary no matter if the vif is MLD */ 1124 mt7996_mcu_bss_mld_tlv(skb, mlink); 1125 } 1126 1127 mt7996_mcu_bss_mbssid_tlv(skb, link_conf, enable); 1128 1129 out: 1130 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1131 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1132 } 1133 1134 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1135 struct ieee80211_bss_conf *link_conf) 1136 { 1137 struct mt7996_dev *dev = phy->dev; 1138 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 1139 struct sk_buff *skb; 1140 1141 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1142 MT7996_BSS_UPDATE_MAX_SIZE); 1143 if (IS_ERR(skb)) 1144 return PTR_ERR(skb); 1145 1146 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1147 1148 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1149 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1150 } 1151 1152 static int 1153 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif, 1154 struct ieee80211_ampdu_params *params, 1155 bool enable, bool tx) 1156 { 1157 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1158 struct sta_rec_ba_uni *ba; 1159 struct sk_buff *skb; 1160 struct tlv *tlv; 1161 1162 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid, 1163 MT7996_STA_UPDATE_MAX_SIZE); 1164 if (IS_ERR(skb)) 1165 return PTR_ERR(skb); 1166 1167 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1168 1169 ba = (struct sta_rec_ba_uni *)tlv; 1170 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1171 ba->winsize = cpu_to_le16(params->buf_size); 1172 ba->ssn = cpu_to_le16(params->ssn); 1173 ba->ba_en = enable << params->tid; 1174 ba->amsdu = params->amsdu; 1175 ba->tid = params->tid; 1176 ba->ba_rdd_rro = !tx && enable && dev->has_rro; 1177 1178 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1179 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1180 } 1181 1182 /** starec & wtbl **/ 1183 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 1184 struct ieee80211_ampdu_params *params, 1185 struct mt7996_vif_link *link, 1186 struct mt7996_sta_link *msta_link, bool enable) 1187 { 1188 if (enable && !params->amsdu) 1189 msta_link->wcid.amsdu = false; 1190 1191 return mt7996_mcu_sta_ba(dev, &link->mt76, params, enable, true); 1192 } 1193 1194 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1195 struct ieee80211_ampdu_params *params, 1196 struct mt7996_vif_link *link, bool enable) 1197 { 1198 return mt7996_mcu_sta_ba(dev, &link->mt76, params, enable, false); 1199 } 1200 1201 static void 1202 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, 1203 struct ieee80211_link_sta *link_sta, 1204 struct mt7996_vif_link *link) 1205 { 1206 struct ieee80211_he_cap_elem *elem = &link_sta->he_cap.he_cap_elem; 1207 struct ieee80211_he_mcs_nss_supp mcs_map; 1208 struct sta_rec_he_v2 *he; 1209 struct tlv *tlv; 1210 int i = 0; 1211 1212 if (!link_sta->he_cap.has_he) 1213 return; 1214 1215 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1216 1217 he = (struct sta_rec_he_v2 *)tlv; 1218 for (i = 0; i < 11; i++) { 1219 if (i < 6) 1220 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1221 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1222 } 1223 1224 mcs_map = link_sta->he_cap.he_mcs_nss_supp; 1225 switch (link_sta->bandwidth) { 1226 case IEEE80211_STA_RX_BW_160: 1227 if (elem->phy_cap_info[0] & 1228 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1229 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1230 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1231 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1232 1233 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1234 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1235 le16_to_cpu(mcs_map.rx_mcs_160)); 1236 fallthrough; 1237 default: 1238 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1239 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1240 le16_to_cpu(mcs_map.rx_mcs_80)); 1241 break; 1242 } 1243 1244 he->pkt_ext = 2; 1245 } 1246 1247 static void 1248 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, 1249 struct ieee80211_link_sta *link_sta) 1250 { 1251 struct sta_rec_he_6g_capa *he_6g; 1252 struct tlv *tlv; 1253 1254 if (!link_sta->he_6ghz_capa.capa) 1255 return; 1256 1257 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1258 1259 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1260 he_6g->capa = link_sta->he_6ghz_capa.capa; 1261 } 1262 1263 static void 1264 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, 1265 struct ieee80211_link_sta *link_sta) 1266 { 1267 struct mt7996_sta *msta = (struct mt7996_sta *)link_sta->sta->drv_priv; 1268 struct ieee80211_vif *vif = container_of((void *)msta->vif, 1269 struct ieee80211_vif, drv_priv); 1270 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1271 struct ieee80211_eht_cap_elem_fixed *elem; 1272 struct sta_rec_eht *eht; 1273 struct tlv *tlv; 1274 1275 if (!link_sta->eht_cap.has_eht) 1276 return; 1277 1278 mcs_map = &link_sta->eht_cap.eht_mcs_nss_supp; 1279 elem = &link_sta->eht_cap.eht_cap_elem; 1280 1281 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1282 1283 eht = (struct sta_rec_eht *)tlv; 1284 eht->tid_bitmap = 0xff; 1285 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1286 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1287 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1288 1289 if (vif->type != NL80211_IFTYPE_STATION && 1290 (link_sta->he_cap.he_cap_elem.phy_cap_info[0] & 1291 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1292 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1293 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1294 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1295 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1296 sizeof(eht->mcs_map_bw20)); 1297 return; 1298 } 1299 1300 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1301 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1302 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1303 } 1304 1305 static void 1306 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_link_sta *link_sta) 1307 { 1308 struct sta_rec_ht_uni *ht; 1309 struct tlv *tlv; 1310 1311 if (!link_sta->ht_cap.ht_supported) 1312 return; 1313 1314 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1315 1316 ht = (struct sta_rec_ht_uni *)tlv; 1317 ht->ht_cap = cpu_to_le16(link_sta->ht_cap.cap); 1318 ht->ampdu_param = u8_encode_bits(link_sta->ht_cap.ampdu_factor, 1319 IEEE80211_HT_AMPDU_PARM_FACTOR) | 1320 u8_encode_bits(link_sta->ht_cap.ampdu_density, 1321 IEEE80211_HT_AMPDU_PARM_DENSITY); 1322 } 1323 1324 static void 1325 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_link_sta *link_sta) 1326 { 1327 struct sta_rec_vht *vht; 1328 struct tlv *tlv; 1329 1330 /* For 6G band, this tlv is necessary to let hw work normally */ 1331 if (!link_sta->he_6ghz_capa.capa && !link_sta->vht_cap.vht_supported) 1332 return; 1333 1334 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1335 1336 vht = (struct sta_rec_vht *)tlv; 1337 vht->vht_cap = cpu_to_le32(link_sta->vht_cap.cap); 1338 vht->vht_rx_mcs_map = link_sta->vht_cap.vht_mcs.rx_mcs_map; 1339 vht->vht_tx_mcs_map = link_sta->vht_cap.vht_mcs.tx_mcs_map; 1340 } 1341 1342 static void 1343 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1344 struct ieee80211_vif *vif, 1345 struct ieee80211_link_sta *link_sta, 1346 struct mt7996_sta_link *msta_link) 1347 { 1348 struct sta_rec_amsdu *amsdu; 1349 struct tlv *tlv; 1350 1351 if (vif->type != NL80211_IFTYPE_STATION && 1352 vif->type != NL80211_IFTYPE_MESH_POINT && 1353 vif->type != NL80211_IFTYPE_AP) 1354 return; 1355 1356 if (!link_sta->agg.max_amsdu_len) 1357 return; 1358 1359 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1360 amsdu = (struct sta_rec_amsdu *)tlv; 1361 amsdu->max_amsdu_num = 8; 1362 amsdu->amsdu_en = true; 1363 msta_link->wcid.amsdu = true; 1364 1365 switch (link_sta->agg.max_amsdu_len) { 1366 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1367 amsdu->max_mpdu_size = 1368 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1369 return; 1370 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1371 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1372 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1373 return; 1374 default: 1375 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1376 return; 1377 } 1378 } 1379 1380 static void 1381 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1382 struct ieee80211_bss_conf *link_conf, 1383 struct ieee80211_link_sta *link_sta) 1384 { 1385 struct ieee80211_he_cap_elem *elem = &link_sta->he_cap.he_cap_elem; 1386 struct sta_rec_muru *muru; 1387 struct tlv *tlv; 1388 1389 if (link_conf->vif->type != NL80211_IFTYPE_STATION && 1390 link_conf->vif->type != NL80211_IFTYPE_AP) 1391 return; 1392 1393 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1394 1395 muru = (struct sta_rec_muru *)tlv; 1396 muru->cfg.mimo_dl_en = link_conf->eht_mu_beamformer || 1397 link_conf->he_mu_beamformer || 1398 link_conf->vht_mu_beamformer || 1399 link_conf->vht_mu_beamformee; 1400 muru->cfg.ofdma_dl_en = true; 1401 1402 if (link_sta->vht_cap.vht_supported) 1403 muru->mimo_dl.vht_mu_bfee = 1404 !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1405 1406 if (!link_sta->he_cap.has_he) 1407 return; 1408 1409 muru->mimo_dl.partial_bw_dl_mimo = 1410 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1411 1412 muru->mimo_ul.full_ul_mimo = 1413 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1414 muru->mimo_ul.partial_ul_mimo = 1415 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1416 1417 muru->ofdma_dl.punc_pream_rx = 1418 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1419 muru->ofdma_dl.he_20m_in_40m_2g = 1420 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1421 muru->ofdma_dl.he_20m_in_160m = 1422 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1423 muru->ofdma_dl.he_80m_in_160m = 1424 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1425 1426 muru->ofdma_ul.t_frame_dur = 1427 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1428 muru->ofdma_ul.mu_cascading = 1429 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1430 muru->ofdma_ul.uo_ra = 1431 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1432 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1433 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1434 } 1435 1436 static inline bool 1437 mt7996_is_ebf_supported(struct mt7996_phy *phy, 1438 struct ieee80211_bss_conf *link_conf, 1439 struct ieee80211_link_sta *link_sta, bool bfee) 1440 { 1441 int sts = hweight16(phy->mt76->chainmask); 1442 1443 if (link_conf->vif->type != NL80211_IFTYPE_STATION && 1444 link_conf->vif->type != NL80211_IFTYPE_AP) 1445 return false; 1446 1447 if (!bfee && sts < 2) 1448 return false; 1449 1450 if (link_sta->eht_cap.has_eht) { 1451 struct ieee80211_sta_eht_cap *pc = &link_sta->eht_cap; 1452 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1453 1454 if (bfee) 1455 return link_conf->eht_su_beamformee && 1456 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1457 else 1458 return link_conf->eht_su_beamformer && 1459 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1460 } 1461 1462 if (link_sta->he_cap.has_he) { 1463 struct ieee80211_he_cap_elem *pe = &link_sta->he_cap.he_cap_elem; 1464 1465 if (bfee) 1466 return link_conf->he_su_beamformee && 1467 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1468 else 1469 return link_conf->he_su_beamformer && 1470 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1471 } 1472 1473 if (link_sta->vht_cap.vht_supported) { 1474 u32 cap = link_sta->vht_cap.cap; 1475 1476 if (bfee) 1477 return link_conf->vht_su_beamformee && 1478 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1479 else 1480 return link_conf->vht_su_beamformer && 1481 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1482 } 1483 1484 return false; 1485 } 1486 1487 static void 1488 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf, struct mt7996_phy *phy) 1489 { 1490 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1491 bf->ndp_rate = 0; /* mcs0 */ 1492 if (is_mt7996(phy->mt76->dev)) 1493 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1494 else 1495 bf->ndpa_rate = MT7992_CFEND_RATE_DEFAULT; /* ofdm 6m */ 1496 1497 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1498 } 1499 1500 static void 1501 mt7996_mcu_sta_bfer_ht(struct ieee80211_link_sta *link_sta, 1502 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1503 bool explicit) 1504 { 1505 struct ieee80211_mcs_info *mcs = &link_sta->ht_cap.mcs; 1506 u8 n = 0; 1507 1508 bf->tx_mode = MT_PHY_TYPE_HT; 1509 1510 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1511 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1512 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1513 mcs->tx_params); 1514 else if (mcs->rx_mask[3]) 1515 n = 3; 1516 else if (mcs->rx_mask[2]) 1517 n = 2; 1518 else if (mcs->rx_mask[1]) 1519 n = 1; 1520 1521 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1522 bf->ncol = min_t(u8, bf->nrow, n); 1523 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1524 min_t(u8, MT7996_IBF_MAX_NC, n); 1525 } 1526 1527 static void 1528 mt7996_mcu_sta_bfer_vht(struct ieee80211_link_sta *link_sta, 1529 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1530 bool explicit) 1531 { 1532 struct ieee80211_sta_vht_cap *pc = &link_sta->vht_cap; 1533 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1534 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1535 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1536 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1537 1538 bf->tx_mode = MT_PHY_TYPE_VHT; 1539 1540 if (explicit) { 1541 u8 sts, snd_dim; 1542 1543 mt7996_mcu_sta_sounding_rate(bf, phy); 1544 1545 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1546 pc->cap); 1547 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1548 vc->cap); 1549 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1550 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1551 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, bf->ncol); 1552 1553 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_160) 1554 bf->nrow = 1; 1555 } else { 1556 bf->nrow = tx_ant; 1557 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1558 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1559 1560 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_160) 1561 bf->ibf_nrow = 1; 1562 } 1563 } 1564 1565 static void 1566 mt7996_mcu_sta_bfer_he(struct ieee80211_link_sta *link_sta, 1567 struct ieee80211_vif *vif, struct mt7996_phy *phy, 1568 struct sta_rec_bf *bf, bool explicit) 1569 { 1570 struct ieee80211_sta_he_cap *pc = &link_sta->he_cap; 1571 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1572 const struct ieee80211_sta_he_cap *vc = 1573 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1574 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1575 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1576 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1577 u8 snd_dim, sts; 1578 1579 if (!vc) 1580 return; 1581 1582 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1583 1584 mt7996_mcu_sta_sounding_rate(bf, phy); 1585 1586 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1587 pe->phy_cap_info[6]); 1588 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1589 pe->phy_cap_info[6]); 1590 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1591 ve->phy_cap_info[5]); 1592 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1593 pe->phy_cap_info[4]); 1594 bf->nrow = min_t(u8, snd_dim, sts); 1595 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1596 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1597 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1598 1599 if (link_sta->bandwidth != IEEE80211_STA_RX_BW_160) 1600 return; 1601 1602 /* go over for 160MHz and 80p80 */ 1603 if (pe->phy_cap_info[0] & 1604 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1605 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1606 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1607 1608 bf->ncol_gt_bw80 = nss_mcs; 1609 } 1610 1611 if (pe->phy_cap_info[0] & 1612 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1613 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1614 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1615 1616 if (bf->ncol_gt_bw80) 1617 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1618 else 1619 bf->ncol_gt_bw80 = nss_mcs; 1620 } 1621 1622 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1623 ve->phy_cap_info[5]); 1624 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1625 pe->phy_cap_info[4]); 1626 1627 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1628 } 1629 1630 static void 1631 mt7996_mcu_sta_bfer_eht(struct ieee80211_link_sta *link_sta, 1632 struct ieee80211_vif *vif, struct mt7996_phy *phy, 1633 struct sta_rec_bf *bf, bool explicit) 1634 { 1635 struct ieee80211_sta_eht_cap *pc = &link_sta->eht_cap; 1636 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1637 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1638 const struct ieee80211_sta_eht_cap *vc = 1639 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1640 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1641 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1642 IEEE80211_EHT_MCS_NSS_RX) - 1; 1643 u8 snd_dim, sts; 1644 1645 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1646 1647 mt7996_mcu_sta_sounding_rate(bf, phy); 1648 1649 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1650 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1651 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1652 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1653 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1654 bf->nrow = min_t(u8, snd_dim, sts); 1655 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1656 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1657 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1658 1659 if (link_sta->bandwidth < IEEE80211_STA_RX_BW_160) 1660 return; 1661 1662 switch (link_sta->bandwidth) { 1663 case IEEE80211_STA_RX_BW_160: 1664 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1665 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1666 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1667 IEEE80211_EHT_MCS_NSS_RX) - 1; 1668 1669 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1670 bf->ncol_gt_bw80 = nss_mcs; 1671 break; 1672 case IEEE80211_STA_RX_BW_320: 1673 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1674 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1675 ve->phy_cap_info[3]) << 1); 1676 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1677 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1678 IEEE80211_EHT_MCS_NSS_RX) - 1; 1679 1680 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1681 bf->ncol_gt_bw80 = nss_mcs << 4; 1682 break; 1683 default: 1684 break; 1685 } 1686 } 1687 1688 static void 1689 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1690 struct ieee80211_bss_conf *link_conf, 1691 struct ieee80211_link_sta *link_sta, 1692 struct mt7996_vif_link *link) 1693 { 1694 #define EBF_MODE BIT(0) 1695 #define IBF_MODE BIT(1) 1696 #define BF_MAT_ORDER 4 1697 struct ieee80211_vif *vif = link_conf->vif; 1698 struct mt7996_phy *phy = link->phy; 1699 int tx_ant = hweight16(phy->mt76->chainmask) - 1; 1700 struct sta_rec_bf *bf; 1701 struct tlv *tlv; 1702 static const u8 matrix[BF_MAT_ORDER][BF_MAT_ORDER] = { 1703 {0, 0, 0, 0}, 1704 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1705 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1706 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1707 }; 1708 bool ebf; 1709 1710 if (!(link_sta->ht_cap.ht_supported || link_sta->he_cap.has_he)) 1711 return; 1712 1713 ebf = mt7996_is_ebf_supported(phy, link_conf, link_sta, false); 1714 if (!ebf && !dev->ibf) 1715 return; 1716 1717 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1718 bf = (struct sta_rec_bf *)tlv; 1719 1720 /* he/eht: eBF only, except mt7992 that has 5T on 5GHz also supports iBF 1721 * vht: support eBF and iBF 1722 * ht: iBF only, since mac80211 lacks of eBF support 1723 */ 1724 if (link_sta->eht_cap.has_eht) 1725 mt7996_mcu_sta_bfer_eht(link_sta, vif, link->phy, bf, ebf); 1726 else if (link_sta->he_cap.has_he) 1727 mt7996_mcu_sta_bfer_he(link_sta, vif, link->phy, bf, ebf); 1728 else if (link_sta->vht_cap.vht_supported) 1729 mt7996_mcu_sta_bfer_vht(link_sta, link->phy, bf, ebf); 1730 else if (link_sta->ht_cap.ht_supported) 1731 mt7996_mcu_sta_bfer_ht(link_sta, link->phy, bf, ebf); 1732 else 1733 return; 1734 1735 bf->bf_cap = ebf ? EBF_MODE : (dev->ibf ? IBF_MODE : 0); 1736 if (is_mt7992(&dev->mt76) && tx_ant == 4) 1737 bf->bf_cap |= IBF_MODE; 1738 1739 bf->bw = link_sta->bandwidth; 1740 bf->ibf_dbw = link_sta->bandwidth; 1741 bf->ibf_nrow = tx_ant; 1742 1743 if (link_sta->eht_cap.has_eht || link_sta->he_cap.has_he) 1744 bf->ibf_timeout = is_mt7996(&dev->mt76) ? MT7996_IBF_TIMEOUT : 1745 MT7992_IBF_TIMEOUT; 1746 else if (!ebf && link_sta->bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1747 bf->ibf_timeout = MT7996_IBF_TIMEOUT_LEGACY; 1748 else 1749 bf->ibf_timeout = MT7996_IBF_TIMEOUT; 1750 1751 if (bf->ncol < BF_MAT_ORDER) { 1752 if (ebf) 1753 bf->mem_20m = tx_ant < BF_MAT_ORDER ? 1754 matrix[tx_ant][bf->ncol] : 0; 1755 else 1756 bf->mem_20m = bf->nrow < BF_MAT_ORDER ? 1757 matrix[bf->nrow][bf->ncol] : 0; 1758 } 1759 1760 switch (link_sta->bandwidth) { 1761 case IEEE80211_STA_RX_BW_160: 1762 case IEEE80211_STA_RX_BW_80: 1763 bf->mem_total = bf->mem_20m * 2; 1764 break; 1765 case IEEE80211_STA_RX_BW_40: 1766 bf->mem_total = bf->mem_20m; 1767 break; 1768 case IEEE80211_STA_RX_BW_20: 1769 default: 1770 break; 1771 } 1772 } 1773 1774 static void 1775 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1776 struct ieee80211_bss_conf *link_conf, 1777 struct ieee80211_link_sta *link_sta, 1778 struct mt7996_vif_link *link) 1779 { 1780 struct mt7996_phy *phy = link->phy; 1781 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1782 struct sta_rec_bfee *bfee; 1783 struct tlv *tlv; 1784 u8 nrow = 0; 1785 1786 if (!(link_sta->vht_cap.vht_supported || link_sta->he_cap.has_he)) 1787 return; 1788 1789 if (!mt7996_is_ebf_supported(phy, link_conf, link_sta, true)) 1790 return; 1791 1792 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1793 bfee = (struct sta_rec_bfee *)tlv; 1794 1795 if (link_sta->he_cap.has_he) { 1796 struct ieee80211_he_cap_elem *pe = &link_sta->he_cap.he_cap_elem; 1797 1798 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1799 pe->phy_cap_info[5]); 1800 } else if (link_sta->vht_cap.vht_supported) { 1801 struct ieee80211_sta_vht_cap *pc = &link_sta->vht_cap; 1802 1803 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1804 pc->cap); 1805 } 1806 1807 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1808 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1809 } 1810 1811 static void 1812 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb) 1813 { 1814 struct sta_rec_tx_proc *tx_proc; 1815 struct tlv *tlv; 1816 1817 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc)); 1818 1819 tx_proc = (struct sta_rec_tx_proc *)tlv; 1820 tx_proc->flag = cpu_to_le32(0); 1821 } 1822 1823 static void 1824 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1825 { 1826 struct sta_rec_hdrt *hdrt; 1827 struct tlv *tlv; 1828 1829 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1830 1831 hdrt = (struct sta_rec_hdrt *)tlv; 1832 hdrt->hdrt_mode = 1; 1833 } 1834 1835 static void 1836 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1837 struct ieee80211_vif *vif, struct mt76_wcid *wcid) 1838 { 1839 struct sta_rec_hdr_trans *hdr_trans; 1840 struct tlv *tlv; 1841 1842 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1843 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1844 hdr_trans->dis_rx_hdr_tran = true; 1845 1846 if (vif->type == NL80211_IFTYPE_STATION) 1847 hdr_trans->to_ds = true; 1848 else 1849 hdr_trans->from_ds = true; 1850 1851 if (!wcid) 1852 return; 1853 1854 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1855 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1856 hdr_trans->to_ds = true; 1857 hdr_trans->from_ds = true; 1858 } 1859 1860 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1861 hdr_trans->to_ds = true; 1862 hdr_trans->from_ds = true; 1863 hdr_trans->mesh = true; 1864 } 1865 } 1866 1867 static enum mcu_mmps_mode 1868 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1869 { 1870 switch (smps) { 1871 case IEEE80211_SMPS_OFF: 1872 return MCU_MMPS_DISABLE; 1873 case IEEE80211_SMPS_STATIC: 1874 return MCU_MMPS_STATIC; 1875 case IEEE80211_SMPS_DYNAMIC: 1876 return MCU_MMPS_DYNAMIC; 1877 default: 1878 return MCU_MMPS_DISABLE; 1879 } 1880 } 1881 1882 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1883 void *data, u16 version) 1884 { 1885 struct ra_fixed_rate *req; 1886 struct uni_header hdr; 1887 struct sk_buff *skb; 1888 struct tlv *tlv; 1889 int len; 1890 1891 len = sizeof(hdr) + sizeof(*req); 1892 1893 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1894 if (!skb) 1895 return -ENOMEM; 1896 1897 skb_put_data(skb, &hdr, sizeof(hdr)); 1898 1899 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1900 req = (struct ra_fixed_rate *)tlv; 1901 req->version = cpu_to_le16(version); 1902 memcpy(&req->rate, data, sizeof(req->rate)); 1903 1904 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1905 MCU_WM_UNI_CMD(RA), true); 1906 } 1907 1908 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, 1909 struct ieee80211_link_sta *link_sta, 1910 struct mt7996_vif_link *link, 1911 struct mt7996_sta_link *msta_link, 1912 void *data, u32 field) 1913 { 1914 struct sta_phy_uni *phy = data; 1915 struct sta_rec_ra_fixed_uni *ra; 1916 struct sk_buff *skb; 1917 struct tlv *tlv; 1918 1919 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 1920 &msta_link->wcid, 1921 MT7996_STA_UPDATE_MAX_SIZE); 1922 if (IS_ERR(skb)) 1923 return PTR_ERR(skb); 1924 1925 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1926 ra = (struct sta_rec_ra_fixed_uni *)tlv; 1927 1928 switch (field) { 1929 case RATE_PARAM_AUTO: 1930 break; 1931 case RATE_PARAM_FIXED: 1932 case RATE_PARAM_FIXED_MCS: 1933 case RATE_PARAM_FIXED_GI: 1934 case RATE_PARAM_FIXED_HE_LTF: 1935 if (phy) 1936 ra->phy = *phy; 1937 break; 1938 case RATE_PARAM_MMPS_UPDATE: 1939 ra->mmps_mode = mt7996_mcu_get_mmps_mode(link_sta->smps_mode); 1940 break; 1941 default: 1942 break; 1943 } 1944 ra->field = cpu_to_le32(field); 1945 1946 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1947 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1948 } 1949 1950 static int 1951 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, 1952 struct ieee80211_link_sta *link_sta, 1953 struct mt7996_vif_link *link, 1954 struct mt7996_sta_link *msta_link) 1955 { 1956 struct cfg80211_chan_def *chandef = &link->phy->mt76->chandef; 1957 struct cfg80211_bitrate_mask *mask = &link->bitrate_mask; 1958 enum nl80211_band band = chandef->chan->band; 1959 struct sta_phy_uni phy = {}; 1960 int ret, nrates = 0; 1961 1962 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1963 do { \ 1964 u8 i, gi = mask->control[band]._gi; \ 1965 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1966 phy.sgi = gi; \ 1967 phy.he_ltf = mask->control[band].he_ltf; \ 1968 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1969 if (!mask->control[band]._mcs[i]) \ 1970 continue; \ 1971 nrates += hweight16(mask->control[band]._mcs[i]); \ 1972 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1973 if (_ht) \ 1974 phy.mcs += 8 * i; \ 1975 } \ 1976 } while (0) 1977 1978 if (link_sta->he_cap.has_he) { 1979 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1980 } else if (link_sta->vht_cap.vht_supported) { 1981 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1982 } else if (link_sta->ht_cap.ht_supported) { 1983 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1984 } else { 1985 nrates = hweight32(mask->control[band].legacy); 1986 phy.mcs = ffs(mask->control[band].legacy) - 1; 1987 } 1988 #undef __sta_phy_bitrate_mask_check 1989 1990 /* fall back to auto rate control */ 1991 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1992 mask->control[band].he_gi == GENMASK(7, 0) && 1993 mask->control[band].he_ltf == GENMASK(7, 0) && 1994 nrates != 1) 1995 return 0; 1996 1997 /* fixed single rate */ 1998 if (nrates == 1) { 1999 ret = mt7996_mcu_set_fixed_field(dev, link_sta, link, 2000 msta_link, &phy, 2001 RATE_PARAM_FIXED_MCS); 2002 if (ret) 2003 return ret; 2004 } 2005 2006 /* fixed GI */ 2007 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 2008 mask->control[band].he_gi != GENMASK(7, 0)) { 2009 u32 addr; 2010 2011 /* firmware updates only TXCMD but doesn't take WTBL into 2012 * account, so driver should update here to reflect the 2013 * actual txrate hardware sends out. 2014 */ 2015 addr = mt7996_mac_wtbl_lmac_addr(dev, msta_link->wcid.idx, 7); 2016 if (link_sta->he_cap.has_he) 2017 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 2018 else 2019 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 2020 2021 ret = mt7996_mcu_set_fixed_field(dev, link_sta, link, 2022 msta_link, &phy, 2023 RATE_PARAM_FIXED_GI); 2024 if (ret) 2025 return ret; 2026 } 2027 2028 /* fixed HE_LTF */ 2029 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 2030 ret = mt7996_mcu_set_fixed_field(dev, link_sta, link, 2031 msta_link, &phy, 2032 RATE_PARAM_FIXED_HE_LTF); 2033 if (ret) 2034 return ret; 2035 } 2036 2037 return 0; 2038 } 2039 2040 static void 2041 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 2042 struct ieee80211_vif *vif, 2043 struct ieee80211_bss_conf *link_conf, 2044 struct ieee80211_link_sta *link_sta, 2045 struct mt7996_vif_link *link) 2046 { 2047 #define INIT_RCPI 180 2048 struct mt76_phy *mphy = link->phy->mt76; 2049 struct cfg80211_chan_def *chandef = &mphy->chandef; 2050 struct cfg80211_bitrate_mask *mask = &link->bitrate_mask; 2051 u32 cap = link_sta->sta->wme ? STA_CAP_WMM : 0; 2052 enum nl80211_band band = chandef->chan->band; 2053 struct sta_rec_ra_uni *ra; 2054 struct tlv *tlv; 2055 u32 supp_rate = link_sta->supp_rates[band]; 2056 2057 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 2058 ra = (struct sta_rec_ra_uni *)tlv; 2059 2060 ra->valid = true; 2061 ra->auto_rate = true; 2062 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, link_sta); 2063 ra->channel = chandef->chan->hw_value; 2064 ra->bw = (link_sta->bandwidth == IEEE80211_STA_RX_BW_320) ? 2065 CMD_CBW_320MHZ : link_sta->bandwidth; 2066 ra->phy.bw = ra->bw; 2067 ra->mmps_mode = mt7996_mcu_get_mmps_mode(link_sta->smps_mode); 2068 2069 if (supp_rate) { 2070 supp_rate &= mask->control[band].legacy; 2071 ra->rate_len = hweight32(supp_rate); 2072 2073 if (band == NL80211_BAND_2GHZ) { 2074 ra->supp_mode = MODE_CCK; 2075 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 2076 2077 if (ra->rate_len > 4) { 2078 ra->supp_mode |= MODE_OFDM; 2079 ra->supp_ofdm_rate = supp_rate >> 4; 2080 } 2081 } else { 2082 ra->supp_mode = MODE_OFDM; 2083 ra->supp_ofdm_rate = supp_rate; 2084 } 2085 } 2086 2087 if (link_sta->ht_cap.ht_supported) { 2088 ra->supp_mode |= MODE_HT; 2089 ra->af = link_sta->ht_cap.ampdu_factor; 2090 ra->ht_gf = !!(link_sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 2091 2092 cap |= STA_CAP_HT; 2093 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2094 cap |= STA_CAP_SGI_20; 2095 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2096 cap |= STA_CAP_SGI_40; 2097 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 2098 cap |= STA_CAP_TX_STBC; 2099 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 2100 cap |= STA_CAP_RX_STBC; 2101 if (link_conf->ht_ldpc && 2102 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 2103 cap |= STA_CAP_LDPC; 2104 2105 mt7996_mcu_set_sta_ht_mcs(link_sta, ra->ht_mcs, 2106 mask->control[band].ht_mcs); 2107 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 2108 } 2109 2110 if (link_sta->vht_cap.vht_supported) { 2111 u8 af; 2112 2113 ra->supp_mode |= MODE_VHT; 2114 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 2115 link_sta->vht_cap.cap); 2116 ra->af = max_t(u8, ra->af, af); 2117 2118 cap |= STA_CAP_VHT; 2119 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2120 cap |= STA_CAP_VHT_SGI_80; 2121 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2122 cap |= STA_CAP_VHT_SGI_160; 2123 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 2124 cap |= STA_CAP_VHT_TX_STBC; 2125 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 2126 cap |= STA_CAP_VHT_RX_STBC; 2127 if ((vif->type != NL80211_IFTYPE_AP || link_conf->vht_ldpc) && 2128 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 2129 cap |= STA_CAP_VHT_LDPC; 2130 2131 mt7996_mcu_set_sta_vht_mcs(link_sta, ra->supp_vht_mcs, 2132 mask->control[band].vht_mcs); 2133 } 2134 2135 if (link_sta->he_cap.has_he) { 2136 ra->supp_mode |= MODE_HE; 2137 cap |= STA_CAP_HE; 2138 2139 if (link_sta->he_6ghz_capa.capa) 2140 ra->af = le16_get_bits(link_sta->he_6ghz_capa.capa, 2141 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 2142 } 2143 ra->sta_cap = cpu_to_le32(cap); 2144 2145 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi)); 2146 } 2147 2148 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, 2149 struct ieee80211_vif *vif, 2150 struct ieee80211_bss_conf *link_conf, 2151 struct ieee80211_link_sta *link_sta, 2152 struct mt7996_vif_link *link, 2153 struct mt7996_sta_link *msta_link, bool changed) 2154 { 2155 struct sk_buff *skb; 2156 int ret; 2157 2158 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2159 &msta_link->wcid, 2160 MT7996_STA_UPDATE_MAX_SIZE); 2161 if (IS_ERR(skb)) 2162 return PTR_ERR(skb); 2163 2164 /* firmware rc algorithm refers to sta_rec_he for HE control. 2165 * once dev->rc_work changes the settings driver should also 2166 * update sta_rec_he here. 2167 */ 2168 if (changed) 2169 mt7996_mcu_sta_he_tlv(skb, link_sta, link); 2170 2171 /* sta_rec_ra accommodates BW, NSS and only MCS range format 2172 * i.e 0-{7,8,9} for VHT. 2173 */ 2174 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, link_conf, link_sta, link); 2175 2176 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2177 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2178 if (ret) 2179 return ret; 2180 2181 return mt7996_mcu_add_rate_ctrl_fixed(dev, link_sta, link, msta_link); 2182 } 2183 2184 static int 2185 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2186 struct ieee80211_sta *sta) 2187 { 2188 #define MT_STA_BSS_GROUP 1 2189 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2190 struct mt7996_sta_link *msta_link; 2191 struct mt7996_sta *msta; 2192 struct { 2193 u8 __rsv1[4]; 2194 2195 __le16 tag; 2196 __le16 len; 2197 __le16 wlan_idx; 2198 u8 __rsv2[2]; 2199 __le32 action; 2200 __le32 val; 2201 u8 __rsv3[8]; 2202 } __packed req = { 2203 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 2204 .len = cpu_to_le16(sizeof(req) - 4), 2205 .action = cpu_to_le32(MT_STA_BSS_GROUP), 2206 .val = cpu_to_le32(mvif->deflink.mt76.idx % 16), 2207 }; 2208 2209 msta = sta ? (struct mt7996_sta *)sta->drv_priv : NULL; 2210 msta_link = msta ? &msta->deflink : &mvif->deflink.msta_link; 2211 req.wlan_idx = cpu_to_le16(msta_link->wcid.idx); 2212 2213 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 2214 sizeof(req), true); 2215 } 2216 2217 static void 2218 mt7996_mcu_sta_mld_setup_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2219 struct ieee80211_sta *sta) 2220 { 2221 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2222 unsigned long links = sta->valid_links; 2223 unsigned int nlinks = hweight16(links); 2224 struct mld_setup_link *mld_setup_link; 2225 struct sta_rec_mld_setup *mld_setup; 2226 struct mt7996_sta_link *msta_link; 2227 struct ieee80211_vif *vif; 2228 unsigned int link_id; 2229 struct tlv *tlv; 2230 2231 msta_link = mt76_dereference(msta->link[msta->deflink_id], &dev->mt76); 2232 if (!msta_link) 2233 return; 2234 2235 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MLD, 2236 sizeof(struct sta_rec_mld_setup) + 2237 sizeof(struct mld_setup_link) * nlinks); 2238 2239 mld_setup = (struct sta_rec_mld_setup *)tlv; 2240 memcpy(mld_setup->mld_addr, sta->addr, ETH_ALEN); 2241 mld_setup->setup_wcid = cpu_to_le16(msta_link->wcid.idx); 2242 mld_setup->primary_id = cpu_to_le16(msta_link->wcid.idx); 2243 2244 if (nlinks > 1) { 2245 link_id = __ffs(links & ~BIT(msta->deflink_id)); 2246 msta_link = mt76_dereference(msta->link[msta->deflink_id], 2247 &dev->mt76); 2248 if (!msta_link) 2249 return; 2250 } 2251 mld_setup->seconed_id = cpu_to_le16(msta_link->wcid.idx); 2252 mld_setup->link_num = nlinks; 2253 2254 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); 2255 mld_setup_link = (struct mld_setup_link *)mld_setup->link_info; 2256 for_each_set_bit(link_id, &links, IEEE80211_MLD_MAX_NUM_LINKS) { 2257 struct mt7996_vif_link *link; 2258 2259 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 2260 if (!msta_link) 2261 continue; 2262 2263 link = mt7996_vif_link(dev, vif, link_id); 2264 if (!link) 2265 continue; 2266 2267 mld_setup_link->wcid = cpu_to_le16(msta_link->wcid.idx); 2268 mld_setup_link->bss_idx = link->mt76.idx; 2269 mld_setup_link++; 2270 } 2271 } 2272 2273 static void 2274 mt7996_mcu_sta_eht_mld_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2275 struct ieee80211_sta *sta) 2276 { 2277 struct sta_rec_eht_mld *eht_mld; 2278 struct tlv *tlv; 2279 int i; 2280 2281 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT_MLD, sizeof(*eht_mld)); 2282 eht_mld = (struct sta_rec_eht_mld *)tlv; 2283 2284 for (i = 0; i < ARRAY_SIZE(eht_mld->str_cap); i++) 2285 eht_mld->str_cap[i] = 0x7; 2286 } 2287 2288 int mt7996_mcu_add_sta(struct mt7996_dev *dev, 2289 struct ieee80211_bss_conf *link_conf, 2290 struct ieee80211_link_sta *link_sta, 2291 struct mt7996_vif_link *link, 2292 struct mt7996_sta_link *msta_link, 2293 int conn_state, bool newly) 2294 { 2295 struct mt76_wcid *wcid = msta_link ? &msta_link->wcid : link->mt76.wcid; 2296 struct ieee80211_sta *sta = link_sta ? link_sta->sta : NULL; 2297 struct sk_buff *skb; 2298 int ret; 2299 2300 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, wcid, 2301 MT7996_STA_UPDATE_MAX_SIZE); 2302 if (IS_ERR(skb)) 2303 return PTR_ERR(skb); 2304 2305 /* starec basic */ 2306 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, link_conf, link_sta, 2307 conn_state, newly); 2308 2309 if (conn_state == CONN_STATE_DISCONNECT) 2310 goto out; 2311 2312 /* starec hdr trans */ 2313 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, link_conf->vif, wcid); 2314 /* starec tx proc */ 2315 mt7996_mcu_sta_tx_proc_tlv(skb); 2316 2317 /* tag order is in accordance with firmware dependency. */ 2318 if (link_sta) { 2319 /* starec hdrt mode */ 2320 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2321 if (conn_state == CONN_STATE_CONNECT) { 2322 /* starec bfer */ 2323 mt7996_mcu_sta_bfer_tlv(dev, skb, link_conf, link_sta, 2324 link); 2325 /* starec bfee */ 2326 mt7996_mcu_sta_bfee_tlv(dev, skb, link_conf, link_sta, 2327 link); 2328 } 2329 /* starec ht */ 2330 mt7996_mcu_sta_ht_tlv(skb, link_sta); 2331 /* starec vht */ 2332 mt7996_mcu_sta_vht_tlv(skb, link_sta); 2333 /* starec uapsd */ 2334 mt76_connac_mcu_sta_uapsd(skb, link_conf->vif, sta); 2335 /* starec amsdu */ 2336 mt7996_mcu_sta_amsdu_tlv(dev, skb, link_conf->vif, link_sta, 2337 msta_link); 2338 /* starec he */ 2339 mt7996_mcu_sta_he_tlv(skb, link_sta, link); 2340 /* starec he 6g*/ 2341 mt7996_mcu_sta_he_6g_tlv(skb, link_sta); 2342 /* starec eht */ 2343 mt7996_mcu_sta_eht_tlv(skb, link_sta); 2344 /* starec muru */ 2345 mt7996_mcu_sta_muru_tlv(dev, skb, link_conf, link_sta); 2346 2347 if (sta->mlo) { 2348 mt7996_mcu_sta_mld_setup_tlv(dev, skb, sta); 2349 mt7996_mcu_sta_eht_mld_tlv(dev, skb, sta); 2350 } 2351 } 2352 2353 ret = mt7996_mcu_add_group(dev, link_conf->vif, sta); 2354 if (ret) { 2355 dev_kfree_skb(skb); 2356 return ret; 2357 } 2358 out: 2359 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2360 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2361 } 2362 2363 int mt7996_mcu_teardown_mld_sta(struct mt7996_dev *dev, 2364 struct mt7996_vif_link *link, 2365 struct mt7996_sta_link *msta_link) 2366 { 2367 struct sk_buff *skb; 2368 2369 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2370 &msta_link->wcid, 2371 MT7996_STA_UPDATE_MAX_SIZE); 2372 if (IS_ERR(skb)) 2373 return PTR_ERR(skb); 2374 2375 mt76_connac_mcu_add_tlv(skb, STA_REC_MLD_OFF, sizeof(struct tlv)); 2376 2377 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2378 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2379 } 2380 2381 static int 2382 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 2383 struct sk_buff *skb, 2384 struct ieee80211_key_conf *key, 2385 enum set_key_cmd cmd) 2386 { 2387 struct sta_rec_sec_uni *sec; 2388 struct tlv *tlv; 2389 2390 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2391 sec = (struct sta_rec_sec_uni *)tlv; 2392 sec->add = cmd; 2393 2394 if (cmd == SET_KEY) { 2395 struct sec_key_uni *sec_key; 2396 u8 cipher; 2397 2398 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2399 if (cipher == MCU_CIPHER_NONE) 2400 return -EOPNOTSUPP; 2401 2402 sec_key = &sec->key[0]; 2403 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2404 sec_key->mgmt_prot = 0; 2405 sec_key->cipher_id = cipher; 2406 sec_key->cipher_len = sizeof(*sec_key); 2407 sec_key->key_id = key->keyidx; 2408 sec_key->key_len = key->keylen; 2409 sec_key->need_resp = 0; 2410 memcpy(sec_key->key, key->key, key->keylen); 2411 2412 if (cipher == MCU_CIPHER_TKIP) { 2413 /* Rx/Tx MIC keys are swapped */ 2414 memcpy(sec_key->key + 16, key->key + 24, 8); 2415 memcpy(sec_key->key + 24, key->key + 16, 8); 2416 } 2417 2418 sec->n_cipher = 1; 2419 } else { 2420 sec->n_cipher = 0; 2421 } 2422 2423 return 0; 2424 } 2425 2426 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2427 struct ieee80211_key_conf *key, int mcu_cmd, 2428 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2429 { 2430 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2431 struct sk_buff *skb; 2432 int ret; 2433 2434 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 2435 MT7996_STA_UPDATE_MAX_SIZE); 2436 if (IS_ERR(skb)) 2437 return PTR_ERR(skb); 2438 2439 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd); 2440 if (ret) 2441 return ret; 2442 2443 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2444 } 2445 2446 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, 2447 struct mt7996_vif_link *link, 2448 struct mt7996_sta_link *msta_link, u8 *pn) 2449 { 2450 #define TSC_TYPE_BIGTK_PN 2 2451 struct sta_rec_pn_info *pn_info; 2452 struct sk_buff *skb, *rskb; 2453 struct tlv *tlv; 2454 int ret; 2455 2456 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2457 &msta_link->wcid); 2458 if (IS_ERR(skb)) 2459 return PTR_ERR(skb); 2460 2461 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info)); 2462 pn_info = (struct sta_rec_pn_info *)tlv; 2463 2464 pn_info->tsc_type = TSC_TYPE_BIGTK_PN; 2465 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb, 2466 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE), 2467 true, &rskb); 2468 if (ret) 2469 return ret; 2470 2471 skb_pull(rskb, 4); 2472 2473 pn_info = (struct sta_rec_pn_info *)rskb->data; 2474 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO) 2475 memcpy(pn, pn_info->pn, 6); 2476 2477 dev_kfree_skb(rskb); 2478 return 0; 2479 } 2480 2481 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, 2482 struct mt7996_vif_link *link, 2483 struct mt7996_sta_link *msta_link, 2484 struct ieee80211_key_conf *key) 2485 { 2486 struct mt7996_mcu_bcn_prot_tlv *bcn_prot; 2487 struct sk_buff *skb; 2488 struct tlv *tlv; 2489 u8 pn[6] = {}; 2490 int len = sizeof(struct bss_req_hdr) + 2491 sizeof(struct mt7996_mcu_bcn_prot_tlv); 2492 int ret; 2493 2494 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, len); 2495 if (IS_ERR(skb)) 2496 return PTR_ERR(skb); 2497 2498 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot)); 2499 2500 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv; 2501 2502 ret = mt7996_mcu_get_pn(dev, link, msta_link, pn); 2503 if (ret) { 2504 dev_kfree_skb(skb); 2505 return ret; 2506 } 2507 2508 switch (key->cipher) { 2509 case WLAN_CIPHER_SUITE_AES_CMAC: 2510 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128; 2511 break; 2512 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 2513 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128; 2514 break; 2515 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 2516 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256; 2517 break; 2518 case WLAN_CIPHER_SUITE_BIP_CMAC_256: 2519 default: 2520 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n"); 2521 dev_kfree_skb(skb); 2522 return -EOPNOTSUPP; 2523 } 2524 2525 pn[0]++; 2526 memcpy(bcn_prot->pn, pn, 6); 2527 bcn_prot->enable = BP_SW_MODE; 2528 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN); 2529 bcn_prot->key_id = key->keyidx; 2530 2531 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2532 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2533 } 2534 2535 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 2536 struct ieee80211_bss_conf *link_conf, 2537 struct mt76_vif_link *mlink, bool enable) 2538 { 2539 struct mt7996_dev *dev = phy->dev; 2540 struct { 2541 struct req_hdr { 2542 u8 omac_idx; 2543 u8 band_idx; 2544 u8 __rsv[2]; 2545 } __packed hdr; 2546 struct req_tlv { 2547 __le16 tag; 2548 __le16 len; 2549 u8 active; 2550 u8 __rsv; 2551 u8 omac_addr[ETH_ALEN]; 2552 } __packed tlv; 2553 } data = { 2554 .hdr = { 2555 .omac_idx = mlink->omac_idx, 2556 .band_idx = mlink->band_idx, 2557 }, 2558 .tlv = { 2559 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2560 .len = cpu_to_le16(sizeof(struct req_tlv)), 2561 .active = enable, 2562 }, 2563 }; 2564 2565 if (mlink->omac_idx >= REPEATER_BSSID_START) 2566 return mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 2567 2568 memcpy(data.tlv.omac_addr, link_conf->addr, ETH_ALEN); 2569 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2570 &data, sizeof(data), true); 2571 } 2572 2573 static void 2574 mt7996_mcu_beacon_cntdwn(struct sk_buff *rskb, struct sk_buff *skb, 2575 struct ieee80211_mutable_offsets *offs, 2576 bool csa) 2577 { 2578 struct bss_bcn_cntdwn_tlv *info; 2579 struct tlv *tlv; 2580 u16 tag; 2581 2582 if (!offs->cntdwn_counter_offs[0]) 2583 return; 2584 2585 tag = csa ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 2586 2587 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 2588 2589 info = (struct bss_bcn_cntdwn_tlv *)tlv; 2590 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 2591 } 2592 2593 static void 2594 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 2595 struct bss_bcn_content_tlv *bcn, 2596 struct ieee80211_mutable_offsets *offs) 2597 { 2598 struct bss_bcn_mbss_tlv *mbss; 2599 const struct element *elem; 2600 struct tlv *tlv; 2601 2602 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 2603 2604 mbss = (struct bss_bcn_mbss_tlv *)tlv; 2605 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 2606 mbss->bitmap = cpu_to_le32(1); 2607 2608 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 2609 &skb->data[offs->mbssid_off], 2610 skb->len - offs->mbssid_off) { 2611 const struct element *sub_elem; 2612 2613 if (elem->datalen < 2) 2614 continue; 2615 2616 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 2617 const struct ieee80211_bssid_index *idx; 2618 const u8 *idx_ie; 2619 2620 /* not a valid BSS profile */ 2621 if (sub_elem->id || sub_elem->datalen < 4) 2622 continue; 2623 2624 /* Find WLAN_EID_MULTI_BSSID_IDX 2625 * in the merged nontransmitted profile 2626 */ 2627 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 2628 sub_elem->data, sub_elem->datalen); 2629 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 2630 continue; 2631 2632 idx = (void *)(idx_ie + 2); 2633 if (!idx->bssid_index || idx->bssid_index > 31) 2634 continue; 2635 2636 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 2637 skb->data); 2638 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 2639 } 2640 } 2641 } 2642 2643 static void 2644 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, 2645 struct ieee80211_bss_conf *link_conf, 2646 struct sk_buff *rskb, struct sk_buff *skb, 2647 struct bss_bcn_content_tlv *bcn, 2648 struct ieee80211_mutable_offsets *offs) 2649 { 2650 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2651 u8 *buf; 2652 2653 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2654 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 2655 2656 if (offs->cntdwn_counter_offs[0]) { 2657 u16 offset = offs->cntdwn_counter_offs[0]; 2658 2659 if (link_conf->csa_active) 2660 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 2661 if (link_conf->color_change_active) 2662 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 2663 } 2664 2665 buf = (u8 *)bcn + sizeof(*bcn); 2666 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 2667 BSS_CHANGED_BEACON); 2668 2669 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2670 } 2671 2672 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2673 struct ieee80211_bss_conf *link_conf) 2674 { 2675 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2676 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 2677 struct ieee80211_mutable_offsets offs; 2678 struct ieee80211_tx_info *info; 2679 struct sk_buff *skb, *rskb; 2680 struct tlv *tlv; 2681 struct bss_bcn_content_tlv *bcn; 2682 int len, extra_len = 0; 2683 2684 if (link_conf->nontransmitted) 2685 return 0; 2686 2687 if (!mlink) 2688 return -EINVAL; 2689 2690 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 2691 MT7996_MAX_BSS_OFFLOAD_SIZE); 2692 if (IS_ERR(rskb)) 2693 return PTR_ERR(rskb); 2694 2695 skb = ieee80211_beacon_get_template(hw, vif, &offs, link_conf->link_id); 2696 if (link_conf->enable_beacon && !skb) { 2697 dev_kfree_skb(rskb); 2698 return -EINVAL; 2699 } 2700 2701 if (skb) { 2702 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2703 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2704 dev_kfree_skb(rskb); 2705 dev_kfree_skb(skb); 2706 return -EINVAL; 2707 } 2708 2709 extra_len = skb->len; 2710 } 2711 2712 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + extra_len, 4); 2713 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2714 bcn = (struct bss_bcn_content_tlv *)tlv; 2715 bcn->enable = link_conf->enable_beacon; 2716 if (!bcn->enable) 2717 goto out; 2718 2719 info = IEEE80211_SKB_CB(skb); 2720 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx); 2721 2722 mt7996_mcu_beacon_cont(dev, link_conf, rskb, skb, bcn, &offs); 2723 if (link_conf->bssid_indicator) 2724 mt7996_mcu_beacon_mbss(rskb, skb, bcn, &offs); 2725 mt7996_mcu_beacon_cntdwn(rskb, skb, &offs, link_conf->csa_active); 2726 out: 2727 dev_kfree_skb(skb); 2728 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2729 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2730 } 2731 2732 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 2733 struct ieee80211_bss_conf *link_conf, 2734 struct mt7996_vif_link *link, u32 changed) 2735 { 2736 #define OFFLOAD_TX_MODE_SU BIT(0) 2737 #define OFFLOAD_TX_MODE_MU BIT(1) 2738 struct ieee80211_vif *vif = link_conf->vif; 2739 struct ieee80211_hw *hw = mt76_hw(dev); 2740 struct mt7996_phy *phy = link->phy; 2741 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2742 struct bss_inband_discovery_tlv *discov; 2743 struct ieee80211_tx_info *info; 2744 struct sk_buff *rskb, *skb = NULL; 2745 struct cfg80211_chan_def *chandef; 2746 enum nl80211_band band; 2747 struct tlv *tlv; 2748 u8 *buf, interval; 2749 int len; 2750 2751 if (!phy) 2752 return -EINVAL; 2753 2754 chandef = &phy->mt76->chandef; 2755 band = chandef->chan->band; 2756 2757 if (link_conf->nontransmitted) 2758 return 0; 2759 2760 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, 2761 MT7996_MAX_BSS_OFFLOAD_SIZE); 2762 if (IS_ERR(rskb)) 2763 return PTR_ERR(rskb); 2764 2765 if (changed & BSS_CHANGED_FILS_DISCOVERY && 2766 link_conf->fils_discovery.max_interval) { 2767 interval = link_conf->fils_discovery.max_interval; 2768 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 2769 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 2770 link_conf->unsol_bcast_probe_resp_interval) { 2771 interval = link_conf->unsol_bcast_probe_resp_interval; 2772 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 2773 } 2774 2775 if (!skb) { 2776 dev_kfree_skb(rskb); 2777 return -EINVAL; 2778 } 2779 2780 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2781 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2782 dev_kfree_skb(rskb); 2783 dev_kfree_skb(skb); 2784 return -EINVAL; 2785 } 2786 2787 info = IEEE80211_SKB_CB(skb); 2788 info->control.vif = vif; 2789 info->band = band; 2790 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2791 2792 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 2793 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2794 2795 discov = (struct bss_inband_discovery_tlv *)tlv; 2796 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2797 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2798 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2799 discov->tx_interval = interval; 2800 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2801 discov->enable = true; 2802 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2803 2804 buf = (u8 *)tlv + sizeof(*discov); 2805 2806 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2807 2808 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2809 2810 dev_kfree_skb(skb); 2811 2812 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2813 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2814 } 2815 2816 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2817 { 2818 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2819 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2820 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2821 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2822 return -EIO; 2823 } 2824 2825 /* clear irq when the driver own success */ 2826 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2827 MT_TOP_LPCR_HOST_BAND_STAT); 2828 2829 return 0; 2830 } 2831 2832 static u32 mt7996_patch_sec_mode(u32 key_info) 2833 { 2834 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2835 2836 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2837 return 0; 2838 2839 if (sec == MT7996_SEC_MODE_AES) 2840 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2841 else 2842 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2843 2844 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2845 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2846 } 2847 2848 static int mt7996_load_patch(struct mt7996_dev *dev) 2849 { 2850 const struct mt7996_patch_hdr *hdr; 2851 const struct firmware *fw = NULL; 2852 int i, ret, sem; 2853 2854 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2855 switch (sem) { 2856 case PATCH_IS_DL: 2857 return 0; 2858 case PATCH_NOT_DL_SEM_SUCCESS: 2859 break; 2860 default: 2861 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2862 return -EAGAIN; 2863 } 2864 2865 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev); 2866 if (ret) 2867 goto out; 2868 2869 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2870 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2871 ret = -EINVAL; 2872 goto out; 2873 } 2874 2875 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2876 2877 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2878 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2879 2880 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2881 struct mt7996_patch_sec *sec; 2882 const u8 *dl; 2883 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2884 2885 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2886 i * sizeof(*sec)); 2887 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2888 PATCH_SEC_TYPE_INFO) { 2889 ret = -EINVAL; 2890 goto out; 2891 } 2892 2893 addr = be32_to_cpu(sec->info.addr); 2894 len = be32_to_cpu(sec->info.len); 2895 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2896 dl = fw->data + be32_to_cpu(sec->offs); 2897 2898 mode |= mt7996_patch_sec_mode(sec_key_idx); 2899 2900 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2901 mode); 2902 if (ret) { 2903 dev_err(dev->mt76.dev, "Download request failed\n"); 2904 goto out; 2905 } 2906 2907 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2908 dl, len, 4096); 2909 if (ret) { 2910 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2911 goto out; 2912 } 2913 } 2914 2915 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2916 if (ret) 2917 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2918 2919 out: 2920 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2921 switch (sem) { 2922 case PATCH_REL_SEM_SUCCESS: 2923 break; 2924 default: 2925 ret = -EAGAIN; 2926 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2927 break; 2928 } 2929 release_firmware(fw); 2930 2931 return ret; 2932 } 2933 2934 static int 2935 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2936 const struct mt7996_fw_trailer *hdr, 2937 const u8 *data, enum mt7996_ram_type type) 2938 { 2939 int i, offset = 0; 2940 u32 override = 0, option = 0; 2941 2942 for (i = 0; i < hdr->n_region; i++) { 2943 const struct mt7996_fw_region *region; 2944 int err; 2945 u32 len, addr, mode; 2946 2947 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2948 (hdr->n_region - i) * sizeof(*region)); 2949 /* DSP and WA use same mode */ 2950 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2951 region->feature_set, 2952 type != MT7996_RAM_TYPE_WM); 2953 len = le32_to_cpu(region->len); 2954 addr = le32_to_cpu(region->addr); 2955 2956 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2957 override = addr; 2958 2959 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2960 mode); 2961 if (err) { 2962 dev_err(dev->mt76.dev, "Download request failed\n"); 2963 return err; 2964 } 2965 2966 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2967 data + offset, len, 4096); 2968 if (err) { 2969 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2970 return err; 2971 } 2972 2973 offset += len; 2974 } 2975 2976 if (override) 2977 option |= FW_START_OVERRIDE; 2978 2979 if (type == MT7996_RAM_TYPE_WA) 2980 option |= FW_START_WORKING_PDA_CR4; 2981 else if (type == MT7996_RAM_TYPE_DSP) 2982 option |= FW_START_WORKING_PDA_DSP; 2983 2984 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2985 } 2986 2987 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 2988 const char *fw_file, enum mt7996_ram_type ram_type) 2989 { 2990 const struct mt7996_fw_trailer *hdr; 2991 const struct firmware *fw; 2992 int ret; 2993 2994 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 2995 if (ret) 2996 return ret; 2997 2998 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2999 dev_err(dev->mt76.dev, "Invalid firmware\n"); 3000 ret = -EINVAL; 3001 goto out; 3002 } 3003 3004 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3005 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 3006 fw_type, hdr->fw_ver, hdr->build_date); 3007 3008 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 3009 if (ret) { 3010 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 3011 goto out; 3012 } 3013 3014 snprintf(dev->mt76.hw->wiphy->fw_version, 3015 sizeof(dev->mt76.hw->wiphy->fw_version), 3016 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3017 3018 out: 3019 release_firmware(fw); 3020 3021 return ret; 3022 } 3023 3024 static int mt7996_load_ram(struct mt7996_dev *dev) 3025 { 3026 int ret; 3027 3028 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM), 3029 MT7996_RAM_TYPE_WM); 3030 if (ret) 3031 return ret; 3032 3033 if (!mt7996_has_wa(dev)) 3034 return 0; 3035 3036 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP), 3037 MT7996_RAM_TYPE_DSP); 3038 if (ret) 3039 return ret; 3040 3041 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA), 3042 MT7996_RAM_TYPE_WA); 3043 } 3044 3045 static int 3046 mt7996_firmware_state(struct mt7996_dev *dev, u8 fw_state) 3047 { 3048 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, fw_state); 3049 3050 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 3051 state, 1000)) { 3052 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 3053 return -EIO; 3054 } 3055 return 0; 3056 } 3057 3058 static int 3059 mt7996_mcu_restart(struct mt76_dev *dev) 3060 { 3061 struct { 3062 u8 __rsv1[4]; 3063 3064 __le16 tag; 3065 __le16 len; 3066 u8 power_mode; 3067 u8 __rsv2[3]; 3068 } __packed req = { 3069 .tag = cpu_to_le16(UNI_POWER_OFF), 3070 .len = cpu_to_le16(sizeof(req) - 4), 3071 .power_mode = 1, 3072 }; 3073 3074 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 3075 sizeof(req), false); 3076 } 3077 3078 static int mt7996_load_firmware(struct mt7996_dev *dev) 3079 { 3080 u8 fw_state; 3081 int ret; 3082 3083 /* make sure fw is download state */ 3084 if (mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD)) { 3085 /* restart firmware once */ 3086 mt7996_mcu_restart(&dev->mt76); 3087 ret = mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD); 3088 if (ret) { 3089 dev_err(dev->mt76.dev, 3090 "Firmware is not ready for download\n"); 3091 return ret; 3092 } 3093 } 3094 3095 ret = mt7996_load_patch(dev); 3096 if (ret) 3097 return ret; 3098 3099 ret = mt7996_load_ram(dev); 3100 if (ret) 3101 return ret; 3102 3103 fw_state = mt7996_has_wa(dev) ? FW_STATE_RDY : FW_STATE_NORMAL_TRX; 3104 ret = mt7996_firmware_state(dev, fw_state); 3105 if (ret) 3106 return ret; 3107 3108 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 3109 3110 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 3111 3112 return 0; 3113 } 3114 3115 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 3116 { 3117 struct { 3118 u8 _rsv[4]; 3119 3120 __le16 tag; 3121 __le16 len; 3122 u8 ctrl; 3123 u8 interval; 3124 u8 _rsv2[2]; 3125 } __packed data = { 3126 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 3127 .len = cpu_to_le16(sizeof(data) - 4), 3128 .ctrl = ctrl, 3129 }; 3130 3131 if (type == MCU_FW_LOG_WA) 3132 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 3133 &data, sizeof(data), true); 3134 3135 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3136 sizeof(data), true); 3137 } 3138 3139 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 3140 { 3141 struct { 3142 u8 _rsv[4]; 3143 3144 __le16 tag; 3145 __le16 len; 3146 __le32 module_idx; 3147 u8 level; 3148 u8 _rsv2[3]; 3149 } data = { 3150 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 3151 .len = cpu_to_le16(sizeof(data) - 4), 3152 .module_idx = cpu_to_le32(module), 3153 .level = level, 3154 }; 3155 3156 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3157 sizeof(data), false); 3158 } 3159 3160 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 3161 { 3162 struct { 3163 u8 enable; 3164 u8 _rsv[3]; 3165 } __packed req = { 3166 .enable = enabled 3167 }; 3168 3169 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 3170 sizeof(req), false); 3171 } 3172 3173 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 3174 { 3175 struct vow_rx_airtime *req; 3176 struct tlv *tlv; 3177 3178 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 3179 req = (struct vow_rx_airtime *)tlv; 3180 req->enable = true; 3181 req->band = band_idx; 3182 3183 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 3184 req = (struct vow_rx_airtime *)tlv; 3185 req->enable = true; 3186 req->band = band_idx; 3187 } 3188 3189 static int 3190 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 3191 { 3192 struct uni_header hdr = {}; 3193 struct sk_buff *skb; 3194 int len, num, i; 3195 3196 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) + 3197 mt7996_band_valid(dev, MT_BAND2)); 3198 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 3199 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3200 if (!skb) 3201 return -ENOMEM; 3202 3203 skb_put_data(skb, &hdr, sizeof(hdr)); 3204 3205 for (i = 0; i < __MT_MAX_BAND; i++) { 3206 if (mt7996_band_valid(dev, i)) 3207 mt7996_add_rx_airtime_tlv(skb, i); 3208 } 3209 3210 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3211 MCU_WM_UNI_CMD(VOW), true); 3212 } 3213 3214 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 3215 { 3216 int ret; 3217 3218 /* force firmware operation mode into normal state, 3219 * which should be set before firmware download stage. 3220 */ 3221 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 3222 3223 ret = mt7996_driver_own(dev, 0); 3224 if (ret) 3225 return ret; 3226 /* set driver own for band1 when two hif exist */ 3227 if (dev->hif2) { 3228 ret = mt7996_driver_own(dev, 1); 3229 if (ret) 3230 return ret; 3231 } 3232 3233 ret = mt7996_load_firmware(dev); 3234 if (ret) 3235 return ret; 3236 3237 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 3238 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 3239 if (ret) 3240 return ret; 3241 3242 if (mt7996_has_wa(dev)) { 3243 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 3244 if (ret) 3245 return ret; 3246 3247 ret = mt7996_mcu_set_mwds(dev, 1); 3248 if (ret) 3249 return ret; 3250 } 3251 3252 ret = mt7996_mcu_init_rx_airtime(dev); 3253 if (ret) 3254 return ret; 3255 3256 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 3257 MCU_WA_PARAM_RED, 0, 0); 3258 } 3259 3260 int mt7996_mcu_init(struct mt7996_dev *dev) 3261 { 3262 static const struct mt76_mcu_ops mt7996_mcu_ops = { 3263 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 3264 .mcu_skb_send_msg = mt7996_mcu_send_message, 3265 .mcu_parse_response = mt7996_mcu_parse_response, 3266 }; 3267 3268 dev->mt76.mcu_ops = &mt7996_mcu_ops; 3269 3270 return mt7996_mcu_init_firmware(dev); 3271 } 3272 3273 void mt7996_mcu_exit(struct mt7996_dev *dev) 3274 { 3275 mt7996_mcu_restart(&dev->mt76); 3276 if (mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD)) { 3277 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 3278 goto out; 3279 } 3280 3281 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 3282 if (dev->hif2) 3283 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 3284 MT_TOP_LPCR_HOST_FW_OWN); 3285 out: 3286 skb_queue_purge(&dev->mt76.mcu.res_q); 3287 } 3288 3289 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 3290 { 3291 struct { 3292 u8 __rsv[4]; 3293 } __packed hdr; 3294 struct hdr_trans_blacklist *req_blacklist; 3295 struct hdr_trans_en *req_en; 3296 struct sk_buff *skb; 3297 struct tlv *tlv; 3298 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 3299 3300 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3301 if (!skb) 3302 return -ENOMEM; 3303 3304 skb_put_data(skb, &hdr, sizeof(hdr)); 3305 3306 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 3307 req_en = (struct hdr_trans_en *)tlv; 3308 req_en->enable = hdr_trans; 3309 3310 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 3311 sizeof(struct hdr_trans_vlan)); 3312 3313 if (hdr_trans) { 3314 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 3315 sizeof(*req_blacklist)); 3316 req_blacklist = (struct hdr_trans_blacklist *)tlv; 3317 req_blacklist->enable = 1; 3318 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 3319 } 3320 3321 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3322 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 3323 } 3324 3325 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3326 struct ieee80211_bss_conf *link_conf) 3327 { 3328 #define MCU_EDCA_AC_PARAM 0 3329 #define WMM_AIFS_SET BIT(0) 3330 #define WMM_CW_MIN_SET BIT(1) 3331 #define WMM_CW_MAX_SET BIT(2) 3332 #define WMM_TXOP_SET BIT(3) 3333 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 3334 WMM_CW_MAX_SET | WMM_TXOP_SET) 3335 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf); 3336 struct { 3337 u8 bss_idx; 3338 u8 __rsv[3]; 3339 } __packed hdr = { 3340 .bss_idx = link->mt76.idx, 3341 }; 3342 struct sk_buff *skb; 3343 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 3344 int ac; 3345 3346 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3347 if (!skb) 3348 return -ENOMEM; 3349 3350 skb_put_data(skb, &hdr, sizeof(hdr)); 3351 3352 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 3353 struct ieee80211_tx_queue_params *q = &link->queue_params[ac]; 3354 struct edca *e; 3355 struct tlv *tlv; 3356 3357 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 3358 3359 e = (struct edca *)tlv; 3360 e->set = WMM_PARAM_SET; 3361 e->queue = ac; 3362 e->aifs = q->aifs; 3363 e->txop = cpu_to_le16(q->txop); 3364 3365 if (q->cw_min) 3366 e->cw_min = fls(q->cw_min); 3367 else 3368 e->cw_min = 5; 3369 3370 if (q->cw_max) 3371 e->cw_max = fls(q->cw_max); 3372 else 3373 e->cw_max = 10; 3374 } 3375 3376 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3377 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 3378 } 3379 3380 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 3381 { 3382 struct { 3383 u8 _rsv[4]; 3384 3385 __le16 tag; 3386 __le16 len; 3387 3388 __le32 ctrl; 3389 __le16 min_lpn; 3390 u8 rsv[2]; 3391 } __packed req = { 3392 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3393 .len = cpu_to_le16(sizeof(req) - 4), 3394 3395 .ctrl = cpu_to_le32(0x1), 3396 .min_lpn = cpu_to_le16(val), 3397 }; 3398 3399 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3400 &req, sizeof(req), true); 3401 } 3402 3403 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3404 const struct mt7996_dfs_pulse *pulse) 3405 { 3406 struct { 3407 u8 _rsv[4]; 3408 3409 __le16 tag; 3410 __le16 len; 3411 3412 __le32 ctrl; 3413 3414 __le32 max_width; /* us */ 3415 __le32 max_pwr; /* dbm */ 3416 __le32 min_pwr; /* dbm */ 3417 __le32 min_stgr_pri; /* us */ 3418 __le32 max_stgr_pri; /* us */ 3419 __le32 min_cr_pri; /* us */ 3420 __le32 max_cr_pri; /* us */ 3421 } __packed req = { 3422 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3423 .len = cpu_to_le16(sizeof(req) - 4), 3424 3425 .ctrl = cpu_to_le32(0x3), 3426 3427 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3428 __req_field(max_width), 3429 __req_field(max_pwr), 3430 __req_field(min_pwr), 3431 __req_field(min_stgr_pri), 3432 __req_field(max_stgr_pri), 3433 __req_field(min_cr_pri), 3434 __req_field(max_cr_pri), 3435 #undef __req_field 3436 }; 3437 3438 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3439 &req, sizeof(req), true); 3440 } 3441 3442 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3443 const struct mt7996_dfs_pattern *pattern) 3444 { 3445 struct { 3446 u8 _rsv[4]; 3447 3448 __le16 tag; 3449 __le16 len; 3450 3451 __le32 ctrl; 3452 __le16 radar_type; 3453 3454 u8 enb; 3455 u8 stgr; 3456 u8 min_crpn; 3457 u8 max_crpn; 3458 u8 min_crpr; 3459 u8 min_pw; 3460 __le32 min_pri; 3461 __le32 max_pri; 3462 u8 max_pw; 3463 u8 min_crbn; 3464 u8 max_crbn; 3465 u8 min_stgpn; 3466 u8 max_stgpn; 3467 u8 min_stgpr; 3468 u8 rsv[2]; 3469 __le32 min_stgpr_diff; 3470 } __packed req = { 3471 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3472 .len = cpu_to_le16(sizeof(req) - 4), 3473 3474 .ctrl = cpu_to_le32(0x2), 3475 .radar_type = cpu_to_le16(index), 3476 3477 #define __req_field_u8(field) .field = pattern->field 3478 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3479 __req_field_u8(enb), 3480 __req_field_u8(stgr), 3481 __req_field_u8(min_crpn), 3482 __req_field_u8(max_crpn), 3483 __req_field_u8(min_crpr), 3484 __req_field_u8(min_pw), 3485 __req_field_u32(min_pri), 3486 __req_field_u32(max_pri), 3487 __req_field_u8(max_pw), 3488 __req_field_u8(min_crbn), 3489 __req_field_u8(max_crbn), 3490 __req_field_u8(min_stgpn), 3491 __req_field_u8(max_stgpn), 3492 __req_field_u8(min_stgpr), 3493 __req_field_u32(min_stgpr_diff), 3494 #undef __req_field_u8 3495 #undef __req_field_u32 3496 }; 3497 3498 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3499 &req, sizeof(req), true); 3500 } 3501 3502 static int 3503 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3504 struct cfg80211_chan_def *chandef, 3505 int cmd) 3506 { 3507 struct mt7996_dev *dev = phy->dev; 3508 struct mt76_phy *mphy = phy->mt76; 3509 struct ieee80211_channel *chan = mphy->chandef.chan; 3510 int freq = mphy->chandef.center_freq1; 3511 struct mt7996_mcu_background_chain_ctrl req = { 3512 .tag = cpu_to_le16(0), 3513 .len = cpu_to_le16(sizeof(req) - 4), 3514 .monitor_scan_type = 2, /* simple rx */ 3515 }; 3516 3517 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3518 return -EINVAL; 3519 3520 if (!cfg80211_chandef_valid(&mphy->chandef)) 3521 return -EINVAL; 3522 3523 switch (cmd) { 3524 case CH_SWITCH_BACKGROUND_SCAN_START: { 3525 req.chan = chan->hw_value; 3526 req.central_chan = ieee80211_frequency_to_channel(freq); 3527 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3528 req.monitor_chan = chandef->chan->hw_value; 3529 req.monitor_central_chan = 3530 ieee80211_frequency_to_channel(chandef->center_freq1); 3531 req.monitor_bw = mt76_connac_chan_bw(chandef); 3532 req.band_idx = phy->mt76->band_idx; 3533 req.scan_mode = 1; 3534 break; 3535 } 3536 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3537 req.monitor_chan = chandef->chan->hw_value; 3538 req.monitor_central_chan = 3539 ieee80211_frequency_to_channel(chandef->center_freq1); 3540 req.band_idx = phy->mt76->band_idx; 3541 req.scan_mode = 2; 3542 break; 3543 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3544 req.chan = chan->hw_value; 3545 req.central_chan = ieee80211_frequency_to_channel(freq); 3546 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3547 req.tx_stream = hweight8(mphy->antenna_mask); 3548 req.rx_stream = mphy->antenna_mask; 3549 break; 3550 default: 3551 return -EINVAL; 3552 } 3553 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3554 3555 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 3556 &req, sizeof(req), false); 3557 } 3558 3559 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 3560 struct cfg80211_chan_def *chandef) 3561 { 3562 struct mt7996_dev *dev = phy->dev; 3563 int err, region, rdd_idx = mt7996_get_rdd_idx(phy, true); 3564 3565 if (!chandef) { /* disable offchain */ 3566 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, rdd_idx, 0); 3567 if (err) 3568 return err; 3569 3570 return mt7996_mcu_background_chain_ctrl(phy, NULL, 3571 CH_SWITCH_BACKGROUND_SCAN_STOP); 3572 } 3573 3574 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 3575 CH_SWITCH_BACKGROUND_SCAN_START); 3576 if (err) 3577 return err; 3578 3579 switch (dev->mt76.region) { 3580 case NL80211_DFS_ETSI: 3581 region = 0; 3582 break; 3583 case NL80211_DFS_JP: 3584 region = 2; 3585 break; 3586 case NL80211_DFS_FCC: 3587 default: 3588 region = 1; 3589 break; 3590 } 3591 3592 return mt7996_mcu_rdd_cmd(dev, RDD_START, rdd_idx, region); 3593 } 3594 3595 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 3596 { 3597 static const u8 ch_band[] = { 3598 [NL80211_BAND_2GHZ] = 0, 3599 [NL80211_BAND_5GHZ] = 1, 3600 [NL80211_BAND_6GHZ] = 2, 3601 }; 3602 struct mt7996_dev *dev = phy->dev; 3603 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3604 int freq1 = chandef->center_freq1; 3605 u8 band_idx = phy->mt76->band_idx; 3606 struct { 3607 /* fixed field */ 3608 u8 __rsv[4]; 3609 3610 __le16 tag; 3611 __le16 len; 3612 u8 control_ch; 3613 u8 center_ch; 3614 u8 bw; 3615 u8 tx_path_num; 3616 u8 rx_path; /* mask or num */ 3617 u8 switch_reason; 3618 u8 band_idx; 3619 u8 center_ch2; /* for 80+80 only */ 3620 __le16 cac_case; 3621 u8 channel_band; 3622 u8 rsv0; 3623 __le32 outband_freq; 3624 u8 txpower_drop; 3625 u8 ap_bw; 3626 u8 ap_center_ch; 3627 u8 rsv1[53]; 3628 } __packed req = { 3629 .tag = cpu_to_le16(tag), 3630 .len = cpu_to_le16(sizeof(req) - 4), 3631 .control_ch = chandef->chan->hw_value, 3632 .center_ch = ieee80211_frequency_to_channel(freq1), 3633 .bw = mt76_connac_chan_bw(chandef), 3634 .tx_path_num = hweight16(phy->mt76->chainmask), 3635 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx], 3636 .band_idx = band_idx, 3637 .channel_band = ch_band[chandef->chan->band], 3638 }; 3639 3640 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 3641 req.switch_reason = CH_SWITCH_NORMAL; 3642 else if (phy->mt76->offchannel || 3643 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 3644 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 3645 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 3646 NL80211_IFTYPE_AP)) 3647 req.switch_reason = CH_SWITCH_DFS; 3648 else 3649 req.switch_reason = CH_SWITCH_NORMAL; 3650 3651 if (tag == UNI_CHANNEL_SWITCH) 3652 req.rx_path = hweight8(req.rx_path); 3653 3654 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 3655 int freq2 = chandef->center_freq2; 3656 3657 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 3658 } 3659 3660 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 3661 &req, sizeof(req), true); 3662 } 3663 3664 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 3665 { 3666 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 3667 #define PAGE_IDX_MASK GENMASK(4, 2) 3668 #define PER_PAGE_SIZE 0x400 3669 struct mt7996_mcu_eeprom req = { 3670 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3671 .buffer_mode = EE_MODE_BUFFER 3672 }; 3673 u16 eeprom_size = MT7996_EEPROM_SIZE; 3674 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 3675 u8 *eep = (u8 *)dev->mt76.eeprom.data; 3676 int eep_len, i; 3677 3678 for (i = 0; i < total; i++, eep += eep_len) { 3679 struct sk_buff *skb; 3680 int ret, msg_len; 3681 3682 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 3683 eep_len = eeprom_size % PER_PAGE_SIZE; 3684 else 3685 eep_len = PER_PAGE_SIZE; 3686 3687 msg_len = sizeof(req) + eep_len; 3688 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 3689 if (!skb) 3690 return -ENOMEM; 3691 3692 req.len = cpu_to_le16(msg_len - 4); 3693 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 3694 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 3695 req.buf_len = cpu_to_le16(eep_len); 3696 3697 skb_put_data(skb, &req, sizeof(req)); 3698 skb_put_data(skb, eep, eep_len); 3699 3700 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 3701 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 3702 if (ret) 3703 return ret; 3704 } 3705 3706 return 0; 3707 } 3708 3709 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 3710 { 3711 struct mt7996_mcu_eeprom req = { 3712 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3713 .len = cpu_to_le16(sizeof(req) - 4), 3714 .buffer_mode = EE_MODE_EFUSE, 3715 .format = EE_FORMAT_WHOLE 3716 }; 3717 3718 if (dev->flash_mode) 3719 return mt7996_mcu_set_eeprom_flash(dev); 3720 3721 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 3722 &req, sizeof(req), true); 3723 } 3724 3725 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len) 3726 { 3727 struct { 3728 u8 _rsv[4]; 3729 3730 __le16 tag; 3731 __le16 len; 3732 __le32 addr; 3733 __le32 valid; 3734 u8 data[16]; 3735 } __packed req = { 3736 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 3737 .len = cpu_to_le16(sizeof(req) - 4), 3738 .addr = cpu_to_le32(round_down(offset, 3739 MT7996_EEPROM_BLOCK_SIZE)), 3740 }; 3741 struct sk_buff *skb; 3742 bool valid; 3743 int ret; 3744 3745 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3746 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 3747 &req, sizeof(req), true, &skb); 3748 if (ret) 3749 return ret; 3750 3751 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 3752 if (valid) { 3753 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3754 3755 if (!buf) 3756 buf = (u8 *)dev->mt76.eeprom.data + addr; 3757 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE) 3758 buf_len = MT7996_EEPROM_BLOCK_SIZE; 3759 3760 skb_pull(skb, 48); 3761 memcpy(buf, skb->data, buf_len); 3762 } else { 3763 ret = -EINVAL; 3764 } 3765 3766 dev_kfree_skb(skb); 3767 3768 return ret; 3769 } 3770 3771 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 3772 { 3773 struct { 3774 u8 _rsv[4]; 3775 3776 __le16 tag; 3777 __le16 len; 3778 u8 num; 3779 u8 version; 3780 u8 die_idx; 3781 u8 _rsv2; 3782 } __packed req = { 3783 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 3784 .len = cpu_to_le16(sizeof(req) - 4), 3785 .version = 2, 3786 }; 3787 struct sk_buff *skb; 3788 int ret; 3789 3790 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3791 sizeof(req), true, &skb); 3792 if (ret) 3793 return ret; 3794 3795 *block_num = *(u8 *)(skb->data + 8); 3796 dev_kfree_skb(skb); 3797 3798 return 0; 3799 } 3800 3801 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3802 { 3803 #define NIC_CAP 3 3804 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3805 struct { 3806 u8 _rsv[4]; 3807 3808 __le16 tag; 3809 __le16 len; 3810 } __packed req = { 3811 .tag = cpu_to_le16(NIC_CAP), 3812 .len = cpu_to_le16(sizeof(req) - 4), 3813 }; 3814 struct sk_buff *skb; 3815 u8 *buf; 3816 int ret; 3817 3818 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3819 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3820 sizeof(req), true, &skb); 3821 if (ret) 3822 return ret; 3823 3824 /* fixed field */ 3825 skb_pull(skb, 4); 3826 3827 buf = skb->data; 3828 while (buf - skb->data < skb->len) { 3829 struct tlv *tlv = (struct tlv *)buf; 3830 3831 switch (le16_to_cpu(tlv->tag)) { 3832 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3833 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3834 break; 3835 default: 3836 break; 3837 } 3838 3839 buf += le16_to_cpu(tlv->len); 3840 } 3841 3842 dev_kfree_skb(skb); 3843 3844 return 0; 3845 } 3846 3847 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3848 { 3849 enum { 3850 IDX_TX_TIME, 3851 IDX_RX_TIME, 3852 IDX_OBSS_AIRTIME, 3853 IDX_NON_WIFI_TIME, 3854 IDX_NUM 3855 }; 3856 struct { 3857 struct { 3858 u8 band; 3859 u8 __rsv[3]; 3860 } hdr; 3861 struct { 3862 __le16 tag; 3863 __le16 len; 3864 __le32 offs; 3865 } data[IDX_NUM]; 3866 } __packed req = { 3867 .hdr.band = phy->mt76->band_idx, 3868 }; 3869 static const u32 offs[] = { 3870 [IDX_TX_TIME] = UNI_MIB_TX_TIME, 3871 [IDX_RX_TIME] = UNI_MIB_RX_TIME, 3872 [IDX_OBSS_AIRTIME] = UNI_MIB_OBSS_AIRTIME, 3873 [IDX_NON_WIFI_TIME] = UNI_MIB_NON_WIFI_TIME, 3874 }; 3875 struct mt76_channel_state *state = phy->mt76->chan_state; 3876 struct mt76_channel_state *state_ts = &phy->state_ts; 3877 struct mt7996_dev *dev = phy->dev; 3878 struct mt7996_mcu_mib *res; 3879 struct sk_buff *skb; 3880 int i, ret; 3881 3882 for (i = 0; i < IDX_NUM; i++) { 3883 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3884 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3885 req.data[i].offs = cpu_to_le32(offs[i]); 3886 } 3887 3888 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3889 &req, sizeof(req), true, &skb); 3890 if (ret) 3891 return ret; 3892 3893 skb_pull(skb, sizeof(req.hdr)); 3894 3895 res = (struct mt7996_mcu_mib *)(skb->data); 3896 3897 if (chan_switch) 3898 goto out; 3899 3900 #define __res_u64(s) le64_to_cpu(res[s].data) 3901 state->cc_tx += __res_u64(IDX_TX_TIME) - state_ts->cc_tx; 3902 state->cc_bss_rx += __res_u64(IDX_RX_TIME) - state_ts->cc_bss_rx; 3903 state->cc_rx += __res_u64(IDX_RX_TIME) + 3904 __res_u64(IDX_OBSS_AIRTIME) - 3905 state_ts->cc_rx; 3906 state->cc_busy += __res_u64(IDX_TX_TIME) + 3907 __res_u64(IDX_RX_TIME) + 3908 __res_u64(IDX_OBSS_AIRTIME) + 3909 __res_u64(IDX_NON_WIFI_TIME) - 3910 state_ts->cc_busy; 3911 out: 3912 state_ts->cc_tx = __res_u64(IDX_TX_TIME); 3913 state_ts->cc_bss_rx = __res_u64(IDX_RX_TIME); 3914 state_ts->cc_rx = __res_u64(IDX_RX_TIME) + __res_u64(IDX_OBSS_AIRTIME); 3915 state_ts->cc_busy = __res_u64(IDX_TX_TIME) + 3916 __res_u64(IDX_RX_TIME) + 3917 __res_u64(IDX_OBSS_AIRTIME) + 3918 __res_u64(IDX_NON_WIFI_TIME); 3919 #undef __res_u64 3920 3921 dev_kfree_skb(skb); 3922 3923 return 0; 3924 } 3925 3926 int mt7996_mcu_get_temperature(struct mt7996_phy *phy) 3927 { 3928 #define TEMPERATURE_QUERY 0 3929 #define GET_TEMPERATURE 0 3930 struct { 3931 u8 _rsv[4]; 3932 3933 __le16 tag; 3934 __le16 len; 3935 3936 u8 rsv1; 3937 u8 action; 3938 u8 band_idx; 3939 u8 rsv2; 3940 } req = { 3941 .tag = cpu_to_le16(TEMPERATURE_QUERY), 3942 .len = cpu_to_le16(sizeof(req) - 4), 3943 .action = GET_TEMPERATURE, 3944 .band_idx = phy->mt76->band_idx, 3945 }; 3946 struct mt7996_mcu_thermal { 3947 u8 _rsv[4]; 3948 3949 __le16 tag; 3950 __le16 len; 3951 3952 __le32 rsv; 3953 __le32 temperature; 3954 } __packed * res; 3955 struct sk_buff *skb; 3956 int ret; 3957 u32 temp; 3958 3959 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3960 &req, sizeof(req), true, &skb); 3961 if (ret) 3962 return ret; 3963 3964 res = (void *)skb->data; 3965 temp = le32_to_cpu(res->temperature); 3966 dev_kfree_skb(skb); 3967 3968 return temp; 3969 } 3970 3971 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state) 3972 { 3973 struct { 3974 u8 _rsv[4]; 3975 3976 __le16 tag; 3977 __le16 len; 3978 3979 struct mt7996_mcu_thermal_ctrl ctrl; 3980 } __packed req = { 3981 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG), 3982 .len = cpu_to_le16(sizeof(req) - 4), 3983 .ctrl = { 3984 .band_idx = phy->mt76->band_idx, 3985 }, 3986 }; 3987 int level, ret; 3988 3989 /* set duty cycle and level */ 3990 for (level = 0; level < 4; level++) { 3991 req.ctrl.duty.duty_level = level; 3992 req.ctrl.duty.duty_cycle = state; 3993 state /= 2; 3994 3995 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3996 &req, sizeof(req), false); 3997 if (ret) 3998 return ret; 3999 } 4000 4001 return 0; 4002 } 4003 4004 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable) 4005 { 4006 #define SUSTAIN_PERIOD 10 4007 struct { 4008 u8 _rsv[4]; 4009 4010 __le16 tag; 4011 __le16 len; 4012 4013 struct mt7996_mcu_thermal_ctrl ctrl; 4014 struct mt7996_mcu_thermal_enable enable; 4015 } __packed req = { 4016 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)), 4017 .ctrl = { 4018 .band_idx = phy->mt76->band_idx, 4019 .type.protect_type = 1, 4020 .type.trigger_type = 1, 4021 }, 4022 }; 4023 int ret; 4024 4025 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE); 4026 4027 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4028 &req, sizeof(req) - sizeof(req.enable), false); 4029 if (ret || !enable) 4030 return ret; 4031 4032 /* set high-temperature trigger threshold */ 4033 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE); 4034 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]); 4035 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 4036 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD); 4037 4038 req.len = cpu_to_le16(sizeof(req) - 4); 4039 4040 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4041 &req, sizeof(req), false); 4042 } 4043 4044 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 4045 { 4046 struct { 4047 u8 rsv[4]; 4048 4049 __le16 tag; 4050 __le16 len; 4051 4052 union { 4053 struct { 4054 __le32 mask; 4055 } __packed set; 4056 4057 struct { 4058 u8 method; 4059 u8 band; 4060 u8 rsv2[2]; 4061 } __packed trigger; 4062 }; 4063 } __packed req = { 4064 .tag = cpu_to_le16(action), 4065 .len = cpu_to_le16(sizeof(req) - 4), 4066 }; 4067 4068 switch (action) { 4069 case UNI_CMD_SER_SET: 4070 req.set.mask = cpu_to_le32(val); 4071 break; 4072 case UNI_CMD_SER_TRIGGER: 4073 req.trigger.method = val; 4074 req.trigger.band = band; 4075 break; 4076 default: 4077 return -EINVAL; 4078 } 4079 4080 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 4081 &req, sizeof(req), false); 4082 } 4083 4084 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 4085 { 4086 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 4087 #define BF_PROCESSING 4 4088 struct uni_header hdr; 4089 struct sk_buff *skb; 4090 struct tlv *tlv; 4091 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 4092 4093 memset(&hdr, 0, sizeof(hdr)); 4094 4095 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 4096 if (!skb) 4097 return -ENOMEM; 4098 4099 skb_put_data(skb, &hdr, sizeof(hdr)); 4100 4101 switch (action) { 4102 case BF_SOUNDING_ON: { 4103 struct bf_sounding_on *req_snd_on; 4104 4105 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 4106 req_snd_on = (struct bf_sounding_on *)tlv; 4107 req_snd_on->snd_mode = BF_PROCESSING; 4108 break; 4109 } 4110 case BF_HW_EN_UPDATE: { 4111 struct bf_hw_en_status_update *req_hw_en; 4112 4113 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 4114 req_hw_en = (struct bf_hw_en_status_update *)tlv; 4115 req_hw_en->ebf = true; 4116 req_hw_en->ibf = dev->ibf; 4117 break; 4118 } 4119 case BF_MOD_EN_CTRL: { 4120 struct bf_mod_en_ctrl *req_mod_en; 4121 4122 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 4123 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 4124 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2; 4125 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ? 4126 GENMASK(2, 0) : GENMASK(1, 0); 4127 break; 4128 } 4129 default: 4130 return -EINVAL; 4131 } 4132 4133 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 4134 } 4135 4136 static int 4137 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 4138 { 4139 struct mt7996_dev *dev = phy->dev; 4140 struct { 4141 u8 band_idx; 4142 u8 __rsv[3]; 4143 4144 __le16 tag; 4145 __le16 len; 4146 4147 __le32 val; 4148 } __packed req = { 4149 .band_idx = phy->mt76->band_idx, 4150 .tag = cpu_to_le16(action), 4151 .len = cpu_to_le16(sizeof(req) - 4), 4152 .val = cpu_to_le32(val), 4153 }; 4154 4155 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4156 &req, sizeof(req), true); 4157 } 4158 4159 static int 4160 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 4161 struct ieee80211_he_obss_pd *he_obss_pd) 4162 { 4163 struct mt7996_dev *dev = phy->dev; 4164 u8 max_th = 82, non_srg_max_th = 62; 4165 struct { 4166 u8 band_idx; 4167 u8 __rsv[3]; 4168 4169 __le16 tag; 4170 __le16 len; 4171 4172 u8 pd_th_non_srg; 4173 u8 pd_th_srg; 4174 u8 period_offs; 4175 u8 rcpi_src; 4176 __le16 obss_pd_min; 4177 __le16 obss_pd_min_srg; 4178 u8 resp_txpwr_mode; 4179 u8 txpwr_restrict_mode; 4180 u8 txpwr_ref; 4181 u8 __rsv2[3]; 4182 } __packed req = { 4183 .band_idx = phy->mt76->band_idx, 4184 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 4185 .len = cpu_to_le16(sizeof(req) - 4), 4186 .obss_pd_min = cpu_to_le16(max_th), 4187 .obss_pd_min_srg = cpu_to_le16(max_th), 4188 .txpwr_restrict_mode = 2, 4189 .txpwr_ref = 21 4190 }; 4191 int ret; 4192 4193 /* disable firmware dynamical PD asjustment */ 4194 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 4195 if (ret) 4196 return ret; 4197 4198 if (he_obss_pd->sr_ctrl & 4199 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 4200 req.pd_th_non_srg = max_th; 4201 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 4202 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 4203 else 4204 req.pd_th_non_srg = non_srg_max_th; 4205 4206 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 4207 req.pd_th_srg = max_th - he_obss_pd->max_offset; 4208 4209 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4210 &req, sizeof(req), true); 4211 } 4212 4213 static int 4214 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, 4215 struct mt7996_vif_link *link, 4216 struct ieee80211_he_obss_pd *he_obss_pd) 4217 { 4218 struct mt7996_dev *dev = phy->dev; 4219 u8 omac = link->mt76.omac_idx; 4220 struct { 4221 u8 band_idx; 4222 u8 __rsv[3]; 4223 4224 __le16 tag; 4225 __le16 len; 4226 4227 u8 omac; 4228 u8 __rsv2[3]; 4229 u8 flag[20]; 4230 } __packed req = { 4231 .band_idx = phy->mt76->band_idx, 4232 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 4233 .len = cpu_to_le16(sizeof(req) - 4), 4234 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 4235 }; 4236 int ret; 4237 4238 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 4239 req.flag[req.omac] = 0xf; 4240 else 4241 return 0; 4242 4243 /* switch to normal AP mode */ 4244 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 4245 if (ret) 4246 return ret; 4247 4248 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4249 &req, sizeof(req), true); 4250 } 4251 4252 static int 4253 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 4254 struct ieee80211_he_obss_pd *he_obss_pd) 4255 { 4256 struct mt7996_dev *dev = phy->dev; 4257 struct { 4258 u8 band_idx; 4259 u8 __rsv[3]; 4260 4261 __le16 tag; 4262 __le16 len; 4263 4264 __le32 color_l[2]; 4265 __le32 color_h[2]; 4266 __le32 bssid_l[2]; 4267 __le32 bssid_h[2]; 4268 } __packed req = { 4269 .band_idx = phy->mt76->band_idx, 4270 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 4271 .len = cpu_to_le16(sizeof(req) - 4), 4272 }; 4273 u32 bitmap; 4274 4275 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 4276 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 4277 4278 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 4279 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 4280 4281 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 4282 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 4283 4284 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 4285 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 4286 4287 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 4288 sizeof(req), true); 4289 } 4290 4291 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, 4292 struct mt7996_vif_link *link, 4293 struct ieee80211_he_obss_pd *he_obss_pd) 4294 { 4295 int ret; 4296 4297 /* enable firmware scene detection algorithms */ 4298 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 4299 sr_scene_detect); 4300 if (ret) 4301 return ret; 4302 4303 /* firmware dynamically adjusts PD threshold so skip manual control */ 4304 if (sr_scene_detect && !he_obss_pd->enable) 4305 return 0; 4306 4307 /* enable spatial reuse */ 4308 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 4309 he_obss_pd->enable); 4310 if (ret) 4311 return ret; 4312 4313 if (sr_scene_detect || !he_obss_pd->enable) 4314 return 0; 4315 4316 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 4317 if (ret) 4318 return ret; 4319 4320 /* set SRG/non-SRG OBSS PD threshold */ 4321 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 4322 if (ret) 4323 return ret; 4324 4325 /* Set SR prohibit */ 4326 ret = mt7996_mcu_set_obss_spr_siga(phy, link, he_obss_pd); 4327 if (ret) 4328 return ret; 4329 4330 /* set SRG BSS color/BSSID bitmap */ 4331 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 4332 } 4333 4334 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 4335 struct mt76_vif_link *mlink, 4336 struct cfg80211_he_bss_color *he_bss_color) 4337 { 4338 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 4339 struct bss_color_tlv *bss_color; 4340 struct sk_buff *skb; 4341 struct tlv *tlv; 4342 4343 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, len); 4344 if (IS_ERR(skb)) 4345 return PTR_ERR(skb); 4346 4347 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 4348 sizeof(*bss_color)); 4349 bss_color = (struct bss_color_tlv *)tlv; 4350 bss_color->enable = he_bss_color->enabled; 4351 bss_color->color = he_bss_color->color; 4352 4353 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4354 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 4355 } 4356 4357 #define TWT_AGRT_TRIGGER BIT(0) 4358 #define TWT_AGRT_ANNOUNCE BIT(1) 4359 #define TWT_AGRT_PROTECT BIT(2) 4360 4361 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 4362 struct mt7996_vif_link *link, 4363 struct mt7996_twt_flow *flow, 4364 int cmd) 4365 { 4366 struct { 4367 /* fixed field */ 4368 u8 bss; 4369 u8 _rsv[3]; 4370 4371 __le16 tag; 4372 __le16 len; 4373 u8 tbl_idx; 4374 u8 cmd; 4375 u8 own_mac_idx; 4376 u8 flowid; /* 0xff for group id */ 4377 __le16 peer_id; /* specify the peer_id (msb=0) 4378 * or group_id (msb=1) 4379 */ 4380 u8 duration; /* 256 us */ 4381 u8 bss_idx; 4382 __le64 start_tsf; 4383 __le16 mantissa; 4384 u8 exponent; 4385 u8 is_ap; 4386 u8 agrt_params; 4387 u8 __rsv2[23]; 4388 } __packed req = { 4389 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 4390 .len = cpu_to_le16(sizeof(req) - 4), 4391 .tbl_idx = flow->table_id, 4392 .cmd = cmd, 4393 .own_mac_idx = link->mt76.omac_idx, 4394 .flowid = flow->id, 4395 .peer_id = cpu_to_le16(flow->wcid), 4396 .duration = flow->duration, 4397 .bss = link->mt76.idx, 4398 .bss_idx = link->mt76.idx, 4399 .start_tsf = cpu_to_le64(flow->tsf), 4400 .mantissa = flow->mantissa, 4401 .exponent = flow->exp, 4402 .is_ap = true, 4403 }; 4404 4405 if (flow->protection) 4406 req.agrt_params |= TWT_AGRT_PROTECT; 4407 if (!flow->flowtype) 4408 req.agrt_params |= TWT_AGRT_ANNOUNCE; 4409 if (flow->trigger) 4410 req.agrt_params |= TWT_AGRT_TRIGGER; 4411 4412 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 4413 &req, sizeof(req), true); 4414 } 4415 4416 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 4417 { 4418 struct { 4419 u8 band_idx; 4420 u8 _rsv[3]; 4421 4422 __le16 tag; 4423 __le16 len; 4424 __le32 len_thresh; 4425 __le32 pkt_thresh; 4426 } __packed req = { 4427 .band_idx = phy->mt76->band_idx, 4428 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 4429 .len = cpu_to_le16(sizeof(req) - 4), 4430 .len_thresh = cpu_to_le32(val), 4431 .pkt_thresh = cpu_to_le32(0x2), 4432 }; 4433 4434 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4435 &req, sizeof(req), true); 4436 } 4437 4438 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 4439 { 4440 struct { 4441 u8 band_idx; 4442 u8 _rsv[3]; 4443 4444 __le16 tag; 4445 __le16 len; 4446 u8 enable; 4447 u8 _rsv2[3]; 4448 } __packed req = { 4449 .band_idx = phy->mt76->band_idx, 4450 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 4451 .len = cpu_to_le16(sizeof(req) - 4), 4452 .enable = enable, 4453 }; 4454 4455 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4456 &req, sizeof(req), true); 4457 } 4458 4459 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 rdd_idx, u8 val) 4460 { 4461 struct { 4462 u8 _rsv[4]; 4463 4464 __le16 tag; 4465 __le16 len; 4466 4467 u8 ctrl; 4468 u8 rdd_idx; 4469 u8 rdd_rx_sel; 4470 u8 val; 4471 u8 rsv[4]; 4472 } __packed req = { 4473 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 4474 .len = cpu_to_le16(sizeof(req) - 4), 4475 .ctrl = cmd, 4476 .rdd_idx = rdd_idx, 4477 .val = val, 4478 }; 4479 4480 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 4481 &req, sizeof(req), true); 4482 } 4483 4484 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 4485 struct ieee80211_vif *vif, 4486 struct mt7996_vif_link *link, 4487 struct mt7996_sta_link *msta_link) 4488 { 4489 struct sk_buff *skb; 4490 4491 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 4492 &msta_link->wcid, 4493 MT7996_STA_UPDATE_MAX_SIZE); 4494 if (IS_ERR(skb)) 4495 return PTR_ERR(skb); 4496 4497 /* starec hdr trans */ 4498 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, &msta_link->wcid); 4499 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4500 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 4501 } 4502 4503 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 4504 u16 rate_idx, bool beacon) 4505 { 4506 #define UNI_FIXED_RATE_TABLE_SET 0 4507 #define SPE_IXD_SELECT_TXD 0 4508 #define SPE_IXD_SELECT_BMC_WTBL 1 4509 struct mt7996_dev *dev = phy->dev; 4510 struct fixed_rate_table_ctrl req = { 4511 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET), 4512 .len = cpu_to_le16(sizeof(req) - 4), 4513 .table_idx = table_idx, 4514 .rate_idx = cpu_to_le16(rate_idx), 4515 .gi = 1, 4516 .he_ltf = 1, 4517 }; 4518 u8 band_idx = phy->mt76->band_idx; 4519 4520 if (beacon) { 4521 req.spe_idx_sel = SPE_IXD_SELECT_TXD; 4522 req.spe_idx = 24 + band_idx; 4523 phy->beacon_rate = rate_idx; 4524 } else { 4525 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL; 4526 } 4527 4528 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE), 4529 &req, sizeof(req), false); 4530 } 4531 4532 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 4533 { 4534 struct { 4535 u8 __rsv1[4]; 4536 4537 __le16 tag; 4538 __le16 len; 4539 __le16 idx; 4540 u8 __rsv2[2]; 4541 __le32 ofs; 4542 __le32 data; 4543 } __packed *res, req = { 4544 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 4545 .len = cpu_to_le16(sizeof(req) - 4), 4546 4547 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 4548 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4549 .data = set ? cpu_to_le32(*val) : 0, 4550 }; 4551 struct sk_buff *skb; 4552 int ret; 4553 4554 if (set) 4555 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 4556 &req, sizeof(req), true); 4557 4558 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 4559 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 4560 &req, sizeof(req), true, &skb); 4561 if (ret) 4562 return ret; 4563 4564 res = (void *)skb->data; 4565 *val = le32_to_cpu(res->data); 4566 dev_kfree_skb(skb); 4567 4568 return 0; 4569 } 4570 4571 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 4572 { 4573 struct { 4574 __le16 tag; 4575 __le16 len; 4576 u8 enable; 4577 u8 rsv[3]; 4578 } __packed req = { 4579 .len = cpu_to_le16(sizeof(req) - 4), 4580 .enable = true, 4581 }; 4582 4583 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 4584 &req, sizeof(req), false); 4585 } 4586 4587 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val) 4588 { 4589 struct { 4590 u8 __rsv1[4]; 4591 __le16 tag; 4592 __le16 len; 4593 union { 4594 struct { 4595 u8 type; 4596 u8 __rsv2[3]; 4597 } __packed platform_type; 4598 struct { 4599 u8 type; 4600 u8 dest; 4601 u8 __rsv2[2]; 4602 } __packed bypass_mode; 4603 struct { 4604 u8 path; 4605 u8 __rsv2[3]; 4606 } __packed txfree_path; 4607 struct { 4608 __le16 flush_one; 4609 __le16 flush_all; 4610 u8 __rsv2[4]; 4611 } __packed timeout; 4612 }; 4613 } __packed req = { 4614 .tag = cpu_to_le16(tag), 4615 .len = cpu_to_le16(sizeof(req) - 4), 4616 }; 4617 4618 switch (tag) { 4619 case UNI_RRO_SET_PLATFORM_TYPE: 4620 req.platform_type.type = val; 4621 break; 4622 case UNI_RRO_SET_BYPASS_MODE: 4623 req.bypass_mode.type = val; 4624 break; 4625 case UNI_RRO_SET_TXFREE_PATH: 4626 req.txfree_path.path = val; 4627 break; 4628 case UNI_RRO_SET_FLUSH_TIMEOUT: 4629 req.timeout.flush_one = cpu_to_le16(val); 4630 req.timeout.flush_all = cpu_to_le16(2 * val); 4631 break; 4632 default: 4633 return -EINVAL; 4634 } 4635 4636 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4637 sizeof(req), true); 4638 } 4639 4640 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 4641 { 4642 struct mt7996_dev *dev = phy->dev; 4643 struct { 4644 u8 _rsv[4]; 4645 4646 __le16 tag; 4647 __le16 len; 4648 } __packed req = { 4649 .tag = cpu_to_le16(tag), 4650 .len = cpu_to_le16(sizeof(req) - 4), 4651 }; 4652 4653 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 4654 &req, sizeof(req), false); 4655 } 4656 4657 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id) 4658 { 4659 struct { 4660 u8 __rsv[4]; 4661 4662 __le16 tag; 4663 __le16 len; 4664 __le16 session_id; 4665 u8 pad[4]; 4666 } __packed req = { 4667 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION), 4668 .len = cpu_to_le16(sizeof(req) - 4), 4669 .session_id = cpu_to_le16(id), 4670 }; 4671 4672 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4673 sizeof(req), true); 4674 } 4675 4676 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled) 4677 { 4678 struct mt7996_dev *dev = phy->dev; 4679 struct { 4680 u8 band_idx; 4681 u8 _rsv[3]; 4682 __le16 tag; 4683 __le16 len; 4684 u8 enable; 4685 u8 _pad[3]; 4686 } __packed req = { 4687 .band_idx = phy->mt76->band_idx, 4688 .tag = 0, 4689 .len = cpu_to_le16(sizeof(req) - 4), 4690 .enable = enabled, 4691 }; 4692 4693 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SNIFFER), &req, 4694 sizeof(req), true); 4695 } 4696 4697 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) 4698 { 4699 #define TX_POWER_LIMIT_TABLE_RATE 0 4700 struct mt7996_dev *dev = phy->dev; 4701 struct mt76_phy *mphy = phy->mt76; 4702 struct tx_power_limit_table_ctrl { 4703 u8 __rsv1[4]; 4704 4705 __le16 tag; 4706 __le16 len; 4707 u8 power_ctrl_id; 4708 u8 power_limit_type; 4709 u8 band_idx; 4710 } __packed req = { 4711 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL), 4712 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4), 4713 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL, 4714 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE, 4715 .band_idx = phy->mt76->band_idx, 4716 }; 4717 struct mt76_power_limits la = {}; 4718 struct sk_buff *skb; 4719 int i, tx_power; 4720 4721 tx_power = mt76_get_power_bound(mphy, phy->txpower); 4722 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 4723 &la, tx_power); 4724 mphy->txpower_cur = tx_power; 4725 4726 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 4727 sizeof(req) + MT7996_SKU_PATH_NUM); 4728 if (!skb) 4729 return -ENOMEM; 4730 4731 skb_put_data(skb, &req, sizeof(req)); 4732 /* cck and ofdm */ 4733 skb_put_data(skb, &la.cck, sizeof(la.cck)); 4734 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm)); 4735 /* ht20 */ 4736 skb_put_data(skb, &la.mcs[0], 8); 4737 /* ht40 */ 4738 skb_put_data(skb, &la.mcs[1], 9); 4739 4740 /* vht */ 4741 for (i = 0; i < 4; i++) { 4742 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); 4743 skb_put_zero(skb, 2); /* padding */ 4744 } 4745 4746 /* he */ 4747 skb_put_data(skb, &la.ru[0], sizeof(la.ru)); 4748 /* eht */ 4749 skb_put_data(skb, &la.eht[0], sizeof(la.eht)); 4750 4751 /* padding */ 4752 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM); 4753 4754 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4755 MCU_WM_UNI_CMD(TXPOWER), true); 4756 } 4757 4758 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode) 4759 { 4760 __le32 cp_mode; 4761 4762 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) || 4763 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO)) 4764 return -EINVAL; 4765 4766 if (!mt7996_has_wa(dev)) { 4767 struct { 4768 u8 _rsv[4]; 4769 4770 __le16 tag; 4771 __le16 len; 4772 u8 cp_mode; 4773 u8 rsv[3]; 4774 } __packed req = { 4775 .tag = cpu_to_le16(UNI_CMD_SDO_CP_MODE), 4776 .len = cpu_to_le16(sizeof(req) - 4), 4777 .cp_mode = mode, 4778 }; 4779 4780 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(SDO), 4781 &req, sizeof(req), false); 4782 } 4783 4784 cp_mode = cpu_to_le32(mode); 4785 4786 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT), 4787 &cp_mode, sizeof(cp_mode), true); 4788 } 4789