1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 struct mt7996_patch_hdr { 14 char build_date[16]; 15 char platform[4]; 16 __be32 hw_sw_ver; 17 __be32 patch_ver; 18 __be16 checksum; 19 u16 reserved; 20 struct { 21 __be32 patch_ver; 22 __be32 subsys; 23 __be32 feature; 24 __be32 n_region; 25 __be32 crc; 26 u32 reserved[11]; 27 } desc; 28 } __packed; 29 30 struct mt7996_patch_sec { 31 __be32 type; 32 __be32 offs; 33 __be32 size; 34 union { 35 __be32 spec[13]; 36 struct { 37 __be32 addr; 38 __be32 len; 39 __be32 sec_key_idx; 40 __be32 align_len; 41 u32 reserved[9]; 42 } info; 43 }; 44 } __packed; 45 46 struct mt7996_fw_trailer { 47 u8 chip_id; 48 u8 eco_code; 49 u8 n_region; 50 u8 format_ver; 51 u8 format_flag; 52 u8 reserved[2]; 53 char fw_ver[10]; 54 char build_date[15]; 55 u32 crc; 56 } __packed; 57 58 struct mt7996_fw_region { 59 __le32 decomp_crc; 60 __le32 decomp_len; 61 __le32 decomp_blk_sz; 62 u8 reserved[4]; 63 __le32 addr; 64 __le32 len; 65 u8 feature_set; 66 u8 reserved1[15]; 67 } __packed; 68 69 #define MCU_PATCH_ADDRESS 0x200000 70 71 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 72 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 73 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 74 75 static bool sr_scene_detect = true; 76 module_param(sr_scene_detect, bool, 0644); 77 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 78 79 static u8 80 mt7996_mcu_get_sta_nss(u16 mcs_map) 81 { 82 u8 nss; 83 84 for (nss = 8; nss > 0; nss--) { 85 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 86 87 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 88 break; 89 } 90 91 return nss - 1; 92 } 93 94 static void 95 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 96 u16 mcs_map) 97 { 98 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 99 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; 100 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; 101 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 102 103 for (nss = 0; nss < max_nss; nss++) { 104 int mcs; 105 106 switch ((mcs_map >> (2 * nss)) & 0x3) { 107 case IEEE80211_HE_MCS_SUPPORT_0_11: 108 mcs = GENMASK(11, 0); 109 break; 110 case IEEE80211_HE_MCS_SUPPORT_0_9: 111 mcs = GENMASK(9, 0); 112 break; 113 case IEEE80211_HE_MCS_SUPPORT_0_7: 114 mcs = GENMASK(7, 0); 115 break; 116 default: 117 mcs = 0; 118 } 119 120 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 121 122 switch (mcs) { 123 case 0 ... 7: 124 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 125 break; 126 case 8 ... 9: 127 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 128 break; 129 case 10 ... 11: 130 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 131 break; 132 default: 133 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 134 break; 135 } 136 mcs_map &= ~(0x3 << (nss * 2)); 137 mcs_map |= mcs << (nss * 2); 138 } 139 140 *he_mcs = cpu_to_le16(mcs_map); 141 } 142 143 static void 144 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 145 const u16 *mask) 146 { 147 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 148 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 149 150 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 151 switch (mcs_map & 0x3) { 152 case IEEE80211_VHT_MCS_SUPPORT_0_9: 153 mcs = GENMASK(9, 0); 154 break; 155 case IEEE80211_VHT_MCS_SUPPORT_0_8: 156 mcs = GENMASK(8, 0); 157 break; 158 case IEEE80211_VHT_MCS_SUPPORT_0_7: 159 mcs = GENMASK(7, 0); 160 break; 161 default: 162 mcs = 0; 163 } 164 165 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 166 } 167 } 168 169 static void 170 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 171 const u8 *mask) 172 { 173 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 174 175 for (nss = 0; nss < max_nss; nss++) 176 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 177 } 178 179 static int 180 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 181 struct sk_buff *skb, int seq) 182 { 183 struct mt7996_mcu_rxd *rxd; 184 struct mt7996_mcu_uni_event *event; 185 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 186 int ret = 0; 187 188 if (!skb) { 189 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 190 cmd, seq); 191 return -ETIMEDOUT; 192 } 193 194 rxd = (struct mt7996_mcu_rxd *)skb->data; 195 if (seq != rxd->seq) 196 return -EAGAIN; 197 198 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 199 skb_pull(skb, sizeof(*rxd) - 4); 200 ret = *skb->data; 201 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 202 rxd->eid == MCU_UNI_EVENT_RESULT) { 203 skb_pull(skb, sizeof(*rxd)); 204 event = (struct mt7996_mcu_uni_event *)skb->data; 205 ret = le32_to_cpu(event->status); 206 /* skip invalid event */ 207 if (mcu_cmd != event->cid) 208 ret = -EAGAIN; 209 } else { 210 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 211 } 212 213 return ret; 214 } 215 216 static int 217 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 218 int cmd, int *wait_seq) 219 { 220 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 221 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 222 struct mt76_connac2_mcu_uni_txd *uni_txd; 223 struct mt76_connac2_mcu_txd *mcu_txd; 224 enum mt76_mcuq_id qid; 225 __le32 *txd; 226 u32 val; 227 u8 seq; 228 229 mdev->mcu.timeout = 20 * HZ; 230 231 seq = ++dev->mt76.mcu.msg_seq & 0xf; 232 if (!seq) 233 seq = ++dev->mt76.mcu.msg_seq & 0xf; 234 235 if (cmd == MCU_CMD(FW_SCATTER)) { 236 qid = MT_MCUQ_FWDL; 237 goto exit; 238 } 239 240 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 241 txd = (__le32 *)skb_push(skb, txd_len); 242 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 243 qid = MT_MCUQ_WA; 244 else 245 qid = MT_MCUQ_WM; 246 247 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 248 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 249 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 250 txd[0] = cpu_to_le32(val); 251 252 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 253 txd[1] = cpu_to_le32(val); 254 255 if (cmd & __MCU_CMD_FIELD_UNI) { 256 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 257 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 258 uni_txd->cid = cpu_to_le16(mcu_cmd); 259 uni_txd->s2d_index = MCU_S2D_H2CN; 260 uni_txd->pkt_type = MCU_PKT_ID; 261 uni_txd->seq = seq; 262 263 if (cmd & __MCU_CMD_FIELD_QUERY) 264 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 265 else 266 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 267 268 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 269 uni_txd->s2d_index = MCU_S2D_H2CN; 270 else if (cmd & __MCU_CMD_FIELD_WA) 271 uni_txd->s2d_index = MCU_S2D_H2C; 272 else if (cmd & __MCU_CMD_FIELD_WM) 273 uni_txd->s2d_index = MCU_S2D_H2N; 274 275 goto exit; 276 } 277 278 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 279 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 280 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 281 MT_TX_MCU_PORT_RX_Q0)); 282 mcu_txd->pkt_type = MCU_PKT_ID; 283 mcu_txd->seq = seq; 284 285 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 286 mcu_txd->set_query = MCU_Q_NA; 287 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 288 if (mcu_txd->ext_cid) { 289 mcu_txd->ext_cid_ack = 1; 290 291 if (cmd & __MCU_CMD_FIELD_QUERY) 292 mcu_txd->set_query = MCU_Q_QUERY; 293 else 294 mcu_txd->set_query = MCU_Q_SET; 295 } 296 297 if (cmd & __MCU_CMD_FIELD_WA) 298 mcu_txd->s2d_index = MCU_S2D_H2C; 299 else 300 mcu_txd->s2d_index = MCU_S2D_H2N; 301 302 exit: 303 if (wait_seq) 304 *wait_seq = seq; 305 306 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 307 } 308 309 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 310 { 311 struct { 312 __le32 args[3]; 313 } req = { 314 .args = { 315 cpu_to_le32(a1), 316 cpu_to_le32(a2), 317 cpu_to_le32(a3), 318 }, 319 }; 320 321 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 322 } 323 324 static void 325 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 326 { 327 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 328 return; 329 330 ieee80211_csa_finish(vif); 331 } 332 333 static void 334 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 335 { 336 struct mt76_phy *mphy = &dev->mt76.phy; 337 struct mt7996_mcu_rdd_report *r; 338 339 r = (struct mt7996_mcu_rdd_report *)skb->data; 340 341 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys)) 342 return; 343 344 if (dev->rdd2_phy && r->band_idx == MT_RX_SEL2) 345 mphy = dev->rdd2_phy->mt76; 346 else 347 mphy = dev->mt76.phys[r->band_idx]; 348 349 if (!mphy) 350 return; 351 352 if (r->band_idx == MT_RX_SEL2) 353 cfg80211_background_radar_event(mphy->hw->wiphy, 354 &dev->rdd2_chandef, 355 GFP_ATOMIC); 356 else 357 ieee80211_radar_detected(mphy->hw); 358 dev->hw_pattern++; 359 } 360 361 static void 362 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 363 { 364 #define UNI_EVENT_FW_LOG_FORMAT 0 365 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 366 const char *data = (char *)&rxd[1] + 4, *type; 367 struct tlv *tlv = (struct tlv *)data; 368 int len; 369 370 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 371 len = skb->len - sizeof(*rxd); 372 data = (char *)&rxd[1]; 373 goto out; 374 } 375 376 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 377 return; 378 379 data += sizeof(*tlv) + 4; 380 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 381 382 out: 383 switch (rxd->s2d_index) { 384 case 0: 385 if (mt7996_debugfs_rx_log(dev, data, len)) 386 return; 387 388 type = "WM"; 389 break; 390 case 2: 391 type = "WA"; 392 break; 393 default: 394 type = "unknown"; 395 break; 396 } 397 398 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 399 } 400 401 static void 402 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 403 { 404 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 405 return; 406 407 ieee80211_color_change_finish(vif); 408 } 409 410 static void 411 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 412 { 413 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 414 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 415 struct header { 416 u8 band; 417 u8 rsv[3]; 418 }; 419 struct mt76_phy *mphy = &dev->mt76.phy; 420 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 421 const char *data = (char *)&rxd[1], *tail; 422 struct header *hdr = (struct header *)data; 423 struct tlv *tlv = (struct tlv *)(data + 4); 424 425 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 426 return; 427 428 if (hdr->band && dev->mt76.phys[hdr->band]) 429 mphy = dev->mt76.phys[hdr->band]; 430 431 tail = skb->data + skb->len; 432 data += sizeof(struct header); 433 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 434 switch (le16_to_cpu(tlv->tag)) { 435 case UNI_EVENT_IE_COUNTDOWN_CSA: 436 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 437 IEEE80211_IFACE_ITER_RESUME_ALL, 438 mt7996_mcu_csa_finish, mphy->hw); 439 break; 440 case UNI_EVENT_IE_COUNTDOWN_BCC: 441 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 442 IEEE80211_IFACE_ITER_RESUME_ALL, 443 mt7996_mcu_cca_finish, mphy->hw); 444 break; 445 } 446 447 data += le16_to_cpu(tlv->len); 448 tlv = (struct tlv *)data; 449 } 450 } 451 452 static void 453 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 454 { 455 struct mt7996_mcu_all_sta_info_event *res; 456 u16 i; 457 458 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 459 460 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 461 462 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 463 u8 ac; 464 u16 wlan_idx; 465 struct mt76_wcid *wcid; 466 467 switch (le16_to_cpu(res->tag)) { 468 case UNI_ALL_STA_TXRX_ADM_STAT: 469 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 470 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 471 472 if (!wcid) 473 break; 474 475 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 476 wcid->stats.tx_bytes += 477 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 478 wcid->stats.rx_bytes += 479 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 480 } 481 break; 482 case UNI_ALL_STA_TXRX_MSDU_COUNT: 483 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 484 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 485 486 if (!wcid) 487 break; 488 489 wcid->stats.tx_packets += 490 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 491 wcid->stats.rx_packets += 492 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 493 break; 494 default: 495 break; 496 } 497 } 498 } 499 500 static void 501 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 502 { 503 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 504 505 switch (rxd->ext_eid) { 506 case MCU_EXT_EVENT_FW_LOG_2_HOST: 507 mt7996_mcu_rx_log_message(dev, skb); 508 break; 509 default: 510 break; 511 } 512 } 513 514 static void 515 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 516 { 517 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 518 519 switch (rxd->eid) { 520 case MCU_EVENT_EXT: 521 mt7996_mcu_rx_ext_event(dev, skb); 522 break; 523 default: 524 break; 525 } 526 dev_kfree_skb(skb); 527 } 528 529 static void 530 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 531 { 532 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 533 534 switch (rxd->eid) { 535 case MCU_UNI_EVENT_FW_LOG_2_HOST: 536 mt7996_mcu_rx_log_message(dev, skb); 537 break; 538 case MCU_UNI_EVENT_IE_COUNTDOWN: 539 mt7996_mcu_ie_countdown(dev, skb); 540 break; 541 case MCU_UNI_EVENT_RDD_REPORT: 542 mt7996_mcu_rx_radar_detected(dev, skb); 543 break; 544 case MCU_UNI_EVENT_ALL_STA_INFO: 545 mt7996_mcu_rx_all_sta_info_event(dev, skb); 546 break; 547 default: 548 break; 549 } 550 dev_kfree_skb(skb); 551 } 552 553 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 554 { 555 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 556 557 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 558 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 559 return; 560 } 561 562 /* WA still uses legacy event*/ 563 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 564 !rxd->seq) 565 mt7996_mcu_rx_unsolicited_event(dev, skb); 566 else 567 mt76_mcu_rx_event(&dev->mt76, skb); 568 } 569 570 static struct tlv * 571 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 572 { 573 struct tlv *ptlv, tlv = { 574 .tag = cpu_to_le16(tag), 575 .len = cpu_to_le16(len), 576 }; 577 578 ptlv = skb_put(skb, len); 579 memcpy(ptlv, &tlv, sizeof(tlv)); 580 581 return ptlv; 582 } 583 584 static void 585 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 586 struct mt7996_phy *phy) 587 { 588 static const u8 rlm_ch_band[] = { 589 [NL80211_BAND_2GHZ] = 1, 590 [NL80211_BAND_5GHZ] = 2, 591 [NL80211_BAND_6GHZ] = 3, 592 }; 593 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 594 struct bss_rlm_tlv *ch; 595 struct tlv *tlv; 596 int freq1 = chandef->center_freq1; 597 598 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 599 600 ch = (struct bss_rlm_tlv *)tlv; 601 ch->control_channel = chandef->chan->hw_value; 602 ch->center_chan = ieee80211_frequency_to_channel(freq1); 603 ch->bw = mt76_connac_chan_bw(chandef); 604 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 605 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 606 ch->band = rlm_ch_band[chandef->chan->band]; 607 608 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 609 int freq2 = chandef->center_freq2; 610 611 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 612 } 613 } 614 615 static void 616 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 617 struct mt7996_phy *phy) 618 { 619 struct bss_ra_tlv *ra; 620 struct tlv *tlv; 621 622 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 623 624 ra = (struct bss_ra_tlv *)tlv; 625 ra->short_preamble = true; 626 } 627 628 static void 629 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 630 struct mt7996_phy *phy) 631 { 632 #define DEFAULT_HE_PE_DURATION 4 633 #define DEFAULT_HE_DURATION_RTS_THRES 1023 634 const struct ieee80211_sta_he_cap *cap; 635 struct bss_info_uni_he *he; 636 struct tlv *tlv; 637 638 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 639 640 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 641 642 he = (struct bss_info_uni_he *)tlv; 643 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 644 if (!he->he_pe_duration) 645 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 646 647 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 648 if (!he->he_rts_thres) 649 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 650 651 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 652 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 653 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 654 } 655 656 static void 657 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 658 struct mt7996_phy *phy, int enable) 659 { 660 struct bss_info_uni_mbssid *mbssid; 661 struct tlv *tlv; 662 663 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 664 665 mbssid = (struct bss_info_uni_mbssid *)tlv; 666 667 if (enable && vif->bss_conf.bssid_indicator) { 668 mbssid->max_indicator = vif->bss_conf.bssid_indicator; 669 mbssid->mbss_idx = vif->bss_conf.bssid_index; 670 mbssid->tx_bss_omac_idx = 0; 671 } 672 } 673 674 static void 675 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 676 struct mt7996_phy *phy) 677 { 678 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 679 struct bss_rate_tlv *bmc; 680 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 681 enum nl80211_band band = chandef->chan->band; 682 struct tlv *tlv; 683 u8 idx = mvif->mcast_rates_idx ? 684 mvif->mcast_rates_idx : mvif->basic_rates_idx; 685 686 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 687 688 bmc = (struct bss_rate_tlv *)tlv; 689 690 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 691 bmc->bc_fixed_rate = idx; 692 bmc->mc_fixed_rate = idx; 693 } 694 695 static void 696 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 697 { 698 struct bss_txcmd_tlv *txcmd; 699 struct tlv *tlv; 700 701 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 702 703 txcmd = (struct bss_txcmd_tlv *)tlv; 704 txcmd->txcmd_mode = en; 705 } 706 707 static void 708 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 709 { 710 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 711 struct bss_mld_tlv *mld; 712 struct tlv *tlv; 713 714 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 715 716 mld = (struct bss_mld_tlv *)tlv; 717 mld->group_mld_id = 0xff; 718 mld->own_mld_id = mvif->mt76.idx; 719 mld->remap_idx = 0xff; 720 } 721 722 static void 723 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 724 { 725 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 726 struct bss_sec_tlv *sec; 727 struct tlv *tlv; 728 729 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 730 731 sec = (struct bss_sec_tlv *)tlv; 732 sec->cipher = mvif->cipher; 733 } 734 735 static int 736 mt7996_mcu_muar_config(struct mt7996_phy *phy, struct ieee80211_vif *vif, 737 bool bssid, bool enable) 738 { 739 #define UNI_MUAR_ENTRY 2 740 struct mt7996_dev *dev = phy->dev; 741 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 742 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START; 743 const u8 *addr = vif->addr; 744 745 struct { 746 struct { 747 u8 band; 748 u8 __rsv[3]; 749 } hdr; 750 751 __le16 tag; 752 __le16 len; 753 754 bool smesh; 755 u8 bssid; 756 u8 index; 757 u8 entry_add; 758 u8 addr[ETH_ALEN]; 759 u8 __rsv[2]; 760 } __packed req = { 761 .hdr.band = phy->mt76->band_idx, 762 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 763 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 764 .smesh = false, 765 .index = idx * 2 + bssid, 766 .entry_add = true, 767 }; 768 769 if (bssid) 770 addr = vif->bss_conf.bssid; 771 772 if (enable) 773 memcpy(req.addr, addr, ETH_ALEN); 774 775 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 776 sizeof(req), true); 777 } 778 779 static void 780 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 781 { 782 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 783 struct mt7996_phy *phy = mvif->phy; 784 struct bss_ifs_time_tlv *ifs_time; 785 struct tlv *tlv; 786 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 787 788 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 789 790 ifs_time = (struct bss_ifs_time_tlv *)tlv; 791 ifs_time->slot_valid = true; 792 ifs_time->sifs_valid = true; 793 ifs_time->rifs_valid = true; 794 ifs_time->eifs_valid = true; 795 796 ifs_time->slot_time = cpu_to_le16(phy->slottime); 797 ifs_time->sifs_time = cpu_to_le16(10); 798 ifs_time->rifs_time = cpu_to_le16(2); 799 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 800 801 if (is_2ghz) { 802 ifs_time->eifs_cck_valid = true; 803 ifs_time->eifs_cck_time = cpu_to_le16(314); 804 } 805 } 806 807 static int 808 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 809 struct ieee80211_vif *vif, 810 struct ieee80211_sta *sta, 811 struct mt76_phy *phy, u16 wlan_idx, 812 bool enable) 813 { 814 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 815 struct cfg80211_chan_def *chandef = &phy->chandef; 816 struct mt76_connac_bss_basic_tlv *bss; 817 u32 type = CONNECTION_INFRA_AP; 818 u16 sta_wlan_idx = wlan_idx; 819 struct tlv *tlv; 820 int idx; 821 822 switch (vif->type) { 823 case NL80211_IFTYPE_MESH_POINT: 824 case NL80211_IFTYPE_AP: 825 case NL80211_IFTYPE_MONITOR: 826 break; 827 case NL80211_IFTYPE_STATION: 828 if (enable) { 829 rcu_read_lock(); 830 if (!sta) 831 sta = ieee80211_find_sta(vif, 832 vif->bss_conf.bssid); 833 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 834 if (sta) { 835 struct mt76_wcid *wcid; 836 837 wcid = (struct mt76_wcid *)sta->drv_priv; 838 sta_wlan_idx = wcid->idx; 839 } 840 rcu_read_unlock(); 841 } 842 type = CONNECTION_INFRA_STA; 843 break; 844 case NL80211_IFTYPE_ADHOC: 845 type = CONNECTION_IBSS_ADHOC; 846 break; 847 default: 848 WARN_ON(1); 849 break; 850 } 851 852 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 853 854 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 855 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 856 bss->dtim_period = vif->bss_conf.dtim_period; 857 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 858 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 859 bss->conn_type = cpu_to_le32(type); 860 bss->omac_idx = mvif->omac_idx; 861 bss->band_idx = mvif->band_idx; 862 bss->wmm_idx = mvif->wmm_idx; 863 bss->conn_state = !enable; 864 bss->active = enable; 865 866 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 867 bss->hw_bss_idx = idx; 868 869 if (vif->type == NL80211_IFTYPE_MONITOR) { 870 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 871 return 0; 872 } 873 874 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 875 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 876 bss->dtim_period = vif->bss_conf.dtim_period; 877 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 878 chandef->chan->band, NULL); 879 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, vif, 880 chandef->chan->band); 881 882 return 0; 883 } 884 885 static struct sk_buff * 886 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif *mvif, int len) 887 { 888 struct bss_req_hdr hdr = { 889 .bss_idx = mvif->idx, 890 }; 891 struct sk_buff *skb; 892 893 skb = mt76_mcu_msg_alloc(dev, NULL, len); 894 if (!skb) 895 return ERR_PTR(-ENOMEM); 896 897 skb_put_data(skb, &hdr, sizeof(hdr)); 898 899 return skb; 900 } 901 902 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, 903 struct ieee80211_vif *vif, int enable) 904 { 905 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 906 struct mt7996_dev *dev = phy->dev; 907 struct sk_buff *skb; 908 909 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { 910 mt7996_mcu_muar_config(phy, vif, false, enable); 911 mt7996_mcu_muar_config(phy, vif, true, enable); 912 } 913 914 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 915 MT7996_BSS_UPDATE_MAX_SIZE); 916 if (IS_ERR(skb)) 917 return PTR_ERR(skb); 918 919 /* bss_basic must be first */ 920 mt7996_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, 921 mvif->sta.wcid.idx, enable); 922 mt7996_mcu_bss_sec_tlv(skb, vif); 923 924 if (vif->type == NL80211_IFTYPE_MONITOR) 925 goto out; 926 927 if (enable) { 928 mt7996_mcu_bss_rfch_tlv(skb, vif, phy); 929 mt7996_mcu_bss_bmc_tlv(skb, vif, phy); 930 mt7996_mcu_bss_ra_tlv(skb, vif, phy); 931 mt7996_mcu_bss_txcmd_tlv(skb, true); 932 mt7996_mcu_bss_ifs_timing_tlv(skb, vif); 933 934 if (vif->bss_conf.he_support) 935 mt7996_mcu_bss_he_tlv(skb, vif, phy); 936 937 /* this tag is necessary no matter if the vif is MLD */ 938 mt7996_mcu_bss_mld_tlv(skb, vif); 939 } 940 941 mt7996_mcu_bss_mbssid_tlv(skb, vif, phy, enable); 942 943 out: 944 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 945 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 946 } 947 948 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif) 949 { 950 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 951 struct mt7996_dev *dev = phy->dev; 952 struct sk_buff *skb; 953 954 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 955 MT7996_BSS_UPDATE_MAX_SIZE); 956 if (IS_ERR(skb)) 957 return PTR_ERR(skb); 958 959 mt7996_mcu_bss_ifs_timing_tlv(skb, vif); 960 961 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 962 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 963 } 964 965 static int 966 mt7996_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 967 struct ieee80211_ampdu_params *params, 968 bool enable, bool tx) 969 { 970 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 971 struct sta_rec_ba_uni *ba; 972 struct sk_buff *skb; 973 struct tlv *tlv; 974 975 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 976 MT7996_STA_UPDATE_MAX_SIZE); 977 if (IS_ERR(skb)) 978 return PTR_ERR(skb); 979 980 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 981 982 ba = (struct sta_rec_ba_uni *)tlv; 983 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 984 ba->winsize = cpu_to_le16(params->buf_size); 985 ba->ssn = cpu_to_le16(params->ssn); 986 ba->ba_en = enable << params->tid; 987 ba->amsdu = params->amsdu; 988 ba->tid = params->tid; 989 990 return mt76_mcu_skb_send_msg(dev, skb, 991 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 992 } 993 994 /** starec & wtbl **/ 995 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 996 struct ieee80211_ampdu_params *params, 997 bool enable) 998 { 999 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1000 struct mt7996_vif *mvif = msta->vif; 1001 1002 if (enable && !params->amsdu) 1003 msta->wcid.amsdu = false; 1004 1005 return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 1006 enable, true); 1007 } 1008 1009 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1010 struct ieee80211_ampdu_params *params, 1011 bool enable) 1012 { 1013 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1014 struct mt7996_vif *mvif = msta->vif; 1015 1016 return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 1017 enable, false); 1018 } 1019 1020 static void 1021 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1022 { 1023 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1024 struct ieee80211_he_mcs_nss_supp mcs_map; 1025 struct sta_rec_he_v2 *he; 1026 struct tlv *tlv; 1027 int i = 0; 1028 1029 if (!sta->deflink.he_cap.has_he) 1030 return; 1031 1032 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1033 1034 he = (struct sta_rec_he_v2 *)tlv; 1035 for (i = 0; i < 11; i++) { 1036 if (i < 6) 1037 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1038 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1039 } 1040 1041 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 1042 switch (sta->deflink.bandwidth) { 1043 case IEEE80211_STA_RX_BW_160: 1044 if (elem->phy_cap_info[0] & 1045 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1046 mt7996_mcu_set_sta_he_mcs(sta, 1047 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1048 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1049 1050 mt7996_mcu_set_sta_he_mcs(sta, 1051 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1052 le16_to_cpu(mcs_map.rx_mcs_160)); 1053 fallthrough; 1054 default: 1055 mt7996_mcu_set_sta_he_mcs(sta, 1056 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1057 le16_to_cpu(mcs_map.rx_mcs_80)); 1058 break; 1059 } 1060 1061 he->pkt_ext = 2; 1062 } 1063 1064 static void 1065 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1066 { 1067 struct sta_rec_he_6g_capa *he_6g; 1068 struct tlv *tlv; 1069 1070 if (!sta->deflink.he_6ghz_capa.capa) 1071 return; 1072 1073 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1074 1075 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1076 he_6g->capa = sta->deflink.he_6ghz_capa.capa; 1077 } 1078 1079 static void 1080 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1081 { 1082 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1083 struct ieee80211_eht_cap_elem_fixed *elem; 1084 struct sta_rec_eht *eht; 1085 struct tlv *tlv; 1086 1087 if (!sta->deflink.eht_cap.has_eht) 1088 return; 1089 1090 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp; 1091 elem = &sta->deflink.eht_cap.eht_cap_elem; 1092 1093 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1094 1095 eht = (struct sta_rec_eht *)tlv; 1096 eht->tid_bitmap = 0xff; 1097 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1098 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1099 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1100 1101 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_20) 1102 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, sizeof(eht->mcs_map_bw20)); 1103 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1104 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1105 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1106 } 1107 1108 static void 1109 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1110 { 1111 struct sta_rec_ht *ht; 1112 struct tlv *tlv; 1113 1114 if (!sta->deflink.ht_cap.ht_supported) 1115 return; 1116 1117 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1118 1119 ht = (struct sta_rec_ht *)tlv; 1120 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 1121 } 1122 1123 static void 1124 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1125 { 1126 struct sta_rec_vht *vht; 1127 struct tlv *tlv; 1128 1129 /* For 6G band, this tlv is necessary to let hw work normally */ 1130 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported) 1131 return; 1132 1133 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1134 1135 vht = (struct sta_rec_vht *)tlv; 1136 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 1137 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 1138 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 1139 } 1140 1141 static void 1142 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1143 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1144 { 1145 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1146 struct sta_rec_amsdu *amsdu; 1147 struct tlv *tlv; 1148 1149 if (vif->type != NL80211_IFTYPE_STATION && 1150 vif->type != NL80211_IFTYPE_MESH_POINT && 1151 vif->type != NL80211_IFTYPE_AP) 1152 return; 1153 1154 if (!sta->deflink.agg.max_amsdu_len) 1155 return; 1156 1157 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1158 amsdu = (struct sta_rec_amsdu *)tlv; 1159 amsdu->max_amsdu_num = 8; 1160 amsdu->amsdu_en = true; 1161 msta->wcid.amsdu = true; 1162 1163 switch (sta->deflink.agg.max_amsdu_len) { 1164 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1165 amsdu->max_mpdu_size = 1166 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1167 return; 1168 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1169 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1170 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1171 return; 1172 default: 1173 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1174 return; 1175 } 1176 } 1177 1178 static void 1179 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1180 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1181 { 1182 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1183 struct sta_rec_muru *muru; 1184 struct tlv *tlv; 1185 1186 if (vif->type != NL80211_IFTYPE_STATION && 1187 vif->type != NL80211_IFTYPE_AP) 1188 return; 1189 1190 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1191 1192 muru = (struct sta_rec_muru *)tlv; 1193 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer || 1194 vif->bss_conf.he_mu_beamformer || 1195 vif->bss_conf.vht_mu_beamformer || 1196 vif->bss_conf.vht_mu_beamformee; 1197 muru->cfg.ofdma_dl_en = true; 1198 1199 if (sta->deflink.vht_cap.vht_supported) 1200 muru->mimo_dl.vht_mu_bfee = 1201 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1202 1203 if (!sta->deflink.he_cap.has_he) 1204 return; 1205 1206 muru->mimo_dl.partial_bw_dl_mimo = 1207 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1208 1209 muru->mimo_ul.full_ul_mimo = 1210 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1211 muru->mimo_ul.partial_ul_mimo = 1212 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1213 1214 muru->ofdma_dl.punc_pream_rx = 1215 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1216 muru->ofdma_dl.he_20m_in_40m_2g = 1217 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1218 muru->ofdma_dl.he_20m_in_160m = 1219 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1220 muru->ofdma_dl.he_80m_in_160m = 1221 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1222 1223 muru->ofdma_ul.t_frame_dur = 1224 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1225 muru->ofdma_ul.mu_cascading = 1226 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1227 muru->ofdma_ul.uo_ra = 1228 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1229 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1230 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1231 } 1232 1233 static inline bool 1234 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1235 struct ieee80211_sta *sta, bool bfee) 1236 { 1237 int sts = hweight16(phy->mt76->chainmask); 1238 1239 if (vif->type != NL80211_IFTYPE_STATION && 1240 vif->type != NL80211_IFTYPE_AP) 1241 return false; 1242 1243 if (!bfee && sts < 2) 1244 return false; 1245 1246 if (sta->deflink.eht_cap.has_eht) { 1247 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1248 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1249 1250 if (bfee) 1251 return vif->bss_conf.eht_su_beamformee && 1252 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1253 else 1254 return vif->bss_conf.eht_su_beamformer && 1255 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1256 } 1257 1258 if (sta->deflink.he_cap.has_he) { 1259 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1260 1261 if (bfee) 1262 return vif->bss_conf.he_su_beamformee && 1263 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1264 else 1265 return vif->bss_conf.he_su_beamformer && 1266 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1267 } 1268 1269 if (sta->deflink.vht_cap.vht_supported) { 1270 u32 cap = sta->deflink.vht_cap.cap; 1271 1272 if (bfee) 1273 return vif->bss_conf.vht_su_beamformee && 1274 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1275 else 1276 return vif->bss_conf.vht_su_beamformer && 1277 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1278 } 1279 1280 return false; 1281 } 1282 1283 static void 1284 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf) 1285 { 1286 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1287 bf->ndp_rate = 0; /* mcs0 */ 1288 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1289 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1290 } 1291 1292 static void 1293 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1294 struct sta_rec_bf *bf) 1295 { 1296 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1297 u8 n = 0; 1298 1299 bf->tx_mode = MT_PHY_TYPE_HT; 1300 1301 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1302 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1303 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1304 mcs->tx_params); 1305 else if (mcs->rx_mask[3]) 1306 n = 3; 1307 else if (mcs->rx_mask[2]) 1308 n = 2; 1309 else if (mcs->rx_mask[1]) 1310 n = 1; 1311 1312 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1313 bf->ncol = min_t(u8, bf->nrow, n); 1314 bf->ibf_ncol = n; 1315 } 1316 1317 static void 1318 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1319 struct sta_rec_bf *bf, bool explicit) 1320 { 1321 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1322 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1323 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1324 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1325 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1326 1327 bf->tx_mode = MT_PHY_TYPE_VHT; 1328 1329 if (explicit) { 1330 u8 sts, snd_dim; 1331 1332 mt7996_mcu_sta_sounding_rate(bf); 1333 1334 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1335 pc->cap); 1336 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1337 vc->cap); 1338 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1339 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1340 bf->ibf_ncol = bf->ncol; 1341 1342 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1343 bf->nrow = 1; 1344 } else { 1345 bf->nrow = tx_ant; 1346 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1347 bf->ibf_ncol = nss_mcs; 1348 1349 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1350 bf->ibf_nrow = 1; 1351 } 1352 } 1353 1354 static void 1355 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1356 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1357 { 1358 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1359 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1360 const struct ieee80211_sta_he_cap *vc = 1361 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1362 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1363 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1364 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1365 u8 snd_dim, sts; 1366 1367 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1368 1369 mt7996_mcu_sta_sounding_rate(bf); 1370 1371 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1372 pe->phy_cap_info[6]); 1373 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1374 pe->phy_cap_info[6]); 1375 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1376 ve->phy_cap_info[5]); 1377 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1378 pe->phy_cap_info[4]); 1379 bf->nrow = min_t(u8, snd_dim, sts); 1380 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1381 bf->ibf_ncol = bf->ncol; 1382 1383 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1384 return; 1385 1386 /* go over for 160MHz and 80p80 */ 1387 if (pe->phy_cap_info[0] & 1388 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1389 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1390 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1391 1392 bf->ncol_gt_bw80 = nss_mcs; 1393 } 1394 1395 if (pe->phy_cap_info[0] & 1396 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1397 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1398 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1399 1400 if (bf->ncol_gt_bw80) 1401 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1402 else 1403 bf->ncol_gt_bw80 = nss_mcs; 1404 } 1405 1406 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1407 ve->phy_cap_info[5]); 1408 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1409 pe->phy_cap_info[4]); 1410 1411 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1412 } 1413 1414 static void 1415 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1416 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1417 { 1418 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1419 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1420 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1421 const struct ieee80211_sta_eht_cap *vc = 1422 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1423 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1424 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1425 IEEE80211_EHT_MCS_NSS_RX) - 1; 1426 u8 snd_dim, sts; 1427 1428 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1429 1430 mt7996_mcu_sta_sounding_rate(bf); 1431 1432 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1433 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1434 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1435 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1436 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1437 bf->nrow = min_t(u8, snd_dim, sts); 1438 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1439 bf->ibf_ncol = bf->ncol; 1440 1441 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160) 1442 return; 1443 1444 switch (sta->deflink.bandwidth) { 1445 case IEEE80211_STA_RX_BW_160: 1446 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1447 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1448 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1449 IEEE80211_EHT_MCS_NSS_RX) - 1; 1450 1451 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1452 bf->ncol_gt_bw80 = nss_mcs; 1453 break; 1454 case IEEE80211_STA_RX_BW_320: 1455 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1456 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1457 ve->phy_cap_info[3]) << 1); 1458 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1459 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1460 IEEE80211_EHT_MCS_NSS_RX) - 1; 1461 1462 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1463 bf->ncol_gt_bw80 = nss_mcs << 4; 1464 break; 1465 default: 1466 break; 1467 } 1468 } 1469 1470 static void 1471 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1472 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1473 { 1474 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1475 struct mt7996_phy *phy = mvif->phy; 1476 int tx_ant = hweight8(phy->mt76->chainmask) - 1; 1477 struct sta_rec_bf *bf; 1478 struct tlv *tlv; 1479 const u8 matrix[4][4] = { 1480 {0, 0, 0, 0}, 1481 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1482 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1483 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1484 }; 1485 bool ebf; 1486 1487 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1488 return; 1489 1490 ebf = mt7996_is_ebf_supported(phy, vif, sta, false); 1491 if (!ebf && !dev->ibf) 1492 return; 1493 1494 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1495 bf = (struct sta_rec_bf *)tlv; 1496 1497 /* he/eht: eBF only, in accordance with spec 1498 * vht: support eBF and iBF 1499 * ht: iBF only, since mac80211 lacks of eBF support 1500 */ 1501 if (sta->deflink.eht_cap.has_eht && ebf) 1502 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf); 1503 else if (sta->deflink.he_cap.has_he && ebf) 1504 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf); 1505 else if (sta->deflink.vht_cap.vht_supported) 1506 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1507 else if (sta->deflink.ht_cap.ht_supported) 1508 mt7996_mcu_sta_bfer_ht(sta, phy, bf); 1509 else 1510 return; 1511 1512 bf->bf_cap = ebf ? ebf : dev->ibf << 1; 1513 bf->bw = sta->deflink.bandwidth; 1514 bf->ibf_dbw = sta->deflink.bandwidth; 1515 bf->ibf_nrow = tx_ant; 1516 1517 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1518 bf->ibf_timeout = 0x48; 1519 else 1520 bf->ibf_timeout = 0x18; 1521 1522 if (ebf && bf->nrow != tx_ant) 1523 bf->mem_20m = matrix[tx_ant][bf->ncol]; 1524 else 1525 bf->mem_20m = matrix[bf->nrow][bf->ncol]; 1526 1527 switch (sta->deflink.bandwidth) { 1528 case IEEE80211_STA_RX_BW_160: 1529 case IEEE80211_STA_RX_BW_80: 1530 bf->mem_total = bf->mem_20m * 2; 1531 break; 1532 case IEEE80211_STA_RX_BW_40: 1533 bf->mem_total = bf->mem_20m; 1534 break; 1535 case IEEE80211_STA_RX_BW_20: 1536 default: 1537 break; 1538 } 1539 } 1540 1541 static void 1542 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1543 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1544 { 1545 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1546 struct mt7996_phy *phy = mvif->phy; 1547 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1548 struct sta_rec_bfee *bfee; 1549 struct tlv *tlv; 1550 u8 nrow = 0; 1551 1552 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1553 return; 1554 1555 if (!mt7996_is_ebf_supported(phy, vif, sta, true)) 1556 return; 1557 1558 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1559 bfee = (struct sta_rec_bfee *)tlv; 1560 1561 if (sta->deflink.he_cap.has_he) { 1562 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1563 1564 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1565 pe->phy_cap_info[5]); 1566 } else if (sta->deflink.vht_cap.vht_supported) { 1567 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1568 1569 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1570 pc->cap); 1571 } 1572 1573 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1574 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1575 } 1576 1577 static void 1578 mt7996_mcu_sta_phy_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1579 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1580 { 1581 struct sta_rec_phy *phy; 1582 struct tlv *tlv; 1583 u8 af = 0, mm = 0; 1584 1585 if (!sta->deflink.ht_cap.ht_supported && !sta->deflink.he_6ghz_capa.capa) 1586 return; 1587 1588 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); 1589 1590 phy = (struct sta_rec_phy *)tlv; 1591 if (sta->deflink.ht_cap.ht_supported) { 1592 af = sta->deflink.ht_cap.ampdu_factor; 1593 mm = sta->deflink.ht_cap.ampdu_density; 1594 } 1595 1596 if (sta->deflink.vht_cap.vht_supported) { 1597 u8 vht_af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1598 sta->deflink.vht_cap.cap); 1599 1600 af = max_t(u8, af, vht_af); 1601 } 1602 1603 if (sta->deflink.he_6ghz_capa.capa) { 1604 af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1605 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1606 mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1607 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 1608 } 1609 1610 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, af) | 1611 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, mm); 1612 phy->max_ampdu_len = af; 1613 } 1614 1615 static void 1616 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1617 { 1618 struct sta_rec_hdrt *hdrt; 1619 struct tlv *tlv; 1620 1621 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1622 1623 hdrt = (struct sta_rec_hdrt *)tlv; 1624 hdrt->hdrt_mode = 1; 1625 } 1626 1627 static void 1628 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1629 struct ieee80211_vif *vif, 1630 struct ieee80211_sta *sta) 1631 { 1632 struct sta_rec_hdr_trans *hdr_trans; 1633 struct mt76_wcid *wcid; 1634 struct tlv *tlv; 1635 1636 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1637 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1638 hdr_trans->dis_rx_hdr_tran = true; 1639 1640 if (vif->type == NL80211_IFTYPE_STATION) 1641 hdr_trans->to_ds = true; 1642 else 1643 hdr_trans->from_ds = true; 1644 1645 wcid = (struct mt76_wcid *)sta->drv_priv; 1646 if (!wcid) 1647 return; 1648 1649 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1650 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1651 hdr_trans->to_ds = true; 1652 hdr_trans->from_ds = true; 1653 } 1654 1655 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1656 hdr_trans->to_ds = true; 1657 hdr_trans->from_ds = true; 1658 hdr_trans->mesh = true; 1659 } 1660 } 1661 1662 static enum mcu_mmps_mode 1663 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1664 { 1665 switch (smps) { 1666 case IEEE80211_SMPS_OFF: 1667 return MCU_MMPS_DISABLE; 1668 case IEEE80211_SMPS_STATIC: 1669 return MCU_MMPS_STATIC; 1670 case IEEE80211_SMPS_DYNAMIC: 1671 return MCU_MMPS_DYNAMIC; 1672 default: 1673 return MCU_MMPS_DISABLE; 1674 } 1675 } 1676 1677 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1678 void *data, u16 version) 1679 { 1680 struct ra_fixed_rate *req; 1681 struct uni_header hdr; 1682 struct sk_buff *skb; 1683 struct tlv *tlv; 1684 int len; 1685 1686 len = sizeof(hdr) + sizeof(*req); 1687 1688 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1689 if (!skb) 1690 return -ENOMEM; 1691 1692 skb_put_data(skb, &hdr, sizeof(hdr)); 1693 1694 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1695 req = (struct ra_fixed_rate *)tlv; 1696 req->version = cpu_to_le16(version); 1697 memcpy(&req->rate, data, sizeof(req->rate)); 1698 1699 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1700 MCU_WM_UNI_CMD(RA), true); 1701 } 1702 1703 static int 1704 mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1705 struct ieee80211_sta *sta, void *data, u32 field) 1706 { 1707 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1708 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1709 struct sta_phy *phy = data; 1710 struct sta_rec_ra_fixed *ra; 1711 struct sk_buff *skb; 1712 struct tlv *tlv; 1713 1714 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1715 &msta->wcid, 1716 MT7996_STA_UPDATE_MAX_SIZE); 1717 if (IS_ERR(skb)) 1718 return PTR_ERR(skb); 1719 1720 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1721 ra = (struct sta_rec_ra_fixed *)tlv; 1722 1723 switch (field) { 1724 case RATE_PARAM_AUTO: 1725 break; 1726 case RATE_PARAM_FIXED: 1727 case RATE_PARAM_FIXED_MCS: 1728 case RATE_PARAM_FIXED_GI: 1729 case RATE_PARAM_FIXED_HE_LTF: 1730 if (phy) 1731 ra->phy = *phy; 1732 break; 1733 default: 1734 break; 1735 } 1736 ra->field = cpu_to_le32(field); 1737 1738 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1739 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1740 } 1741 1742 static int 1743 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1744 struct ieee80211_sta *sta) 1745 { 1746 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1747 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1748 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1749 enum nl80211_band band = chandef->chan->band; 1750 struct sta_phy phy = {}; 1751 int ret, nrates = 0; 1752 1753 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1754 do { \ 1755 u8 i, gi = mask->control[band]._gi; \ 1756 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1757 phy.sgi = gi; \ 1758 phy.he_ltf = mask->control[band].he_ltf; \ 1759 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1760 if (!mask->control[band]._mcs[i]) \ 1761 continue; \ 1762 nrates += hweight16(mask->control[band]._mcs[i]); \ 1763 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1764 if (_ht) \ 1765 phy.mcs += 8 * i; \ 1766 } \ 1767 } while (0) 1768 1769 if (sta->deflink.he_cap.has_he) { 1770 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1771 } else if (sta->deflink.vht_cap.vht_supported) { 1772 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1773 } else if (sta->deflink.ht_cap.ht_supported) { 1774 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1775 } else { 1776 nrates = hweight32(mask->control[band].legacy); 1777 phy.mcs = ffs(mask->control[band].legacy) - 1; 1778 } 1779 #undef __sta_phy_bitrate_mask_check 1780 1781 /* fall back to auto rate control */ 1782 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1783 mask->control[band].he_gi == GENMASK(7, 0) && 1784 mask->control[band].he_ltf == GENMASK(7, 0) && 1785 nrates != 1) 1786 return 0; 1787 1788 /* fixed single rate */ 1789 if (nrates == 1) { 1790 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1791 RATE_PARAM_FIXED_MCS); 1792 if (ret) 1793 return ret; 1794 } 1795 1796 /* fixed GI */ 1797 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 1798 mask->control[band].he_gi != GENMASK(7, 0)) { 1799 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1800 u32 addr; 1801 1802 /* firmware updates only TXCMD but doesn't take WTBL into 1803 * account, so driver should update here to reflect the 1804 * actual txrate hardware sends out. 1805 */ 1806 addr = mt7996_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); 1807 if (sta->deflink.he_cap.has_he) 1808 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 1809 else 1810 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 1811 1812 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1813 RATE_PARAM_FIXED_GI); 1814 if (ret) 1815 return ret; 1816 } 1817 1818 /* fixed HE_LTF */ 1819 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 1820 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1821 RATE_PARAM_FIXED_HE_LTF); 1822 if (ret) 1823 return ret; 1824 } 1825 1826 return 0; 1827 } 1828 1829 static void 1830 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 1831 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1832 { 1833 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1834 struct mt76_phy *mphy = mvif->phy->mt76; 1835 struct cfg80211_chan_def *chandef = &mphy->chandef; 1836 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1837 enum nl80211_band band = chandef->chan->band; 1838 struct sta_rec_ra *ra; 1839 struct tlv *tlv; 1840 u32 supp_rate = sta->deflink.supp_rates[band]; 1841 u32 cap = sta->wme ? STA_CAP_WMM : 0; 1842 1843 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 1844 ra = (struct sta_rec_ra *)tlv; 1845 1846 ra->valid = true; 1847 ra->auto_rate = true; 1848 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta); 1849 ra->channel = chandef->chan->hw_value; 1850 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ? 1851 CMD_CBW_320MHZ : sta->deflink.bandwidth; 1852 ra->phy.bw = ra->bw; 1853 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 1854 1855 if (supp_rate) { 1856 supp_rate &= mask->control[band].legacy; 1857 ra->rate_len = hweight32(supp_rate); 1858 1859 if (band == NL80211_BAND_2GHZ) { 1860 ra->supp_mode = MODE_CCK; 1861 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 1862 1863 if (ra->rate_len > 4) { 1864 ra->supp_mode |= MODE_OFDM; 1865 ra->supp_ofdm_rate = supp_rate >> 4; 1866 } 1867 } else { 1868 ra->supp_mode = MODE_OFDM; 1869 ra->supp_ofdm_rate = supp_rate; 1870 } 1871 } 1872 1873 if (sta->deflink.ht_cap.ht_supported) { 1874 ra->supp_mode |= MODE_HT; 1875 ra->af = sta->deflink.ht_cap.ampdu_factor; 1876 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 1877 1878 cap |= STA_CAP_HT; 1879 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1880 cap |= STA_CAP_SGI_20; 1881 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1882 cap |= STA_CAP_SGI_40; 1883 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 1884 cap |= STA_CAP_TX_STBC; 1885 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1886 cap |= STA_CAP_RX_STBC; 1887 if (vif->bss_conf.ht_ldpc && 1888 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 1889 cap |= STA_CAP_LDPC; 1890 1891 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 1892 mask->control[band].ht_mcs); 1893 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 1894 } 1895 1896 if (sta->deflink.vht_cap.vht_supported) { 1897 u8 af; 1898 1899 ra->supp_mode |= MODE_VHT; 1900 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1901 sta->deflink.vht_cap.cap); 1902 ra->af = max_t(u8, ra->af, af); 1903 1904 cap |= STA_CAP_VHT; 1905 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1906 cap |= STA_CAP_VHT_SGI_80; 1907 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1908 cap |= STA_CAP_VHT_SGI_160; 1909 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 1910 cap |= STA_CAP_VHT_TX_STBC; 1911 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 1912 cap |= STA_CAP_VHT_RX_STBC; 1913 if (vif->bss_conf.vht_ldpc && 1914 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 1915 cap |= STA_CAP_VHT_LDPC; 1916 1917 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 1918 mask->control[band].vht_mcs); 1919 } 1920 1921 if (sta->deflink.he_cap.has_he) { 1922 ra->supp_mode |= MODE_HE; 1923 cap |= STA_CAP_HE; 1924 1925 if (sta->deflink.he_6ghz_capa.capa) 1926 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1927 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1928 } 1929 ra->sta_cap = cpu_to_le32(cap); 1930 } 1931 1932 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1933 struct ieee80211_sta *sta, bool changed) 1934 { 1935 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1936 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1937 struct sk_buff *skb; 1938 int ret; 1939 1940 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1941 &msta->wcid, 1942 MT7996_STA_UPDATE_MAX_SIZE); 1943 if (IS_ERR(skb)) 1944 return PTR_ERR(skb); 1945 1946 /* firmware rc algorithm refers to sta_rec_he for HE control. 1947 * once dev->rc_work changes the settings driver should also 1948 * update sta_rec_he here. 1949 */ 1950 if (changed) 1951 mt7996_mcu_sta_he_tlv(skb, sta); 1952 1953 /* sta_rec_ra accommodates BW, NSS and only MCS range format 1954 * i.e 0-{7,8,9} for VHT. 1955 */ 1956 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 1957 1958 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1959 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1960 if (ret) 1961 return ret; 1962 1963 return mt7996_mcu_add_rate_ctrl_fixed(dev, vif, sta); 1964 } 1965 1966 static int 1967 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1968 struct ieee80211_sta *sta) 1969 { 1970 #define MT_STA_BSS_GROUP 1 1971 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1972 struct mt7996_sta *msta; 1973 struct { 1974 u8 __rsv1[4]; 1975 1976 __le16 tag; 1977 __le16 len; 1978 __le16 wlan_idx; 1979 u8 __rsv2[2]; 1980 __le32 action; 1981 __le32 val; 1982 u8 __rsv3[8]; 1983 } __packed req = { 1984 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 1985 .len = cpu_to_le16(sizeof(req) - 4), 1986 .action = cpu_to_le32(MT_STA_BSS_GROUP), 1987 .val = cpu_to_le32(mvif->mt76.idx % 16), 1988 }; 1989 1990 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 1991 req.wlan_idx = cpu_to_le16(msta->wcid.idx); 1992 1993 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 1994 sizeof(req), true); 1995 } 1996 1997 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1998 struct ieee80211_sta *sta, bool enable) 1999 { 2000 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2001 struct mt7996_sta *msta; 2002 struct sk_buff *skb; 2003 int ret; 2004 2005 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 2006 2007 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 2008 &msta->wcid, 2009 MT7996_STA_UPDATE_MAX_SIZE); 2010 if (IS_ERR(skb)) 2011 return PTR_ERR(skb); 2012 2013 /* starec basic */ 2014 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, sta, enable, 2015 !rcu_access_pointer(dev->mt76.wcid[msta->wcid.idx])); 2016 if (!enable) 2017 goto out; 2018 2019 /* tag order is in accordance with firmware dependency. */ 2020 if (sta) { 2021 /* starec phy */ 2022 mt7996_mcu_sta_phy_tlv(dev, skb, vif, sta); 2023 /* starec hdrt mode */ 2024 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2025 /* starec bfer */ 2026 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta); 2027 /* starec ht */ 2028 mt7996_mcu_sta_ht_tlv(skb, sta); 2029 /* starec vht */ 2030 mt7996_mcu_sta_vht_tlv(skb, sta); 2031 /* starec uapsd */ 2032 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 2033 /* starec amsdu */ 2034 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 2035 /* starec he */ 2036 mt7996_mcu_sta_he_tlv(skb, sta); 2037 /* starec he 6g*/ 2038 mt7996_mcu_sta_he_6g_tlv(skb, sta); 2039 /* starec eht */ 2040 mt7996_mcu_sta_eht_tlv(skb, sta); 2041 /* starec muru */ 2042 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta); 2043 /* starec bfee */ 2044 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta); 2045 /* starec hdr trans */ 2046 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta); 2047 } 2048 2049 ret = mt7996_mcu_add_group(dev, vif, sta); 2050 if (ret) { 2051 dev_kfree_skb(skb); 2052 return ret; 2053 } 2054 out: 2055 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2056 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2057 } 2058 2059 static int 2060 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 2061 struct mt76_connac_sta_key_conf *sta_key_conf, 2062 struct sk_buff *skb, 2063 struct ieee80211_key_conf *key, 2064 enum set_key_cmd cmd) 2065 { 2066 struct sta_rec_sec_uni *sec; 2067 struct tlv *tlv; 2068 2069 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2070 sec = (struct sta_rec_sec_uni *)tlv; 2071 sec->add = cmd; 2072 2073 if (cmd == SET_KEY) { 2074 struct sec_key_uni *sec_key; 2075 u8 cipher; 2076 2077 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2078 if (cipher == MCU_CIPHER_NONE) 2079 return -EOPNOTSUPP; 2080 2081 sec_key = &sec->key[0]; 2082 sec_key->cipher_len = sizeof(*sec_key); 2083 2084 if (cipher == MCU_CIPHER_BIP_CMAC_128) { 2085 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2086 sec_key->cipher_id = MCU_CIPHER_AES_CCMP; 2087 sec_key->key_id = sta_key_conf->keyidx; 2088 sec_key->key_len = 16; 2089 memcpy(sec_key->key, sta_key_conf->key, 16); 2090 2091 sec_key = &sec->key[1]; 2092 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2093 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; 2094 sec_key->cipher_len = sizeof(*sec_key); 2095 sec_key->key_len = 16; 2096 memcpy(sec_key->key, key->key, 16); 2097 sec->n_cipher = 2; 2098 } else { 2099 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2100 sec_key->cipher_id = cipher; 2101 sec_key->key_id = key->keyidx; 2102 sec_key->key_len = key->keylen; 2103 memcpy(sec_key->key, key->key, key->keylen); 2104 2105 if (cipher == MCU_CIPHER_TKIP) { 2106 /* Rx/Tx MIC keys are swapped */ 2107 memcpy(sec_key->key + 16, key->key + 24, 8); 2108 memcpy(sec_key->key + 24, key->key + 16, 8); 2109 } 2110 2111 /* store key_conf for BIP batch update */ 2112 if (cipher == MCU_CIPHER_AES_CCMP) { 2113 memcpy(sta_key_conf->key, key->key, key->keylen); 2114 sta_key_conf->keyidx = key->keyidx; 2115 } 2116 2117 sec->n_cipher = 1; 2118 } 2119 } else { 2120 sec->n_cipher = 0; 2121 } 2122 2123 return 0; 2124 } 2125 2126 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2127 struct mt76_connac_sta_key_conf *sta_key_conf, 2128 struct ieee80211_key_conf *key, int mcu_cmd, 2129 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2130 { 2131 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2132 struct sk_buff *skb; 2133 int ret; 2134 2135 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 2136 MT7996_STA_UPDATE_MAX_SIZE); 2137 if (IS_ERR(skb)) 2138 return PTR_ERR(skb); 2139 2140 ret = mt7996_mcu_sta_key_tlv(wcid, sta_key_conf, skb, key, cmd); 2141 if (ret) 2142 return ret; 2143 2144 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2145 } 2146 2147 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, 2148 struct ieee80211_vif *vif, bool enable) 2149 { 2150 struct mt7996_dev *dev = phy->dev; 2151 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2152 struct { 2153 struct req_hdr { 2154 u8 omac_idx; 2155 u8 band_idx; 2156 u8 __rsv[2]; 2157 } __packed hdr; 2158 struct req_tlv { 2159 __le16 tag; 2160 __le16 len; 2161 u8 active; 2162 u8 __rsv; 2163 u8 omac_addr[ETH_ALEN]; 2164 } __packed tlv; 2165 } data = { 2166 .hdr = { 2167 .omac_idx = mvif->mt76.omac_idx, 2168 .band_idx = mvif->mt76.band_idx, 2169 }, 2170 .tlv = { 2171 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2172 .len = cpu_to_le16(sizeof(struct req_tlv)), 2173 .active = enable, 2174 }, 2175 }; 2176 2177 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) 2178 return mt7996_mcu_muar_config(phy, vif, false, enable); 2179 2180 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 2181 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2182 &data, sizeof(data), true); 2183 } 2184 2185 static void 2186 mt7996_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, 2187 struct sk_buff *skb, 2188 struct ieee80211_mutable_offsets *offs) 2189 { 2190 struct bss_bcn_cntdwn_tlv *info; 2191 struct tlv *tlv; 2192 u16 tag; 2193 2194 if (!offs->cntdwn_counter_offs[0]) 2195 return; 2196 2197 tag = vif->bss_conf.csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 2198 2199 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 2200 2201 info = (struct bss_bcn_cntdwn_tlv *)tlv; 2202 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 2203 } 2204 2205 static void 2206 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 2207 struct ieee80211_vif *vif, struct bss_bcn_content_tlv *bcn, 2208 struct ieee80211_mutable_offsets *offs) 2209 { 2210 struct bss_bcn_mbss_tlv *mbss; 2211 const struct element *elem; 2212 struct tlv *tlv; 2213 2214 if (!vif->bss_conf.bssid_indicator) 2215 return; 2216 2217 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 2218 2219 mbss = (struct bss_bcn_mbss_tlv *)tlv; 2220 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 2221 mbss->bitmap = cpu_to_le32(1); 2222 2223 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 2224 &skb->data[offs->mbssid_off], 2225 skb->len - offs->mbssid_off) { 2226 const struct element *sub_elem; 2227 2228 if (elem->datalen < 2) 2229 continue; 2230 2231 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 2232 const struct ieee80211_bssid_index *idx; 2233 const u8 *idx_ie; 2234 2235 /* not a valid BSS profile */ 2236 if (sub_elem->id || sub_elem->datalen < 4) 2237 continue; 2238 2239 /* Find WLAN_EID_MULTI_BSSID_IDX 2240 * in the merged nontransmitted profile 2241 */ 2242 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 2243 sub_elem->data, sub_elem->datalen); 2244 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 2245 continue; 2246 2247 idx = (void *)(idx_ie + 2); 2248 if (!idx->bssid_index || idx->bssid_index > 31) 2249 continue; 2250 2251 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 2252 skb->data); 2253 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 2254 } 2255 } 2256 } 2257 2258 static void 2259 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2260 struct sk_buff *rskb, struct sk_buff *skb, 2261 struct bss_bcn_content_tlv *bcn, 2262 struct ieee80211_mutable_offsets *offs) 2263 { 2264 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2265 u8 *buf; 2266 2267 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2268 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 2269 2270 if (offs->cntdwn_counter_offs[0]) { 2271 u16 offset = offs->cntdwn_counter_offs[0]; 2272 2273 if (vif->bss_conf.csa_active) 2274 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 2275 if (vif->bss_conf.color_change_active) 2276 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 2277 } 2278 2279 buf = (u8 *)bcn + sizeof(*bcn); 2280 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 2281 BSS_CHANGED_BEACON); 2282 2283 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2284 } 2285 2286 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, 2287 struct ieee80211_vif *vif, int en) 2288 { 2289 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2290 struct mt7996_phy *phy = mt7996_hw_phy(hw); 2291 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2292 struct ieee80211_mutable_offsets offs; 2293 struct ieee80211_tx_info *info; 2294 struct sk_buff *skb, *rskb; 2295 struct tlv *tlv; 2296 struct bss_bcn_content_tlv *bcn; 2297 int len; 2298 2299 if (vif->bss_conf.nontransmitted) 2300 return 0; 2301 2302 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 2303 MT7996_MAX_BSS_OFFLOAD_SIZE); 2304 if (IS_ERR(rskb)) 2305 return PTR_ERR(rskb); 2306 2307 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0); 2308 if (!skb) { 2309 dev_kfree_skb(rskb); 2310 return -EINVAL; 2311 } 2312 2313 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2314 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2315 dev_kfree_skb(rskb); 2316 dev_kfree_skb(skb); 2317 return -EINVAL; 2318 } 2319 2320 info = IEEE80211_SKB_CB(skb); 2321 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2322 2323 len = sizeof(*bcn) + MT_TXD_SIZE + skb->len; 2324 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2325 bcn = (struct bss_bcn_content_tlv *)tlv; 2326 bcn->enable = en; 2327 if (!en) 2328 goto out; 2329 2330 mt7996_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); 2331 mt7996_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs); 2332 mt7996_mcu_beacon_cntdwn(vif, rskb, skb, &offs); 2333 out: 2334 dev_kfree_skb(skb); 2335 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 2336 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2337 } 2338 2339 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 2340 struct ieee80211_vif *vif, u32 changed) 2341 { 2342 #define OFFLOAD_TX_MODE_SU BIT(0) 2343 #define OFFLOAD_TX_MODE_MU BIT(1) 2344 struct ieee80211_hw *hw = mt76_hw(dev); 2345 struct mt7996_phy *phy = mt7996_hw_phy(hw); 2346 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2347 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 2348 enum nl80211_band band = chandef->chan->band; 2349 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2350 struct bss_inband_discovery_tlv *discov; 2351 struct ieee80211_tx_info *info; 2352 struct sk_buff *rskb, *skb = NULL; 2353 struct tlv *tlv; 2354 u8 *buf, interval; 2355 int len; 2356 2357 if (vif->bss_conf.nontransmitted) 2358 return 0; 2359 2360 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 2361 MT7996_MAX_BSS_OFFLOAD_SIZE); 2362 if (IS_ERR(rskb)) 2363 return PTR_ERR(rskb); 2364 2365 if (changed & BSS_CHANGED_FILS_DISCOVERY && 2366 vif->bss_conf.fils_discovery.max_interval) { 2367 interval = vif->bss_conf.fils_discovery.max_interval; 2368 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 2369 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 2370 vif->bss_conf.unsol_bcast_probe_resp_interval) { 2371 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 2372 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 2373 } 2374 2375 if (!skb) { 2376 dev_kfree_skb(rskb); 2377 return -EINVAL; 2378 } 2379 2380 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2381 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2382 dev_kfree_skb(rskb); 2383 dev_kfree_skb(skb); 2384 return -EINVAL; 2385 } 2386 2387 info = IEEE80211_SKB_CB(skb); 2388 info->control.vif = vif; 2389 info->band = band; 2390 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2391 2392 len = sizeof(*discov) + MT_TXD_SIZE + skb->len; 2393 2394 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2395 2396 discov = (struct bss_inband_discovery_tlv *)tlv; 2397 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2398 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2399 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2400 discov->tx_interval = interval; 2401 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2402 discov->enable = true; 2403 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2404 2405 buf = (u8 *)tlv + sizeof(*discov); 2406 2407 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2408 2409 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2410 2411 dev_kfree_skb(skb); 2412 2413 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2414 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2415 } 2416 2417 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2418 { 2419 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2420 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2421 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2422 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2423 return -EIO; 2424 } 2425 2426 /* clear irq when the driver own success */ 2427 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2428 MT_TOP_LPCR_HOST_BAND_STAT); 2429 2430 return 0; 2431 } 2432 2433 static u32 mt7996_patch_sec_mode(u32 key_info) 2434 { 2435 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2436 2437 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2438 return 0; 2439 2440 if (sec == MT7996_SEC_MODE_AES) 2441 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2442 else 2443 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2444 2445 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2446 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2447 } 2448 2449 static int mt7996_load_patch(struct mt7996_dev *dev) 2450 { 2451 const struct mt7996_patch_hdr *hdr; 2452 const struct firmware *fw = NULL; 2453 int i, ret, sem; 2454 2455 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2456 switch (sem) { 2457 case PATCH_IS_DL: 2458 return 0; 2459 case PATCH_NOT_DL_SEM_SUCCESS: 2460 break; 2461 default: 2462 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2463 return -EAGAIN; 2464 } 2465 2466 ret = request_firmware(&fw, MT7996_ROM_PATCH, dev->mt76.dev); 2467 if (ret) 2468 goto out; 2469 2470 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2471 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2472 ret = -EINVAL; 2473 goto out; 2474 } 2475 2476 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2477 2478 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2479 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2480 2481 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2482 struct mt7996_patch_sec *sec; 2483 const u8 *dl; 2484 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2485 2486 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2487 i * sizeof(*sec)); 2488 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2489 PATCH_SEC_TYPE_INFO) { 2490 ret = -EINVAL; 2491 goto out; 2492 } 2493 2494 addr = be32_to_cpu(sec->info.addr); 2495 len = be32_to_cpu(sec->info.len); 2496 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2497 dl = fw->data + be32_to_cpu(sec->offs); 2498 2499 mode |= mt7996_patch_sec_mode(sec_key_idx); 2500 2501 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2502 mode); 2503 if (ret) { 2504 dev_err(dev->mt76.dev, "Download request failed\n"); 2505 goto out; 2506 } 2507 2508 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2509 dl, len, 4096); 2510 if (ret) { 2511 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2512 goto out; 2513 } 2514 } 2515 2516 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2517 if (ret) 2518 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2519 2520 out: 2521 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2522 switch (sem) { 2523 case PATCH_REL_SEM_SUCCESS: 2524 break; 2525 default: 2526 ret = -EAGAIN; 2527 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2528 break; 2529 } 2530 release_firmware(fw); 2531 2532 return ret; 2533 } 2534 2535 static int 2536 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2537 const struct mt7996_fw_trailer *hdr, 2538 const u8 *data, enum mt7996_ram_type type) 2539 { 2540 int i, offset = 0; 2541 u32 override = 0, option = 0; 2542 2543 for (i = 0; i < hdr->n_region; i++) { 2544 const struct mt7996_fw_region *region; 2545 int err; 2546 u32 len, addr, mode; 2547 2548 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2549 (hdr->n_region - i) * sizeof(*region)); 2550 /* DSP and WA use same mode */ 2551 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2552 region->feature_set, 2553 type != MT7996_RAM_TYPE_WM); 2554 len = le32_to_cpu(region->len); 2555 addr = le32_to_cpu(region->addr); 2556 2557 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2558 override = addr; 2559 2560 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2561 mode); 2562 if (err) { 2563 dev_err(dev->mt76.dev, "Download request failed\n"); 2564 return err; 2565 } 2566 2567 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2568 data + offset, len, 4096); 2569 if (err) { 2570 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2571 return err; 2572 } 2573 2574 offset += len; 2575 } 2576 2577 if (override) 2578 option |= FW_START_OVERRIDE; 2579 2580 if (type == MT7996_RAM_TYPE_WA) 2581 option |= FW_START_WORKING_PDA_CR4; 2582 else if (type == MT7996_RAM_TYPE_DSP) 2583 option |= FW_START_WORKING_PDA_DSP; 2584 2585 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2586 } 2587 2588 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 2589 const char *fw_file, enum mt7996_ram_type ram_type) 2590 { 2591 const struct mt7996_fw_trailer *hdr; 2592 const struct firmware *fw; 2593 int ret; 2594 2595 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 2596 if (ret) 2597 return ret; 2598 2599 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2600 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2601 ret = -EINVAL; 2602 goto out; 2603 } 2604 2605 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 2606 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 2607 fw_type, hdr->fw_ver, hdr->build_date); 2608 2609 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 2610 if (ret) { 2611 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 2612 goto out; 2613 } 2614 2615 snprintf(dev->mt76.hw->wiphy->fw_version, 2616 sizeof(dev->mt76.hw->wiphy->fw_version), 2617 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2618 2619 out: 2620 release_firmware(fw); 2621 2622 return ret; 2623 } 2624 2625 static int mt7996_load_ram(struct mt7996_dev *dev) 2626 { 2627 int ret; 2628 2629 ret = __mt7996_load_ram(dev, "WM", MT7996_FIRMWARE_WM, 2630 MT7996_RAM_TYPE_WM); 2631 if (ret) 2632 return ret; 2633 2634 ret = __mt7996_load_ram(dev, "DSP", MT7996_FIRMWARE_DSP, 2635 MT7996_RAM_TYPE_DSP); 2636 if (ret) 2637 return ret; 2638 2639 return __mt7996_load_ram(dev, "WA", MT7996_FIRMWARE_WA, 2640 MT7996_RAM_TYPE_WA); 2641 } 2642 2643 static int 2644 mt7996_firmware_state(struct mt7996_dev *dev, bool wa) 2645 { 2646 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2647 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2648 2649 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2650 state, 1000)) { 2651 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2652 return -EIO; 2653 } 2654 return 0; 2655 } 2656 2657 static int 2658 mt7996_mcu_restart(struct mt76_dev *dev) 2659 { 2660 struct { 2661 u8 __rsv1[4]; 2662 2663 __le16 tag; 2664 __le16 len; 2665 u8 power_mode; 2666 u8 __rsv2[3]; 2667 } __packed req = { 2668 .tag = cpu_to_le16(UNI_POWER_OFF), 2669 .len = cpu_to_le16(sizeof(req) - 4), 2670 .power_mode = 1, 2671 }; 2672 2673 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 2674 sizeof(req), false); 2675 } 2676 2677 static int mt7996_load_firmware(struct mt7996_dev *dev) 2678 { 2679 int ret; 2680 2681 /* make sure fw is download state */ 2682 if (mt7996_firmware_state(dev, false)) { 2683 /* restart firmware once */ 2684 mt7996_mcu_restart(&dev->mt76); 2685 ret = mt7996_firmware_state(dev, false); 2686 if (ret) { 2687 dev_err(dev->mt76.dev, 2688 "Firmware is not ready for download\n"); 2689 return ret; 2690 } 2691 } 2692 2693 ret = mt7996_load_patch(dev); 2694 if (ret) 2695 return ret; 2696 2697 ret = mt7996_load_ram(dev); 2698 if (ret) 2699 return ret; 2700 2701 ret = mt7996_firmware_state(dev, true); 2702 if (ret) 2703 return ret; 2704 2705 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2706 2707 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2708 2709 return 0; 2710 } 2711 2712 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 2713 { 2714 struct { 2715 u8 _rsv[4]; 2716 2717 __le16 tag; 2718 __le16 len; 2719 u8 ctrl; 2720 u8 interval; 2721 u8 _rsv2[2]; 2722 } __packed data = { 2723 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 2724 .len = cpu_to_le16(sizeof(data) - 4), 2725 .ctrl = ctrl, 2726 }; 2727 2728 if (type == MCU_FW_LOG_WA) 2729 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 2730 &data, sizeof(data), true); 2731 2732 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2733 sizeof(data), true); 2734 } 2735 2736 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 2737 { 2738 struct { 2739 u8 _rsv[4]; 2740 2741 __le16 tag; 2742 __le16 len; 2743 __le32 module_idx; 2744 u8 level; 2745 u8 _rsv2[3]; 2746 } data = { 2747 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 2748 .len = cpu_to_le16(sizeof(data) - 4), 2749 .module_idx = cpu_to_le32(module), 2750 .level = level, 2751 }; 2752 2753 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2754 sizeof(data), false); 2755 } 2756 2757 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 2758 { 2759 struct { 2760 u8 enable; 2761 u8 _rsv[3]; 2762 } __packed req = { 2763 .enable = enabled 2764 }; 2765 2766 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 2767 sizeof(req), false); 2768 } 2769 2770 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 2771 { 2772 struct vow_rx_airtime *req; 2773 struct tlv *tlv; 2774 2775 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 2776 req = (struct vow_rx_airtime *)tlv; 2777 req->enable = true; 2778 req->band = band_idx; 2779 2780 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 2781 req = (struct vow_rx_airtime *)tlv; 2782 req->enable = true; 2783 req->band = band_idx; 2784 } 2785 2786 static int 2787 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 2788 { 2789 struct uni_header hdr = {}; 2790 struct sk_buff *skb; 2791 int len, num; 2792 2793 num = 2 + 2 * (dev->dbdc_support + dev->tbtc_support); 2794 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 2795 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2796 if (!skb) 2797 return -ENOMEM; 2798 2799 skb_put_data(skb, &hdr, sizeof(hdr)); 2800 2801 mt7996_add_rx_airtime_tlv(skb, dev->mt76.phy.band_idx); 2802 2803 if (dev->dbdc_support) 2804 mt7996_add_rx_airtime_tlv(skb, MT_BAND1); 2805 2806 if (dev->tbtc_support) 2807 mt7996_add_rx_airtime_tlv(skb, MT_BAND2); 2808 2809 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2810 MCU_WM_UNI_CMD(VOW), true); 2811 } 2812 2813 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 2814 { 2815 int ret; 2816 2817 /* force firmware operation mode into normal state, 2818 * which should be set before firmware download stage. 2819 */ 2820 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 2821 2822 ret = mt7996_driver_own(dev, 0); 2823 if (ret) 2824 return ret; 2825 /* set driver own for band1 when two hif exist */ 2826 if (dev->hif2) { 2827 ret = mt7996_driver_own(dev, 1); 2828 if (ret) 2829 return ret; 2830 } 2831 2832 ret = mt7996_load_firmware(dev); 2833 if (ret) 2834 return ret; 2835 2836 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 2837 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 2838 if (ret) 2839 return ret; 2840 2841 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 2842 if (ret) 2843 return ret; 2844 2845 ret = mt7996_mcu_set_mwds(dev, 1); 2846 if (ret) 2847 return ret; 2848 2849 ret = mt7996_mcu_init_rx_airtime(dev); 2850 if (ret) 2851 return ret; 2852 2853 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 2854 MCU_WA_PARAM_RED, 0, 0); 2855 } 2856 2857 int mt7996_mcu_init(struct mt7996_dev *dev) 2858 { 2859 static const struct mt76_mcu_ops mt7996_mcu_ops = { 2860 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 2861 .mcu_skb_send_msg = mt7996_mcu_send_message, 2862 .mcu_parse_response = mt7996_mcu_parse_response, 2863 }; 2864 2865 dev->mt76.mcu_ops = &mt7996_mcu_ops; 2866 2867 return mt7996_mcu_init_firmware(dev); 2868 } 2869 2870 void mt7996_mcu_exit(struct mt7996_dev *dev) 2871 { 2872 mt7996_mcu_restart(&dev->mt76); 2873 if (mt7996_firmware_state(dev, false)) { 2874 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 2875 goto out; 2876 } 2877 2878 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 2879 if (dev->hif2) 2880 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 2881 MT_TOP_LPCR_HOST_FW_OWN); 2882 out: 2883 skb_queue_purge(&dev->mt76.mcu.res_q); 2884 } 2885 2886 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 2887 { 2888 struct { 2889 u8 __rsv[4]; 2890 } __packed hdr; 2891 struct hdr_trans_blacklist *req_blacklist; 2892 struct hdr_trans_en *req_en; 2893 struct sk_buff *skb; 2894 struct tlv *tlv; 2895 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 2896 2897 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2898 if (!skb) 2899 return -ENOMEM; 2900 2901 skb_put_data(skb, &hdr, sizeof(hdr)); 2902 2903 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 2904 req_en = (struct hdr_trans_en *)tlv; 2905 req_en->enable = hdr_trans; 2906 2907 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 2908 sizeof(struct hdr_trans_vlan)); 2909 2910 if (hdr_trans) { 2911 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 2912 sizeof(*req_blacklist)); 2913 req_blacklist = (struct hdr_trans_blacklist *)tlv; 2914 req_blacklist->enable = 1; 2915 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 2916 } 2917 2918 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2919 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 2920 } 2921 2922 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif) 2923 { 2924 #define MCU_EDCA_AC_PARAM 0 2925 #define WMM_AIFS_SET BIT(0) 2926 #define WMM_CW_MIN_SET BIT(1) 2927 #define WMM_CW_MAX_SET BIT(2) 2928 #define WMM_TXOP_SET BIT(3) 2929 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 2930 WMM_CW_MAX_SET | WMM_TXOP_SET) 2931 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2932 struct { 2933 u8 bss_idx; 2934 u8 __rsv[3]; 2935 } __packed hdr = { 2936 .bss_idx = mvif->mt76.idx, 2937 }; 2938 struct sk_buff *skb; 2939 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 2940 int ac; 2941 2942 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2943 if (!skb) 2944 return -ENOMEM; 2945 2946 skb_put_data(skb, &hdr, sizeof(hdr)); 2947 2948 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 2949 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; 2950 struct edca *e; 2951 struct tlv *tlv; 2952 2953 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 2954 2955 e = (struct edca *)tlv; 2956 e->set = WMM_PARAM_SET; 2957 e->queue = ac; 2958 e->aifs = q->aifs; 2959 e->txop = cpu_to_le16(q->txop); 2960 2961 if (q->cw_min) 2962 e->cw_min = fls(q->cw_min); 2963 else 2964 e->cw_min = 5; 2965 2966 if (q->cw_max) 2967 e->cw_max = fls(q->cw_max); 2968 else 2969 e->cw_max = 10; 2970 } 2971 2972 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2973 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 2974 } 2975 2976 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 2977 { 2978 struct { 2979 u8 _rsv[4]; 2980 2981 __le16 tag; 2982 __le16 len; 2983 2984 __le32 ctrl; 2985 __le16 min_lpn; 2986 u8 rsv[2]; 2987 } __packed req = { 2988 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 2989 .len = cpu_to_le16(sizeof(req) - 4), 2990 2991 .ctrl = cpu_to_le32(0x1), 2992 .min_lpn = cpu_to_le16(val), 2993 }; 2994 2995 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 2996 &req, sizeof(req), true); 2997 } 2998 2999 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3000 const struct mt7996_dfs_pulse *pulse) 3001 { 3002 struct { 3003 u8 _rsv[4]; 3004 3005 __le16 tag; 3006 __le16 len; 3007 3008 __le32 ctrl; 3009 3010 __le32 max_width; /* us */ 3011 __le32 max_pwr; /* dbm */ 3012 __le32 min_pwr; /* dbm */ 3013 __le32 min_stgr_pri; /* us */ 3014 __le32 max_stgr_pri; /* us */ 3015 __le32 min_cr_pri; /* us */ 3016 __le32 max_cr_pri; /* us */ 3017 } __packed req = { 3018 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3019 .len = cpu_to_le16(sizeof(req) - 4), 3020 3021 .ctrl = cpu_to_le32(0x3), 3022 3023 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3024 __req_field(max_width), 3025 __req_field(max_pwr), 3026 __req_field(min_pwr), 3027 __req_field(min_stgr_pri), 3028 __req_field(max_stgr_pri), 3029 __req_field(min_cr_pri), 3030 __req_field(max_cr_pri), 3031 #undef __req_field 3032 }; 3033 3034 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3035 &req, sizeof(req), true); 3036 } 3037 3038 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3039 const struct mt7996_dfs_pattern *pattern) 3040 { 3041 struct { 3042 u8 _rsv[4]; 3043 3044 __le16 tag; 3045 __le16 len; 3046 3047 __le32 ctrl; 3048 __le16 radar_type; 3049 3050 u8 enb; 3051 u8 stgr; 3052 u8 min_crpn; 3053 u8 max_crpn; 3054 u8 min_crpr; 3055 u8 min_pw; 3056 __le32 min_pri; 3057 __le32 max_pri; 3058 u8 max_pw; 3059 u8 min_crbn; 3060 u8 max_crbn; 3061 u8 min_stgpn; 3062 u8 max_stgpn; 3063 u8 min_stgpr; 3064 u8 rsv[2]; 3065 __le32 min_stgpr_diff; 3066 } __packed req = { 3067 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3068 .len = cpu_to_le16(sizeof(req) - 4), 3069 3070 .ctrl = cpu_to_le32(0x2), 3071 .radar_type = cpu_to_le16(index), 3072 3073 #define __req_field_u8(field) .field = pattern->field 3074 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3075 __req_field_u8(enb), 3076 __req_field_u8(stgr), 3077 __req_field_u8(min_crpn), 3078 __req_field_u8(max_crpn), 3079 __req_field_u8(min_crpr), 3080 __req_field_u8(min_pw), 3081 __req_field_u32(min_pri), 3082 __req_field_u32(max_pri), 3083 __req_field_u8(max_pw), 3084 __req_field_u8(min_crbn), 3085 __req_field_u8(max_crbn), 3086 __req_field_u8(min_stgpn), 3087 __req_field_u8(max_stgpn), 3088 __req_field_u8(min_stgpr), 3089 __req_field_u32(min_stgpr_diff), 3090 #undef __req_field_u8 3091 #undef __req_field_u32 3092 }; 3093 3094 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3095 &req, sizeof(req), true); 3096 } 3097 3098 static int 3099 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3100 struct cfg80211_chan_def *chandef, 3101 int cmd) 3102 { 3103 struct mt7996_dev *dev = phy->dev; 3104 struct mt76_phy *mphy = phy->mt76; 3105 struct ieee80211_channel *chan = mphy->chandef.chan; 3106 int freq = mphy->chandef.center_freq1; 3107 struct mt7996_mcu_background_chain_ctrl req = { 3108 .tag = cpu_to_le16(0), 3109 .len = cpu_to_le16(sizeof(req) - 4), 3110 .monitor_scan_type = 2, /* simple rx */ 3111 }; 3112 3113 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3114 return -EINVAL; 3115 3116 if (!cfg80211_chandef_valid(&mphy->chandef)) 3117 return -EINVAL; 3118 3119 switch (cmd) { 3120 case CH_SWITCH_BACKGROUND_SCAN_START: { 3121 req.chan = chan->hw_value; 3122 req.central_chan = ieee80211_frequency_to_channel(freq); 3123 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3124 req.monitor_chan = chandef->chan->hw_value; 3125 req.monitor_central_chan = 3126 ieee80211_frequency_to_channel(chandef->center_freq1); 3127 req.monitor_bw = mt76_connac_chan_bw(chandef); 3128 req.band_idx = phy->mt76->band_idx; 3129 req.scan_mode = 1; 3130 break; 3131 } 3132 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3133 req.monitor_chan = chandef->chan->hw_value; 3134 req.monitor_central_chan = 3135 ieee80211_frequency_to_channel(chandef->center_freq1); 3136 req.band_idx = phy->mt76->band_idx; 3137 req.scan_mode = 2; 3138 break; 3139 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3140 req.chan = chan->hw_value; 3141 req.central_chan = ieee80211_frequency_to_channel(freq); 3142 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3143 req.tx_stream = hweight8(mphy->antenna_mask); 3144 req.rx_stream = mphy->antenna_mask; 3145 break; 3146 default: 3147 return -EINVAL; 3148 } 3149 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3150 3151 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 3152 &req, sizeof(req), false); 3153 } 3154 3155 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 3156 struct cfg80211_chan_def *chandef) 3157 { 3158 struct mt7996_dev *dev = phy->dev; 3159 int err, region; 3160 3161 if (!chandef) { /* disable offchain */ 3162 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2, 3163 0, 0); 3164 if (err) 3165 return err; 3166 3167 return mt7996_mcu_background_chain_ctrl(phy, NULL, 3168 CH_SWITCH_BACKGROUND_SCAN_STOP); 3169 } 3170 3171 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 3172 CH_SWITCH_BACKGROUND_SCAN_START); 3173 if (err) 3174 return err; 3175 3176 switch (dev->mt76.region) { 3177 case NL80211_DFS_ETSI: 3178 region = 0; 3179 break; 3180 case NL80211_DFS_JP: 3181 region = 2; 3182 break; 3183 case NL80211_DFS_FCC: 3184 default: 3185 region = 1; 3186 break; 3187 } 3188 3189 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2, 3190 0, region); 3191 } 3192 3193 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 3194 { 3195 static const u8 ch_band[] = { 3196 [NL80211_BAND_2GHZ] = 0, 3197 [NL80211_BAND_5GHZ] = 1, 3198 [NL80211_BAND_6GHZ] = 2, 3199 }; 3200 struct mt7996_dev *dev = phy->dev; 3201 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3202 int freq1 = chandef->center_freq1; 3203 u8 band_idx = phy->mt76->band_idx; 3204 struct { 3205 /* fixed field */ 3206 u8 __rsv[4]; 3207 3208 __le16 tag; 3209 __le16 len; 3210 u8 control_ch; 3211 u8 center_ch; 3212 u8 bw; 3213 u8 tx_path_num; 3214 u8 rx_path; /* mask or num */ 3215 u8 switch_reason; 3216 u8 band_idx; 3217 u8 center_ch2; /* for 80+80 only */ 3218 __le16 cac_case; 3219 u8 channel_band; 3220 u8 rsv0; 3221 __le32 outband_freq; 3222 u8 txpower_drop; 3223 u8 ap_bw; 3224 u8 ap_center_ch; 3225 u8 rsv1[53]; 3226 } __packed req = { 3227 .tag = cpu_to_le16(tag), 3228 .len = cpu_to_le16(sizeof(req) - 4), 3229 .control_ch = chandef->chan->hw_value, 3230 .center_ch = ieee80211_frequency_to_channel(freq1), 3231 .bw = mt76_connac_chan_bw(chandef), 3232 .tx_path_num = hweight16(phy->mt76->chainmask), 3233 .rx_path = phy->mt76->chainmask >> dev->chainshift[band_idx], 3234 .band_idx = band_idx, 3235 .channel_band = ch_band[chandef->chan->band], 3236 }; 3237 3238 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 3239 req.switch_reason = CH_SWITCH_NORMAL; 3240 else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL || 3241 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 3242 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 3243 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 3244 NL80211_IFTYPE_AP)) 3245 req.switch_reason = CH_SWITCH_DFS; 3246 else 3247 req.switch_reason = CH_SWITCH_NORMAL; 3248 3249 if (tag == UNI_CHANNEL_SWITCH) 3250 req.rx_path = hweight8(req.rx_path); 3251 3252 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 3253 int freq2 = chandef->center_freq2; 3254 3255 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 3256 } 3257 3258 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 3259 &req, sizeof(req), true); 3260 } 3261 3262 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 3263 { 3264 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 3265 #define PAGE_IDX_MASK GENMASK(4, 2) 3266 #define PER_PAGE_SIZE 0x400 3267 struct mt7996_mcu_eeprom req = { 3268 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3269 .buffer_mode = EE_MODE_BUFFER 3270 }; 3271 u16 eeprom_size = MT7996_EEPROM_SIZE; 3272 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 3273 u8 *eep = (u8 *)dev->mt76.eeprom.data; 3274 int eep_len, i; 3275 3276 for (i = 0; i < total; i++, eep += eep_len) { 3277 struct sk_buff *skb; 3278 int ret, msg_len; 3279 3280 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 3281 eep_len = eeprom_size % PER_PAGE_SIZE; 3282 else 3283 eep_len = PER_PAGE_SIZE; 3284 3285 msg_len = sizeof(req) + eep_len; 3286 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 3287 if (!skb) 3288 return -ENOMEM; 3289 3290 req.len = cpu_to_le16(msg_len - 4); 3291 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 3292 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 3293 req.buf_len = cpu_to_le16(eep_len); 3294 3295 skb_put_data(skb, &req, sizeof(req)); 3296 skb_put_data(skb, eep, eep_len); 3297 3298 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 3299 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 3300 if (ret) 3301 return ret; 3302 } 3303 3304 return 0; 3305 } 3306 3307 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 3308 { 3309 struct mt7996_mcu_eeprom req = { 3310 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3311 .len = cpu_to_le16(sizeof(req) - 4), 3312 .buffer_mode = EE_MODE_EFUSE, 3313 .format = EE_FORMAT_WHOLE 3314 }; 3315 3316 if (dev->flash_mode) 3317 return mt7996_mcu_set_eeprom_flash(dev); 3318 3319 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 3320 &req, sizeof(req), true); 3321 } 3322 3323 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset) 3324 { 3325 struct { 3326 u8 _rsv[4]; 3327 3328 __le16 tag; 3329 __le16 len; 3330 __le32 addr; 3331 __le32 valid; 3332 u8 data[16]; 3333 } __packed req = { 3334 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 3335 .len = cpu_to_le16(sizeof(req) - 4), 3336 .addr = cpu_to_le32(round_down(offset, 3337 MT7996_EEPROM_BLOCK_SIZE)), 3338 }; 3339 struct sk_buff *skb; 3340 bool valid; 3341 int ret; 3342 3343 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3344 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 3345 &req, sizeof(req), true, &skb); 3346 if (ret) 3347 return ret; 3348 3349 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 3350 if (valid) { 3351 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3352 u8 *buf = (u8 *)dev->mt76.eeprom.data + addr; 3353 3354 skb_pull(skb, 64); 3355 memcpy(buf, skb->data, MT7996_EEPROM_BLOCK_SIZE); 3356 } 3357 3358 dev_kfree_skb(skb); 3359 3360 return 0; 3361 } 3362 3363 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 3364 { 3365 struct { 3366 u8 _rsv[4]; 3367 3368 __le16 tag; 3369 __le16 len; 3370 u8 num; 3371 u8 version; 3372 u8 die_idx; 3373 u8 _rsv2; 3374 } __packed req = { 3375 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 3376 .len = cpu_to_le16(sizeof(req) - 4), 3377 .version = 2, 3378 }; 3379 struct sk_buff *skb; 3380 int ret; 3381 3382 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3383 sizeof(req), true, &skb); 3384 if (ret) 3385 return ret; 3386 3387 *block_num = *(u8 *)(skb->data + 8); 3388 dev_kfree_skb(skb); 3389 3390 return 0; 3391 } 3392 3393 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3394 { 3395 #define NIC_CAP 3 3396 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3397 struct { 3398 u8 _rsv[4]; 3399 3400 __le16 tag; 3401 __le16 len; 3402 } __packed req = { 3403 .tag = cpu_to_le16(NIC_CAP), 3404 .len = cpu_to_le16(sizeof(req) - 4), 3405 }; 3406 struct sk_buff *skb; 3407 u8 *buf; 3408 int ret; 3409 3410 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3411 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3412 sizeof(req), true, &skb); 3413 if (ret) 3414 return ret; 3415 3416 /* fixed field */ 3417 skb_pull(skb, 4); 3418 3419 buf = skb->data; 3420 while (buf - skb->data < skb->len) { 3421 struct tlv *tlv = (struct tlv *)buf; 3422 3423 switch (le16_to_cpu(tlv->tag)) { 3424 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3425 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3426 break; 3427 default: 3428 break; 3429 } 3430 3431 buf += le16_to_cpu(tlv->len); 3432 } 3433 3434 dev_kfree_skb(skb); 3435 3436 return 0; 3437 } 3438 3439 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3440 { 3441 struct { 3442 struct { 3443 u8 band; 3444 u8 __rsv[3]; 3445 } hdr; 3446 struct { 3447 __le16 tag; 3448 __le16 len; 3449 __le32 offs; 3450 } data[4]; 3451 } __packed req = { 3452 .hdr.band = phy->mt76->band_idx, 3453 }; 3454 /* strict order */ 3455 static const u32 offs[] = { 3456 UNI_MIB_TX_TIME, 3457 UNI_MIB_RX_TIME, 3458 UNI_MIB_OBSS_AIRTIME, 3459 UNI_MIB_NON_WIFI_TIME, 3460 }; 3461 struct mt76_channel_state *state = phy->mt76->chan_state; 3462 struct mt76_channel_state *state_ts = &phy->state_ts; 3463 struct mt7996_dev *dev = phy->dev; 3464 struct mt7996_mcu_mib *res; 3465 struct sk_buff *skb; 3466 int i, ret; 3467 3468 for (i = 0; i < 4; i++) { 3469 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3470 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3471 req.data[i].offs = cpu_to_le32(offs[i]); 3472 } 3473 3474 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3475 &req, sizeof(req), true, &skb); 3476 if (ret) 3477 return ret; 3478 3479 skb_pull(skb, sizeof(req.hdr)); 3480 3481 res = (struct mt7996_mcu_mib *)(skb->data); 3482 3483 if (chan_switch) 3484 goto out; 3485 3486 #define __res_u64(s) le64_to_cpu(res[s].data) 3487 state->cc_tx += __res_u64(1) - state_ts->cc_tx; 3488 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx; 3489 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx; 3490 state->cc_busy += __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3) - 3491 state_ts->cc_busy; 3492 3493 out: 3494 state_ts->cc_tx = __res_u64(1); 3495 state_ts->cc_bss_rx = __res_u64(2); 3496 state_ts->cc_rx = __res_u64(2) + __res_u64(3); 3497 state_ts->cc_busy = __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3); 3498 #undef __res_u64 3499 3500 dev_kfree_skb(skb); 3501 3502 return 0; 3503 } 3504 3505 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 3506 { 3507 struct { 3508 u8 rsv[4]; 3509 3510 __le16 tag; 3511 __le16 len; 3512 3513 union { 3514 struct { 3515 __le32 mask; 3516 } __packed set; 3517 3518 struct { 3519 u8 method; 3520 u8 band; 3521 u8 rsv2[2]; 3522 } __packed trigger; 3523 }; 3524 } __packed req = { 3525 .tag = cpu_to_le16(action), 3526 .len = cpu_to_le16(sizeof(req) - 4), 3527 }; 3528 3529 switch (action) { 3530 case UNI_CMD_SER_SET: 3531 req.set.mask = cpu_to_le32(val); 3532 break; 3533 case UNI_CMD_SER_TRIGGER: 3534 req.trigger.method = val; 3535 req.trigger.band = band; 3536 break; 3537 default: 3538 return -EINVAL; 3539 } 3540 3541 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 3542 &req, sizeof(req), false); 3543 } 3544 3545 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 3546 { 3547 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 3548 #define BF_PROCESSING 4 3549 struct uni_header hdr; 3550 struct sk_buff *skb; 3551 struct tlv *tlv; 3552 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 3553 3554 memset(&hdr, 0, sizeof(hdr)); 3555 3556 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3557 if (!skb) 3558 return -ENOMEM; 3559 3560 skb_put_data(skb, &hdr, sizeof(hdr)); 3561 3562 switch (action) { 3563 case BF_SOUNDING_ON: { 3564 struct bf_sounding_on *req_snd_on; 3565 3566 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 3567 req_snd_on = (struct bf_sounding_on *)tlv; 3568 req_snd_on->snd_mode = BF_PROCESSING; 3569 break; 3570 } 3571 case BF_HW_EN_UPDATE: { 3572 struct bf_hw_en_status_update *req_hw_en; 3573 3574 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 3575 req_hw_en = (struct bf_hw_en_status_update *)tlv; 3576 req_hw_en->ebf = true; 3577 req_hw_en->ibf = dev->ibf; 3578 break; 3579 } 3580 case BF_MOD_EN_CTRL: { 3581 struct bf_mod_en_ctrl *req_mod_en; 3582 3583 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 3584 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 3585 req_mod_en->bf_num = 3; 3586 req_mod_en->bf_bitmap = GENMASK(2, 0); 3587 break; 3588 } 3589 default: 3590 return -EINVAL; 3591 } 3592 3593 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 3594 } 3595 3596 static int 3597 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 3598 { 3599 struct mt7996_dev *dev = phy->dev; 3600 struct { 3601 u8 band_idx; 3602 u8 __rsv[3]; 3603 3604 __le16 tag; 3605 __le16 len; 3606 3607 __le32 val; 3608 } __packed req = { 3609 .band_idx = phy->mt76->band_idx, 3610 .tag = cpu_to_le16(action), 3611 .len = cpu_to_le16(sizeof(req) - 4), 3612 .val = cpu_to_le32(val), 3613 }; 3614 3615 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3616 &req, sizeof(req), true); 3617 } 3618 3619 static int 3620 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 3621 struct ieee80211_he_obss_pd *he_obss_pd) 3622 { 3623 struct mt7996_dev *dev = phy->dev; 3624 u8 max_th = 82, non_srg_max_th = 62; 3625 struct { 3626 u8 band_idx; 3627 u8 __rsv[3]; 3628 3629 __le16 tag; 3630 __le16 len; 3631 3632 u8 pd_th_non_srg; 3633 u8 pd_th_srg; 3634 u8 period_offs; 3635 u8 rcpi_src; 3636 __le16 obss_pd_min; 3637 __le16 obss_pd_min_srg; 3638 u8 resp_txpwr_mode; 3639 u8 txpwr_restrict_mode; 3640 u8 txpwr_ref; 3641 u8 __rsv2[3]; 3642 } __packed req = { 3643 .band_idx = phy->mt76->band_idx, 3644 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 3645 .len = cpu_to_le16(sizeof(req) - 4), 3646 .obss_pd_min = cpu_to_le16(max_th), 3647 .obss_pd_min_srg = cpu_to_le16(max_th), 3648 .txpwr_restrict_mode = 2, 3649 .txpwr_ref = 21 3650 }; 3651 int ret; 3652 3653 /* disable firmware dynamical PD asjustment */ 3654 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 3655 if (ret) 3656 return ret; 3657 3658 if (he_obss_pd->sr_ctrl & 3659 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 3660 req.pd_th_non_srg = max_th; 3661 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 3662 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 3663 else 3664 req.pd_th_non_srg = non_srg_max_th; 3665 3666 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 3667 req.pd_th_srg = max_th - he_obss_pd->max_offset; 3668 3669 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3670 &req, sizeof(req), true); 3671 } 3672 3673 static int 3674 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif, 3675 struct ieee80211_he_obss_pd *he_obss_pd) 3676 { 3677 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3678 struct mt7996_dev *dev = phy->dev; 3679 u8 omac = mvif->mt76.omac_idx; 3680 struct { 3681 u8 band_idx; 3682 u8 __rsv[3]; 3683 3684 __le16 tag; 3685 __le16 len; 3686 3687 u8 omac; 3688 u8 __rsv2[3]; 3689 u8 flag[20]; 3690 } __packed req = { 3691 .band_idx = phy->mt76->band_idx, 3692 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 3693 .len = cpu_to_le16(sizeof(req) - 4), 3694 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 3695 }; 3696 int ret; 3697 3698 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 3699 req.flag[req.omac] = 0xf; 3700 else 3701 return 0; 3702 3703 /* switch to normal AP mode */ 3704 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 3705 if (ret) 3706 return ret; 3707 3708 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3709 &req, sizeof(req), true); 3710 } 3711 3712 static int 3713 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 3714 struct ieee80211_he_obss_pd *he_obss_pd) 3715 { 3716 struct mt7996_dev *dev = phy->dev; 3717 struct { 3718 u8 band_idx; 3719 u8 __rsv[3]; 3720 3721 __le16 tag; 3722 __le16 len; 3723 3724 __le32 color_l[2]; 3725 __le32 color_h[2]; 3726 __le32 bssid_l[2]; 3727 __le32 bssid_h[2]; 3728 } __packed req = { 3729 .band_idx = phy->mt76->band_idx, 3730 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 3731 .len = cpu_to_le16(sizeof(req) - 4), 3732 }; 3733 u32 bitmap; 3734 3735 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 3736 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 3737 3738 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 3739 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 3740 3741 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 3742 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 3743 3744 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 3745 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 3746 3747 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 3748 sizeof(req), true); 3749 } 3750 3751 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif, 3752 struct ieee80211_he_obss_pd *he_obss_pd) 3753 { 3754 int ret; 3755 3756 /* enable firmware scene detection algorithms */ 3757 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 3758 sr_scene_detect); 3759 if (ret) 3760 return ret; 3761 3762 /* firmware dynamically adjusts PD threshold so skip manual control */ 3763 if (sr_scene_detect && !he_obss_pd->enable) 3764 return 0; 3765 3766 /* enable spatial reuse */ 3767 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 3768 he_obss_pd->enable); 3769 if (ret) 3770 return ret; 3771 3772 if (sr_scene_detect || !he_obss_pd->enable) 3773 return 0; 3774 3775 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 3776 if (ret) 3777 return ret; 3778 3779 /* set SRG/non-SRG OBSS PD threshold */ 3780 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 3781 if (ret) 3782 return ret; 3783 3784 /* Set SR prohibit */ 3785 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 3786 if (ret) 3787 return ret; 3788 3789 /* set SRG BSS color/BSSID bitmap */ 3790 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 3791 } 3792 3793 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3794 struct cfg80211_he_bss_color *he_bss_color) 3795 { 3796 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 3797 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3798 struct bss_color_tlv *bss_color; 3799 struct sk_buff *skb; 3800 struct tlv *tlv; 3801 3802 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len); 3803 if (IS_ERR(skb)) 3804 return PTR_ERR(skb); 3805 3806 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 3807 sizeof(*bss_color)); 3808 bss_color = (struct bss_color_tlv *)tlv; 3809 bss_color->enable = he_bss_color->enabled; 3810 bss_color->color = he_bss_color->color; 3811 3812 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3813 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 3814 } 3815 3816 #define TWT_AGRT_TRIGGER BIT(0) 3817 #define TWT_AGRT_ANNOUNCE BIT(1) 3818 #define TWT_AGRT_PROTECT BIT(2) 3819 3820 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 3821 struct mt7996_vif *mvif, 3822 struct mt7996_twt_flow *flow, 3823 int cmd) 3824 { 3825 struct { 3826 /* fixed field */ 3827 u8 bss; 3828 u8 _rsv[3]; 3829 3830 __le16 tag; 3831 __le16 len; 3832 u8 tbl_idx; 3833 u8 cmd; 3834 u8 own_mac_idx; 3835 u8 flowid; /* 0xff for group id */ 3836 __le16 peer_id; /* specify the peer_id (msb=0) 3837 * or group_id (msb=1) 3838 */ 3839 u8 duration; /* 256 us */ 3840 u8 bss_idx; 3841 __le64 start_tsf; 3842 __le16 mantissa; 3843 u8 exponent; 3844 u8 is_ap; 3845 u8 agrt_params; 3846 u8 __rsv2[23]; 3847 } __packed req = { 3848 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 3849 .len = cpu_to_le16(sizeof(req) - 4), 3850 .tbl_idx = flow->table_id, 3851 .cmd = cmd, 3852 .own_mac_idx = mvif->mt76.omac_idx, 3853 .flowid = flow->id, 3854 .peer_id = cpu_to_le16(flow->wcid), 3855 .duration = flow->duration, 3856 .bss = mvif->mt76.idx, 3857 .bss_idx = mvif->mt76.idx, 3858 .start_tsf = cpu_to_le64(flow->tsf), 3859 .mantissa = flow->mantissa, 3860 .exponent = flow->exp, 3861 .is_ap = true, 3862 }; 3863 3864 if (flow->protection) 3865 req.agrt_params |= TWT_AGRT_PROTECT; 3866 if (!flow->flowtype) 3867 req.agrt_params |= TWT_AGRT_ANNOUNCE; 3868 if (flow->trigger) 3869 req.agrt_params |= TWT_AGRT_TRIGGER; 3870 3871 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 3872 &req, sizeof(req), true); 3873 } 3874 3875 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 3876 { 3877 struct { 3878 u8 band_idx; 3879 u8 _rsv[3]; 3880 3881 __le16 tag; 3882 __le16 len; 3883 __le32 len_thresh; 3884 __le32 pkt_thresh; 3885 } __packed req = { 3886 .band_idx = phy->mt76->band_idx, 3887 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 3888 .len = cpu_to_le16(sizeof(req) - 4), 3889 .len_thresh = cpu_to_le32(val), 3890 .pkt_thresh = cpu_to_le32(0x2), 3891 }; 3892 3893 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 3894 &req, sizeof(req), true); 3895 } 3896 3897 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 3898 { 3899 struct { 3900 u8 band_idx; 3901 u8 _rsv[3]; 3902 3903 __le16 tag; 3904 __le16 len; 3905 u8 enable; 3906 u8 _rsv2[3]; 3907 } __packed req = { 3908 .band_idx = phy->mt76->band_idx, 3909 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 3910 .len = cpu_to_le16(sizeof(req) - 4), 3911 .enable = enable, 3912 }; 3913 3914 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 3915 &req, sizeof(req), true); 3916 } 3917 3918 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 3919 u8 rx_sel, u8 val) 3920 { 3921 struct { 3922 u8 _rsv[4]; 3923 3924 __le16 tag; 3925 __le16 len; 3926 3927 u8 ctrl; 3928 u8 rdd_idx; 3929 u8 rdd_rx_sel; 3930 u8 val; 3931 u8 rsv[4]; 3932 } __packed req = { 3933 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 3934 .len = cpu_to_le16(sizeof(req) - 4), 3935 .ctrl = cmd, 3936 .rdd_idx = index, 3937 .rdd_rx_sel = rx_sel, 3938 .val = val, 3939 }; 3940 3941 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3942 &req, sizeof(req), true); 3943 } 3944 3945 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 3946 struct ieee80211_vif *vif, 3947 struct ieee80211_sta *sta) 3948 { 3949 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3950 struct mt7996_sta *msta; 3951 struct sk_buff *skb; 3952 3953 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 3954 3955 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 3956 &msta->wcid, 3957 MT7996_STA_UPDATE_MAX_SIZE); 3958 if (IS_ERR(skb)) 3959 return PTR_ERR(skb); 3960 3961 /* starec hdr trans */ 3962 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta); 3963 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3964 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 3965 } 3966 3967 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 3968 { 3969 struct { 3970 u8 __rsv1[4]; 3971 3972 __le16 tag; 3973 __le16 len; 3974 __le16 idx; 3975 u8 __rsv2[2]; 3976 __le32 ofs; 3977 __le32 data; 3978 } __packed *res, req = { 3979 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 3980 .len = cpu_to_le16(sizeof(req) - 4), 3981 3982 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 3983 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 3984 .data = set ? cpu_to_le32(*val) : 0, 3985 }; 3986 struct sk_buff *skb; 3987 int ret; 3988 3989 if (set) 3990 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 3991 &req, sizeof(req), true); 3992 3993 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3994 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 3995 &req, sizeof(req), true, &skb); 3996 if (ret) 3997 return ret; 3998 3999 res = (void *)skb->data; 4000 *val = le32_to_cpu(res->data); 4001 dev_kfree_skb(skb); 4002 4003 return 0; 4004 } 4005 4006 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 4007 { 4008 struct { 4009 __le16 tag; 4010 __le16 len; 4011 u8 enable; 4012 u8 rsv[3]; 4013 } __packed req = { 4014 .len = cpu_to_le16(sizeof(req) - 4), 4015 .enable = true, 4016 }; 4017 4018 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 4019 &req, sizeof(req), false); 4020 } 4021 4022 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u8 val) 4023 { 4024 struct { 4025 u8 __rsv1[4]; 4026 4027 __le16 tag; 4028 __le16 len; 4029 4030 union { 4031 struct { 4032 u8 type; 4033 u8 __rsv2[3]; 4034 } __packed platform_type; 4035 struct { 4036 u8 type; 4037 u8 dest; 4038 u8 __rsv2[2]; 4039 } __packed bypass_mode; 4040 struct { 4041 u8 path; 4042 u8 __rsv2[3]; 4043 } __packed txfree_path; 4044 }; 4045 } __packed req = { 4046 .tag = cpu_to_le16(tag), 4047 .len = cpu_to_le16(sizeof(req) - 4), 4048 }; 4049 4050 switch (tag) { 4051 case UNI_RRO_SET_PLATFORM_TYPE: 4052 req.platform_type.type = val; 4053 break; 4054 case UNI_RRO_SET_BYPASS_MODE: 4055 req.bypass_mode.type = val; 4056 break; 4057 case UNI_RRO_SET_TXFREE_PATH: 4058 req.txfree_path.path = val; 4059 break; 4060 default: 4061 return -EINVAL; 4062 } 4063 4064 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4065 sizeof(req), true); 4066 } 4067 4068 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 4069 { 4070 struct mt7996_dev *dev = phy->dev; 4071 struct { 4072 u8 _rsv[4]; 4073 4074 __le16 tag; 4075 __le16 len; 4076 } __packed req = { 4077 .tag = cpu_to_le16(tag), 4078 .len = cpu_to_le16(sizeof(req) - 4), 4079 }; 4080 4081 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 4082 &req, sizeof(req), false); 4083 } 4084