1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 #define fw_name(_dev, name, ...) ({ \ 14 char *_fw; \ 15 switch (mt76_chip(&(_dev)->mt76)) { \ 16 case 0x7992: \ 17 switch ((_dev)->var.type) { \ 18 case MT7992_VAR_TYPE_23: \ 19 _fw = MT7992_##name##_23; \ 20 break; \ 21 default: \ 22 _fw = MT7992_##name; \ 23 } \ 24 break; \ 25 case 0x7990: \ 26 default: \ 27 switch ((_dev)->var.type) { \ 28 case MT7996_VAR_TYPE_233: \ 29 _fw = MT7996_##name##_233; \ 30 break; \ 31 default: \ 32 _fw = MT7996_##name; \ 33 } \ 34 break; \ 35 } \ 36 _fw; \ 37 }) 38 39 struct mt7996_patch_hdr { 40 char build_date[16]; 41 char platform[4]; 42 __be32 hw_sw_ver; 43 __be32 patch_ver; 44 __be16 checksum; 45 u16 reserved; 46 struct { 47 __be32 patch_ver; 48 __be32 subsys; 49 __be32 feature; 50 __be32 n_region; 51 __be32 crc; 52 u32 reserved[11]; 53 } desc; 54 } __packed; 55 56 struct mt7996_patch_sec { 57 __be32 type; 58 __be32 offs; 59 __be32 size; 60 union { 61 __be32 spec[13]; 62 struct { 63 __be32 addr; 64 __be32 len; 65 __be32 sec_key_idx; 66 __be32 align_len; 67 u32 reserved[9]; 68 } info; 69 }; 70 } __packed; 71 72 struct mt7996_fw_trailer { 73 u8 chip_id; 74 u8 eco_code; 75 u8 n_region; 76 u8 format_ver; 77 u8 format_flag; 78 u8 reserved[2]; 79 char fw_ver[10]; 80 char build_date[15]; 81 u32 crc; 82 } __packed; 83 84 struct mt7996_fw_region { 85 __le32 decomp_crc; 86 __le32 decomp_len; 87 __le32 decomp_blk_sz; 88 u8 reserved[4]; 89 __le32 addr; 90 __le32 len; 91 u8 feature_set; 92 u8 reserved1[15]; 93 } __packed; 94 95 #define MCU_PATCH_ADDRESS 0x200000 96 97 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 98 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 99 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 100 101 static bool sr_scene_detect = true; 102 module_param(sr_scene_detect, bool, 0644); 103 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 104 105 static u8 106 mt7996_mcu_get_sta_nss(u16 mcs_map) 107 { 108 u8 nss; 109 110 for (nss = 8; nss > 0; nss--) { 111 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 112 113 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 114 break; 115 } 116 117 return nss - 1; 118 } 119 120 static void 121 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 122 u16 mcs_map) 123 { 124 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 125 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; 126 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; 127 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 128 129 for (nss = 0; nss < max_nss; nss++) { 130 int mcs; 131 132 switch ((mcs_map >> (2 * nss)) & 0x3) { 133 case IEEE80211_HE_MCS_SUPPORT_0_11: 134 mcs = GENMASK(11, 0); 135 break; 136 case IEEE80211_HE_MCS_SUPPORT_0_9: 137 mcs = GENMASK(9, 0); 138 break; 139 case IEEE80211_HE_MCS_SUPPORT_0_7: 140 mcs = GENMASK(7, 0); 141 break; 142 default: 143 mcs = 0; 144 } 145 146 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 147 148 switch (mcs) { 149 case 0 ... 7: 150 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 151 break; 152 case 8 ... 9: 153 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 154 break; 155 case 10 ... 11: 156 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 157 break; 158 default: 159 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 160 break; 161 } 162 mcs_map &= ~(0x3 << (nss * 2)); 163 mcs_map |= mcs << (nss * 2); 164 } 165 166 *he_mcs = cpu_to_le16(mcs_map); 167 } 168 169 static void 170 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 171 const u16 *mask) 172 { 173 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 174 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 175 176 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 177 switch (mcs_map & 0x3) { 178 case IEEE80211_VHT_MCS_SUPPORT_0_9: 179 mcs = GENMASK(9, 0); 180 break; 181 case IEEE80211_VHT_MCS_SUPPORT_0_8: 182 mcs = GENMASK(8, 0); 183 break; 184 case IEEE80211_VHT_MCS_SUPPORT_0_7: 185 mcs = GENMASK(7, 0); 186 break; 187 default: 188 mcs = 0; 189 } 190 191 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 192 } 193 } 194 195 static void 196 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 197 const u8 *mask) 198 { 199 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 200 201 for (nss = 0; nss < max_nss; nss++) 202 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 203 } 204 205 static int 206 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 207 struct sk_buff *skb, int seq) 208 { 209 struct mt7996_mcu_rxd *rxd; 210 struct mt7996_mcu_uni_event *event; 211 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 212 int ret = 0; 213 214 if (!skb) { 215 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 216 cmd, seq); 217 return -ETIMEDOUT; 218 } 219 220 rxd = (struct mt7996_mcu_rxd *)skb->data; 221 if (seq != rxd->seq) 222 return -EAGAIN; 223 224 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 225 skb_pull(skb, sizeof(*rxd) - 4); 226 ret = *skb->data; 227 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 228 rxd->eid == MCU_UNI_EVENT_RESULT) { 229 skb_pull(skb, sizeof(*rxd)); 230 event = (struct mt7996_mcu_uni_event *)skb->data; 231 ret = le32_to_cpu(event->status); 232 /* skip invalid event */ 233 if (mcu_cmd != event->cid) 234 ret = -EAGAIN; 235 } else { 236 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 237 } 238 239 return ret; 240 } 241 242 static int 243 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 244 int cmd, int *wait_seq) 245 { 246 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 247 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 248 struct mt76_connac2_mcu_uni_txd *uni_txd; 249 struct mt76_connac2_mcu_txd *mcu_txd; 250 enum mt76_mcuq_id qid; 251 __le32 *txd; 252 u32 val; 253 u8 seq; 254 255 mdev->mcu.timeout = 20 * HZ; 256 257 seq = ++dev->mt76.mcu.msg_seq & 0xf; 258 if (!seq) 259 seq = ++dev->mt76.mcu.msg_seq & 0xf; 260 261 if (cmd == MCU_CMD(FW_SCATTER)) { 262 qid = MT_MCUQ_FWDL; 263 goto exit; 264 } 265 266 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 267 txd = (__le32 *)skb_push(skb, txd_len); 268 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 269 qid = MT_MCUQ_WA; 270 else 271 qid = MT_MCUQ_WM; 272 273 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 274 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 275 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 276 txd[0] = cpu_to_le32(val); 277 278 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 279 txd[1] = cpu_to_le32(val); 280 281 if (cmd & __MCU_CMD_FIELD_UNI) { 282 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 283 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 284 uni_txd->cid = cpu_to_le16(mcu_cmd); 285 uni_txd->s2d_index = MCU_S2D_H2CN; 286 uni_txd->pkt_type = MCU_PKT_ID; 287 uni_txd->seq = seq; 288 289 if (cmd & __MCU_CMD_FIELD_QUERY) 290 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 291 else 292 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 293 294 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 295 uni_txd->s2d_index = MCU_S2D_H2CN; 296 else if (cmd & __MCU_CMD_FIELD_WA) 297 uni_txd->s2d_index = MCU_S2D_H2C; 298 else if (cmd & __MCU_CMD_FIELD_WM) 299 uni_txd->s2d_index = MCU_S2D_H2N; 300 301 goto exit; 302 } 303 304 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 305 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 306 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 307 MT_TX_MCU_PORT_RX_Q0)); 308 mcu_txd->pkt_type = MCU_PKT_ID; 309 mcu_txd->seq = seq; 310 311 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 312 mcu_txd->set_query = MCU_Q_NA; 313 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 314 if (mcu_txd->ext_cid) { 315 mcu_txd->ext_cid_ack = 1; 316 317 if (cmd & __MCU_CMD_FIELD_QUERY) 318 mcu_txd->set_query = MCU_Q_QUERY; 319 else 320 mcu_txd->set_query = MCU_Q_SET; 321 } 322 323 if (cmd & __MCU_CMD_FIELD_WA) 324 mcu_txd->s2d_index = MCU_S2D_H2C; 325 else 326 mcu_txd->s2d_index = MCU_S2D_H2N; 327 328 exit: 329 if (wait_seq) 330 *wait_seq = seq; 331 332 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 333 } 334 335 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 336 { 337 struct { 338 __le32 args[3]; 339 } req = { 340 .args = { 341 cpu_to_le32(a1), 342 cpu_to_le32(a2), 343 cpu_to_le32(a3), 344 }, 345 }; 346 347 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 348 } 349 350 static void 351 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 352 { 353 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 354 return; 355 356 ieee80211_csa_finish(vif, 0); 357 } 358 359 static void 360 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 361 { 362 struct mt76_phy *mphy = &dev->mt76.phy; 363 struct mt7996_mcu_rdd_report *r; 364 365 r = (struct mt7996_mcu_rdd_report *)skb->data; 366 367 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys)) 368 return; 369 370 if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy) 371 return; 372 373 if (r->band_idx == MT_RX_SEL2) 374 mphy = dev->rdd2_phy->mt76; 375 else 376 mphy = dev->mt76.phys[r->band_idx]; 377 378 if (!mphy) 379 return; 380 381 if (r->band_idx == MT_RX_SEL2) 382 cfg80211_background_radar_event(mphy->hw->wiphy, 383 &dev->rdd2_chandef, 384 GFP_ATOMIC); 385 else 386 ieee80211_radar_detected(mphy->hw, NULL); 387 dev->hw_pattern++; 388 } 389 390 static void 391 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 392 { 393 #define UNI_EVENT_FW_LOG_FORMAT 0 394 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 395 const char *data = (char *)&rxd[1] + 4, *type; 396 struct tlv *tlv = (struct tlv *)data; 397 int len; 398 399 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 400 len = skb->len - sizeof(*rxd); 401 data = (char *)&rxd[1]; 402 goto out; 403 } 404 405 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 406 return; 407 408 data += sizeof(*tlv) + 4; 409 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 410 411 out: 412 switch (rxd->s2d_index) { 413 case 0: 414 if (mt7996_debugfs_rx_log(dev, data, len)) 415 return; 416 417 type = "WM"; 418 break; 419 case 2: 420 type = "WA"; 421 break; 422 default: 423 type = "unknown"; 424 break; 425 } 426 427 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 428 } 429 430 static void 431 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 432 { 433 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 434 return; 435 436 ieee80211_color_change_finish(vif, 0); 437 } 438 439 static void 440 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 441 { 442 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 443 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 444 struct header { 445 u8 band; 446 u8 rsv[3]; 447 }; 448 struct mt76_phy *mphy = &dev->mt76.phy; 449 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 450 const char *data = (char *)&rxd[1], *tail; 451 struct header *hdr = (struct header *)data; 452 struct tlv *tlv = (struct tlv *)(data + 4); 453 454 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 455 return; 456 457 if (hdr->band && dev->mt76.phys[hdr->band]) 458 mphy = dev->mt76.phys[hdr->band]; 459 460 tail = skb->data + skb->len; 461 data += sizeof(struct header); 462 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 463 switch (le16_to_cpu(tlv->tag)) { 464 case UNI_EVENT_IE_COUNTDOWN_CSA: 465 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 466 IEEE80211_IFACE_ITER_RESUME_ALL, 467 mt7996_mcu_csa_finish, mphy->hw); 468 break; 469 case UNI_EVENT_IE_COUNTDOWN_BCC: 470 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 471 IEEE80211_IFACE_ITER_RESUME_ALL, 472 mt7996_mcu_cca_finish, mphy->hw); 473 break; 474 } 475 476 data += le16_to_cpu(tlv->len); 477 tlv = (struct tlv *)data; 478 } 479 } 480 481 static int 482 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate) 483 { 484 switch (mcu_rate->tx_mode) { 485 case MT_PHY_TYPE_CCK: 486 case MT_PHY_TYPE_OFDM: 487 break; 488 case MT_PHY_TYPE_HT: 489 case MT_PHY_TYPE_HT_GF: 490 case MT_PHY_TYPE_VHT: 491 if (mcu_rate->tx_gi) 492 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 493 else 494 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 495 break; 496 case MT_PHY_TYPE_HE_SU: 497 case MT_PHY_TYPE_HE_EXT_SU: 498 case MT_PHY_TYPE_HE_TB: 499 case MT_PHY_TYPE_HE_MU: 500 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2) 501 return -EINVAL; 502 rate->he_gi = mcu_rate->tx_gi; 503 break; 504 case MT_PHY_TYPE_EHT_SU: 505 case MT_PHY_TYPE_EHT_TRIG: 506 case MT_PHY_TYPE_EHT_MU: 507 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2) 508 return -EINVAL; 509 rate->eht_gi = mcu_rate->tx_gi; 510 break; 511 default: 512 return -EINVAL; 513 } 514 515 return 0; 516 } 517 518 static void 519 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 520 { 521 struct mt7996_mcu_all_sta_info_event *res; 522 u16 i; 523 524 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 525 526 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 527 528 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 529 u8 ac; 530 u16 wlan_idx; 531 struct mt76_wcid *wcid; 532 533 switch (le16_to_cpu(res->tag)) { 534 case UNI_ALL_STA_TXRX_RATE: 535 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx); 536 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 537 538 if (!wcid) 539 break; 540 541 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i])) 542 dev_err(dev->mt76.dev, "Failed to update TX GI\n"); 543 break; 544 case UNI_ALL_STA_TXRX_ADM_STAT: 545 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 546 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 547 548 if (!wcid) 549 break; 550 551 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 552 wcid->stats.tx_bytes += 553 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 554 wcid->stats.rx_bytes += 555 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 556 } 557 break; 558 case UNI_ALL_STA_TXRX_MSDU_COUNT: 559 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 560 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 561 562 if (!wcid) 563 break; 564 565 wcid->stats.tx_packets += 566 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 567 wcid->stats.rx_packets += 568 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 569 break; 570 default: 571 break; 572 } 573 } 574 } 575 576 static void 577 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb) 578 { 579 #define THERMAL_NOTIFY_TAG 0x4 580 #define THERMAL_NOTIFY 0x2 581 struct mt76_phy *mphy = &dev->mt76.phy; 582 struct mt7996_mcu_thermal_notify *n; 583 struct mt7996_phy *phy; 584 585 n = (struct mt7996_mcu_thermal_notify *)skb->data; 586 587 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG) 588 return; 589 590 if (n->event_id != THERMAL_NOTIFY) 591 return; 592 593 if (n->band_idx > MT_BAND2) 594 return; 595 596 mphy = dev->mt76.phys[n->band_idx]; 597 if (!mphy) 598 return; 599 600 phy = (struct mt7996_phy *)mphy->priv; 601 phy->throttle_state = n->duty_percent; 602 } 603 604 static void 605 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 606 { 607 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 608 609 switch (rxd->ext_eid) { 610 case MCU_EXT_EVENT_FW_LOG_2_HOST: 611 mt7996_mcu_rx_log_message(dev, skb); 612 break; 613 default: 614 break; 615 } 616 } 617 618 static void 619 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 620 { 621 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 622 623 switch (rxd->eid) { 624 case MCU_EVENT_EXT: 625 mt7996_mcu_rx_ext_event(dev, skb); 626 break; 627 case MCU_UNI_EVENT_THERMAL: 628 mt7996_mcu_rx_thermal_notify(dev, skb); 629 break; 630 default: 631 break; 632 } 633 dev_kfree_skb(skb); 634 } 635 636 static void 637 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb) 638 { 639 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data; 640 641 if (!dev->has_rro) 642 return; 643 644 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4); 645 646 switch (le16_to_cpu(event->tag)) { 647 case UNI_WED_RRO_BA_SESSION_STATUS: { 648 struct mt7996_mcu_wed_rro_ba_event *e; 649 650 while (skb->len >= sizeof(*e)) { 651 struct mt76_rx_tid *tid; 652 struct mt76_wcid *wcid; 653 u16 idx; 654 655 e = (void *)skb->data; 656 idx = le16_to_cpu(e->wlan_id); 657 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) 658 break; 659 660 wcid = rcu_dereference(dev->mt76.wcid[idx]); 661 if (!wcid || !wcid->sta) 662 break; 663 664 if (e->tid >= ARRAY_SIZE(wcid->aggr)) 665 break; 666 667 tid = rcu_dereference(wcid->aggr[e->tid]); 668 if (!tid) 669 break; 670 671 tid->id = le16_to_cpu(e->id); 672 skb_pull(skb, sizeof(*e)); 673 } 674 break; 675 } 676 case UNI_WED_RRO_BA_SESSION_DELETE: { 677 struct mt7996_mcu_wed_rro_ba_delete_event *e; 678 679 while (skb->len >= sizeof(*e)) { 680 struct mt7996_wed_rro_session_id *session; 681 682 e = (void *)skb->data; 683 session = kzalloc(sizeof(*session), GFP_ATOMIC); 684 if (!session) 685 break; 686 687 session->id = le16_to_cpu(e->session_id); 688 689 spin_lock_bh(&dev->wed_rro.lock); 690 list_add_tail(&session->list, &dev->wed_rro.poll_list); 691 spin_unlock_bh(&dev->wed_rro.lock); 692 693 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work); 694 skb_pull(skb, sizeof(*e)); 695 } 696 break; 697 } 698 default: 699 break; 700 } 701 } 702 703 static void 704 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 705 { 706 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 707 708 switch (rxd->eid) { 709 case MCU_UNI_EVENT_FW_LOG_2_HOST: 710 mt7996_mcu_rx_log_message(dev, skb); 711 break; 712 case MCU_UNI_EVENT_IE_COUNTDOWN: 713 mt7996_mcu_ie_countdown(dev, skb); 714 break; 715 case MCU_UNI_EVENT_RDD_REPORT: 716 mt7996_mcu_rx_radar_detected(dev, skb); 717 break; 718 case MCU_UNI_EVENT_ALL_STA_INFO: 719 mt7996_mcu_rx_all_sta_info_event(dev, skb); 720 break; 721 case MCU_UNI_EVENT_WED_RRO: 722 mt7996_mcu_wed_rro_event(dev, skb); 723 break; 724 default: 725 break; 726 } 727 dev_kfree_skb(skb); 728 } 729 730 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 731 { 732 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 733 734 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 735 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 736 return; 737 } 738 739 /* WA still uses legacy event*/ 740 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 741 !rxd->seq) 742 mt7996_mcu_rx_unsolicited_event(dev, skb); 743 else 744 mt76_mcu_rx_event(&dev->mt76, skb); 745 } 746 747 static struct tlv * 748 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 749 { 750 struct tlv *ptlv = skb_put_zero(skb, len); 751 752 ptlv->tag = cpu_to_le16(tag); 753 ptlv->len = cpu_to_le16(len); 754 755 return ptlv; 756 } 757 758 static void 759 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 760 struct mt7996_phy *phy) 761 { 762 static const u8 rlm_ch_band[] = { 763 [NL80211_BAND_2GHZ] = 1, 764 [NL80211_BAND_5GHZ] = 2, 765 [NL80211_BAND_6GHZ] = 3, 766 }; 767 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 768 struct bss_rlm_tlv *ch; 769 struct tlv *tlv; 770 int freq1 = chandef->center_freq1; 771 772 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 773 774 ch = (struct bss_rlm_tlv *)tlv; 775 ch->control_channel = chandef->chan->hw_value; 776 ch->center_chan = ieee80211_frequency_to_channel(freq1); 777 ch->bw = mt76_connac_chan_bw(chandef); 778 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 779 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 780 ch->band = rlm_ch_band[chandef->chan->band]; 781 782 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 783 int freq2 = chandef->center_freq2; 784 785 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 786 } 787 } 788 789 static void 790 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 791 struct mt7996_phy *phy) 792 { 793 struct bss_ra_tlv *ra; 794 struct tlv *tlv; 795 796 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 797 798 ra = (struct bss_ra_tlv *)tlv; 799 ra->short_preamble = true; 800 } 801 802 static void 803 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 804 struct mt7996_phy *phy) 805 { 806 #define DEFAULT_HE_PE_DURATION 4 807 #define DEFAULT_HE_DURATION_RTS_THRES 1023 808 const struct ieee80211_sta_he_cap *cap; 809 struct bss_info_uni_he *he; 810 struct tlv *tlv; 811 812 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 813 814 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 815 816 he = (struct bss_info_uni_he *)tlv; 817 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 818 if (!he->he_pe_duration) 819 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 820 821 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 822 if (!he->he_rts_thres) 823 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 824 825 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 826 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 827 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 828 } 829 830 static void 831 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 832 struct mt7996_phy *phy, int enable) 833 { 834 struct bss_info_uni_mbssid *mbssid; 835 struct tlv *tlv; 836 837 if (!vif->bss_conf.bssid_indicator && enable) 838 return; 839 840 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 841 842 mbssid = (struct bss_info_uni_mbssid *)tlv; 843 844 if (enable) { 845 mbssid->max_indicator = vif->bss_conf.bssid_indicator; 846 mbssid->mbss_idx = vif->bss_conf.bssid_index; 847 mbssid->tx_bss_omac_idx = 0; 848 } 849 } 850 851 static void 852 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 853 struct mt7996_phy *phy) 854 { 855 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 856 struct bss_rate_tlv *bmc; 857 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 858 enum nl80211_band band = chandef->chan->band; 859 struct tlv *tlv; 860 u8 idx = mvif->mcast_rates_idx ? 861 mvif->mcast_rates_idx : mvif->basic_rates_idx; 862 863 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 864 865 bmc = (struct bss_rate_tlv *)tlv; 866 867 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 868 bmc->bc_fixed_rate = idx; 869 bmc->mc_fixed_rate = idx; 870 } 871 872 static void 873 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 874 { 875 struct bss_txcmd_tlv *txcmd; 876 struct tlv *tlv; 877 878 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 879 880 txcmd = (struct bss_txcmd_tlv *)tlv; 881 txcmd->txcmd_mode = en; 882 } 883 884 static void 885 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 886 { 887 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 888 struct bss_mld_tlv *mld; 889 struct tlv *tlv; 890 891 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 892 893 mld = (struct bss_mld_tlv *)tlv; 894 mld->group_mld_id = 0xff; 895 mld->own_mld_id = mvif->mt76.idx; 896 mld->remap_idx = 0xff; 897 } 898 899 static void 900 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 901 { 902 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 903 struct bss_sec_tlv *sec; 904 struct tlv *tlv; 905 906 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 907 908 sec = (struct bss_sec_tlv *)tlv; 909 sec->cipher = mvif->cipher; 910 } 911 912 static int 913 mt7996_mcu_muar_config(struct mt7996_phy *phy, struct ieee80211_vif *vif, 914 bool bssid, bool enable) 915 { 916 #define UNI_MUAR_ENTRY 2 917 struct mt7996_dev *dev = phy->dev; 918 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 919 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START; 920 const u8 *addr = vif->addr; 921 922 struct { 923 struct { 924 u8 band; 925 u8 __rsv[3]; 926 } hdr; 927 928 __le16 tag; 929 __le16 len; 930 931 bool smesh; 932 u8 bssid; 933 u8 index; 934 u8 entry_add; 935 u8 addr[ETH_ALEN]; 936 u8 __rsv[2]; 937 } __packed req = { 938 .hdr.band = phy->mt76->band_idx, 939 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 940 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 941 .smesh = false, 942 .index = idx * 2 + bssid, 943 .entry_add = true, 944 }; 945 946 if (bssid) 947 addr = vif->bss_conf.bssid; 948 949 if (enable) 950 memcpy(req.addr, addr, ETH_ALEN); 951 952 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 953 sizeof(req), true); 954 } 955 956 static void 957 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 958 { 959 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 960 struct mt7996_phy *phy = mvif->phy; 961 struct bss_ifs_time_tlv *ifs_time; 962 struct tlv *tlv; 963 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 964 965 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 966 967 ifs_time = (struct bss_ifs_time_tlv *)tlv; 968 ifs_time->slot_valid = true; 969 ifs_time->sifs_valid = true; 970 ifs_time->rifs_valid = true; 971 ifs_time->eifs_valid = true; 972 973 ifs_time->slot_time = cpu_to_le16(phy->slottime); 974 ifs_time->sifs_time = cpu_to_le16(10); 975 ifs_time->rifs_time = cpu_to_le16(2); 976 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 977 978 if (is_2ghz) { 979 ifs_time->eifs_cck_valid = true; 980 ifs_time->eifs_cck_time = cpu_to_le16(314); 981 } 982 } 983 984 static int 985 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 986 struct ieee80211_vif *vif, 987 struct ieee80211_sta *sta, 988 struct mt76_phy *phy, u16 wlan_idx, 989 bool enable) 990 { 991 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 992 struct cfg80211_chan_def *chandef = &phy->chandef; 993 struct mt76_connac_bss_basic_tlv *bss; 994 u32 type = CONNECTION_INFRA_AP; 995 u16 sta_wlan_idx = wlan_idx; 996 struct tlv *tlv; 997 int idx; 998 999 switch (vif->type) { 1000 case NL80211_IFTYPE_MESH_POINT: 1001 case NL80211_IFTYPE_AP: 1002 case NL80211_IFTYPE_MONITOR: 1003 break; 1004 case NL80211_IFTYPE_STATION: 1005 if (enable) { 1006 rcu_read_lock(); 1007 if (!sta) 1008 sta = ieee80211_find_sta(vif, 1009 vif->bss_conf.bssid); 1010 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 1011 if (sta) { 1012 struct mt76_wcid *wcid; 1013 1014 wcid = (struct mt76_wcid *)sta->drv_priv; 1015 sta_wlan_idx = wcid->idx; 1016 } 1017 rcu_read_unlock(); 1018 } 1019 type = CONNECTION_INFRA_STA; 1020 break; 1021 case NL80211_IFTYPE_ADHOC: 1022 type = CONNECTION_IBSS_ADHOC; 1023 break; 1024 default: 1025 WARN_ON(1); 1026 break; 1027 } 1028 1029 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 1030 1031 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 1032 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 1033 bss->dtim_period = vif->bss_conf.dtim_period; 1034 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 1035 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 1036 bss->conn_type = cpu_to_le32(type); 1037 bss->omac_idx = mvif->omac_idx; 1038 bss->band_idx = mvif->band_idx; 1039 bss->wmm_idx = mvif->wmm_idx; 1040 bss->conn_state = !enable; 1041 bss->active = enable; 1042 1043 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1044 bss->hw_bss_idx = idx; 1045 1046 if (vif->type == NL80211_IFTYPE_MONITOR) { 1047 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 1048 return 0; 1049 } 1050 1051 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 1052 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 1053 bss->dtim_period = vif->bss_conf.dtim_period; 1054 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 1055 chandef->chan->band, NULL); 1056 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, vif, 1057 chandef->chan->band); 1058 1059 return 0; 1060 } 1061 1062 static struct sk_buff * 1063 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len) 1064 { 1065 struct bss_req_hdr hdr = { 1066 .bss_idx = mvif->idx, 1067 }; 1068 struct sk_buff *skb; 1069 1070 skb = mt76_mcu_msg_alloc(dev, NULL, len); 1071 if (!skb) 1072 return ERR_PTR(-ENOMEM); 1073 1074 skb_put_data(skb, &hdr, sizeof(hdr)); 1075 1076 return skb; 1077 } 1078 1079 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, 1080 struct ieee80211_vif *vif, int enable) 1081 { 1082 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1083 struct mt7996_dev *dev = phy->dev; 1084 struct sk_buff *skb; 1085 1086 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { 1087 mt7996_mcu_muar_config(phy, vif, false, enable); 1088 mt7996_mcu_muar_config(phy, vif, true, enable); 1089 } 1090 1091 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 1092 MT7996_BSS_UPDATE_MAX_SIZE); 1093 if (IS_ERR(skb)) 1094 return PTR_ERR(skb); 1095 1096 /* bss_basic must be first */ 1097 mt7996_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, 1098 mvif->sta.wcid.idx, enable); 1099 mt7996_mcu_bss_sec_tlv(skb, vif); 1100 1101 if (vif->type == NL80211_IFTYPE_MONITOR) 1102 goto out; 1103 1104 if (enable) { 1105 mt7996_mcu_bss_rfch_tlv(skb, vif, phy); 1106 mt7996_mcu_bss_bmc_tlv(skb, vif, phy); 1107 mt7996_mcu_bss_ra_tlv(skb, vif, phy); 1108 mt7996_mcu_bss_txcmd_tlv(skb, true); 1109 mt7996_mcu_bss_ifs_timing_tlv(skb, vif); 1110 1111 if (vif->bss_conf.he_support) 1112 mt7996_mcu_bss_he_tlv(skb, vif, phy); 1113 1114 /* this tag is necessary no matter if the vif is MLD */ 1115 mt7996_mcu_bss_mld_tlv(skb, vif); 1116 } 1117 1118 mt7996_mcu_bss_mbssid_tlv(skb, vif, phy, enable); 1119 1120 out: 1121 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1122 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1123 } 1124 1125 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif) 1126 { 1127 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1128 struct mt7996_dev *dev = phy->dev; 1129 struct sk_buff *skb; 1130 1131 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 1132 MT7996_BSS_UPDATE_MAX_SIZE); 1133 if (IS_ERR(skb)) 1134 return PTR_ERR(skb); 1135 1136 mt7996_mcu_bss_ifs_timing_tlv(skb, vif); 1137 1138 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1139 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1140 } 1141 1142 static int 1143 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif, 1144 struct ieee80211_ampdu_params *params, 1145 bool enable, bool tx) 1146 { 1147 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1148 struct sta_rec_ba_uni *ba; 1149 struct sk_buff *skb; 1150 struct tlv *tlv; 1151 1152 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid, 1153 MT7996_STA_UPDATE_MAX_SIZE); 1154 if (IS_ERR(skb)) 1155 return PTR_ERR(skb); 1156 1157 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1158 1159 ba = (struct sta_rec_ba_uni *)tlv; 1160 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1161 ba->winsize = cpu_to_le16(params->buf_size); 1162 ba->ssn = cpu_to_le16(params->ssn); 1163 ba->ba_en = enable << params->tid; 1164 ba->amsdu = params->amsdu; 1165 ba->tid = params->tid; 1166 ba->ba_rdd_rro = !tx && enable && dev->has_rro; 1167 1168 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1169 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1170 } 1171 1172 /** starec & wtbl **/ 1173 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 1174 struct ieee80211_ampdu_params *params, 1175 bool enable) 1176 { 1177 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1178 struct mt7996_vif *mvif = msta->vif; 1179 1180 if (enable && !params->amsdu) 1181 msta->wcid.amsdu = false; 1182 1183 return mt7996_mcu_sta_ba(dev, &mvif->mt76, params, enable, true); 1184 } 1185 1186 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1187 struct ieee80211_ampdu_params *params, 1188 bool enable) 1189 { 1190 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1191 struct mt7996_vif *mvif = msta->vif; 1192 1193 return mt7996_mcu_sta_ba(dev, &mvif->mt76, params, enable, false); 1194 } 1195 1196 static void 1197 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1198 { 1199 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1200 struct ieee80211_he_mcs_nss_supp mcs_map; 1201 struct sta_rec_he_v2 *he; 1202 struct tlv *tlv; 1203 int i = 0; 1204 1205 if (!sta->deflink.he_cap.has_he) 1206 return; 1207 1208 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1209 1210 he = (struct sta_rec_he_v2 *)tlv; 1211 for (i = 0; i < 11; i++) { 1212 if (i < 6) 1213 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1214 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1215 } 1216 1217 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 1218 switch (sta->deflink.bandwidth) { 1219 case IEEE80211_STA_RX_BW_160: 1220 if (elem->phy_cap_info[0] & 1221 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1222 mt7996_mcu_set_sta_he_mcs(sta, 1223 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1224 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1225 1226 mt7996_mcu_set_sta_he_mcs(sta, 1227 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1228 le16_to_cpu(mcs_map.rx_mcs_160)); 1229 fallthrough; 1230 default: 1231 mt7996_mcu_set_sta_he_mcs(sta, 1232 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1233 le16_to_cpu(mcs_map.rx_mcs_80)); 1234 break; 1235 } 1236 1237 he->pkt_ext = 2; 1238 } 1239 1240 static void 1241 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1242 { 1243 struct sta_rec_he_6g_capa *he_6g; 1244 struct tlv *tlv; 1245 1246 if (!sta->deflink.he_6ghz_capa.capa) 1247 return; 1248 1249 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1250 1251 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1252 he_6g->capa = sta->deflink.he_6ghz_capa.capa; 1253 } 1254 1255 static void 1256 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1257 { 1258 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1259 struct ieee80211_vif *vif = container_of((void *)msta->vif, 1260 struct ieee80211_vif, drv_priv); 1261 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1262 struct ieee80211_eht_cap_elem_fixed *elem; 1263 struct sta_rec_eht *eht; 1264 struct tlv *tlv; 1265 1266 if (!sta->deflink.eht_cap.has_eht) 1267 return; 1268 1269 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp; 1270 elem = &sta->deflink.eht_cap.eht_cap_elem; 1271 1272 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1273 1274 eht = (struct sta_rec_eht *)tlv; 1275 eht->tid_bitmap = 0xff; 1276 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1277 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1278 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1279 1280 if (vif->type != NL80211_IFTYPE_STATION && 1281 (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] & 1282 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1283 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1284 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1285 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1286 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1287 sizeof(eht->mcs_map_bw20)); 1288 return; 1289 } 1290 1291 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1292 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1293 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1294 } 1295 1296 static void 1297 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1298 { 1299 struct sta_rec_ht_uni *ht; 1300 struct tlv *tlv; 1301 1302 if (!sta->deflink.ht_cap.ht_supported) 1303 return; 1304 1305 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1306 1307 ht = (struct sta_rec_ht_uni *)tlv; 1308 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 1309 ht->ampdu_param = u8_encode_bits(sta->deflink.ht_cap.ampdu_factor, 1310 IEEE80211_HT_AMPDU_PARM_FACTOR) | 1311 u8_encode_bits(sta->deflink.ht_cap.ampdu_density, 1312 IEEE80211_HT_AMPDU_PARM_DENSITY); 1313 } 1314 1315 static void 1316 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1317 { 1318 struct sta_rec_vht *vht; 1319 struct tlv *tlv; 1320 1321 /* For 6G band, this tlv is necessary to let hw work normally */ 1322 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported) 1323 return; 1324 1325 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1326 1327 vht = (struct sta_rec_vht *)tlv; 1328 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 1329 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 1330 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 1331 } 1332 1333 static void 1334 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1335 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1336 { 1337 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1338 struct sta_rec_amsdu *amsdu; 1339 struct tlv *tlv; 1340 1341 if (vif->type != NL80211_IFTYPE_STATION && 1342 vif->type != NL80211_IFTYPE_MESH_POINT && 1343 vif->type != NL80211_IFTYPE_AP) 1344 return; 1345 1346 if (!sta->deflink.agg.max_amsdu_len) 1347 return; 1348 1349 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1350 amsdu = (struct sta_rec_amsdu *)tlv; 1351 amsdu->max_amsdu_num = 8; 1352 amsdu->amsdu_en = true; 1353 msta->wcid.amsdu = true; 1354 1355 switch (sta->deflink.agg.max_amsdu_len) { 1356 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1357 amsdu->max_mpdu_size = 1358 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1359 return; 1360 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1361 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1362 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1363 return; 1364 default: 1365 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1366 return; 1367 } 1368 } 1369 1370 static void 1371 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1372 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1373 { 1374 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1375 struct sta_rec_muru *muru; 1376 struct tlv *tlv; 1377 1378 if (vif->type != NL80211_IFTYPE_STATION && 1379 vif->type != NL80211_IFTYPE_AP) 1380 return; 1381 1382 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1383 1384 muru = (struct sta_rec_muru *)tlv; 1385 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer || 1386 vif->bss_conf.he_mu_beamformer || 1387 vif->bss_conf.vht_mu_beamformer || 1388 vif->bss_conf.vht_mu_beamformee; 1389 muru->cfg.ofdma_dl_en = true; 1390 1391 if (sta->deflink.vht_cap.vht_supported) 1392 muru->mimo_dl.vht_mu_bfee = 1393 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1394 1395 if (!sta->deflink.he_cap.has_he) 1396 return; 1397 1398 muru->mimo_dl.partial_bw_dl_mimo = 1399 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1400 1401 muru->mimo_ul.full_ul_mimo = 1402 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1403 muru->mimo_ul.partial_ul_mimo = 1404 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1405 1406 muru->ofdma_dl.punc_pream_rx = 1407 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1408 muru->ofdma_dl.he_20m_in_40m_2g = 1409 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1410 muru->ofdma_dl.he_20m_in_160m = 1411 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1412 muru->ofdma_dl.he_80m_in_160m = 1413 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1414 1415 muru->ofdma_ul.t_frame_dur = 1416 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1417 muru->ofdma_ul.mu_cascading = 1418 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1419 muru->ofdma_ul.uo_ra = 1420 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1421 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1422 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1423 } 1424 1425 static inline bool 1426 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1427 struct ieee80211_sta *sta, bool bfee) 1428 { 1429 int sts = hweight16(phy->mt76->chainmask); 1430 1431 if (vif->type != NL80211_IFTYPE_STATION && 1432 vif->type != NL80211_IFTYPE_AP) 1433 return false; 1434 1435 if (!bfee && sts < 2) 1436 return false; 1437 1438 if (sta->deflink.eht_cap.has_eht) { 1439 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1440 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1441 1442 if (bfee) 1443 return vif->bss_conf.eht_su_beamformee && 1444 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1445 else 1446 return vif->bss_conf.eht_su_beamformer && 1447 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1448 } 1449 1450 if (sta->deflink.he_cap.has_he) { 1451 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1452 1453 if (bfee) 1454 return vif->bss_conf.he_su_beamformee && 1455 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1456 else 1457 return vif->bss_conf.he_su_beamformer && 1458 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1459 } 1460 1461 if (sta->deflink.vht_cap.vht_supported) { 1462 u32 cap = sta->deflink.vht_cap.cap; 1463 1464 if (bfee) 1465 return vif->bss_conf.vht_su_beamformee && 1466 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1467 else 1468 return vif->bss_conf.vht_su_beamformer && 1469 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1470 } 1471 1472 return false; 1473 } 1474 1475 static void 1476 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf) 1477 { 1478 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1479 bf->ndp_rate = 0; /* mcs0 */ 1480 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1481 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1482 } 1483 1484 static void 1485 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1486 struct sta_rec_bf *bf) 1487 { 1488 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1489 u8 n = 0; 1490 1491 bf->tx_mode = MT_PHY_TYPE_HT; 1492 1493 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1494 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1495 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1496 mcs->tx_params); 1497 else if (mcs->rx_mask[3]) 1498 n = 3; 1499 else if (mcs->rx_mask[2]) 1500 n = 2; 1501 else if (mcs->rx_mask[1]) 1502 n = 1; 1503 1504 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1505 bf->ncol = min_t(u8, bf->nrow, n); 1506 bf->ibf_ncol = n; 1507 } 1508 1509 static void 1510 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1511 struct sta_rec_bf *bf, bool explicit) 1512 { 1513 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1514 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1515 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1516 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1517 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1518 1519 bf->tx_mode = MT_PHY_TYPE_VHT; 1520 1521 if (explicit) { 1522 u8 sts, snd_dim; 1523 1524 mt7996_mcu_sta_sounding_rate(bf); 1525 1526 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1527 pc->cap); 1528 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1529 vc->cap); 1530 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1531 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1532 bf->ibf_ncol = bf->ncol; 1533 1534 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1535 bf->nrow = 1; 1536 } else { 1537 bf->nrow = tx_ant; 1538 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1539 bf->ibf_ncol = nss_mcs; 1540 1541 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1542 bf->ibf_nrow = 1; 1543 } 1544 } 1545 1546 static void 1547 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1548 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1549 { 1550 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1551 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1552 const struct ieee80211_sta_he_cap *vc = 1553 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1554 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1555 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1556 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1557 u8 snd_dim, sts; 1558 1559 if (!vc) 1560 return; 1561 1562 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1563 1564 mt7996_mcu_sta_sounding_rate(bf); 1565 1566 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1567 pe->phy_cap_info[6]); 1568 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1569 pe->phy_cap_info[6]); 1570 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1571 ve->phy_cap_info[5]); 1572 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1573 pe->phy_cap_info[4]); 1574 bf->nrow = min_t(u8, snd_dim, sts); 1575 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1576 bf->ibf_ncol = bf->ncol; 1577 1578 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1579 return; 1580 1581 /* go over for 160MHz and 80p80 */ 1582 if (pe->phy_cap_info[0] & 1583 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1584 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1585 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1586 1587 bf->ncol_gt_bw80 = nss_mcs; 1588 } 1589 1590 if (pe->phy_cap_info[0] & 1591 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1592 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1593 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1594 1595 if (bf->ncol_gt_bw80) 1596 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1597 else 1598 bf->ncol_gt_bw80 = nss_mcs; 1599 } 1600 1601 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1602 ve->phy_cap_info[5]); 1603 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1604 pe->phy_cap_info[4]); 1605 1606 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1607 } 1608 1609 static void 1610 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1611 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1612 { 1613 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1614 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1615 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1616 const struct ieee80211_sta_eht_cap *vc = 1617 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1618 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1619 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1620 IEEE80211_EHT_MCS_NSS_RX) - 1; 1621 u8 snd_dim, sts; 1622 1623 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1624 1625 mt7996_mcu_sta_sounding_rate(bf); 1626 1627 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1628 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1629 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1630 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1631 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1632 bf->nrow = min_t(u8, snd_dim, sts); 1633 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1634 bf->ibf_ncol = bf->ncol; 1635 1636 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160) 1637 return; 1638 1639 switch (sta->deflink.bandwidth) { 1640 case IEEE80211_STA_RX_BW_160: 1641 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1642 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1643 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1644 IEEE80211_EHT_MCS_NSS_RX) - 1; 1645 1646 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1647 bf->ncol_gt_bw80 = nss_mcs; 1648 break; 1649 case IEEE80211_STA_RX_BW_320: 1650 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1651 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1652 ve->phy_cap_info[3]) << 1); 1653 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1654 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1655 IEEE80211_EHT_MCS_NSS_RX) - 1; 1656 1657 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1658 bf->ncol_gt_bw80 = nss_mcs << 4; 1659 break; 1660 default: 1661 break; 1662 } 1663 } 1664 1665 static void 1666 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1667 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1668 { 1669 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1670 struct mt7996_phy *phy = mvif->phy; 1671 int tx_ant = hweight16(phy->mt76->chainmask) - 1; 1672 struct sta_rec_bf *bf; 1673 struct tlv *tlv; 1674 static const u8 matrix[4][4] = { 1675 {0, 0, 0, 0}, 1676 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1677 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1678 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1679 }; 1680 bool ebf; 1681 1682 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1683 return; 1684 1685 ebf = mt7996_is_ebf_supported(phy, vif, sta, false); 1686 if (!ebf && !dev->ibf) 1687 return; 1688 1689 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1690 bf = (struct sta_rec_bf *)tlv; 1691 1692 /* he/eht: eBF only, in accordance with spec 1693 * vht: support eBF and iBF 1694 * ht: iBF only, since mac80211 lacks of eBF support 1695 */ 1696 if (sta->deflink.eht_cap.has_eht && ebf) 1697 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf); 1698 else if (sta->deflink.he_cap.has_he && ebf) 1699 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf); 1700 else if (sta->deflink.vht_cap.vht_supported) 1701 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1702 else if (sta->deflink.ht_cap.ht_supported) 1703 mt7996_mcu_sta_bfer_ht(sta, phy, bf); 1704 else 1705 return; 1706 1707 bf->bf_cap = ebf ? ebf : dev->ibf << 1; 1708 bf->bw = sta->deflink.bandwidth; 1709 bf->ibf_dbw = sta->deflink.bandwidth; 1710 bf->ibf_nrow = tx_ant; 1711 1712 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1713 bf->ibf_timeout = 0x48; 1714 else 1715 bf->ibf_timeout = 0x18; 1716 1717 if (ebf && bf->nrow != tx_ant) 1718 bf->mem_20m = matrix[tx_ant][bf->ncol]; 1719 else 1720 bf->mem_20m = matrix[bf->nrow][bf->ncol]; 1721 1722 switch (sta->deflink.bandwidth) { 1723 case IEEE80211_STA_RX_BW_160: 1724 case IEEE80211_STA_RX_BW_80: 1725 bf->mem_total = bf->mem_20m * 2; 1726 break; 1727 case IEEE80211_STA_RX_BW_40: 1728 bf->mem_total = bf->mem_20m; 1729 break; 1730 case IEEE80211_STA_RX_BW_20: 1731 default: 1732 break; 1733 } 1734 } 1735 1736 static void 1737 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1738 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1739 { 1740 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1741 struct mt7996_phy *phy = mvif->phy; 1742 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1743 struct sta_rec_bfee *bfee; 1744 struct tlv *tlv; 1745 u8 nrow = 0; 1746 1747 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1748 return; 1749 1750 if (!mt7996_is_ebf_supported(phy, vif, sta, true)) 1751 return; 1752 1753 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1754 bfee = (struct sta_rec_bfee *)tlv; 1755 1756 if (sta->deflink.he_cap.has_he) { 1757 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1758 1759 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1760 pe->phy_cap_info[5]); 1761 } else if (sta->deflink.vht_cap.vht_supported) { 1762 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1763 1764 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1765 pc->cap); 1766 } 1767 1768 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1769 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1770 } 1771 1772 static void 1773 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb) 1774 { 1775 struct sta_rec_tx_proc *tx_proc; 1776 struct tlv *tlv; 1777 1778 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc)); 1779 1780 tx_proc = (struct sta_rec_tx_proc *)tlv; 1781 tx_proc->flag = cpu_to_le32(0); 1782 } 1783 1784 static void 1785 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1786 { 1787 struct sta_rec_hdrt *hdrt; 1788 struct tlv *tlv; 1789 1790 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1791 1792 hdrt = (struct sta_rec_hdrt *)tlv; 1793 hdrt->hdrt_mode = 1; 1794 } 1795 1796 static void 1797 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1798 struct ieee80211_vif *vif, 1799 struct ieee80211_sta *sta) 1800 { 1801 struct sta_rec_hdr_trans *hdr_trans; 1802 struct mt76_wcid *wcid; 1803 struct tlv *tlv; 1804 1805 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1806 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1807 hdr_trans->dis_rx_hdr_tran = true; 1808 1809 if (vif->type == NL80211_IFTYPE_STATION) 1810 hdr_trans->to_ds = true; 1811 else 1812 hdr_trans->from_ds = true; 1813 1814 if (!sta) 1815 return; 1816 1817 wcid = (struct mt76_wcid *)sta->drv_priv; 1818 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1819 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1820 hdr_trans->to_ds = true; 1821 hdr_trans->from_ds = true; 1822 } 1823 1824 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1825 hdr_trans->to_ds = true; 1826 hdr_trans->from_ds = true; 1827 hdr_trans->mesh = true; 1828 } 1829 } 1830 1831 static enum mcu_mmps_mode 1832 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1833 { 1834 switch (smps) { 1835 case IEEE80211_SMPS_OFF: 1836 return MCU_MMPS_DISABLE; 1837 case IEEE80211_SMPS_STATIC: 1838 return MCU_MMPS_STATIC; 1839 case IEEE80211_SMPS_DYNAMIC: 1840 return MCU_MMPS_DYNAMIC; 1841 default: 1842 return MCU_MMPS_DISABLE; 1843 } 1844 } 1845 1846 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1847 void *data, u16 version) 1848 { 1849 struct ra_fixed_rate *req; 1850 struct uni_header hdr; 1851 struct sk_buff *skb; 1852 struct tlv *tlv; 1853 int len; 1854 1855 len = sizeof(hdr) + sizeof(*req); 1856 1857 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1858 if (!skb) 1859 return -ENOMEM; 1860 1861 skb_put_data(skb, &hdr, sizeof(hdr)); 1862 1863 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1864 req = (struct ra_fixed_rate *)tlv; 1865 req->version = cpu_to_le16(version); 1866 memcpy(&req->rate, data, sizeof(req->rate)); 1867 1868 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1869 MCU_WM_UNI_CMD(RA), true); 1870 } 1871 1872 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1873 struct ieee80211_sta *sta, void *data, u32 field) 1874 { 1875 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1876 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1877 struct sta_phy_uni *phy = data; 1878 struct sta_rec_ra_fixed_uni *ra; 1879 struct sk_buff *skb; 1880 struct tlv *tlv; 1881 1882 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1883 &msta->wcid, 1884 MT7996_STA_UPDATE_MAX_SIZE); 1885 if (IS_ERR(skb)) 1886 return PTR_ERR(skb); 1887 1888 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1889 ra = (struct sta_rec_ra_fixed_uni *)tlv; 1890 1891 switch (field) { 1892 case RATE_PARAM_AUTO: 1893 break; 1894 case RATE_PARAM_FIXED: 1895 case RATE_PARAM_FIXED_MCS: 1896 case RATE_PARAM_FIXED_GI: 1897 case RATE_PARAM_FIXED_HE_LTF: 1898 if (phy) 1899 ra->phy = *phy; 1900 break; 1901 case RATE_PARAM_MMPS_UPDATE: 1902 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 1903 break; 1904 default: 1905 break; 1906 } 1907 ra->field = cpu_to_le32(field); 1908 1909 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1910 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1911 } 1912 1913 static int 1914 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1915 struct ieee80211_sta *sta) 1916 { 1917 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1918 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1919 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1920 enum nl80211_band band = chandef->chan->band; 1921 struct sta_phy_uni phy = {}; 1922 int ret, nrates = 0; 1923 1924 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1925 do { \ 1926 u8 i, gi = mask->control[band]._gi; \ 1927 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1928 phy.sgi = gi; \ 1929 phy.he_ltf = mask->control[band].he_ltf; \ 1930 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1931 if (!mask->control[band]._mcs[i]) \ 1932 continue; \ 1933 nrates += hweight16(mask->control[band]._mcs[i]); \ 1934 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1935 if (_ht) \ 1936 phy.mcs += 8 * i; \ 1937 } \ 1938 } while (0) 1939 1940 if (sta->deflink.he_cap.has_he) { 1941 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1942 } else if (sta->deflink.vht_cap.vht_supported) { 1943 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1944 } else if (sta->deflink.ht_cap.ht_supported) { 1945 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1946 } else { 1947 nrates = hweight32(mask->control[band].legacy); 1948 phy.mcs = ffs(mask->control[band].legacy) - 1; 1949 } 1950 #undef __sta_phy_bitrate_mask_check 1951 1952 /* fall back to auto rate control */ 1953 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1954 mask->control[band].he_gi == GENMASK(7, 0) && 1955 mask->control[band].he_ltf == GENMASK(7, 0) && 1956 nrates != 1) 1957 return 0; 1958 1959 /* fixed single rate */ 1960 if (nrates == 1) { 1961 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1962 RATE_PARAM_FIXED_MCS); 1963 if (ret) 1964 return ret; 1965 } 1966 1967 /* fixed GI */ 1968 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 1969 mask->control[band].he_gi != GENMASK(7, 0)) { 1970 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1971 u32 addr; 1972 1973 /* firmware updates only TXCMD but doesn't take WTBL into 1974 * account, so driver should update here to reflect the 1975 * actual txrate hardware sends out. 1976 */ 1977 addr = mt7996_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); 1978 if (sta->deflink.he_cap.has_he) 1979 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 1980 else 1981 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 1982 1983 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1984 RATE_PARAM_FIXED_GI); 1985 if (ret) 1986 return ret; 1987 } 1988 1989 /* fixed HE_LTF */ 1990 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 1991 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1992 RATE_PARAM_FIXED_HE_LTF); 1993 if (ret) 1994 return ret; 1995 } 1996 1997 return 0; 1998 } 1999 2000 static void 2001 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 2002 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 2003 { 2004 #define INIT_RCPI 180 2005 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2006 struct mt76_phy *mphy = mvif->phy->mt76; 2007 struct cfg80211_chan_def *chandef = &mphy->chandef; 2008 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 2009 enum nl80211_band band = chandef->chan->band; 2010 struct sta_rec_ra_uni *ra; 2011 struct tlv *tlv; 2012 u32 supp_rate = sta->deflink.supp_rates[band]; 2013 u32 cap = sta->wme ? STA_CAP_WMM : 0; 2014 2015 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 2016 ra = (struct sta_rec_ra_uni *)tlv; 2017 2018 ra->valid = true; 2019 ra->auto_rate = true; 2020 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink); 2021 ra->channel = chandef->chan->hw_value; 2022 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ? 2023 CMD_CBW_320MHZ : sta->deflink.bandwidth; 2024 ra->phy.bw = ra->bw; 2025 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 2026 2027 if (supp_rate) { 2028 supp_rate &= mask->control[band].legacy; 2029 ra->rate_len = hweight32(supp_rate); 2030 2031 if (band == NL80211_BAND_2GHZ) { 2032 ra->supp_mode = MODE_CCK; 2033 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 2034 2035 if (ra->rate_len > 4) { 2036 ra->supp_mode |= MODE_OFDM; 2037 ra->supp_ofdm_rate = supp_rate >> 4; 2038 } 2039 } else { 2040 ra->supp_mode = MODE_OFDM; 2041 ra->supp_ofdm_rate = supp_rate; 2042 } 2043 } 2044 2045 if (sta->deflink.ht_cap.ht_supported) { 2046 ra->supp_mode |= MODE_HT; 2047 ra->af = sta->deflink.ht_cap.ampdu_factor; 2048 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 2049 2050 cap |= STA_CAP_HT; 2051 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2052 cap |= STA_CAP_SGI_20; 2053 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2054 cap |= STA_CAP_SGI_40; 2055 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 2056 cap |= STA_CAP_TX_STBC; 2057 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 2058 cap |= STA_CAP_RX_STBC; 2059 if (vif->bss_conf.ht_ldpc && 2060 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 2061 cap |= STA_CAP_LDPC; 2062 2063 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 2064 mask->control[band].ht_mcs); 2065 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 2066 } 2067 2068 if (sta->deflink.vht_cap.vht_supported) { 2069 u8 af; 2070 2071 ra->supp_mode |= MODE_VHT; 2072 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 2073 sta->deflink.vht_cap.cap); 2074 ra->af = max_t(u8, ra->af, af); 2075 2076 cap |= STA_CAP_VHT; 2077 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2078 cap |= STA_CAP_VHT_SGI_80; 2079 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2080 cap |= STA_CAP_VHT_SGI_160; 2081 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 2082 cap |= STA_CAP_VHT_TX_STBC; 2083 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 2084 cap |= STA_CAP_VHT_RX_STBC; 2085 if (vif->bss_conf.vht_ldpc && 2086 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 2087 cap |= STA_CAP_VHT_LDPC; 2088 2089 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 2090 mask->control[band].vht_mcs); 2091 } 2092 2093 if (sta->deflink.he_cap.has_he) { 2094 ra->supp_mode |= MODE_HE; 2095 cap |= STA_CAP_HE; 2096 2097 if (sta->deflink.he_6ghz_capa.capa) 2098 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 2099 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 2100 } 2101 ra->sta_cap = cpu_to_le32(cap); 2102 2103 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi)); 2104 } 2105 2106 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2107 struct ieee80211_sta *sta, bool changed) 2108 { 2109 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2110 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2111 struct sk_buff *skb; 2112 int ret; 2113 2114 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 2115 &msta->wcid, 2116 MT7996_STA_UPDATE_MAX_SIZE); 2117 if (IS_ERR(skb)) 2118 return PTR_ERR(skb); 2119 2120 /* firmware rc algorithm refers to sta_rec_he for HE control. 2121 * once dev->rc_work changes the settings driver should also 2122 * update sta_rec_he here. 2123 */ 2124 if (changed) 2125 mt7996_mcu_sta_he_tlv(skb, sta); 2126 2127 /* sta_rec_ra accommodates BW, NSS and only MCS range format 2128 * i.e 0-{7,8,9} for VHT. 2129 */ 2130 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 2131 2132 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2133 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2134 if (ret) 2135 return ret; 2136 2137 return mt7996_mcu_add_rate_ctrl_fixed(dev, vif, sta); 2138 } 2139 2140 static int 2141 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2142 struct ieee80211_sta *sta) 2143 { 2144 #define MT_STA_BSS_GROUP 1 2145 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2146 struct mt7996_sta *msta; 2147 struct { 2148 u8 __rsv1[4]; 2149 2150 __le16 tag; 2151 __le16 len; 2152 __le16 wlan_idx; 2153 u8 __rsv2[2]; 2154 __le32 action; 2155 __le32 val; 2156 u8 __rsv3[8]; 2157 } __packed req = { 2158 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 2159 .len = cpu_to_le16(sizeof(req) - 4), 2160 .action = cpu_to_le32(MT_STA_BSS_GROUP), 2161 .val = cpu_to_le32(mvif->mt76.idx % 16), 2162 }; 2163 2164 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 2165 req.wlan_idx = cpu_to_le16(msta->wcid.idx); 2166 2167 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 2168 sizeof(req), true); 2169 } 2170 2171 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2172 struct ieee80211_sta *sta, int conn_state, bool newly) 2173 { 2174 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2175 struct ieee80211_link_sta *link_sta; 2176 struct mt7996_sta *msta; 2177 struct sk_buff *skb; 2178 int ret; 2179 2180 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 2181 link_sta = sta ? &sta->deflink : NULL; 2182 2183 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 2184 &msta->wcid, 2185 MT7996_STA_UPDATE_MAX_SIZE); 2186 if (IS_ERR(skb)) 2187 return PTR_ERR(skb); 2188 2189 /* starec basic */ 2190 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, link_sta, 2191 conn_state, newly); 2192 2193 if (conn_state == CONN_STATE_DISCONNECT) 2194 goto out; 2195 2196 /* starec hdr trans */ 2197 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta); 2198 /* starec tx proc */ 2199 mt7996_mcu_sta_tx_proc_tlv(skb); 2200 2201 /* tag order is in accordance with firmware dependency. */ 2202 if (sta) { 2203 /* starec hdrt mode */ 2204 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2205 /* starec bfer */ 2206 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta); 2207 /* starec ht */ 2208 mt7996_mcu_sta_ht_tlv(skb, sta); 2209 /* starec vht */ 2210 mt7996_mcu_sta_vht_tlv(skb, sta); 2211 /* starec uapsd */ 2212 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 2213 /* starec amsdu */ 2214 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 2215 /* starec he */ 2216 mt7996_mcu_sta_he_tlv(skb, sta); 2217 /* starec he 6g*/ 2218 mt7996_mcu_sta_he_6g_tlv(skb, sta); 2219 /* starec eht */ 2220 mt7996_mcu_sta_eht_tlv(skb, sta); 2221 /* starec muru */ 2222 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta); 2223 /* starec bfee */ 2224 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta); 2225 } 2226 2227 ret = mt7996_mcu_add_group(dev, vif, sta); 2228 if (ret) { 2229 dev_kfree_skb(skb); 2230 return ret; 2231 } 2232 out: 2233 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2234 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2235 } 2236 2237 static int 2238 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 2239 struct sk_buff *skb, 2240 struct ieee80211_key_conf *key, 2241 enum set_key_cmd cmd) 2242 { 2243 struct sta_rec_sec_uni *sec; 2244 struct tlv *tlv; 2245 2246 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2247 sec = (struct sta_rec_sec_uni *)tlv; 2248 sec->add = cmd; 2249 2250 if (cmd == SET_KEY) { 2251 struct sec_key_uni *sec_key; 2252 u8 cipher; 2253 2254 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2255 if (cipher == MCU_CIPHER_NONE) 2256 return -EOPNOTSUPP; 2257 2258 sec_key = &sec->key[0]; 2259 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2260 sec_key->mgmt_prot = 0; 2261 sec_key->cipher_id = cipher; 2262 sec_key->cipher_len = sizeof(*sec_key); 2263 sec_key->key_id = key->keyidx; 2264 sec_key->key_len = key->keylen; 2265 sec_key->need_resp = 0; 2266 memcpy(sec_key->key, key->key, key->keylen); 2267 2268 if (cipher == MCU_CIPHER_TKIP) { 2269 /* Rx/Tx MIC keys are swapped */ 2270 memcpy(sec_key->key + 16, key->key + 24, 8); 2271 memcpy(sec_key->key + 24, key->key + 16, 8); 2272 } 2273 2274 sec->n_cipher = 1; 2275 } else { 2276 sec->n_cipher = 0; 2277 } 2278 2279 return 0; 2280 } 2281 2282 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2283 struct ieee80211_key_conf *key, int mcu_cmd, 2284 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2285 { 2286 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2287 struct sk_buff *skb; 2288 int ret; 2289 2290 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 2291 MT7996_STA_UPDATE_MAX_SIZE); 2292 if (IS_ERR(skb)) 2293 return PTR_ERR(skb); 2294 2295 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd); 2296 if (ret) 2297 return ret; 2298 2299 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2300 } 2301 2302 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2303 u8 *pn) 2304 { 2305 #define TSC_TYPE_BIGTK_PN 2 2306 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2307 struct sta_rec_pn_info *pn_info; 2308 struct sk_buff *skb, *rskb; 2309 struct tlv *tlv; 2310 int ret; 2311 2312 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, &mvif->sta.wcid); 2313 if (IS_ERR(skb)) 2314 return PTR_ERR(skb); 2315 2316 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info)); 2317 pn_info = (struct sta_rec_pn_info *)tlv; 2318 2319 pn_info->tsc_type = TSC_TYPE_BIGTK_PN; 2320 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb, 2321 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE), 2322 true, &rskb); 2323 if (ret) 2324 return ret; 2325 2326 skb_pull(rskb, 4); 2327 2328 pn_info = (struct sta_rec_pn_info *)rskb->data; 2329 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO) 2330 memcpy(pn, pn_info->pn, 6); 2331 2332 dev_kfree_skb(rskb); 2333 return 0; 2334 } 2335 2336 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2337 struct ieee80211_key_conf *key) 2338 { 2339 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2340 struct mt7996_mcu_bcn_prot_tlv *bcn_prot; 2341 struct sk_buff *skb; 2342 struct tlv *tlv; 2343 u8 pn[6] = {}; 2344 int len = sizeof(struct bss_req_hdr) + 2345 sizeof(struct mt7996_mcu_bcn_prot_tlv); 2346 int ret; 2347 2348 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len); 2349 if (IS_ERR(skb)) 2350 return PTR_ERR(skb); 2351 2352 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot)); 2353 2354 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv; 2355 2356 ret = mt7996_mcu_get_pn(dev, vif, pn); 2357 if (ret) { 2358 dev_kfree_skb(skb); 2359 return ret; 2360 } 2361 2362 switch (key->cipher) { 2363 case WLAN_CIPHER_SUITE_AES_CMAC: 2364 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128; 2365 break; 2366 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 2367 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128; 2368 break; 2369 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 2370 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256; 2371 break; 2372 case WLAN_CIPHER_SUITE_BIP_CMAC_256: 2373 default: 2374 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n"); 2375 dev_kfree_skb(skb); 2376 return -EOPNOTSUPP; 2377 } 2378 2379 pn[0]++; 2380 memcpy(bcn_prot->pn, pn, 6); 2381 bcn_prot->enable = BP_SW_MODE; 2382 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN); 2383 bcn_prot->key_id = key->keyidx; 2384 2385 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2386 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2387 } 2388 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, 2389 struct ieee80211_vif *vif, bool enable) 2390 { 2391 struct mt7996_dev *dev = phy->dev; 2392 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2393 struct { 2394 struct req_hdr { 2395 u8 omac_idx; 2396 u8 band_idx; 2397 u8 __rsv[2]; 2398 } __packed hdr; 2399 struct req_tlv { 2400 __le16 tag; 2401 __le16 len; 2402 u8 active; 2403 u8 __rsv; 2404 u8 omac_addr[ETH_ALEN]; 2405 } __packed tlv; 2406 } data = { 2407 .hdr = { 2408 .omac_idx = mvif->mt76.omac_idx, 2409 .band_idx = mvif->mt76.band_idx, 2410 }, 2411 .tlv = { 2412 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2413 .len = cpu_to_le16(sizeof(struct req_tlv)), 2414 .active = enable, 2415 }, 2416 }; 2417 2418 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) 2419 return mt7996_mcu_muar_config(phy, vif, false, enable); 2420 2421 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 2422 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2423 &data, sizeof(data), true); 2424 } 2425 2426 static void 2427 mt7996_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, 2428 struct sk_buff *skb, 2429 struct ieee80211_mutable_offsets *offs) 2430 { 2431 struct bss_bcn_cntdwn_tlv *info; 2432 struct tlv *tlv; 2433 u16 tag; 2434 2435 if (!offs->cntdwn_counter_offs[0]) 2436 return; 2437 2438 tag = vif->bss_conf.csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 2439 2440 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 2441 2442 info = (struct bss_bcn_cntdwn_tlv *)tlv; 2443 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 2444 } 2445 2446 static void 2447 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 2448 struct ieee80211_vif *vif, struct bss_bcn_content_tlv *bcn, 2449 struct ieee80211_mutable_offsets *offs) 2450 { 2451 struct bss_bcn_mbss_tlv *mbss; 2452 const struct element *elem; 2453 struct tlv *tlv; 2454 2455 if (!vif->bss_conf.bssid_indicator) 2456 return; 2457 2458 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 2459 2460 mbss = (struct bss_bcn_mbss_tlv *)tlv; 2461 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 2462 mbss->bitmap = cpu_to_le32(1); 2463 2464 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 2465 &skb->data[offs->mbssid_off], 2466 skb->len - offs->mbssid_off) { 2467 const struct element *sub_elem; 2468 2469 if (elem->datalen < 2) 2470 continue; 2471 2472 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 2473 const struct ieee80211_bssid_index *idx; 2474 const u8 *idx_ie; 2475 2476 /* not a valid BSS profile */ 2477 if (sub_elem->id || sub_elem->datalen < 4) 2478 continue; 2479 2480 /* Find WLAN_EID_MULTI_BSSID_IDX 2481 * in the merged nontransmitted profile 2482 */ 2483 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 2484 sub_elem->data, sub_elem->datalen); 2485 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 2486 continue; 2487 2488 idx = (void *)(idx_ie + 2); 2489 if (!idx->bssid_index || idx->bssid_index > 31) 2490 continue; 2491 2492 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 2493 skb->data); 2494 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 2495 } 2496 } 2497 } 2498 2499 static void 2500 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2501 struct sk_buff *rskb, struct sk_buff *skb, 2502 struct bss_bcn_content_tlv *bcn, 2503 struct ieee80211_mutable_offsets *offs) 2504 { 2505 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2506 u8 *buf; 2507 2508 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2509 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 2510 2511 if (offs->cntdwn_counter_offs[0]) { 2512 u16 offset = offs->cntdwn_counter_offs[0]; 2513 2514 if (vif->bss_conf.csa_active) 2515 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 2516 if (vif->bss_conf.color_change_active) 2517 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 2518 } 2519 2520 buf = (u8 *)bcn + sizeof(*bcn); 2521 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 2522 BSS_CHANGED_BEACON); 2523 2524 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2525 } 2526 2527 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, 2528 struct ieee80211_vif *vif, int en) 2529 { 2530 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2531 struct mt7996_phy *phy = mt7996_hw_phy(hw); 2532 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2533 struct ieee80211_mutable_offsets offs; 2534 struct ieee80211_tx_info *info; 2535 struct sk_buff *skb, *rskb; 2536 struct tlv *tlv; 2537 struct bss_bcn_content_tlv *bcn; 2538 int len; 2539 2540 if (vif->bss_conf.nontransmitted) 2541 return 0; 2542 2543 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 2544 MT7996_MAX_BSS_OFFLOAD_SIZE); 2545 if (IS_ERR(rskb)) 2546 return PTR_ERR(rskb); 2547 2548 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0); 2549 if (!skb) { 2550 dev_kfree_skb(rskb); 2551 return -EINVAL; 2552 } 2553 2554 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2555 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2556 dev_kfree_skb(rskb); 2557 dev_kfree_skb(skb); 2558 return -EINVAL; 2559 } 2560 2561 info = IEEE80211_SKB_CB(skb); 2562 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2563 2564 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + skb->len, 4); 2565 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2566 bcn = (struct bss_bcn_content_tlv *)tlv; 2567 bcn->enable = en; 2568 if (!en) 2569 goto out; 2570 2571 mt7996_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); 2572 mt7996_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs); 2573 mt7996_mcu_beacon_cntdwn(vif, rskb, skb, &offs); 2574 out: 2575 dev_kfree_skb(skb); 2576 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 2577 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2578 } 2579 2580 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 2581 struct ieee80211_vif *vif, u32 changed) 2582 { 2583 #define OFFLOAD_TX_MODE_SU BIT(0) 2584 #define OFFLOAD_TX_MODE_MU BIT(1) 2585 struct ieee80211_hw *hw = mt76_hw(dev); 2586 struct mt7996_phy *phy = mt7996_hw_phy(hw); 2587 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2588 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 2589 enum nl80211_band band = chandef->chan->band; 2590 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2591 struct bss_inband_discovery_tlv *discov; 2592 struct ieee80211_tx_info *info; 2593 struct sk_buff *rskb, *skb = NULL; 2594 struct tlv *tlv; 2595 u8 *buf, interval; 2596 int len; 2597 2598 if (vif->bss_conf.nontransmitted) 2599 return 0; 2600 2601 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 2602 MT7996_MAX_BSS_OFFLOAD_SIZE); 2603 if (IS_ERR(rskb)) 2604 return PTR_ERR(rskb); 2605 2606 if (changed & BSS_CHANGED_FILS_DISCOVERY && 2607 vif->bss_conf.fils_discovery.max_interval) { 2608 interval = vif->bss_conf.fils_discovery.max_interval; 2609 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 2610 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 2611 vif->bss_conf.unsol_bcast_probe_resp_interval) { 2612 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 2613 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 2614 } 2615 2616 if (!skb) { 2617 dev_kfree_skb(rskb); 2618 return -EINVAL; 2619 } 2620 2621 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2622 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2623 dev_kfree_skb(rskb); 2624 dev_kfree_skb(skb); 2625 return -EINVAL; 2626 } 2627 2628 info = IEEE80211_SKB_CB(skb); 2629 info->control.vif = vif; 2630 info->band = band; 2631 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2632 2633 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 2634 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2635 2636 discov = (struct bss_inband_discovery_tlv *)tlv; 2637 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2638 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2639 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2640 discov->tx_interval = interval; 2641 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2642 discov->enable = true; 2643 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2644 2645 buf = (u8 *)tlv + sizeof(*discov); 2646 2647 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2648 2649 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2650 2651 dev_kfree_skb(skb); 2652 2653 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2654 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2655 } 2656 2657 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2658 { 2659 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2660 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2661 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2662 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2663 return -EIO; 2664 } 2665 2666 /* clear irq when the driver own success */ 2667 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2668 MT_TOP_LPCR_HOST_BAND_STAT); 2669 2670 return 0; 2671 } 2672 2673 static u32 mt7996_patch_sec_mode(u32 key_info) 2674 { 2675 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2676 2677 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2678 return 0; 2679 2680 if (sec == MT7996_SEC_MODE_AES) 2681 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2682 else 2683 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2684 2685 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2686 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2687 } 2688 2689 static int mt7996_load_patch(struct mt7996_dev *dev) 2690 { 2691 const struct mt7996_patch_hdr *hdr; 2692 const struct firmware *fw = NULL; 2693 int i, ret, sem; 2694 2695 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2696 switch (sem) { 2697 case PATCH_IS_DL: 2698 return 0; 2699 case PATCH_NOT_DL_SEM_SUCCESS: 2700 break; 2701 default: 2702 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2703 return -EAGAIN; 2704 } 2705 2706 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev); 2707 if (ret) 2708 goto out; 2709 2710 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2711 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2712 ret = -EINVAL; 2713 goto out; 2714 } 2715 2716 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2717 2718 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2719 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2720 2721 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2722 struct mt7996_patch_sec *sec; 2723 const u8 *dl; 2724 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2725 2726 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2727 i * sizeof(*sec)); 2728 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2729 PATCH_SEC_TYPE_INFO) { 2730 ret = -EINVAL; 2731 goto out; 2732 } 2733 2734 addr = be32_to_cpu(sec->info.addr); 2735 len = be32_to_cpu(sec->info.len); 2736 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2737 dl = fw->data + be32_to_cpu(sec->offs); 2738 2739 mode |= mt7996_patch_sec_mode(sec_key_idx); 2740 2741 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2742 mode); 2743 if (ret) { 2744 dev_err(dev->mt76.dev, "Download request failed\n"); 2745 goto out; 2746 } 2747 2748 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2749 dl, len, 4096); 2750 if (ret) { 2751 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2752 goto out; 2753 } 2754 } 2755 2756 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2757 if (ret) 2758 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2759 2760 out: 2761 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2762 switch (sem) { 2763 case PATCH_REL_SEM_SUCCESS: 2764 break; 2765 default: 2766 ret = -EAGAIN; 2767 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2768 break; 2769 } 2770 release_firmware(fw); 2771 2772 return ret; 2773 } 2774 2775 static int 2776 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2777 const struct mt7996_fw_trailer *hdr, 2778 const u8 *data, enum mt7996_ram_type type) 2779 { 2780 int i, offset = 0; 2781 u32 override = 0, option = 0; 2782 2783 for (i = 0; i < hdr->n_region; i++) { 2784 const struct mt7996_fw_region *region; 2785 int err; 2786 u32 len, addr, mode; 2787 2788 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2789 (hdr->n_region - i) * sizeof(*region)); 2790 /* DSP and WA use same mode */ 2791 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2792 region->feature_set, 2793 type != MT7996_RAM_TYPE_WM); 2794 len = le32_to_cpu(region->len); 2795 addr = le32_to_cpu(region->addr); 2796 2797 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2798 override = addr; 2799 2800 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2801 mode); 2802 if (err) { 2803 dev_err(dev->mt76.dev, "Download request failed\n"); 2804 return err; 2805 } 2806 2807 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2808 data + offset, len, 4096); 2809 if (err) { 2810 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2811 return err; 2812 } 2813 2814 offset += len; 2815 } 2816 2817 if (override) 2818 option |= FW_START_OVERRIDE; 2819 2820 if (type == MT7996_RAM_TYPE_WA) 2821 option |= FW_START_WORKING_PDA_CR4; 2822 else if (type == MT7996_RAM_TYPE_DSP) 2823 option |= FW_START_WORKING_PDA_DSP; 2824 2825 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2826 } 2827 2828 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 2829 const char *fw_file, enum mt7996_ram_type ram_type) 2830 { 2831 const struct mt7996_fw_trailer *hdr; 2832 const struct firmware *fw; 2833 int ret; 2834 2835 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 2836 if (ret) 2837 return ret; 2838 2839 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2840 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2841 ret = -EINVAL; 2842 goto out; 2843 } 2844 2845 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 2846 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 2847 fw_type, hdr->fw_ver, hdr->build_date); 2848 2849 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 2850 if (ret) { 2851 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 2852 goto out; 2853 } 2854 2855 snprintf(dev->mt76.hw->wiphy->fw_version, 2856 sizeof(dev->mt76.hw->wiphy->fw_version), 2857 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2858 2859 out: 2860 release_firmware(fw); 2861 2862 return ret; 2863 } 2864 2865 static int mt7996_load_ram(struct mt7996_dev *dev) 2866 { 2867 int ret; 2868 2869 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM), 2870 MT7996_RAM_TYPE_WM); 2871 if (ret) 2872 return ret; 2873 2874 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP), 2875 MT7996_RAM_TYPE_DSP); 2876 if (ret) 2877 return ret; 2878 2879 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA), 2880 MT7996_RAM_TYPE_WA); 2881 } 2882 2883 static int 2884 mt7996_firmware_state(struct mt7996_dev *dev, bool wa) 2885 { 2886 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2887 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2888 2889 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2890 state, 1000)) { 2891 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2892 return -EIO; 2893 } 2894 return 0; 2895 } 2896 2897 static int 2898 mt7996_mcu_restart(struct mt76_dev *dev) 2899 { 2900 struct { 2901 u8 __rsv1[4]; 2902 2903 __le16 tag; 2904 __le16 len; 2905 u8 power_mode; 2906 u8 __rsv2[3]; 2907 } __packed req = { 2908 .tag = cpu_to_le16(UNI_POWER_OFF), 2909 .len = cpu_to_le16(sizeof(req) - 4), 2910 .power_mode = 1, 2911 }; 2912 2913 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 2914 sizeof(req), false); 2915 } 2916 2917 static int mt7996_load_firmware(struct mt7996_dev *dev) 2918 { 2919 int ret; 2920 2921 /* make sure fw is download state */ 2922 if (mt7996_firmware_state(dev, false)) { 2923 /* restart firmware once */ 2924 mt7996_mcu_restart(&dev->mt76); 2925 ret = mt7996_firmware_state(dev, false); 2926 if (ret) { 2927 dev_err(dev->mt76.dev, 2928 "Firmware is not ready for download\n"); 2929 return ret; 2930 } 2931 } 2932 2933 ret = mt7996_load_patch(dev); 2934 if (ret) 2935 return ret; 2936 2937 ret = mt7996_load_ram(dev); 2938 if (ret) 2939 return ret; 2940 2941 ret = mt7996_firmware_state(dev, true); 2942 if (ret) 2943 return ret; 2944 2945 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2946 2947 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2948 2949 return 0; 2950 } 2951 2952 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 2953 { 2954 struct { 2955 u8 _rsv[4]; 2956 2957 __le16 tag; 2958 __le16 len; 2959 u8 ctrl; 2960 u8 interval; 2961 u8 _rsv2[2]; 2962 } __packed data = { 2963 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 2964 .len = cpu_to_le16(sizeof(data) - 4), 2965 .ctrl = ctrl, 2966 }; 2967 2968 if (type == MCU_FW_LOG_WA) 2969 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 2970 &data, sizeof(data), true); 2971 2972 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2973 sizeof(data), true); 2974 } 2975 2976 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 2977 { 2978 struct { 2979 u8 _rsv[4]; 2980 2981 __le16 tag; 2982 __le16 len; 2983 __le32 module_idx; 2984 u8 level; 2985 u8 _rsv2[3]; 2986 } data = { 2987 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 2988 .len = cpu_to_le16(sizeof(data) - 4), 2989 .module_idx = cpu_to_le32(module), 2990 .level = level, 2991 }; 2992 2993 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2994 sizeof(data), false); 2995 } 2996 2997 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 2998 { 2999 struct { 3000 u8 enable; 3001 u8 _rsv[3]; 3002 } __packed req = { 3003 .enable = enabled 3004 }; 3005 3006 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 3007 sizeof(req), false); 3008 } 3009 3010 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 3011 { 3012 struct vow_rx_airtime *req; 3013 struct tlv *tlv; 3014 3015 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 3016 req = (struct vow_rx_airtime *)tlv; 3017 req->enable = true; 3018 req->band = band_idx; 3019 3020 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 3021 req = (struct vow_rx_airtime *)tlv; 3022 req->enable = true; 3023 req->band = band_idx; 3024 } 3025 3026 static int 3027 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 3028 { 3029 struct uni_header hdr = {}; 3030 struct sk_buff *skb; 3031 int len, num, i; 3032 3033 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) + 3034 mt7996_band_valid(dev, MT_BAND2)); 3035 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 3036 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3037 if (!skb) 3038 return -ENOMEM; 3039 3040 skb_put_data(skb, &hdr, sizeof(hdr)); 3041 3042 for (i = 0; i < __MT_MAX_BAND; i++) { 3043 if (mt7996_band_valid(dev, i)) 3044 mt7996_add_rx_airtime_tlv(skb, i); 3045 } 3046 3047 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3048 MCU_WM_UNI_CMD(VOW), true); 3049 } 3050 3051 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 3052 { 3053 int ret; 3054 3055 /* force firmware operation mode into normal state, 3056 * which should be set before firmware download stage. 3057 */ 3058 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 3059 3060 ret = mt7996_driver_own(dev, 0); 3061 if (ret) 3062 return ret; 3063 /* set driver own for band1 when two hif exist */ 3064 if (dev->hif2) { 3065 ret = mt7996_driver_own(dev, 1); 3066 if (ret) 3067 return ret; 3068 } 3069 3070 ret = mt7996_load_firmware(dev); 3071 if (ret) 3072 return ret; 3073 3074 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 3075 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 3076 if (ret) 3077 return ret; 3078 3079 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 3080 if (ret) 3081 return ret; 3082 3083 ret = mt7996_mcu_set_mwds(dev, 1); 3084 if (ret) 3085 return ret; 3086 3087 ret = mt7996_mcu_init_rx_airtime(dev); 3088 if (ret) 3089 return ret; 3090 3091 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 3092 MCU_WA_PARAM_RED, 0, 0); 3093 } 3094 3095 int mt7996_mcu_init(struct mt7996_dev *dev) 3096 { 3097 static const struct mt76_mcu_ops mt7996_mcu_ops = { 3098 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 3099 .mcu_skb_send_msg = mt7996_mcu_send_message, 3100 .mcu_parse_response = mt7996_mcu_parse_response, 3101 }; 3102 3103 dev->mt76.mcu_ops = &mt7996_mcu_ops; 3104 3105 return mt7996_mcu_init_firmware(dev); 3106 } 3107 3108 void mt7996_mcu_exit(struct mt7996_dev *dev) 3109 { 3110 mt7996_mcu_restart(&dev->mt76); 3111 if (mt7996_firmware_state(dev, false)) { 3112 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 3113 goto out; 3114 } 3115 3116 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 3117 if (dev->hif2) 3118 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 3119 MT_TOP_LPCR_HOST_FW_OWN); 3120 out: 3121 skb_queue_purge(&dev->mt76.mcu.res_q); 3122 } 3123 3124 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 3125 { 3126 struct { 3127 u8 __rsv[4]; 3128 } __packed hdr; 3129 struct hdr_trans_blacklist *req_blacklist; 3130 struct hdr_trans_en *req_en; 3131 struct sk_buff *skb; 3132 struct tlv *tlv; 3133 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 3134 3135 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3136 if (!skb) 3137 return -ENOMEM; 3138 3139 skb_put_data(skb, &hdr, sizeof(hdr)); 3140 3141 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 3142 req_en = (struct hdr_trans_en *)tlv; 3143 req_en->enable = hdr_trans; 3144 3145 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 3146 sizeof(struct hdr_trans_vlan)); 3147 3148 if (hdr_trans) { 3149 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 3150 sizeof(*req_blacklist)); 3151 req_blacklist = (struct hdr_trans_blacklist *)tlv; 3152 req_blacklist->enable = 1; 3153 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 3154 } 3155 3156 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3157 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 3158 } 3159 3160 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif) 3161 { 3162 #define MCU_EDCA_AC_PARAM 0 3163 #define WMM_AIFS_SET BIT(0) 3164 #define WMM_CW_MIN_SET BIT(1) 3165 #define WMM_CW_MAX_SET BIT(2) 3166 #define WMM_TXOP_SET BIT(3) 3167 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 3168 WMM_CW_MAX_SET | WMM_TXOP_SET) 3169 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3170 struct { 3171 u8 bss_idx; 3172 u8 __rsv[3]; 3173 } __packed hdr = { 3174 .bss_idx = mvif->mt76.idx, 3175 }; 3176 struct sk_buff *skb; 3177 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 3178 int ac; 3179 3180 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3181 if (!skb) 3182 return -ENOMEM; 3183 3184 skb_put_data(skb, &hdr, sizeof(hdr)); 3185 3186 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 3187 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; 3188 struct edca *e; 3189 struct tlv *tlv; 3190 3191 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 3192 3193 e = (struct edca *)tlv; 3194 e->set = WMM_PARAM_SET; 3195 e->queue = ac; 3196 e->aifs = q->aifs; 3197 e->txop = cpu_to_le16(q->txop); 3198 3199 if (q->cw_min) 3200 e->cw_min = fls(q->cw_min); 3201 else 3202 e->cw_min = 5; 3203 3204 if (q->cw_max) 3205 e->cw_max = fls(q->cw_max); 3206 else 3207 e->cw_max = 10; 3208 } 3209 3210 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3211 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 3212 } 3213 3214 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 3215 { 3216 struct { 3217 u8 _rsv[4]; 3218 3219 __le16 tag; 3220 __le16 len; 3221 3222 __le32 ctrl; 3223 __le16 min_lpn; 3224 u8 rsv[2]; 3225 } __packed req = { 3226 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3227 .len = cpu_to_le16(sizeof(req) - 4), 3228 3229 .ctrl = cpu_to_le32(0x1), 3230 .min_lpn = cpu_to_le16(val), 3231 }; 3232 3233 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3234 &req, sizeof(req), true); 3235 } 3236 3237 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3238 const struct mt7996_dfs_pulse *pulse) 3239 { 3240 struct { 3241 u8 _rsv[4]; 3242 3243 __le16 tag; 3244 __le16 len; 3245 3246 __le32 ctrl; 3247 3248 __le32 max_width; /* us */ 3249 __le32 max_pwr; /* dbm */ 3250 __le32 min_pwr; /* dbm */ 3251 __le32 min_stgr_pri; /* us */ 3252 __le32 max_stgr_pri; /* us */ 3253 __le32 min_cr_pri; /* us */ 3254 __le32 max_cr_pri; /* us */ 3255 } __packed req = { 3256 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3257 .len = cpu_to_le16(sizeof(req) - 4), 3258 3259 .ctrl = cpu_to_le32(0x3), 3260 3261 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3262 __req_field(max_width), 3263 __req_field(max_pwr), 3264 __req_field(min_pwr), 3265 __req_field(min_stgr_pri), 3266 __req_field(max_stgr_pri), 3267 __req_field(min_cr_pri), 3268 __req_field(max_cr_pri), 3269 #undef __req_field 3270 }; 3271 3272 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3273 &req, sizeof(req), true); 3274 } 3275 3276 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3277 const struct mt7996_dfs_pattern *pattern) 3278 { 3279 struct { 3280 u8 _rsv[4]; 3281 3282 __le16 tag; 3283 __le16 len; 3284 3285 __le32 ctrl; 3286 __le16 radar_type; 3287 3288 u8 enb; 3289 u8 stgr; 3290 u8 min_crpn; 3291 u8 max_crpn; 3292 u8 min_crpr; 3293 u8 min_pw; 3294 __le32 min_pri; 3295 __le32 max_pri; 3296 u8 max_pw; 3297 u8 min_crbn; 3298 u8 max_crbn; 3299 u8 min_stgpn; 3300 u8 max_stgpn; 3301 u8 min_stgpr; 3302 u8 rsv[2]; 3303 __le32 min_stgpr_diff; 3304 } __packed req = { 3305 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3306 .len = cpu_to_le16(sizeof(req) - 4), 3307 3308 .ctrl = cpu_to_le32(0x2), 3309 .radar_type = cpu_to_le16(index), 3310 3311 #define __req_field_u8(field) .field = pattern->field 3312 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3313 __req_field_u8(enb), 3314 __req_field_u8(stgr), 3315 __req_field_u8(min_crpn), 3316 __req_field_u8(max_crpn), 3317 __req_field_u8(min_crpr), 3318 __req_field_u8(min_pw), 3319 __req_field_u32(min_pri), 3320 __req_field_u32(max_pri), 3321 __req_field_u8(max_pw), 3322 __req_field_u8(min_crbn), 3323 __req_field_u8(max_crbn), 3324 __req_field_u8(min_stgpn), 3325 __req_field_u8(max_stgpn), 3326 __req_field_u8(min_stgpr), 3327 __req_field_u32(min_stgpr_diff), 3328 #undef __req_field_u8 3329 #undef __req_field_u32 3330 }; 3331 3332 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3333 &req, sizeof(req), true); 3334 } 3335 3336 static int 3337 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3338 struct cfg80211_chan_def *chandef, 3339 int cmd) 3340 { 3341 struct mt7996_dev *dev = phy->dev; 3342 struct mt76_phy *mphy = phy->mt76; 3343 struct ieee80211_channel *chan = mphy->chandef.chan; 3344 int freq = mphy->chandef.center_freq1; 3345 struct mt7996_mcu_background_chain_ctrl req = { 3346 .tag = cpu_to_le16(0), 3347 .len = cpu_to_le16(sizeof(req) - 4), 3348 .monitor_scan_type = 2, /* simple rx */ 3349 }; 3350 3351 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3352 return -EINVAL; 3353 3354 if (!cfg80211_chandef_valid(&mphy->chandef)) 3355 return -EINVAL; 3356 3357 switch (cmd) { 3358 case CH_SWITCH_BACKGROUND_SCAN_START: { 3359 req.chan = chan->hw_value; 3360 req.central_chan = ieee80211_frequency_to_channel(freq); 3361 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3362 req.monitor_chan = chandef->chan->hw_value; 3363 req.monitor_central_chan = 3364 ieee80211_frequency_to_channel(chandef->center_freq1); 3365 req.monitor_bw = mt76_connac_chan_bw(chandef); 3366 req.band_idx = phy->mt76->band_idx; 3367 req.scan_mode = 1; 3368 break; 3369 } 3370 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3371 req.monitor_chan = chandef->chan->hw_value; 3372 req.monitor_central_chan = 3373 ieee80211_frequency_to_channel(chandef->center_freq1); 3374 req.band_idx = phy->mt76->band_idx; 3375 req.scan_mode = 2; 3376 break; 3377 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3378 req.chan = chan->hw_value; 3379 req.central_chan = ieee80211_frequency_to_channel(freq); 3380 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3381 req.tx_stream = hweight8(mphy->antenna_mask); 3382 req.rx_stream = mphy->antenna_mask; 3383 break; 3384 default: 3385 return -EINVAL; 3386 } 3387 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3388 3389 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 3390 &req, sizeof(req), false); 3391 } 3392 3393 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 3394 struct cfg80211_chan_def *chandef) 3395 { 3396 struct mt7996_dev *dev = phy->dev; 3397 int err, region; 3398 3399 if (!chandef) { /* disable offchain */ 3400 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2, 3401 0, 0); 3402 if (err) 3403 return err; 3404 3405 return mt7996_mcu_background_chain_ctrl(phy, NULL, 3406 CH_SWITCH_BACKGROUND_SCAN_STOP); 3407 } 3408 3409 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 3410 CH_SWITCH_BACKGROUND_SCAN_START); 3411 if (err) 3412 return err; 3413 3414 switch (dev->mt76.region) { 3415 case NL80211_DFS_ETSI: 3416 region = 0; 3417 break; 3418 case NL80211_DFS_JP: 3419 region = 2; 3420 break; 3421 case NL80211_DFS_FCC: 3422 default: 3423 region = 1; 3424 break; 3425 } 3426 3427 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2, 3428 0, region); 3429 } 3430 3431 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 3432 { 3433 static const u8 ch_band[] = { 3434 [NL80211_BAND_2GHZ] = 0, 3435 [NL80211_BAND_5GHZ] = 1, 3436 [NL80211_BAND_6GHZ] = 2, 3437 }; 3438 struct mt7996_dev *dev = phy->dev; 3439 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3440 int freq1 = chandef->center_freq1; 3441 u8 band_idx = phy->mt76->band_idx; 3442 struct { 3443 /* fixed field */ 3444 u8 __rsv[4]; 3445 3446 __le16 tag; 3447 __le16 len; 3448 u8 control_ch; 3449 u8 center_ch; 3450 u8 bw; 3451 u8 tx_path_num; 3452 u8 rx_path; /* mask or num */ 3453 u8 switch_reason; 3454 u8 band_idx; 3455 u8 center_ch2; /* for 80+80 only */ 3456 __le16 cac_case; 3457 u8 channel_band; 3458 u8 rsv0; 3459 __le32 outband_freq; 3460 u8 txpower_drop; 3461 u8 ap_bw; 3462 u8 ap_center_ch; 3463 u8 rsv1[53]; 3464 } __packed req = { 3465 .tag = cpu_to_le16(tag), 3466 .len = cpu_to_le16(sizeof(req) - 4), 3467 .control_ch = chandef->chan->hw_value, 3468 .center_ch = ieee80211_frequency_to_channel(freq1), 3469 .bw = mt76_connac_chan_bw(chandef), 3470 .tx_path_num = hweight16(phy->mt76->chainmask), 3471 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx], 3472 .band_idx = band_idx, 3473 .channel_band = ch_band[chandef->chan->band], 3474 }; 3475 3476 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 3477 req.switch_reason = CH_SWITCH_NORMAL; 3478 else if (phy->mt76->offchannel || 3479 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 3480 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 3481 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 3482 NL80211_IFTYPE_AP)) 3483 req.switch_reason = CH_SWITCH_DFS; 3484 else 3485 req.switch_reason = CH_SWITCH_NORMAL; 3486 3487 if (tag == UNI_CHANNEL_SWITCH) 3488 req.rx_path = hweight8(req.rx_path); 3489 3490 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 3491 int freq2 = chandef->center_freq2; 3492 3493 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 3494 } 3495 3496 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 3497 &req, sizeof(req), true); 3498 } 3499 3500 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 3501 { 3502 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 3503 #define PAGE_IDX_MASK GENMASK(4, 2) 3504 #define PER_PAGE_SIZE 0x400 3505 struct mt7996_mcu_eeprom req = { 3506 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3507 .buffer_mode = EE_MODE_BUFFER 3508 }; 3509 u16 eeprom_size = MT7996_EEPROM_SIZE; 3510 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 3511 u8 *eep = (u8 *)dev->mt76.eeprom.data; 3512 int eep_len, i; 3513 3514 for (i = 0; i < total; i++, eep += eep_len) { 3515 struct sk_buff *skb; 3516 int ret, msg_len; 3517 3518 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 3519 eep_len = eeprom_size % PER_PAGE_SIZE; 3520 else 3521 eep_len = PER_PAGE_SIZE; 3522 3523 msg_len = sizeof(req) + eep_len; 3524 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 3525 if (!skb) 3526 return -ENOMEM; 3527 3528 req.len = cpu_to_le16(msg_len - 4); 3529 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 3530 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 3531 req.buf_len = cpu_to_le16(eep_len); 3532 3533 skb_put_data(skb, &req, sizeof(req)); 3534 skb_put_data(skb, eep, eep_len); 3535 3536 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 3537 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 3538 if (ret) 3539 return ret; 3540 } 3541 3542 return 0; 3543 } 3544 3545 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 3546 { 3547 struct mt7996_mcu_eeprom req = { 3548 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3549 .len = cpu_to_le16(sizeof(req) - 4), 3550 .buffer_mode = EE_MODE_EFUSE, 3551 .format = EE_FORMAT_WHOLE 3552 }; 3553 3554 if (dev->flash_mode) 3555 return mt7996_mcu_set_eeprom_flash(dev); 3556 3557 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 3558 &req, sizeof(req), true); 3559 } 3560 3561 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len) 3562 { 3563 struct { 3564 u8 _rsv[4]; 3565 3566 __le16 tag; 3567 __le16 len; 3568 __le32 addr; 3569 __le32 valid; 3570 u8 data[16]; 3571 } __packed req = { 3572 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 3573 .len = cpu_to_le16(sizeof(req) - 4), 3574 .addr = cpu_to_le32(round_down(offset, 3575 MT7996_EEPROM_BLOCK_SIZE)), 3576 }; 3577 struct sk_buff *skb; 3578 bool valid; 3579 int ret; 3580 3581 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3582 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 3583 &req, sizeof(req), true, &skb); 3584 if (ret) 3585 return ret; 3586 3587 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 3588 if (valid) { 3589 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3590 3591 if (!buf) 3592 buf = (u8 *)dev->mt76.eeprom.data + addr; 3593 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE) 3594 buf_len = MT7996_EEPROM_BLOCK_SIZE; 3595 3596 skb_pull(skb, 48); 3597 memcpy(buf, skb->data, buf_len); 3598 } else { 3599 ret = -EINVAL; 3600 } 3601 3602 dev_kfree_skb(skb); 3603 3604 return ret; 3605 } 3606 3607 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 3608 { 3609 struct { 3610 u8 _rsv[4]; 3611 3612 __le16 tag; 3613 __le16 len; 3614 u8 num; 3615 u8 version; 3616 u8 die_idx; 3617 u8 _rsv2; 3618 } __packed req = { 3619 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 3620 .len = cpu_to_le16(sizeof(req) - 4), 3621 .version = 2, 3622 }; 3623 struct sk_buff *skb; 3624 int ret; 3625 3626 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3627 sizeof(req), true, &skb); 3628 if (ret) 3629 return ret; 3630 3631 *block_num = *(u8 *)(skb->data + 8); 3632 dev_kfree_skb(skb); 3633 3634 return 0; 3635 } 3636 3637 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3638 { 3639 #define NIC_CAP 3 3640 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3641 struct { 3642 u8 _rsv[4]; 3643 3644 __le16 tag; 3645 __le16 len; 3646 } __packed req = { 3647 .tag = cpu_to_le16(NIC_CAP), 3648 .len = cpu_to_le16(sizeof(req) - 4), 3649 }; 3650 struct sk_buff *skb; 3651 u8 *buf; 3652 int ret; 3653 3654 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3655 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3656 sizeof(req), true, &skb); 3657 if (ret) 3658 return ret; 3659 3660 /* fixed field */ 3661 skb_pull(skb, 4); 3662 3663 buf = skb->data; 3664 while (buf - skb->data < skb->len) { 3665 struct tlv *tlv = (struct tlv *)buf; 3666 3667 switch (le16_to_cpu(tlv->tag)) { 3668 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3669 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3670 break; 3671 default: 3672 break; 3673 } 3674 3675 buf += le16_to_cpu(tlv->len); 3676 } 3677 3678 dev_kfree_skb(skb); 3679 3680 return 0; 3681 } 3682 3683 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3684 { 3685 struct { 3686 struct { 3687 u8 band; 3688 u8 __rsv[3]; 3689 } hdr; 3690 struct { 3691 __le16 tag; 3692 __le16 len; 3693 __le32 offs; 3694 } data[4]; 3695 } __packed req = { 3696 .hdr.band = phy->mt76->band_idx, 3697 }; 3698 /* strict order */ 3699 static const u32 offs[] = { 3700 UNI_MIB_TX_TIME, 3701 UNI_MIB_RX_TIME, 3702 UNI_MIB_OBSS_AIRTIME, 3703 UNI_MIB_NON_WIFI_TIME, 3704 }; 3705 struct mt76_channel_state *state = phy->mt76->chan_state; 3706 struct mt76_channel_state *state_ts = &phy->state_ts; 3707 struct mt7996_dev *dev = phy->dev; 3708 struct mt7996_mcu_mib *res; 3709 struct sk_buff *skb; 3710 int i, ret; 3711 3712 for (i = 0; i < 4; i++) { 3713 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3714 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3715 req.data[i].offs = cpu_to_le32(offs[i]); 3716 } 3717 3718 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3719 &req, sizeof(req), true, &skb); 3720 if (ret) 3721 return ret; 3722 3723 skb_pull(skb, sizeof(req.hdr)); 3724 3725 res = (struct mt7996_mcu_mib *)(skb->data); 3726 3727 if (chan_switch) 3728 goto out; 3729 3730 #define __res_u64(s) le64_to_cpu(res[s].data) 3731 state->cc_tx += __res_u64(1) - state_ts->cc_tx; 3732 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx; 3733 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx; 3734 state->cc_busy += __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3) - 3735 state_ts->cc_busy; 3736 3737 out: 3738 state_ts->cc_tx = __res_u64(1); 3739 state_ts->cc_bss_rx = __res_u64(2); 3740 state_ts->cc_rx = __res_u64(2) + __res_u64(3); 3741 state_ts->cc_busy = __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3); 3742 #undef __res_u64 3743 3744 dev_kfree_skb(skb); 3745 3746 return 0; 3747 } 3748 3749 int mt7996_mcu_get_temperature(struct mt7996_phy *phy) 3750 { 3751 #define TEMPERATURE_QUERY 0 3752 #define GET_TEMPERATURE 0 3753 struct { 3754 u8 _rsv[4]; 3755 3756 __le16 tag; 3757 __le16 len; 3758 3759 u8 rsv1; 3760 u8 action; 3761 u8 band_idx; 3762 u8 rsv2; 3763 } req = { 3764 .tag = cpu_to_le16(TEMPERATURE_QUERY), 3765 .len = cpu_to_le16(sizeof(req) - 4), 3766 .action = GET_TEMPERATURE, 3767 .band_idx = phy->mt76->band_idx, 3768 }; 3769 struct mt7996_mcu_thermal { 3770 u8 _rsv[4]; 3771 3772 __le16 tag; 3773 __le16 len; 3774 3775 __le32 rsv; 3776 __le32 temperature; 3777 } __packed * res; 3778 struct sk_buff *skb; 3779 int ret; 3780 u32 temp; 3781 3782 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3783 &req, sizeof(req), true, &skb); 3784 if (ret) 3785 return ret; 3786 3787 res = (void *)skb->data; 3788 temp = le32_to_cpu(res->temperature); 3789 dev_kfree_skb(skb); 3790 3791 return temp; 3792 } 3793 3794 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state) 3795 { 3796 struct { 3797 u8 _rsv[4]; 3798 3799 __le16 tag; 3800 __le16 len; 3801 3802 struct mt7996_mcu_thermal_ctrl ctrl; 3803 } __packed req = { 3804 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG), 3805 .len = cpu_to_le16(sizeof(req) - 4), 3806 .ctrl = { 3807 .band_idx = phy->mt76->band_idx, 3808 }, 3809 }; 3810 int level, ret; 3811 3812 /* set duty cycle and level */ 3813 for (level = 0; level < 4; level++) { 3814 req.ctrl.duty.duty_level = level; 3815 req.ctrl.duty.duty_cycle = state; 3816 state /= 2; 3817 3818 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3819 &req, sizeof(req), false); 3820 if (ret) 3821 return ret; 3822 } 3823 3824 return 0; 3825 } 3826 3827 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable) 3828 { 3829 #define SUSTAIN_PERIOD 10 3830 struct { 3831 u8 _rsv[4]; 3832 3833 __le16 tag; 3834 __le16 len; 3835 3836 struct mt7996_mcu_thermal_ctrl ctrl; 3837 struct mt7996_mcu_thermal_enable enable; 3838 } __packed req = { 3839 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)), 3840 .ctrl = { 3841 .band_idx = phy->mt76->band_idx, 3842 .type.protect_type = 1, 3843 .type.trigger_type = 1, 3844 }, 3845 }; 3846 int ret; 3847 3848 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE); 3849 3850 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3851 &req, sizeof(req) - sizeof(req.enable), false); 3852 if (ret || !enable) 3853 return ret; 3854 3855 /* set high-temperature trigger threshold */ 3856 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE); 3857 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]); 3858 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 3859 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD); 3860 3861 req.len = cpu_to_le16(sizeof(req) - 4); 3862 3863 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3864 &req, sizeof(req), false); 3865 } 3866 3867 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 3868 { 3869 struct { 3870 u8 rsv[4]; 3871 3872 __le16 tag; 3873 __le16 len; 3874 3875 union { 3876 struct { 3877 __le32 mask; 3878 } __packed set; 3879 3880 struct { 3881 u8 method; 3882 u8 band; 3883 u8 rsv2[2]; 3884 } __packed trigger; 3885 }; 3886 } __packed req = { 3887 .tag = cpu_to_le16(action), 3888 .len = cpu_to_le16(sizeof(req) - 4), 3889 }; 3890 3891 switch (action) { 3892 case UNI_CMD_SER_SET: 3893 req.set.mask = cpu_to_le32(val); 3894 break; 3895 case UNI_CMD_SER_TRIGGER: 3896 req.trigger.method = val; 3897 req.trigger.band = band; 3898 break; 3899 default: 3900 return -EINVAL; 3901 } 3902 3903 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 3904 &req, sizeof(req), false); 3905 } 3906 3907 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 3908 { 3909 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 3910 #define BF_PROCESSING 4 3911 struct uni_header hdr; 3912 struct sk_buff *skb; 3913 struct tlv *tlv; 3914 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 3915 3916 memset(&hdr, 0, sizeof(hdr)); 3917 3918 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3919 if (!skb) 3920 return -ENOMEM; 3921 3922 skb_put_data(skb, &hdr, sizeof(hdr)); 3923 3924 switch (action) { 3925 case BF_SOUNDING_ON: { 3926 struct bf_sounding_on *req_snd_on; 3927 3928 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 3929 req_snd_on = (struct bf_sounding_on *)tlv; 3930 req_snd_on->snd_mode = BF_PROCESSING; 3931 break; 3932 } 3933 case BF_HW_EN_UPDATE: { 3934 struct bf_hw_en_status_update *req_hw_en; 3935 3936 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 3937 req_hw_en = (struct bf_hw_en_status_update *)tlv; 3938 req_hw_en->ebf = true; 3939 req_hw_en->ibf = dev->ibf; 3940 break; 3941 } 3942 case BF_MOD_EN_CTRL: { 3943 struct bf_mod_en_ctrl *req_mod_en; 3944 3945 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 3946 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 3947 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2; 3948 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ? 3949 GENMASK(2, 0) : GENMASK(1, 0); 3950 break; 3951 } 3952 default: 3953 return -EINVAL; 3954 } 3955 3956 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 3957 } 3958 3959 static int 3960 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 3961 { 3962 struct mt7996_dev *dev = phy->dev; 3963 struct { 3964 u8 band_idx; 3965 u8 __rsv[3]; 3966 3967 __le16 tag; 3968 __le16 len; 3969 3970 __le32 val; 3971 } __packed req = { 3972 .band_idx = phy->mt76->band_idx, 3973 .tag = cpu_to_le16(action), 3974 .len = cpu_to_le16(sizeof(req) - 4), 3975 .val = cpu_to_le32(val), 3976 }; 3977 3978 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3979 &req, sizeof(req), true); 3980 } 3981 3982 static int 3983 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 3984 struct ieee80211_he_obss_pd *he_obss_pd) 3985 { 3986 struct mt7996_dev *dev = phy->dev; 3987 u8 max_th = 82, non_srg_max_th = 62; 3988 struct { 3989 u8 band_idx; 3990 u8 __rsv[3]; 3991 3992 __le16 tag; 3993 __le16 len; 3994 3995 u8 pd_th_non_srg; 3996 u8 pd_th_srg; 3997 u8 period_offs; 3998 u8 rcpi_src; 3999 __le16 obss_pd_min; 4000 __le16 obss_pd_min_srg; 4001 u8 resp_txpwr_mode; 4002 u8 txpwr_restrict_mode; 4003 u8 txpwr_ref; 4004 u8 __rsv2[3]; 4005 } __packed req = { 4006 .band_idx = phy->mt76->band_idx, 4007 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 4008 .len = cpu_to_le16(sizeof(req) - 4), 4009 .obss_pd_min = cpu_to_le16(max_th), 4010 .obss_pd_min_srg = cpu_to_le16(max_th), 4011 .txpwr_restrict_mode = 2, 4012 .txpwr_ref = 21 4013 }; 4014 int ret; 4015 4016 /* disable firmware dynamical PD asjustment */ 4017 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 4018 if (ret) 4019 return ret; 4020 4021 if (he_obss_pd->sr_ctrl & 4022 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 4023 req.pd_th_non_srg = max_th; 4024 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 4025 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 4026 else 4027 req.pd_th_non_srg = non_srg_max_th; 4028 4029 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 4030 req.pd_th_srg = max_th - he_obss_pd->max_offset; 4031 4032 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4033 &req, sizeof(req), true); 4034 } 4035 4036 static int 4037 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif, 4038 struct ieee80211_he_obss_pd *he_obss_pd) 4039 { 4040 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4041 struct mt7996_dev *dev = phy->dev; 4042 u8 omac = mvif->mt76.omac_idx; 4043 struct { 4044 u8 band_idx; 4045 u8 __rsv[3]; 4046 4047 __le16 tag; 4048 __le16 len; 4049 4050 u8 omac; 4051 u8 __rsv2[3]; 4052 u8 flag[20]; 4053 } __packed req = { 4054 .band_idx = phy->mt76->band_idx, 4055 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 4056 .len = cpu_to_le16(sizeof(req) - 4), 4057 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 4058 }; 4059 int ret; 4060 4061 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 4062 req.flag[req.omac] = 0xf; 4063 else 4064 return 0; 4065 4066 /* switch to normal AP mode */ 4067 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 4068 if (ret) 4069 return ret; 4070 4071 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4072 &req, sizeof(req), true); 4073 } 4074 4075 static int 4076 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 4077 struct ieee80211_he_obss_pd *he_obss_pd) 4078 { 4079 struct mt7996_dev *dev = phy->dev; 4080 struct { 4081 u8 band_idx; 4082 u8 __rsv[3]; 4083 4084 __le16 tag; 4085 __le16 len; 4086 4087 __le32 color_l[2]; 4088 __le32 color_h[2]; 4089 __le32 bssid_l[2]; 4090 __le32 bssid_h[2]; 4091 } __packed req = { 4092 .band_idx = phy->mt76->band_idx, 4093 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 4094 .len = cpu_to_le16(sizeof(req) - 4), 4095 }; 4096 u32 bitmap; 4097 4098 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 4099 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 4100 4101 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 4102 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 4103 4104 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 4105 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 4106 4107 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 4108 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 4109 4110 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 4111 sizeof(req), true); 4112 } 4113 4114 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif, 4115 struct ieee80211_he_obss_pd *he_obss_pd) 4116 { 4117 int ret; 4118 4119 /* enable firmware scene detection algorithms */ 4120 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 4121 sr_scene_detect); 4122 if (ret) 4123 return ret; 4124 4125 /* firmware dynamically adjusts PD threshold so skip manual control */ 4126 if (sr_scene_detect && !he_obss_pd->enable) 4127 return 0; 4128 4129 /* enable spatial reuse */ 4130 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 4131 he_obss_pd->enable); 4132 if (ret) 4133 return ret; 4134 4135 if (sr_scene_detect || !he_obss_pd->enable) 4136 return 0; 4137 4138 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 4139 if (ret) 4140 return ret; 4141 4142 /* set SRG/non-SRG OBSS PD threshold */ 4143 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 4144 if (ret) 4145 return ret; 4146 4147 /* Set SR prohibit */ 4148 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 4149 if (ret) 4150 return ret; 4151 4152 /* set SRG BSS color/BSSID bitmap */ 4153 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 4154 } 4155 4156 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif, 4157 struct cfg80211_he_bss_color *he_bss_color) 4158 { 4159 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 4160 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4161 struct bss_color_tlv *bss_color; 4162 struct sk_buff *skb; 4163 struct tlv *tlv; 4164 4165 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len); 4166 if (IS_ERR(skb)) 4167 return PTR_ERR(skb); 4168 4169 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 4170 sizeof(*bss_color)); 4171 bss_color = (struct bss_color_tlv *)tlv; 4172 bss_color->enable = he_bss_color->enabled; 4173 bss_color->color = he_bss_color->color; 4174 4175 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4176 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 4177 } 4178 4179 #define TWT_AGRT_TRIGGER BIT(0) 4180 #define TWT_AGRT_ANNOUNCE BIT(1) 4181 #define TWT_AGRT_PROTECT BIT(2) 4182 4183 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 4184 struct mt7996_vif *mvif, 4185 struct mt7996_twt_flow *flow, 4186 int cmd) 4187 { 4188 struct { 4189 /* fixed field */ 4190 u8 bss; 4191 u8 _rsv[3]; 4192 4193 __le16 tag; 4194 __le16 len; 4195 u8 tbl_idx; 4196 u8 cmd; 4197 u8 own_mac_idx; 4198 u8 flowid; /* 0xff for group id */ 4199 __le16 peer_id; /* specify the peer_id (msb=0) 4200 * or group_id (msb=1) 4201 */ 4202 u8 duration; /* 256 us */ 4203 u8 bss_idx; 4204 __le64 start_tsf; 4205 __le16 mantissa; 4206 u8 exponent; 4207 u8 is_ap; 4208 u8 agrt_params; 4209 u8 __rsv2[23]; 4210 } __packed req = { 4211 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 4212 .len = cpu_to_le16(sizeof(req) - 4), 4213 .tbl_idx = flow->table_id, 4214 .cmd = cmd, 4215 .own_mac_idx = mvif->mt76.omac_idx, 4216 .flowid = flow->id, 4217 .peer_id = cpu_to_le16(flow->wcid), 4218 .duration = flow->duration, 4219 .bss = mvif->mt76.idx, 4220 .bss_idx = mvif->mt76.idx, 4221 .start_tsf = cpu_to_le64(flow->tsf), 4222 .mantissa = flow->mantissa, 4223 .exponent = flow->exp, 4224 .is_ap = true, 4225 }; 4226 4227 if (flow->protection) 4228 req.agrt_params |= TWT_AGRT_PROTECT; 4229 if (!flow->flowtype) 4230 req.agrt_params |= TWT_AGRT_ANNOUNCE; 4231 if (flow->trigger) 4232 req.agrt_params |= TWT_AGRT_TRIGGER; 4233 4234 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 4235 &req, sizeof(req), true); 4236 } 4237 4238 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 4239 { 4240 struct { 4241 u8 band_idx; 4242 u8 _rsv[3]; 4243 4244 __le16 tag; 4245 __le16 len; 4246 __le32 len_thresh; 4247 __le32 pkt_thresh; 4248 } __packed req = { 4249 .band_idx = phy->mt76->band_idx, 4250 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 4251 .len = cpu_to_le16(sizeof(req) - 4), 4252 .len_thresh = cpu_to_le32(val), 4253 .pkt_thresh = cpu_to_le32(0x2), 4254 }; 4255 4256 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4257 &req, sizeof(req), true); 4258 } 4259 4260 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 4261 { 4262 struct { 4263 u8 band_idx; 4264 u8 _rsv[3]; 4265 4266 __le16 tag; 4267 __le16 len; 4268 u8 enable; 4269 u8 _rsv2[3]; 4270 } __packed req = { 4271 .band_idx = phy->mt76->band_idx, 4272 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 4273 .len = cpu_to_le16(sizeof(req) - 4), 4274 .enable = enable, 4275 }; 4276 4277 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4278 &req, sizeof(req), true); 4279 } 4280 4281 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 4282 u8 rx_sel, u8 val) 4283 { 4284 struct { 4285 u8 _rsv[4]; 4286 4287 __le16 tag; 4288 __le16 len; 4289 4290 u8 ctrl; 4291 u8 rdd_idx; 4292 u8 rdd_rx_sel; 4293 u8 val; 4294 u8 rsv[4]; 4295 } __packed req = { 4296 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 4297 .len = cpu_to_le16(sizeof(req) - 4), 4298 .ctrl = cmd, 4299 .rdd_idx = index, 4300 .rdd_rx_sel = rx_sel, 4301 .val = val, 4302 }; 4303 4304 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 4305 &req, sizeof(req), true); 4306 } 4307 4308 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 4309 struct ieee80211_vif *vif, 4310 struct ieee80211_sta *sta) 4311 { 4312 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4313 struct mt7996_sta *msta; 4314 struct sk_buff *skb; 4315 4316 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 4317 4318 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 4319 &msta->wcid, 4320 MT7996_STA_UPDATE_MAX_SIZE); 4321 if (IS_ERR(skb)) 4322 return PTR_ERR(skb); 4323 4324 /* starec hdr trans */ 4325 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta); 4326 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4327 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 4328 } 4329 4330 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 4331 u16 rate_idx, bool beacon) 4332 { 4333 #define UNI_FIXED_RATE_TABLE_SET 0 4334 #define SPE_IXD_SELECT_TXD 0 4335 #define SPE_IXD_SELECT_BMC_WTBL 1 4336 struct mt7996_dev *dev = phy->dev; 4337 struct fixed_rate_table_ctrl req = { 4338 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET), 4339 .len = cpu_to_le16(sizeof(req) - 4), 4340 .table_idx = table_idx, 4341 .rate_idx = cpu_to_le16(rate_idx), 4342 .gi = 1, 4343 .he_ltf = 1, 4344 }; 4345 u8 band_idx = phy->mt76->band_idx; 4346 4347 if (beacon) { 4348 req.spe_idx_sel = SPE_IXD_SELECT_TXD; 4349 req.spe_idx = 24 + band_idx; 4350 phy->beacon_rate = rate_idx; 4351 } else { 4352 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL; 4353 } 4354 4355 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE), 4356 &req, sizeof(req), false); 4357 } 4358 4359 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 4360 { 4361 struct { 4362 u8 __rsv1[4]; 4363 4364 __le16 tag; 4365 __le16 len; 4366 __le16 idx; 4367 u8 __rsv2[2]; 4368 __le32 ofs; 4369 __le32 data; 4370 } __packed *res, req = { 4371 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 4372 .len = cpu_to_le16(sizeof(req) - 4), 4373 4374 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 4375 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4376 .data = set ? cpu_to_le32(*val) : 0, 4377 }; 4378 struct sk_buff *skb; 4379 int ret; 4380 4381 if (set) 4382 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 4383 &req, sizeof(req), true); 4384 4385 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 4386 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 4387 &req, sizeof(req), true, &skb); 4388 if (ret) 4389 return ret; 4390 4391 res = (void *)skb->data; 4392 *val = le32_to_cpu(res->data); 4393 dev_kfree_skb(skb); 4394 4395 return 0; 4396 } 4397 4398 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 4399 { 4400 struct { 4401 __le16 tag; 4402 __le16 len; 4403 u8 enable; 4404 u8 rsv[3]; 4405 } __packed req = { 4406 .len = cpu_to_le16(sizeof(req) - 4), 4407 .enable = true, 4408 }; 4409 4410 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 4411 &req, sizeof(req), false); 4412 } 4413 4414 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val) 4415 { 4416 struct { 4417 u8 __rsv1[4]; 4418 __le16 tag; 4419 __le16 len; 4420 union { 4421 struct { 4422 u8 type; 4423 u8 __rsv2[3]; 4424 } __packed platform_type; 4425 struct { 4426 u8 type; 4427 u8 dest; 4428 u8 __rsv2[2]; 4429 } __packed bypass_mode; 4430 struct { 4431 u8 path; 4432 u8 __rsv2[3]; 4433 } __packed txfree_path; 4434 struct { 4435 __le16 flush_one; 4436 __le16 flush_all; 4437 u8 __rsv2[4]; 4438 } __packed timeout; 4439 }; 4440 } __packed req = { 4441 .tag = cpu_to_le16(tag), 4442 .len = cpu_to_le16(sizeof(req) - 4), 4443 }; 4444 4445 switch (tag) { 4446 case UNI_RRO_SET_PLATFORM_TYPE: 4447 req.platform_type.type = val; 4448 break; 4449 case UNI_RRO_SET_BYPASS_MODE: 4450 req.bypass_mode.type = val; 4451 break; 4452 case UNI_RRO_SET_TXFREE_PATH: 4453 req.txfree_path.path = val; 4454 break; 4455 case UNI_RRO_SET_FLUSH_TIMEOUT: 4456 req.timeout.flush_one = cpu_to_le16(val); 4457 req.timeout.flush_all = cpu_to_le16(2 * val); 4458 break; 4459 default: 4460 return -EINVAL; 4461 } 4462 4463 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4464 sizeof(req), true); 4465 } 4466 4467 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 4468 { 4469 struct mt7996_dev *dev = phy->dev; 4470 struct { 4471 u8 _rsv[4]; 4472 4473 __le16 tag; 4474 __le16 len; 4475 } __packed req = { 4476 .tag = cpu_to_le16(tag), 4477 .len = cpu_to_le16(sizeof(req) - 4), 4478 }; 4479 4480 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 4481 &req, sizeof(req), false); 4482 } 4483 4484 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id) 4485 { 4486 struct { 4487 u8 __rsv[4]; 4488 4489 __le16 tag; 4490 __le16 len; 4491 __le16 session_id; 4492 u8 pad[4]; 4493 } __packed req = { 4494 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION), 4495 .len = cpu_to_le16(sizeof(req) - 4), 4496 .session_id = cpu_to_le16(id), 4497 }; 4498 4499 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4500 sizeof(req), true); 4501 } 4502 4503 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) 4504 { 4505 #define TX_POWER_LIMIT_TABLE_RATE 0 4506 struct mt7996_dev *dev = phy->dev; 4507 struct mt76_phy *mphy = phy->mt76; 4508 struct ieee80211_hw *hw = mphy->hw; 4509 struct tx_power_limit_table_ctrl { 4510 u8 __rsv1[4]; 4511 4512 __le16 tag; 4513 __le16 len; 4514 u8 power_ctrl_id; 4515 u8 power_limit_type; 4516 u8 band_idx; 4517 } __packed req = { 4518 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL), 4519 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4), 4520 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL, 4521 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE, 4522 .band_idx = phy->mt76->band_idx, 4523 }; 4524 struct mt76_power_limits la = {}; 4525 struct sk_buff *skb; 4526 int i, tx_power; 4527 4528 tx_power = mt7996_get_power_bound(phy, hw->conf.power_level); 4529 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 4530 &la, tx_power); 4531 mphy->txpower_cur = tx_power; 4532 4533 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 4534 sizeof(req) + MT7996_SKU_PATH_NUM); 4535 if (!skb) 4536 return -ENOMEM; 4537 4538 skb_put_data(skb, &req, sizeof(req)); 4539 /* cck and ofdm */ 4540 skb_put_data(skb, &la.cck, sizeof(la.cck)); 4541 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm)); 4542 /* ht20 */ 4543 skb_put_data(skb, &la.mcs[0], 8); 4544 /* ht40 */ 4545 skb_put_data(skb, &la.mcs[1], 9); 4546 4547 /* vht */ 4548 for (i = 0; i < 4; i++) { 4549 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); 4550 skb_put_zero(skb, 2); /* padding */ 4551 } 4552 4553 /* he */ 4554 skb_put_data(skb, &la.ru[0], sizeof(la.ru)); 4555 /* eht */ 4556 skb_put_data(skb, &la.eht[0], sizeof(la.eht)); 4557 4558 /* padding */ 4559 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM); 4560 4561 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4562 MCU_WM_UNI_CMD(TXPOWER), true); 4563 } 4564 4565 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode) 4566 { 4567 __le32 cp_mode; 4568 4569 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) || 4570 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO)) 4571 return -EINVAL; 4572 4573 cp_mode = cpu_to_le32(mode); 4574 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT), 4575 &cp_mode, sizeof(cp_mode), true); 4576 } 4577