1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 #define fw_name(_dev, name, ...) ({ \ 14 char *_fw; \ 15 switch (mt76_chip(&(_dev)->mt76)) { \ 16 case 0x7992: \ 17 switch ((_dev)->var.type) { \ 18 case MT7992_VAR_TYPE_23: \ 19 _fw = MT7992_##name##_23; \ 20 break; \ 21 default: \ 22 _fw = MT7992_##name; \ 23 } \ 24 break; \ 25 case 0x7990: \ 26 default: \ 27 switch ((_dev)->var.type) { \ 28 case MT7996_VAR_TYPE_233: \ 29 _fw = MT7996_##name##_233; \ 30 break; \ 31 default: \ 32 _fw = MT7996_##name; \ 33 } \ 34 break; \ 35 } \ 36 _fw; \ 37 }) 38 39 struct mt7996_patch_hdr { 40 char build_date[16]; 41 char platform[4]; 42 __be32 hw_sw_ver; 43 __be32 patch_ver; 44 __be16 checksum; 45 u16 reserved; 46 struct { 47 __be32 patch_ver; 48 __be32 subsys; 49 __be32 feature; 50 __be32 n_region; 51 __be32 crc; 52 u32 reserved[11]; 53 } desc; 54 } __packed; 55 56 struct mt7996_patch_sec { 57 __be32 type; 58 __be32 offs; 59 __be32 size; 60 union { 61 __be32 spec[13]; 62 struct { 63 __be32 addr; 64 __be32 len; 65 __be32 sec_key_idx; 66 __be32 align_len; 67 u32 reserved[9]; 68 } info; 69 }; 70 } __packed; 71 72 struct mt7996_fw_trailer { 73 u8 chip_id; 74 u8 eco_code; 75 u8 n_region; 76 u8 format_ver; 77 u8 format_flag; 78 u8 reserved[2]; 79 char fw_ver[10]; 80 char build_date[15]; 81 u32 crc; 82 } __packed; 83 84 struct mt7996_fw_region { 85 __le32 decomp_crc; 86 __le32 decomp_len; 87 __le32 decomp_blk_sz; 88 u8 reserved[4]; 89 __le32 addr; 90 __le32 len; 91 u8 feature_set; 92 u8 reserved1[15]; 93 } __packed; 94 95 #define MCU_PATCH_ADDRESS 0x200000 96 97 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 98 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 99 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 100 101 static bool sr_scene_detect = true; 102 module_param(sr_scene_detect, bool, 0644); 103 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 104 105 static u8 106 mt7996_mcu_get_sta_nss(u16 mcs_map) 107 { 108 u8 nss; 109 110 for (nss = 8; nss > 0; nss--) { 111 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 112 113 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 114 break; 115 } 116 117 return nss - 1; 118 } 119 120 static void 121 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 122 u16 mcs_map) 123 { 124 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 125 enum nl80211_band band = msta->vif->deflink.phy->mt76->chandef.chan->band; 126 const u16 *mask = msta->vif->deflink.bitrate_mask.control[band].he_mcs; 127 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 128 129 for (nss = 0; nss < max_nss; nss++) { 130 int mcs; 131 132 switch ((mcs_map >> (2 * nss)) & 0x3) { 133 case IEEE80211_HE_MCS_SUPPORT_0_11: 134 mcs = GENMASK(11, 0); 135 break; 136 case IEEE80211_HE_MCS_SUPPORT_0_9: 137 mcs = GENMASK(9, 0); 138 break; 139 case IEEE80211_HE_MCS_SUPPORT_0_7: 140 mcs = GENMASK(7, 0); 141 break; 142 default: 143 mcs = 0; 144 } 145 146 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 147 148 switch (mcs) { 149 case 0 ... 7: 150 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 151 break; 152 case 8 ... 9: 153 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 154 break; 155 case 10 ... 11: 156 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 157 break; 158 default: 159 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 160 break; 161 } 162 mcs_map &= ~(0x3 << (nss * 2)); 163 mcs_map |= mcs << (nss * 2); 164 } 165 166 *he_mcs = cpu_to_le16(mcs_map); 167 } 168 169 static void 170 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 171 const u16 *mask) 172 { 173 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 174 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 175 176 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 177 switch (mcs_map & 0x3) { 178 case IEEE80211_VHT_MCS_SUPPORT_0_9: 179 mcs = GENMASK(9, 0); 180 break; 181 case IEEE80211_VHT_MCS_SUPPORT_0_8: 182 mcs = GENMASK(8, 0); 183 break; 184 case IEEE80211_VHT_MCS_SUPPORT_0_7: 185 mcs = GENMASK(7, 0); 186 break; 187 default: 188 mcs = 0; 189 } 190 191 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 192 } 193 } 194 195 static void 196 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 197 const u8 *mask) 198 { 199 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 200 201 for (nss = 0; nss < max_nss; nss++) 202 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 203 } 204 205 static int 206 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 207 struct sk_buff *skb, int seq) 208 { 209 struct mt7996_mcu_rxd *rxd; 210 struct mt7996_mcu_uni_event *event; 211 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 212 int ret = 0; 213 214 if (!skb) { 215 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 216 cmd, seq); 217 return -ETIMEDOUT; 218 } 219 220 rxd = (struct mt7996_mcu_rxd *)skb->data; 221 if (seq != rxd->seq) 222 return -EAGAIN; 223 224 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 225 skb_pull(skb, sizeof(*rxd) - 4); 226 ret = *skb->data; 227 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 228 rxd->eid == MCU_UNI_EVENT_RESULT) { 229 skb_pull(skb, sizeof(*rxd)); 230 event = (struct mt7996_mcu_uni_event *)skb->data; 231 ret = le32_to_cpu(event->status); 232 /* skip invalid event */ 233 if (mcu_cmd != event->cid) 234 ret = -EAGAIN; 235 } else { 236 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 237 } 238 239 return ret; 240 } 241 242 static int 243 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 244 int cmd, int *wait_seq) 245 { 246 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 247 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 248 struct mt76_connac2_mcu_uni_txd *uni_txd; 249 struct mt76_connac2_mcu_txd *mcu_txd; 250 enum mt76_mcuq_id qid; 251 __le32 *txd; 252 u32 val; 253 u8 seq; 254 255 mdev->mcu.timeout = 20 * HZ; 256 257 seq = ++dev->mt76.mcu.msg_seq & 0xf; 258 if (!seq) 259 seq = ++dev->mt76.mcu.msg_seq & 0xf; 260 261 if (cmd == MCU_CMD(FW_SCATTER)) { 262 qid = MT_MCUQ_FWDL; 263 goto exit; 264 } 265 266 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 267 txd = (__le32 *)skb_push(skb, txd_len); 268 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 269 qid = MT_MCUQ_WA; 270 else 271 qid = MT_MCUQ_WM; 272 273 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 274 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 275 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 276 txd[0] = cpu_to_le32(val); 277 278 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 279 txd[1] = cpu_to_le32(val); 280 281 if (cmd & __MCU_CMD_FIELD_UNI) { 282 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 283 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 284 uni_txd->cid = cpu_to_le16(mcu_cmd); 285 uni_txd->s2d_index = MCU_S2D_H2CN; 286 uni_txd->pkt_type = MCU_PKT_ID; 287 uni_txd->seq = seq; 288 289 if (cmd & __MCU_CMD_FIELD_QUERY) 290 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 291 else 292 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 293 294 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 295 uni_txd->s2d_index = MCU_S2D_H2CN; 296 else if (cmd & __MCU_CMD_FIELD_WA) 297 uni_txd->s2d_index = MCU_S2D_H2C; 298 else if (cmd & __MCU_CMD_FIELD_WM) 299 uni_txd->s2d_index = MCU_S2D_H2N; 300 301 goto exit; 302 } 303 304 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 305 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 306 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 307 MT_TX_MCU_PORT_RX_Q0)); 308 mcu_txd->pkt_type = MCU_PKT_ID; 309 mcu_txd->seq = seq; 310 311 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 312 mcu_txd->set_query = MCU_Q_NA; 313 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 314 if (mcu_txd->ext_cid) { 315 mcu_txd->ext_cid_ack = 1; 316 317 if (cmd & __MCU_CMD_FIELD_QUERY) 318 mcu_txd->set_query = MCU_Q_QUERY; 319 else 320 mcu_txd->set_query = MCU_Q_SET; 321 } 322 323 if (cmd & __MCU_CMD_FIELD_WA) 324 mcu_txd->s2d_index = MCU_S2D_H2C; 325 else 326 mcu_txd->s2d_index = MCU_S2D_H2N; 327 328 exit: 329 if (wait_seq) 330 *wait_seq = seq; 331 332 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 333 } 334 335 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 336 { 337 struct { 338 __le32 args[3]; 339 } req = { 340 .args = { 341 cpu_to_le32(a1), 342 cpu_to_le32(a2), 343 cpu_to_le32(a3), 344 }, 345 }; 346 347 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 348 } 349 350 static void 351 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 352 { 353 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 354 return; 355 356 ieee80211_csa_finish(vif, 0); 357 } 358 359 static void 360 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 361 { 362 struct mt76_phy *mphy = &dev->mt76.phy; 363 struct mt7996_mcu_rdd_report *r; 364 365 r = (struct mt7996_mcu_rdd_report *)skb->data; 366 367 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys)) 368 return; 369 370 if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy) 371 return; 372 373 if (r->band_idx == MT_RX_SEL2) 374 mphy = dev->rdd2_phy->mt76; 375 else 376 mphy = dev->mt76.phys[r->band_idx]; 377 378 if (!mphy) 379 return; 380 381 if (r->band_idx == MT_RX_SEL2) 382 cfg80211_background_radar_event(mphy->hw->wiphy, 383 &dev->rdd2_chandef, 384 GFP_ATOMIC); 385 else 386 ieee80211_radar_detected(mphy->hw, NULL); 387 dev->hw_pattern++; 388 } 389 390 static void 391 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 392 { 393 #define UNI_EVENT_FW_LOG_FORMAT 0 394 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 395 const char *data = (char *)&rxd[1] + 4, *type; 396 struct tlv *tlv = (struct tlv *)data; 397 int len; 398 399 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 400 len = skb->len - sizeof(*rxd); 401 data = (char *)&rxd[1]; 402 goto out; 403 } 404 405 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 406 return; 407 408 data += sizeof(*tlv) + 4; 409 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 410 411 out: 412 switch (rxd->s2d_index) { 413 case 0: 414 if (mt7996_debugfs_rx_log(dev, data, len)) 415 return; 416 417 type = "WM"; 418 break; 419 case 2: 420 type = "WA"; 421 break; 422 default: 423 type = "unknown"; 424 break; 425 } 426 427 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 428 } 429 430 static void 431 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 432 { 433 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 434 return; 435 436 ieee80211_color_change_finish(vif, 0); 437 } 438 439 static void 440 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 441 { 442 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 443 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 444 struct header { 445 u8 band; 446 u8 rsv[3]; 447 }; 448 struct mt76_phy *mphy = &dev->mt76.phy; 449 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 450 const char *data = (char *)&rxd[1], *tail; 451 struct header *hdr = (struct header *)data; 452 struct tlv *tlv = (struct tlv *)(data + 4); 453 454 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 455 return; 456 457 if (hdr->band && dev->mt76.phys[hdr->band]) 458 mphy = dev->mt76.phys[hdr->band]; 459 460 tail = skb->data + skb->len; 461 data += sizeof(struct header); 462 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 463 switch (le16_to_cpu(tlv->tag)) { 464 case UNI_EVENT_IE_COUNTDOWN_CSA: 465 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 466 IEEE80211_IFACE_ITER_RESUME_ALL, 467 mt7996_mcu_csa_finish, mphy->hw); 468 break; 469 case UNI_EVENT_IE_COUNTDOWN_BCC: 470 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 471 IEEE80211_IFACE_ITER_RESUME_ALL, 472 mt7996_mcu_cca_finish, mphy->hw); 473 break; 474 } 475 476 data += le16_to_cpu(tlv->len); 477 tlv = (struct tlv *)data; 478 } 479 } 480 481 static int 482 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate) 483 { 484 switch (mcu_rate->tx_mode) { 485 case MT_PHY_TYPE_CCK: 486 case MT_PHY_TYPE_OFDM: 487 break; 488 case MT_PHY_TYPE_HT: 489 case MT_PHY_TYPE_HT_GF: 490 case MT_PHY_TYPE_VHT: 491 if (mcu_rate->tx_gi) 492 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 493 else 494 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 495 break; 496 case MT_PHY_TYPE_HE_SU: 497 case MT_PHY_TYPE_HE_EXT_SU: 498 case MT_PHY_TYPE_HE_TB: 499 case MT_PHY_TYPE_HE_MU: 500 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2) 501 return -EINVAL; 502 rate->he_gi = mcu_rate->tx_gi; 503 break; 504 case MT_PHY_TYPE_EHT_SU: 505 case MT_PHY_TYPE_EHT_TRIG: 506 case MT_PHY_TYPE_EHT_MU: 507 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2) 508 return -EINVAL; 509 rate->eht_gi = mcu_rate->tx_gi; 510 break; 511 default: 512 return -EINVAL; 513 } 514 515 return 0; 516 } 517 518 static void 519 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 520 { 521 struct mt7996_mcu_all_sta_info_event *res; 522 u16 i; 523 524 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 525 526 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 527 528 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 529 u8 ac; 530 u16 wlan_idx; 531 struct mt76_wcid *wcid; 532 533 switch (le16_to_cpu(res->tag)) { 534 case UNI_ALL_STA_TXRX_RATE: 535 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx); 536 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 537 538 if (!wcid) 539 break; 540 541 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i])) 542 dev_err(dev->mt76.dev, "Failed to update TX GI\n"); 543 break; 544 case UNI_ALL_STA_TXRX_ADM_STAT: 545 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 546 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 547 548 if (!wcid) 549 break; 550 551 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 552 wcid->stats.tx_bytes += 553 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 554 wcid->stats.rx_bytes += 555 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 556 } 557 break; 558 case UNI_ALL_STA_TXRX_MSDU_COUNT: 559 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 560 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 561 562 if (!wcid) 563 break; 564 565 wcid->stats.tx_packets += 566 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 567 wcid->stats.rx_packets += 568 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 569 break; 570 default: 571 break; 572 } 573 } 574 } 575 576 static void 577 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb) 578 { 579 #define THERMAL_NOTIFY_TAG 0x4 580 #define THERMAL_NOTIFY 0x2 581 struct mt76_phy *mphy = &dev->mt76.phy; 582 struct mt7996_mcu_thermal_notify *n; 583 struct mt7996_phy *phy; 584 585 n = (struct mt7996_mcu_thermal_notify *)skb->data; 586 587 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG) 588 return; 589 590 if (n->event_id != THERMAL_NOTIFY) 591 return; 592 593 if (n->band_idx > MT_BAND2) 594 return; 595 596 mphy = dev->mt76.phys[n->band_idx]; 597 if (!mphy) 598 return; 599 600 phy = (struct mt7996_phy *)mphy->priv; 601 phy->throttle_state = n->duty_percent; 602 } 603 604 static void 605 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 606 { 607 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 608 609 switch (rxd->ext_eid) { 610 case MCU_EXT_EVENT_FW_LOG_2_HOST: 611 mt7996_mcu_rx_log_message(dev, skb); 612 break; 613 default: 614 break; 615 } 616 } 617 618 static void 619 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 620 { 621 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 622 623 switch (rxd->eid) { 624 case MCU_EVENT_EXT: 625 mt7996_mcu_rx_ext_event(dev, skb); 626 break; 627 case MCU_UNI_EVENT_THERMAL: 628 mt7996_mcu_rx_thermal_notify(dev, skb); 629 break; 630 default: 631 break; 632 } 633 dev_kfree_skb(skb); 634 } 635 636 static void 637 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb) 638 { 639 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data; 640 641 if (!dev->has_rro) 642 return; 643 644 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4); 645 646 switch (le16_to_cpu(event->tag)) { 647 case UNI_WED_RRO_BA_SESSION_STATUS: { 648 struct mt7996_mcu_wed_rro_ba_event *e; 649 650 while (skb->len >= sizeof(*e)) { 651 struct mt76_rx_tid *tid; 652 struct mt76_wcid *wcid; 653 u16 idx; 654 655 e = (void *)skb->data; 656 idx = le16_to_cpu(e->wlan_id); 657 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) 658 break; 659 660 wcid = rcu_dereference(dev->mt76.wcid[idx]); 661 if (!wcid || !wcid->sta) 662 break; 663 664 if (e->tid >= ARRAY_SIZE(wcid->aggr)) 665 break; 666 667 tid = rcu_dereference(wcid->aggr[e->tid]); 668 if (!tid) 669 break; 670 671 tid->id = le16_to_cpu(e->id); 672 skb_pull(skb, sizeof(*e)); 673 } 674 break; 675 } 676 case UNI_WED_RRO_BA_SESSION_DELETE: { 677 struct mt7996_mcu_wed_rro_ba_delete_event *e; 678 679 while (skb->len >= sizeof(*e)) { 680 struct mt7996_wed_rro_session_id *session; 681 682 e = (void *)skb->data; 683 session = kzalloc(sizeof(*session), GFP_ATOMIC); 684 if (!session) 685 break; 686 687 session->id = le16_to_cpu(e->session_id); 688 689 spin_lock_bh(&dev->wed_rro.lock); 690 list_add_tail(&session->list, &dev->wed_rro.poll_list); 691 spin_unlock_bh(&dev->wed_rro.lock); 692 693 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work); 694 skb_pull(skb, sizeof(*e)); 695 } 696 break; 697 } 698 default: 699 break; 700 } 701 } 702 703 static void 704 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 705 { 706 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 707 708 switch (rxd->eid) { 709 case MCU_UNI_EVENT_FW_LOG_2_HOST: 710 mt7996_mcu_rx_log_message(dev, skb); 711 break; 712 case MCU_UNI_EVENT_IE_COUNTDOWN: 713 mt7996_mcu_ie_countdown(dev, skb); 714 break; 715 case MCU_UNI_EVENT_RDD_REPORT: 716 mt7996_mcu_rx_radar_detected(dev, skb); 717 break; 718 case MCU_UNI_EVENT_ALL_STA_INFO: 719 mt7996_mcu_rx_all_sta_info_event(dev, skb); 720 break; 721 case MCU_UNI_EVENT_WED_RRO: 722 mt7996_mcu_wed_rro_event(dev, skb); 723 break; 724 default: 725 break; 726 } 727 dev_kfree_skb(skb); 728 } 729 730 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 731 { 732 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 733 734 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 735 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 736 return; 737 } 738 739 /* WA still uses legacy event*/ 740 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 741 !rxd->seq) 742 mt7996_mcu_rx_unsolicited_event(dev, skb); 743 else 744 mt76_mcu_rx_event(&dev->mt76, skb); 745 } 746 747 static struct tlv * 748 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 749 { 750 struct tlv *ptlv = skb_put_zero(skb, len); 751 752 ptlv->tag = cpu_to_le16(tag); 753 ptlv->len = cpu_to_le16(len); 754 755 return ptlv; 756 } 757 758 static void 759 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 760 { 761 static const u8 rlm_ch_band[] = { 762 [NL80211_BAND_2GHZ] = 1, 763 [NL80211_BAND_5GHZ] = 2, 764 [NL80211_BAND_6GHZ] = 3, 765 }; 766 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 767 struct bss_rlm_tlv *ch; 768 struct tlv *tlv; 769 int freq1 = chandef->center_freq1; 770 771 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 772 773 ch = (struct bss_rlm_tlv *)tlv; 774 ch->control_channel = chandef->chan->hw_value; 775 ch->center_chan = ieee80211_frequency_to_channel(freq1); 776 ch->bw = mt76_connac_chan_bw(chandef); 777 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 778 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 779 ch->band = rlm_ch_band[chandef->chan->band]; 780 781 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 782 int freq2 = chandef->center_freq2; 783 784 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 785 } 786 } 787 788 static void 789 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 790 { 791 struct bss_ra_tlv *ra; 792 struct tlv *tlv; 793 794 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 795 796 ra = (struct bss_ra_tlv *)tlv; 797 ra->short_preamble = true; 798 } 799 800 static void 801 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 802 struct ieee80211_bss_conf *link_conf, 803 struct mt7996_phy *phy) 804 { 805 #define DEFAULT_HE_PE_DURATION 4 806 #define DEFAULT_HE_DURATION_RTS_THRES 1023 807 const struct ieee80211_sta_he_cap *cap; 808 struct bss_info_uni_he *he; 809 struct tlv *tlv; 810 811 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 812 813 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 814 815 he = (struct bss_info_uni_he *)tlv; 816 he->he_pe_duration = link_conf->htc_trig_based_pkt_ext; 817 if (!he->he_pe_duration) 818 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 819 820 he->he_rts_thres = cpu_to_le16(link_conf->frame_time_rts_th); 821 if (!he->he_rts_thres) 822 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 823 824 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 825 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 826 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 827 } 828 829 static void 830 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_bss_conf *link_conf, 831 bool enable) 832 { 833 struct bss_info_uni_mbssid *mbssid; 834 struct tlv *tlv; 835 836 if (!link_conf->bssid_indicator && enable) 837 return; 838 839 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 840 841 mbssid = (struct bss_info_uni_mbssid *)tlv; 842 843 if (enable) { 844 mbssid->max_indicator = link_conf->bssid_indicator; 845 mbssid->mbss_idx = link_conf->bssid_index; 846 mbssid->tx_bss_omac_idx = 0; 847 } 848 } 849 850 static void 851 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink, 852 struct mt7996_phy *phy) 853 { 854 struct bss_rate_tlv *bmc; 855 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 856 enum nl80211_band band = chandef->chan->band; 857 struct tlv *tlv; 858 u8 idx = mlink->mcast_rates_idx ? 859 mlink->mcast_rates_idx : mlink->basic_rates_idx; 860 861 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 862 863 bmc = (struct bss_rate_tlv *)tlv; 864 865 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 866 bmc->bc_fixed_rate = idx; 867 bmc->mc_fixed_rate = idx; 868 } 869 870 static void 871 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 872 { 873 struct bss_txcmd_tlv *txcmd; 874 struct tlv *tlv; 875 876 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 877 878 txcmd = (struct bss_txcmd_tlv *)tlv; 879 txcmd->txcmd_mode = en; 880 } 881 882 static void 883 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 884 { 885 struct bss_mld_tlv *mld; 886 struct tlv *tlv; 887 888 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 889 890 mld = (struct bss_mld_tlv *)tlv; 891 mld->group_mld_id = 0xff; 892 mld->own_mld_id = mlink->idx; 893 mld->remap_idx = 0xff; 894 } 895 896 static void 897 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 898 { 899 struct bss_sec_tlv *sec; 900 struct tlv *tlv; 901 902 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 903 904 sec = (struct bss_sec_tlv *)tlv; 905 sec->cipher = mlink->cipher; 906 } 907 908 static int 909 mt7996_mcu_muar_config(struct mt7996_dev *dev, struct mt76_vif_link *mlink, 910 const u8 *addr, bool bssid, bool enable) 911 { 912 #define UNI_MUAR_ENTRY 2 913 u32 idx = mlink->omac_idx - REPEATER_BSSID_START; 914 struct { 915 struct { 916 u8 band; 917 u8 __rsv[3]; 918 } hdr; 919 920 __le16 tag; 921 __le16 len; 922 923 bool smesh; 924 u8 bssid; 925 u8 index; 926 u8 entry_add; 927 u8 addr[ETH_ALEN]; 928 u8 __rsv[2]; 929 } __packed req = { 930 .hdr.band = mlink->band_idx, 931 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 932 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 933 .smesh = false, 934 .index = idx * 2 + bssid, 935 .entry_add = true, 936 }; 937 938 if (enable) 939 memcpy(req.addr, addr, ETH_ALEN); 940 941 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 942 sizeof(req), true); 943 } 944 945 static void 946 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 947 { 948 struct bss_ifs_time_tlv *ifs_time; 949 struct tlv *tlv; 950 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 951 952 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 953 954 ifs_time = (struct bss_ifs_time_tlv *)tlv; 955 ifs_time->slot_valid = true; 956 ifs_time->sifs_valid = true; 957 ifs_time->rifs_valid = true; 958 ifs_time->eifs_valid = true; 959 960 ifs_time->slot_time = cpu_to_le16(phy->slottime); 961 ifs_time->sifs_time = cpu_to_le16(10); 962 ifs_time->rifs_time = cpu_to_le16(2); 963 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 964 965 if (is_2ghz) { 966 ifs_time->eifs_cck_valid = true; 967 ifs_time->eifs_cck_time = cpu_to_le16(314); 968 } 969 } 970 971 static int 972 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 973 struct ieee80211_vif *vif, 974 struct ieee80211_bss_conf *link_conf, 975 struct mt76_vif_link *mvif, 976 struct mt76_phy *phy, u16 wlan_idx, 977 bool enable) 978 { 979 struct cfg80211_chan_def *chandef = &phy->chandef; 980 struct mt76_connac_bss_basic_tlv *bss; 981 u32 type = CONNECTION_INFRA_AP; 982 u16 sta_wlan_idx = wlan_idx; 983 struct ieee80211_sta *sta; 984 struct tlv *tlv; 985 int idx; 986 987 switch (vif->type) { 988 case NL80211_IFTYPE_MESH_POINT: 989 case NL80211_IFTYPE_AP: 990 case NL80211_IFTYPE_MONITOR: 991 break; 992 case NL80211_IFTYPE_STATION: 993 if (enable) { 994 rcu_read_lock(); 995 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 996 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 997 if (sta) { 998 struct mt76_wcid *wcid; 999 1000 wcid = (struct mt76_wcid *)sta->drv_priv; 1001 sta_wlan_idx = wcid->idx; 1002 } 1003 rcu_read_unlock(); 1004 } 1005 type = CONNECTION_INFRA_STA; 1006 break; 1007 case NL80211_IFTYPE_ADHOC: 1008 type = CONNECTION_IBSS_ADHOC; 1009 break; 1010 default: 1011 WARN_ON(1); 1012 break; 1013 } 1014 1015 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 1016 1017 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 1018 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1019 bss->dtim_period = link_conf->dtim_period; 1020 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 1021 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 1022 bss->conn_type = cpu_to_le32(type); 1023 bss->omac_idx = mvif->omac_idx; 1024 bss->band_idx = mvif->band_idx; 1025 bss->wmm_idx = mvif->wmm_idx; 1026 bss->conn_state = !enable; 1027 bss->active = enable; 1028 1029 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1030 bss->hw_bss_idx = idx; 1031 1032 if (vif->type == NL80211_IFTYPE_MONITOR) { 1033 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 1034 return 0; 1035 } 1036 1037 memcpy(bss->bssid, link_conf->bssid, ETH_ALEN); 1038 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1039 bss->dtim_period = vif->bss_conf.dtim_period; 1040 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 1041 chandef->chan->band, NULL); 1042 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, &vif->bss_conf, 1043 chandef->chan->band); 1044 1045 return 0; 1046 } 1047 1048 static struct sk_buff * 1049 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len) 1050 { 1051 struct bss_req_hdr hdr = { 1052 .bss_idx = mvif->idx, 1053 }; 1054 struct sk_buff *skb; 1055 1056 skb = mt76_mcu_msg_alloc(dev, NULL, len); 1057 if (!skb) 1058 return ERR_PTR(-ENOMEM); 1059 1060 skb_put_data(skb, &hdr, sizeof(hdr)); 1061 1062 return skb; 1063 } 1064 1065 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1066 struct ieee80211_bss_conf *link_conf, 1067 struct mt76_vif_link *mlink, int enable) 1068 { 1069 struct mt7996_dev *dev = phy->dev; 1070 struct sk_buff *skb; 1071 1072 if (mlink->omac_idx >= REPEATER_BSSID_START) { 1073 mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 1074 mt7996_mcu_muar_config(dev, mlink, link_conf->bssid, true, enable); 1075 } 1076 1077 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1078 MT7996_BSS_UPDATE_MAX_SIZE); 1079 if (IS_ERR(skb)) 1080 return PTR_ERR(skb); 1081 1082 /* bss_basic must be first */ 1083 mt7996_mcu_bss_basic_tlv(skb, vif, link_conf, mlink, phy->mt76, 1084 mlink->wcid->idx, enable); 1085 mt7996_mcu_bss_sec_tlv(skb, mlink); 1086 1087 if (vif->type == NL80211_IFTYPE_MONITOR) 1088 goto out; 1089 1090 if (enable) { 1091 mt7996_mcu_bss_rfch_tlv(skb, phy); 1092 mt7996_mcu_bss_bmc_tlv(skb, mlink, phy); 1093 mt7996_mcu_bss_ra_tlv(skb, phy); 1094 mt7996_mcu_bss_txcmd_tlv(skb, true); 1095 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1096 1097 if (vif->bss_conf.he_support) 1098 mt7996_mcu_bss_he_tlv(skb, vif, link_conf, phy); 1099 1100 /* this tag is necessary no matter if the vif is MLD */ 1101 mt7996_mcu_bss_mld_tlv(skb, mlink); 1102 } 1103 1104 mt7996_mcu_bss_mbssid_tlv(skb, link_conf, enable); 1105 1106 out: 1107 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1108 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1109 } 1110 1111 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1112 struct ieee80211_bss_conf *link_conf) 1113 { 1114 struct mt7996_dev *dev = phy->dev; 1115 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 1116 struct sk_buff *skb; 1117 1118 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1119 MT7996_BSS_UPDATE_MAX_SIZE); 1120 if (IS_ERR(skb)) 1121 return PTR_ERR(skb); 1122 1123 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1124 1125 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1126 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1127 } 1128 1129 static int 1130 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif, 1131 struct ieee80211_ampdu_params *params, 1132 bool enable, bool tx) 1133 { 1134 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1135 struct sta_rec_ba_uni *ba; 1136 struct sk_buff *skb; 1137 struct tlv *tlv; 1138 1139 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid, 1140 MT7996_STA_UPDATE_MAX_SIZE); 1141 if (IS_ERR(skb)) 1142 return PTR_ERR(skb); 1143 1144 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1145 1146 ba = (struct sta_rec_ba_uni *)tlv; 1147 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1148 ba->winsize = cpu_to_le16(params->buf_size); 1149 ba->ssn = cpu_to_le16(params->ssn); 1150 ba->ba_en = enable << params->tid; 1151 ba->amsdu = params->amsdu; 1152 ba->tid = params->tid; 1153 ba->ba_rdd_rro = !tx && enable && dev->has_rro; 1154 1155 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1156 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1157 } 1158 1159 /** starec & wtbl **/ 1160 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 1161 struct ieee80211_ampdu_params *params, 1162 bool enable) 1163 { 1164 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1165 struct mt7996_vif *mvif = msta->vif; 1166 1167 if (enable && !params->amsdu) 1168 msta->wcid.amsdu = false; 1169 1170 return mt7996_mcu_sta_ba(dev, &mvif->deflink.mt76, params, enable, true); 1171 } 1172 1173 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1174 struct ieee80211_ampdu_params *params, 1175 bool enable) 1176 { 1177 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1178 struct mt7996_vif *mvif = msta->vif; 1179 1180 return mt7996_mcu_sta_ba(dev, &mvif->deflink.mt76, params, enable, false); 1181 } 1182 1183 static void 1184 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1185 { 1186 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1187 struct ieee80211_he_mcs_nss_supp mcs_map; 1188 struct sta_rec_he_v2 *he; 1189 struct tlv *tlv; 1190 int i = 0; 1191 1192 if (!sta->deflink.he_cap.has_he) 1193 return; 1194 1195 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1196 1197 he = (struct sta_rec_he_v2 *)tlv; 1198 for (i = 0; i < 11; i++) { 1199 if (i < 6) 1200 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1201 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1202 } 1203 1204 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 1205 switch (sta->deflink.bandwidth) { 1206 case IEEE80211_STA_RX_BW_160: 1207 if (elem->phy_cap_info[0] & 1208 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1209 mt7996_mcu_set_sta_he_mcs(sta, 1210 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1211 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1212 1213 mt7996_mcu_set_sta_he_mcs(sta, 1214 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1215 le16_to_cpu(mcs_map.rx_mcs_160)); 1216 fallthrough; 1217 default: 1218 mt7996_mcu_set_sta_he_mcs(sta, 1219 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1220 le16_to_cpu(mcs_map.rx_mcs_80)); 1221 break; 1222 } 1223 1224 he->pkt_ext = 2; 1225 } 1226 1227 static void 1228 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1229 { 1230 struct sta_rec_he_6g_capa *he_6g; 1231 struct tlv *tlv; 1232 1233 if (!sta->deflink.he_6ghz_capa.capa) 1234 return; 1235 1236 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1237 1238 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1239 he_6g->capa = sta->deflink.he_6ghz_capa.capa; 1240 } 1241 1242 static void 1243 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1244 { 1245 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1246 struct ieee80211_vif *vif = container_of((void *)msta->vif, 1247 struct ieee80211_vif, drv_priv); 1248 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1249 struct ieee80211_eht_cap_elem_fixed *elem; 1250 struct sta_rec_eht *eht; 1251 struct tlv *tlv; 1252 1253 if (!sta->deflink.eht_cap.has_eht) 1254 return; 1255 1256 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp; 1257 elem = &sta->deflink.eht_cap.eht_cap_elem; 1258 1259 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1260 1261 eht = (struct sta_rec_eht *)tlv; 1262 eht->tid_bitmap = 0xff; 1263 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1264 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1265 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1266 1267 if (vif->type != NL80211_IFTYPE_STATION && 1268 (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] & 1269 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1270 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1271 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1272 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1273 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1274 sizeof(eht->mcs_map_bw20)); 1275 return; 1276 } 1277 1278 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1279 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1280 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1281 } 1282 1283 static void 1284 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1285 { 1286 struct sta_rec_ht_uni *ht; 1287 struct tlv *tlv; 1288 1289 if (!sta->deflink.ht_cap.ht_supported) 1290 return; 1291 1292 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1293 1294 ht = (struct sta_rec_ht_uni *)tlv; 1295 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 1296 ht->ampdu_param = u8_encode_bits(sta->deflink.ht_cap.ampdu_factor, 1297 IEEE80211_HT_AMPDU_PARM_FACTOR) | 1298 u8_encode_bits(sta->deflink.ht_cap.ampdu_density, 1299 IEEE80211_HT_AMPDU_PARM_DENSITY); 1300 } 1301 1302 static void 1303 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1304 { 1305 struct sta_rec_vht *vht; 1306 struct tlv *tlv; 1307 1308 /* For 6G band, this tlv is necessary to let hw work normally */ 1309 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported) 1310 return; 1311 1312 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1313 1314 vht = (struct sta_rec_vht *)tlv; 1315 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 1316 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 1317 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 1318 } 1319 1320 static void 1321 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1322 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1323 { 1324 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1325 struct sta_rec_amsdu *amsdu; 1326 struct tlv *tlv; 1327 1328 if (vif->type != NL80211_IFTYPE_STATION && 1329 vif->type != NL80211_IFTYPE_MESH_POINT && 1330 vif->type != NL80211_IFTYPE_AP) 1331 return; 1332 1333 if (!sta->deflink.agg.max_amsdu_len) 1334 return; 1335 1336 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1337 amsdu = (struct sta_rec_amsdu *)tlv; 1338 amsdu->max_amsdu_num = 8; 1339 amsdu->amsdu_en = true; 1340 msta->wcid.amsdu = true; 1341 1342 switch (sta->deflink.agg.max_amsdu_len) { 1343 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1344 amsdu->max_mpdu_size = 1345 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1346 return; 1347 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1348 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1349 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1350 return; 1351 default: 1352 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1353 return; 1354 } 1355 } 1356 1357 static void 1358 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1359 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1360 { 1361 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1362 struct sta_rec_muru *muru; 1363 struct tlv *tlv; 1364 1365 if (vif->type != NL80211_IFTYPE_STATION && 1366 vif->type != NL80211_IFTYPE_AP) 1367 return; 1368 1369 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1370 1371 muru = (struct sta_rec_muru *)tlv; 1372 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer || 1373 vif->bss_conf.he_mu_beamformer || 1374 vif->bss_conf.vht_mu_beamformer || 1375 vif->bss_conf.vht_mu_beamformee; 1376 muru->cfg.ofdma_dl_en = true; 1377 1378 if (sta->deflink.vht_cap.vht_supported) 1379 muru->mimo_dl.vht_mu_bfee = 1380 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1381 1382 if (!sta->deflink.he_cap.has_he) 1383 return; 1384 1385 muru->mimo_dl.partial_bw_dl_mimo = 1386 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1387 1388 muru->mimo_ul.full_ul_mimo = 1389 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1390 muru->mimo_ul.partial_ul_mimo = 1391 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1392 1393 muru->ofdma_dl.punc_pream_rx = 1394 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1395 muru->ofdma_dl.he_20m_in_40m_2g = 1396 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1397 muru->ofdma_dl.he_20m_in_160m = 1398 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1399 muru->ofdma_dl.he_80m_in_160m = 1400 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1401 1402 muru->ofdma_ul.t_frame_dur = 1403 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1404 muru->ofdma_ul.mu_cascading = 1405 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1406 muru->ofdma_ul.uo_ra = 1407 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1408 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1409 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1410 } 1411 1412 static inline bool 1413 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1414 struct ieee80211_sta *sta, bool bfee) 1415 { 1416 int sts = hweight16(phy->mt76->chainmask); 1417 1418 if (vif->type != NL80211_IFTYPE_STATION && 1419 vif->type != NL80211_IFTYPE_AP) 1420 return false; 1421 1422 if (!bfee && sts < 2) 1423 return false; 1424 1425 if (sta->deflink.eht_cap.has_eht) { 1426 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1427 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1428 1429 if (bfee) 1430 return vif->bss_conf.eht_su_beamformee && 1431 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1432 else 1433 return vif->bss_conf.eht_su_beamformer && 1434 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1435 } 1436 1437 if (sta->deflink.he_cap.has_he) { 1438 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1439 1440 if (bfee) 1441 return vif->bss_conf.he_su_beamformee && 1442 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1443 else 1444 return vif->bss_conf.he_su_beamformer && 1445 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1446 } 1447 1448 if (sta->deflink.vht_cap.vht_supported) { 1449 u32 cap = sta->deflink.vht_cap.cap; 1450 1451 if (bfee) 1452 return vif->bss_conf.vht_su_beamformee && 1453 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1454 else 1455 return vif->bss_conf.vht_su_beamformer && 1456 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1457 } 1458 1459 return false; 1460 } 1461 1462 static void 1463 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf) 1464 { 1465 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1466 bf->ndp_rate = 0; /* mcs0 */ 1467 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1468 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1469 } 1470 1471 static void 1472 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1473 struct sta_rec_bf *bf) 1474 { 1475 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1476 u8 n = 0; 1477 1478 bf->tx_mode = MT_PHY_TYPE_HT; 1479 1480 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1481 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1482 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1483 mcs->tx_params); 1484 else if (mcs->rx_mask[3]) 1485 n = 3; 1486 else if (mcs->rx_mask[2]) 1487 n = 2; 1488 else if (mcs->rx_mask[1]) 1489 n = 1; 1490 1491 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1492 bf->ncol = min_t(u8, bf->nrow, n); 1493 bf->ibf_ncol = n; 1494 } 1495 1496 static void 1497 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1498 struct sta_rec_bf *bf, bool explicit) 1499 { 1500 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1501 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1502 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1503 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1504 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1505 1506 bf->tx_mode = MT_PHY_TYPE_VHT; 1507 1508 if (explicit) { 1509 u8 sts, snd_dim; 1510 1511 mt7996_mcu_sta_sounding_rate(bf); 1512 1513 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1514 pc->cap); 1515 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1516 vc->cap); 1517 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1518 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1519 bf->ibf_ncol = bf->ncol; 1520 1521 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1522 bf->nrow = 1; 1523 } else { 1524 bf->nrow = tx_ant; 1525 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1526 bf->ibf_ncol = nss_mcs; 1527 1528 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1529 bf->ibf_nrow = 1; 1530 } 1531 } 1532 1533 static void 1534 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1535 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1536 { 1537 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1538 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1539 const struct ieee80211_sta_he_cap *vc = 1540 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1541 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1542 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1543 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1544 u8 snd_dim, sts; 1545 1546 if (!vc) 1547 return; 1548 1549 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1550 1551 mt7996_mcu_sta_sounding_rate(bf); 1552 1553 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1554 pe->phy_cap_info[6]); 1555 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1556 pe->phy_cap_info[6]); 1557 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1558 ve->phy_cap_info[5]); 1559 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1560 pe->phy_cap_info[4]); 1561 bf->nrow = min_t(u8, snd_dim, sts); 1562 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1563 bf->ibf_ncol = bf->ncol; 1564 1565 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1566 return; 1567 1568 /* go over for 160MHz and 80p80 */ 1569 if (pe->phy_cap_info[0] & 1570 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1571 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1572 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1573 1574 bf->ncol_gt_bw80 = nss_mcs; 1575 } 1576 1577 if (pe->phy_cap_info[0] & 1578 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1579 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1580 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1581 1582 if (bf->ncol_gt_bw80) 1583 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1584 else 1585 bf->ncol_gt_bw80 = nss_mcs; 1586 } 1587 1588 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1589 ve->phy_cap_info[5]); 1590 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1591 pe->phy_cap_info[4]); 1592 1593 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1594 } 1595 1596 static void 1597 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1598 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1599 { 1600 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1601 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1602 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1603 const struct ieee80211_sta_eht_cap *vc = 1604 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1605 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1606 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1607 IEEE80211_EHT_MCS_NSS_RX) - 1; 1608 u8 snd_dim, sts; 1609 1610 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1611 1612 mt7996_mcu_sta_sounding_rate(bf); 1613 1614 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1615 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1616 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1617 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1618 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1619 bf->nrow = min_t(u8, snd_dim, sts); 1620 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1621 bf->ibf_ncol = bf->ncol; 1622 1623 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160) 1624 return; 1625 1626 switch (sta->deflink.bandwidth) { 1627 case IEEE80211_STA_RX_BW_160: 1628 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1629 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1630 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1631 IEEE80211_EHT_MCS_NSS_RX) - 1; 1632 1633 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1634 bf->ncol_gt_bw80 = nss_mcs; 1635 break; 1636 case IEEE80211_STA_RX_BW_320: 1637 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1638 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1639 ve->phy_cap_info[3]) << 1); 1640 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1641 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1642 IEEE80211_EHT_MCS_NSS_RX) - 1; 1643 1644 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1645 bf->ncol_gt_bw80 = nss_mcs << 4; 1646 break; 1647 default: 1648 break; 1649 } 1650 } 1651 1652 static void 1653 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1654 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1655 { 1656 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1657 struct mt7996_phy *phy = mvif->deflink.phy; 1658 int tx_ant = hweight16(phy->mt76->chainmask) - 1; 1659 struct sta_rec_bf *bf; 1660 struct tlv *tlv; 1661 static const u8 matrix[4][4] = { 1662 {0, 0, 0, 0}, 1663 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1664 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1665 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1666 }; 1667 bool ebf; 1668 1669 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1670 return; 1671 1672 ebf = mt7996_is_ebf_supported(phy, vif, sta, false); 1673 if (!ebf && !dev->ibf) 1674 return; 1675 1676 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1677 bf = (struct sta_rec_bf *)tlv; 1678 1679 /* he/eht: eBF only, in accordance with spec 1680 * vht: support eBF and iBF 1681 * ht: iBF only, since mac80211 lacks of eBF support 1682 */ 1683 if (sta->deflink.eht_cap.has_eht && ebf) 1684 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf); 1685 else if (sta->deflink.he_cap.has_he && ebf) 1686 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf); 1687 else if (sta->deflink.vht_cap.vht_supported) 1688 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1689 else if (sta->deflink.ht_cap.ht_supported) 1690 mt7996_mcu_sta_bfer_ht(sta, phy, bf); 1691 else 1692 return; 1693 1694 bf->bf_cap = ebf ? ebf : dev->ibf << 1; 1695 bf->bw = sta->deflink.bandwidth; 1696 bf->ibf_dbw = sta->deflink.bandwidth; 1697 bf->ibf_nrow = tx_ant; 1698 1699 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1700 bf->ibf_timeout = 0x48; 1701 else 1702 bf->ibf_timeout = 0x18; 1703 1704 if (ebf && bf->nrow != tx_ant) 1705 bf->mem_20m = matrix[tx_ant][bf->ncol]; 1706 else 1707 bf->mem_20m = matrix[bf->nrow][bf->ncol]; 1708 1709 switch (sta->deflink.bandwidth) { 1710 case IEEE80211_STA_RX_BW_160: 1711 case IEEE80211_STA_RX_BW_80: 1712 bf->mem_total = bf->mem_20m * 2; 1713 break; 1714 case IEEE80211_STA_RX_BW_40: 1715 bf->mem_total = bf->mem_20m; 1716 break; 1717 case IEEE80211_STA_RX_BW_20: 1718 default: 1719 break; 1720 } 1721 } 1722 1723 static void 1724 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1725 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1726 { 1727 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1728 struct mt7996_phy *phy = mvif->deflink.phy; 1729 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1730 struct sta_rec_bfee *bfee; 1731 struct tlv *tlv; 1732 u8 nrow = 0; 1733 1734 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1735 return; 1736 1737 if (!mt7996_is_ebf_supported(phy, vif, sta, true)) 1738 return; 1739 1740 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1741 bfee = (struct sta_rec_bfee *)tlv; 1742 1743 if (sta->deflink.he_cap.has_he) { 1744 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1745 1746 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1747 pe->phy_cap_info[5]); 1748 } else if (sta->deflink.vht_cap.vht_supported) { 1749 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1750 1751 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1752 pc->cap); 1753 } 1754 1755 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1756 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1757 } 1758 1759 static void 1760 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb) 1761 { 1762 struct sta_rec_tx_proc *tx_proc; 1763 struct tlv *tlv; 1764 1765 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc)); 1766 1767 tx_proc = (struct sta_rec_tx_proc *)tlv; 1768 tx_proc->flag = cpu_to_le32(0); 1769 } 1770 1771 static void 1772 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1773 { 1774 struct sta_rec_hdrt *hdrt; 1775 struct tlv *tlv; 1776 1777 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1778 1779 hdrt = (struct sta_rec_hdrt *)tlv; 1780 hdrt->hdrt_mode = 1; 1781 } 1782 1783 static void 1784 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1785 struct ieee80211_vif *vif, struct mt76_wcid *wcid) 1786 { 1787 struct sta_rec_hdr_trans *hdr_trans; 1788 struct tlv *tlv; 1789 1790 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1791 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1792 hdr_trans->dis_rx_hdr_tran = true; 1793 1794 if (vif->type == NL80211_IFTYPE_STATION) 1795 hdr_trans->to_ds = true; 1796 else 1797 hdr_trans->from_ds = true; 1798 1799 if (!wcid) 1800 return; 1801 1802 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1803 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1804 hdr_trans->to_ds = true; 1805 hdr_trans->from_ds = true; 1806 } 1807 1808 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1809 hdr_trans->to_ds = true; 1810 hdr_trans->from_ds = true; 1811 hdr_trans->mesh = true; 1812 } 1813 } 1814 1815 static enum mcu_mmps_mode 1816 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1817 { 1818 switch (smps) { 1819 case IEEE80211_SMPS_OFF: 1820 return MCU_MMPS_DISABLE; 1821 case IEEE80211_SMPS_STATIC: 1822 return MCU_MMPS_STATIC; 1823 case IEEE80211_SMPS_DYNAMIC: 1824 return MCU_MMPS_DYNAMIC; 1825 default: 1826 return MCU_MMPS_DISABLE; 1827 } 1828 } 1829 1830 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1831 void *data, u16 version) 1832 { 1833 struct ra_fixed_rate *req; 1834 struct uni_header hdr; 1835 struct sk_buff *skb; 1836 struct tlv *tlv; 1837 int len; 1838 1839 len = sizeof(hdr) + sizeof(*req); 1840 1841 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1842 if (!skb) 1843 return -ENOMEM; 1844 1845 skb_put_data(skb, &hdr, sizeof(hdr)); 1846 1847 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1848 req = (struct ra_fixed_rate *)tlv; 1849 req->version = cpu_to_le16(version); 1850 memcpy(&req->rate, data, sizeof(req->rate)); 1851 1852 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1853 MCU_WM_UNI_CMD(RA), true); 1854 } 1855 1856 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1857 struct ieee80211_sta *sta, void *data, u32 field) 1858 { 1859 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1860 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1861 struct sta_phy_uni *phy = data; 1862 struct sta_rec_ra_fixed_uni *ra; 1863 struct sk_buff *skb; 1864 struct tlv *tlv; 1865 1866 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, 1867 &msta->wcid, 1868 MT7996_STA_UPDATE_MAX_SIZE); 1869 if (IS_ERR(skb)) 1870 return PTR_ERR(skb); 1871 1872 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1873 ra = (struct sta_rec_ra_fixed_uni *)tlv; 1874 1875 switch (field) { 1876 case RATE_PARAM_AUTO: 1877 break; 1878 case RATE_PARAM_FIXED: 1879 case RATE_PARAM_FIXED_MCS: 1880 case RATE_PARAM_FIXED_GI: 1881 case RATE_PARAM_FIXED_HE_LTF: 1882 if (phy) 1883 ra->phy = *phy; 1884 break; 1885 case RATE_PARAM_MMPS_UPDATE: 1886 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 1887 break; 1888 default: 1889 break; 1890 } 1891 ra->field = cpu_to_le32(field); 1892 1893 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1894 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1895 } 1896 1897 static int 1898 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1899 struct ieee80211_sta *sta) 1900 { 1901 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1902 struct cfg80211_chan_def *chandef = &mvif->deflink.phy->mt76->chandef; 1903 struct cfg80211_bitrate_mask *mask = &mvif->deflink.bitrate_mask; 1904 enum nl80211_band band = chandef->chan->band; 1905 struct sta_phy_uni phy = {}; 1906 int ret, nrates = 0; 1907 1908 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1909 do { \ 1910 u8 i, gi = mask->control[band]._gi; \ 1911 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1912 phy.sgi = gi; \ 1913 phy.he_ltf = mask->control[band].he_ltf; \ 1914 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1915 if (!mask->control[band]._mcs[i]) \ 1916 continue; \ 1917 nrates += hweight16(mask->control[band]._mcs[i]); \ 1918 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1919 if (_ht) \ 1920 phy.mcs += 8 * i; \ 1921 } \ 1922 } while (0) 1923 1924 if (sta->deflink.he_cap.has_he) { 1925 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1926 } else if (sta->deflink.vht_cap.vht_supported) { 1927 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1928 } else if (sta->deflink.ht_cap.ht_supported) { 1929 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1930 } else { 1931 nrates = hweight32(mask->control[band].legacy); 1932 phy.mcs = ffs(mask->control[band].legacy) - 1; 1933 } 1934 #undef __sta_phy_bitrate_mask_check 1935 1936 /* fall back to auto rate control */ 1937 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1938 mask->control[band].he_gi == GENMASK(7, 0) && 1939 mask->control[band].he_ltf == GENMASK(7, 0) && 1940 nrates != 1) 1941 return 0; 1942 1943 /* fixed single rate */ 1944 if (nrates == 1) { 1945 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1946 RATE_PARAM_FIXED_MCS); 1947 if (ret) 1948 return ret; 1949 } 1950 1951 /* fixed GI */ 1952 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 1953 mask->control[band].he_gi != GENMASK(7, 0)) { 1954 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1955 u32 addr; 1956 1957 /* firmware updates only TXCMD but doesn't take WTBL into 1958 * account, so driver should update here to reflect the 1959 * actual txrate hardware sends out. 1960 */ 1961 addr = mt7996_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); 1962 if (sta->deflink.he_cap.has_he) 1963 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 1964 else 1965 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 1966 1967 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1968 RATE_PARAM_FIXED_GI); 1969 if (ret) 1970 return ret; 1971 } 1972 1973 /* fixed HE_LTF */ 1974 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 1975 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1976 RATE_PARAM_FIXED_HE_LTF); 1977 if (ret) 1978 return ret; 1979 } 1980 1981 return 0; 1982 } 1983 1984 static void 1985 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 1986 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1987 { 1988 #define INIT_RCPI 180 1989 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1990 struct mt76_phy *mphy = mvif->deflink.phy->mt76; 1991 struct cfg80211_chan_def *chandef = &mphy->chandef; 1992 struct cfg80211_bitrate_mask *mask = &mvif->deflink.bitrate_mask; 1993 enum nl80211_band band = chandef->chan->band; 1994 struct sta_rec_ra_uni *ra; 1995 struct tlv *tlv; 1996 u32 supp_rate = sta->deflink.supp_rates[band]; 1997 u32 cap = sta->wme ? STA_CAP_WMM : 0; 1998 1999 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 2000 ra = (struct sta_rec_ra_uni *)tlv; 2001 2002 ra->valid = true; 2003 ra->auto_rate = true; 2004 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink); 2005 ra->channel = chandef->chan->hw_value; 2006 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ? 2007 CMD_CBW_320MHZ : sta->deflink.bandwidth; 2008 ra->phy.bw = ra->bw; 2009 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 2010 2011 if (supp_rate) { 2012 supp_rate &= mask->control[band].legacy; 2013 ra->rate_len = hweight32(supp_rate); 2014 2015 if (band == NL80211_BAND_2GHZ) { 2016 ra->supp_mode = MODE_CCK; 2017 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 2018 2019 if (ra->rate_len > 4) { 2020 ra->supp_mode |= MODE_OFDM; 2021 ra->supp_ofdm_rate = supp_rate >> 4; 2022 } 2023 } else { 2024 ra->supp_mode = MODE_OFDM; 2025 ra->supp_ofdm_rate = supp_rate; 2026 } 2027 } 2028 2029 if (sta->deflink.ht_cap.ht_supported) { 2030 ra->supp_mode |= MODE_HT; 2031 ra->af = sta->deflink.ht_cap.ampdu_factor; 2032 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 2033 2034 cap |= STA_CAP_HT; 2035 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2036 cap |= STA_CAP_SGI_20; 2037 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2038 cap |= STA_CAP_SGI_40; 2039 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 2040 cap |= STA_CAP_TX_STBC; 2041 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 2042 cap |= STA_CAP_RX_STBC; 2043 if (vif->bss_conf.ht_ldpc && 2044 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 2045 cap |= STA_CAP_LDPC; 2046 2047 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 2048 mask->control[band].ht_mcs); 2049 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 2050 } 2051 2052 if (sta->deflink.vht_cap.vht_supported) { 2053 u8 af; 2054 2055 ra->supp_mode |= MODE_VHT; 2056 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 2057 sta->deflink.vht_cap.cap); 2058 ra->af = max_t(u8, ra->af, af); 2059 2060 cap |= STA_CAP_VHT; 2061 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2062 cap |= STA_CAP_VHT_SGI_80; 2063 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2064 cap |= STA_CAP_VHT_SGI_160; 2065 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 2066 cap |= STA_CAP_VHT_TX_STBC; 2067 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 2068 cap |= STA_CAP_VHT_RX_STBC; 2069 if (vif->bss_conf.vht_ldpc && 2070 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 2071 cap |= STA_CAP_VHT_LDPC; 2072 2073 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 2074 mask->control[band].vht_mcs); 2075 } 2076 2077 if (sta->deflink.he_cap.has_he) { 2078 ra->supp_mode |= MODE_HE; 2079 cap |= STA_CAP_HE; 2080 2081 if (sta->deflink.he_6ghz_capa.capa) 2082 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 2083 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 2084 } 2085 ra->sta_cap = cpu_to_le32(cap); 2086 2087 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi)); 2088 } 2089 2090 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2091 struct ieee80211_sta *sta, bool changed) 2092 { 2093 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2094 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2095 struct sk_buff *skb; 2096 int ret; 2097 2098 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, 2099 &msta->wcid, 2100 MT7996_STA_UPDATE_MAX_SIZE); 2101 if (IS_ERR(skb)) 2102 return PTR_ERR(skb); 2103 2104 /* firmware rc algorithm refers to sta_rec_he for HE control. 2105 * once dev->rc_work changes the settings driver should also 2106 * update sta_rec_he here. 2107 */ 2108 if (changed) 2109 mt7996_mcu_sta_he_tlv(skb, sta); 2110 2111 /* sta_rec_ra accommodates BW, NSS and only MCS range format 2112 * i.e 0-{7,8,9} for VHT. 2113 */ 2114 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 2115 2116 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2117 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2118 if (ret) 2119 return ret; 2120 2121 return mt7996_mcu_add_rate_ctrl_fixed(dev, vif, sta); 2122 } 2123 2124 static int 2125 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2126 struct ieee80211_sta *sta) 2127 { 2128 #define MT_STA_BSS_GROUP 1 2129 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2130 struct mt7996_sta *msta; 2131 struct { 2132 u8 __rsv1[4]; 2133 2134 __le16 tag; 2135 __le16 len; 2136 __le16 wlan_idx; 2137 u8 __rsv2[2]; 2138 __le32 action; 2139 __le32 val; 2140 u8 __rsv3[8]; 2141 } __packed req = { 2142 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 2143 .len = cpu_to_le16(sizeof(req) - 4), 2144 .action = cpu_to_le32(MT_STA_BSS_GROUP), 2145 .val = cpu_to_le32(mvif->deflink.mt76.idx % 16), 2146 }; 2147 2148 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->deflink.sta; 2149 req.wlan_idx = cpu_to_le16(msta->wcid.idx); 2150 2151 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 2152 sizeof(req), true); 2153 } 2154 2155 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2156 struct mt76_vif_link *mlink, 2157 struct ieee80211_sta *sta, int conn_state, bool newly) 2158 { 2159 struct ieee80211_link_sta *link_sta = NULL; 2160 struct mt76_wcid *wcid = mlink->wcid; 2161 struct sk_buff *skb; 2162 int ret; 2163 2164 if (sta) { 2165 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2166 2167 wcid = &msta->wcid; 2168 link_sta = &sta->deflink; 2169 } 2170 2171 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mlink, wcid, 2172 MT7996_STA_UPDATE_MAX_SIZE); 2173 if (IS_ERR(skb)) 2174 return PTR_ERR(skb); 2175 2176 /* starec basic */ 2177 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta, 2178 conn_state, newly); 2179 2180 if (conn_state == CONN_STATE_DISCONNECT) 2181 goto out; 2182 2183 /* starec hdr trans */ 2184 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, wcid); 2185 /* starec tx proc */ 2186 mt7996_mcu_sta_tx_proc_tlv(skb); 2187 2188 /* tag order is in accordance with firmware dependency. */ 2189 if (sta) { 2190 /* starec hdrt mode */ 2191 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2192 /* starec bfer */ 2193 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta); 2194 /* starec ht */ 2195 mt7996_mcu_sta_ht_tlv(skb, sta); 2196 /* starec vht */ 2197 mt7996_mcu_sta_vht_tlv(skb, sta); 2198 /* starec uapsd */ 2199 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 2200 /* starec amsdu */ 2201 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 2202 /* starec he */ 2203 mt7996_mcu_sta_he_tlv(skb, sta); 2204 /* starec he 6g*/ 2205 mt7996_mcu_sta_he_6g_tlv(skb, sta); 2206 /* starec eht */ 2207 mt7996_mcu_sta_eht_tlv(skb, sta); 2208 /* starec muru */ 2209 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta); 2210 /* starec bfee */ 2211 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta); 2212 } 2213 2214 ret = mt7996_mcu_add_group(dev, vif, sta); 2215 if (ret) { 2216 dev_kfree_skb(skb); 2217 return ret; 2218 } 2219 out: 2220 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2221 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2222 } 2223 2224 static int 2225 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 2226 struct sk_buff *skb, 2227 struct ieee80211_key_conf *key, 2228 enum set_key_cmd cmd) 2229 { 2230 struct sta_rec_sec_uni *sec; 2231 struct tlv *tlv; 2232 2233 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2234 sec = (struct sta_rec_sec_uni *)tlv; 2235 sec->add = cmd; 2236 2237 if (cmd == SET_KEY) { 2238 struct sec_key_uni *sec_key; 2239 u8 cipher; 2240 2241 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2242 if (cipher == MCU_CIPHER_NONE) 2243 return -EOPNOTSUPP; 2244 2245 sec_key = &sec->key[0]; 2246 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2247 sec_key->mgmt_prot = 0; 2248 sec_key->cipher_id = cipher; 2249 sec_key->cipher_len = sizeof(*sec_key); 2250 sec_key->key_id = key->keyidx; 2251 sec_key->key_len = key->keylen; 2252 sec_key->need_resp = 0; 2253 memcpy(sec_key->key, key->key, key->keylen); 2254 2255 if (cipher == MCU_CIPHER_TKIP) { 2256 /* Rx/Tx MIC keys are swapped */ 2257 memcpy(sec_key->key + 16, key->key + 24, 8); 2258 memcpy(sec_key->key + 24, key->key + 16, 8); 2259 } 2260 2261 sec->n_cipher = 1; 2262 } else { 2263 sec->n_cipher = 0; 2264 } 2265 2266 return 0; 2267 } 2268 2269 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2270 struct ieee80211_key_conf *key, int mcu_cmd, 2271 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2272 { 2273 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2274 struct sk_buff *skb; 2275 int ret; 2276 2277 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 2278 MT7996_STA_UPDATE_MAX_SIZE); 2279 if (IS_ERR(skb)) 2280 return PTR_ERR(skb); 2281 2282 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd); 2283 if (ret) 2284 return ret; 2285 2286 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2287 } 2288 2289 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2290 u8 *pn) 2291 { 2292 #define TSC_TYPE_BIGTK_PN 2 2293 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2294 struct sta_rec_pn_info *pn_info; 2295 struct sk_buff *skb, *rskb; 2296 struct tlv *tlv; 2297 int ret; 2298 2299 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, &mvif->deflink.sta.wcid); 2300 if (IS_ERR(skb)) 2301 return PTR_ERR(skb); 2302 2303 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info)); 2304 pn_info = (struct sta_rec_pn_info *)tlv; 2305 2306 pn_info->tsc_type = TSC_TYPE_BIGTK_PN; 2307 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb, 2308 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE), 2309 true, &rskb); 2310 if (ret) 2311 return ret; 2312 2313 skb_pull(rskb, 4); 2314 2315 pn_info = (struct sta_rec_pn_info *)rskb->data; 2316 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO) 2317 memcpy(pn, pn_info->pn, 6); 2318 2319 dev_kfree_skb(rskb); 2320 return 0; 2321 } 2322 2323 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2324 struct ieee80211_key_conf *key) 2325 { 2326 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2327 struct mt7996_mcu_bcn_prot_tlv *bcn_prot; 2328 struct sk_buff *skb; 2329 struct tlv *tlv; 2330 u8 pn[6] = {}; 2331 int len = sizeof(struct bss_req_hdr) + 2332 sizeof(struct mt7996_mcu_bcn_prot_tlv); 2333 int ret; 2334 2335 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->deflink.mt76, len); 2336 if (IS_ERR(skb)) 2337 return PTR_ERR(skb); 2338 2339 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot)); 2340 2341 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv; 2342 2343 ret = mt7996_mcu_get_pn(dev, vif, pn); 2344 if (ret) { 2345 dev_kfree_skb(skb); 2346 return ret; 2347 } 2348 2349 switch (key->cipher) { 2350 case WLAN_CIPHER_SUITE_AES_CMAC: 2351 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128; 2352 break; 2353 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 2354 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128; 2355 break; 2356 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 2357 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256; 2358 break; 2359 case WLAN_CIPHER_SUITE_BIP_CMAC_256: 2360 default: 2361 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n"); 2362 dev_kfree_skb(skb); 2363 return -EOPNOTSUPP; 2364 } 2365 2366 pn[0]++; 2367 memcpy(bcn_prot->pn, pn, 6); 2368 bcn_prot->enable = BP_SW_MODE; 2369 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN); 2370 bcn_prot->key_id = key->keyidx; 2371 2372 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2373 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2374 } 2375 2376 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 2377 struct ieee80211_bss_conf *link_conf, 2378 struct mt76_vif_link *mlink, bool enable) 2379 { 2380 struct mt7996_dev *dev = phy->dev; 2381 struct { 2382 struct req_hdr { 2383 u8 omac_idx; 2384 u8 band_idx; 2385 u8 __rsv[2]; 2386 } __packed hdr; 2387 struct req_tlv { 2388 __le16 tag; 2389 __le16 len; 2390 u8 active; 2391 u8 __rsv; 2392 u8 omac_addr[ETH_ALEN]; 2393 } __packed tlv; 2394 } data = { 2395 .hdr = { 2396 .omac_idx = mlink->omac_idx, 2397 .band_idx = mlink->band_idx, 2398 }, 2399 .tlv = { 2400 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2401 .len = cpu_to_le16(sizeof(struct req_tlv)), 2402 .active = enable, 2403 }, 2404 }; 2405 2406 if (mlink->omac_idx >= REPEATER_BSSID_START) 2407 return mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 2408 2409 memcpy(data.tlv.omac_addr, link_conf->addr, ETH_ALEN); 2410 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2411 &data, sizeof(data), true); 2412 } 2413 2414 static void 2415 mt7996_mcu_beacon_cntdwn(struct sk_buff *rskb, struct sk_buff *skb, 2416 struct ieee80211_mutable_offsets *offs, 2417 bool csa) 2418 { 2419 struct bss_bcn_cntdwn_tlv *info; 2420 struct tlv *tlv; 2421 u16 tag; 2422 2423 if (!offs->cntdwn_counter_offs[0]) 2424 return; 2425 2426 tag = csa ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 2427 2428 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 2429 2430 info = (struct bss_bcn_cntdwn_tlv *)tlv; 2431 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 2432 } 2433 2434 static void 2435 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 2436 struct bss_bcn_content_tlv *bcn, 2437 struct ieee80211_mutable_offsets *offs) 2438 { 2439 struct bss_bcn_mbss_tlv *mbss; 2440 const struct element *elem; 2441 struct tlv *tlv; 2442 2443 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 2444 2445 mbss = (struct bss_bcn_mbss_tlv *)tlv; 2446 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 2447 mbss->bitmap = cpu_to_le32(1); 2448 2449 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 2450 &skb->data[offs->mbssid_off], 2451 skb->len - offs->mbssid_off) { 2452 const struct element *sub_elem; 2453 2454 if (elem->datalen < 2) 2455 continue; 2456 2457 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 2458 const struct ieee80211_bssid_index *idx; 2459 const u8 *idx_ie; 2460 2461 /* not a valid BSS profile */ 2462 if (sub_elem->id || sub_elem->datalen < 4) 2463 continue; 2464 2465 /* Find WLAN_EID_MULTI_BSSID_IDX 2466 * in the merged nontransmitted profile 2467 */ 2468 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 2469 sub_elem->data, sub_elem->datalen); 2470 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 2471 continue; 2472 2473 idx = (void *)(idx_ie + 2); 2474 if (!idx->bssid_index || idx->bssid_index > 31) 2475 continue; 2476 2477 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 2478 skb->data); 2479 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 2480 } 2481 } 2482 } 2483 2484 static void 2485 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, 2486 struct ieee80211_bss_conf *link_conf, 2487 struct sk_buff *rskb, struct sk_buff *skb, 2488 struct bss_bcn_content_tlv *bcn, 2489 struct ieee80211_mutable_offsets *offs) 2490 { 2491 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2492 u8 *buf; 2493 2494 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2495 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 2496 2497 if (offs->cntdwn_counter_offs[0]) { 2498 u16 offset = offs->cntdwn_counter_offs[0]; 2499 2500 if (link_conf->csa_active) 2501 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 2502 if (link_conf->color_change_active) 2503 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 2504 } 2505 2506 buf = (u8 *)bcn + sizeof(*bcn); 2507 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 2508 BSS_CHANGED_BEACON); 2509 2510 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2511 } 2512 2513 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2514 struct ieee80211_bss_conf *link_conf) 2515 { 2516 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2517 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 2518 struct ieee80211_mutable_offsets offs; 2519 struct ieee80211_tx_info *info; 2520 struct sk_buff *skb, *rskb; 2521 struct tlv *tlv; 2522 struct bss_bcn_content_tlv *bcn; 2523 int len; 2524 2525 if (link_conf->nontransmitted) 2526 return 0; 2527 2528 if (!mlink) 2529 return -EINVAL; 2530 2531 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 2532 MT7996_MAX_BSS_OFFLOAD_SIZE); 2533 if (IS_ERR(rskb)) 2534 return PTR_ERR(rskb); 2535 2536 skb = ieee80211_beacon_get_template(hw, vif, &offs, link_conf->link_id); 2537 if (!skb) { 2538 dev_kfree_skb(rskb); 2539 return -EINVAL; 2540 } 2541 2542 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2543 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2544 dev_kfree_skb(rskb); 2545 dev_kfree_skb(skb); 2546 return -EINVAL; 2547 } 2548 2549 info = IEEE80211_SKB_CB(skb); 2550 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx); 2551 2552 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + skb->len, 4); 2553 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2554 bcn = (struct bss_bcn_content_tlv *)tlv; 2555 bcn->enable = link_conf->enable_beacon; 2556 if (!bcn->enable) 2557 goto out; 2558 2559 mt7996_mcu_beacon_cont(dev, link_conf, rskb, skb, bcn, &offs); 2560 if (link_conf->bssid_indicator) 2561 mt7996_mcu_beacon_mbss(rskb, skb, bcn, &offs); 2562 mt7996_mcu_beacon_cntdwn(rskb, skb, &offs, link_conf->csa_active); 2563 out: 2564 dev_kfree_skb(skb); 2565 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2566 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2567 } 2568 2569 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 2570 struct ieee80211_vif *vif, u32 changed) 2571 { 2572 #define OFFLOAD_TX_MODE_SU BIT(0) 2573 #define OFFLOAD_TX_MODE_MU BIT(1) 2574 struct ieee80211_hw *hw = mt76_hw(dev); 2575 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2576 struct mt7996_phy *phy = mt7996_vif_link_phy(&mvif->deflink); 2577 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2578 struct bss_inband_discovery_tlv *discov; 2579 struct ieee80211_tx_info *info; 2580 struct sk_buff *rskb, *skb = NULL; 2581 struct cfg80211_chan_def *chandef; 2582 enum nl80211_band band; 2583 struct tlv *tlv; 2584 u8 *buf, interval; 2585 int len; 2586 2587 if (!phy) 2588 return -EINVAL; 2589 2590 chandef = &phy->mt76->chandef; 2591 band = chandef->chan->band; 2592 2593 if (vif->bss_conf.nontransmitted) 2594 return 0; 2595 2596 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->deflink.mt76, 2597 MT7996_MAX_BSS_OFFLOAD_SIZE); 2598 if (IS_ERR(rskb)) 2599 return PTR_ERR(rskb); 2600 2601 if (changed & BSS_CHANGED_FILS_DISCOVERY && 2602 vif->bss_conf.fils_discovery.max_interval) { 2603 interval = vif->bss_conf.fils_discovery.max_interval; 2604 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 2605 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 2606 vif->bss_conf.unsol_bcast_probe_resp_interval) { 2607 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 2608 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 2609 } 2610 2611 if (!skb) { 2612 dev_kfree_skb(rskb); 2613 return -EINVAL; 2614 } 2615 2616 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2617 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2618 dev_kfree_skb(rskb); 2619 dev_kfree_skb(skb); 2620 return -EINVAL; 2621 } 2622 2623 info = IEEE80211_SKB_CB(skb); 2624 info->control.vif = vif; 2625 info->band = band; 2626 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2627 2628 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 2629 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2630 2631 discov = (struct bss_inband_discovery_tlv *)tlv; 2632 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2633 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2634 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2635 discov->tx_interval = interval; 2636 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2637 discov->enable = true; 2638 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2639 2640 buf = (u8 *)tlv + sizeof(*discov); 2641 2642 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2643 2644 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2645 2646 dev_kfree_skb(skb); 2647 2648 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2649 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2650 } 2651 2652 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2653 { 2654 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2655 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2656 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2657 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2658 return -EIO; 2659 } 2660 2661 /* clear irq when the driver own success */ 2662 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2663 MT_TOP_LPCR_HOST_BAND_STAT); 2664 2665 return 0; 2666 } 2667 2668 static u32 mt7996_patch_sec_mode(u32 key_info) 2669 { 2670 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2671 2672 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2673 return 0; 2674 2675 if (sec == MT7996_SEC_MODE_AES) 2676 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2677 else 2678 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2679 2680 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2681 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2682 } 2683 2684 static int mt7996_load_patch(struct mt7996_dev *dev) 2685 { 2686 const struct mt7996_patch_hdr *hdr; 2687 const struct firmware *fw = NULL; 2688 int i, ret, sem; 2689 2690 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2691 switch (sem) { 2692 case PATCH_IS_DL: 2693 return 0; 2694 case PATCH_NOT_DL_SEM_SUCCESS: 2695 break; 2696 default: 2697 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2698 return -EAGAIN; 2699 } 2700 2701 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev); 2702 if (ret) 2703 goto out; 2704 2705 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2706 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2707 ret = -EINVAL; 2708 goto out; 2709 } 2710 2711 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2712 2713 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2714 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2715 2716 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2717 struct mt7996_patch_sec *sec; 2718 const u8 *dl; 2719 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2720 2721 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2722 i * sizeof(*sec)); 2723 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2724 PATCH_SEC_TYPE_INFO) { 2725 ret = -EINVAL; 2726 goto out; 2727 } 2728 2729 addr = be32_to_cpu(sec->info.addr); 2730 len = be32_to_cpu(sec->info.len); 2731 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2732 dl = fw->data + be32_to_cpu(sec->offs); 2733 2734 mode |= mt7996_patch_sec_mode(sec_key_idx); 2735 2736 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2737 mode); 2738 if (ret) { 2739 dev_err(dev->mt76.dev, "Download request failed\n"); 2740 goto out; 2741 } 2742 2743 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2744 dl, len, 4096); 2745 if (ret) { 2746 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2747 goto out; 2748 } 2749 } 2750 2751 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2752 if (ret) 2753 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2754 2755 out: 2756 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2757 switch (sem) { 2758 case PATCH_REL_SEM_SUCCESS: 2759 break; 2760 default: 2761 ret = -EAGAIN; 2762 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2763 break; 2764 } 2765 release_firmware(fw); 2766 2767 return ret; 2768 } 2769 2770 static int 2771 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2772 const struct mt7996_fw_trailer *hdr, 2773 const u8 *data, enum mt7996_ram_type type) 2774 { 2775 int i, offset = 0; 2776 u32 override = 0, option = 0; 2777 2778 for (i = 0; i < hdr->n_region; i++) { 2779 const struct mt7996_fw_region *region; 2780 int err; 2781 u32 len, addr, mode; 2782 2783 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2784 (hdr->n_region - i) * sizeof(*region)); 2785 /* DSP and WA use same mode */ 2786 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2787 region->feature_set, 2788 type != MT7996_RAM_TYPE_WM); 2789 len = le32_to_cpu(region->len); 2790 addr = le32_to_cpu(region->addr); 2791 2792 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2793 override = addr; 2794 2795 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2796 mode); 2797 if (err) { 2798 dev_err(dev->mt76.dev, "Download request failed\n"); 2799 return err; 2800 } 2801 2802 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2803 data + offset, len, 4096); 2804 if (err) { 2805 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2806 return err; 2807 } 2808 2809 offset += len; 2810 } 2811 2812 if (override) 2813 option |= FW_START_OVERRIDE; 2814 2815 if (type == MT7996_RAM_TYPE_WA) 2816 option |= FW_START_WORKING_PDA_CR4; 2817 else if (type == MT7996_RAM_TYPE_DSP) 2818 option |= FW_START_WORKING_PDA_DSP; 2819 2820 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2821 } 2822 2823 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 2824 const char *fw_file, enum mt7996_ram_type ram_type) 2825 { 2826 const struct mt7996_fw_trailer *hdr; 2827 const struct firmware *fw; 2828 int ret; 2829 2830 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 2831 if (ret) 2832 return ret; 2833 2834 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2835 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2836 ret = -EINVAL; 2837 goto out; 2838 } 2839 2840 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 2841 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 2842 fw_type, hdr->fw_ver, hdr->build_date); 2843 2844 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 2845 if (ret) { 2846 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 2847 goto out; 2848 } 2849 2850 snprintf(dev->mt76.hw->wiphy->fw_version, 2851 sizeof(dev->mt76.hw->wiphy->fw_version), 2852 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2853 2854 out: 2855 release_firmware(fw); 2856 2857 return ret; 2858 } 2859 2860 static int mt7996_load_ram(struct mt7996_dev *dev) 2861 { 2862 int ret; 2863 2864 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM), 2865 MT7996_RAM_TYPE_WM); 2866 if (ret) 2867 return ret; 2868 2869 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP), 2870 MT7996_RAM_TYPE_DSP); 2871 if (ret) 2872 return ret; 2873 2874 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA), 2875 MT7996_RAM_TYPE_WA); 2876 } 2877 2878 static int 2879 mt7996_firmware_state(struct mt7996_dev *dev, bool wa) 2880 { 2881 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2882 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2883 2884 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2885 state, 1000)) { 2886 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2887 return -EIO; 2888 } 2889 return 0; 2890 } 2891 2892 static int 2893 mt7996_mcu_restart(struct mt76_dev *dev) 2894 { 2895 struct { 2896 u8 __rsv1[4]; 2897 2898 __le16 tag; 2899 __le16 len; 2900 u8 power_mode; 2901 u8 __rsv2[3]; 2902 } __packed req = { 2903 .tag = cpu_to_le16(UNI_POWER_OFF), 2904 .len = cpu_to_le16(sizeof(req) - 4), 2905 .power_mode = 1, 2906 }; 2907 2908 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 2909 sizeof(req), false); 2910 } 2911 2912 static int mt7996_load_firmware(struct mt7996_dev *dev) 2913 { 2914 int ret; 2915 2916 /* make sure fw is download state */ 2917 if (mt7996_firmware_state(dev, false)) { 2918 /* restart firmware once */ 2919 mt7996_mcu_restart(&dev->mt76); 2920 ret = mt7996_firmware_state(dev, false); 2921 if (ret) { 2922 dev_err(dev->mt76.dev, 2923 "Firmware is not ready for download\n"); 2924 return ret; 2925 } 2926 } 2927 2928 ret = mt7996_load_patch(dev); 2929 if (ret) 2930 return ret; 2931 2932 ret = mt7996_load_ram(dev); 2933 if (ret) 2934 return ret; 2935 2936 ret = mt7996_firmware_state(dev, true); 2937 if (ret) 2938 return ret; 2939 2940 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2941 2942 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2943 2944 return 0; 2945 } 2946 2947 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 2948 { 2949 struct { 2950 u8 _rsv[4]; 2951 2952 __le16 tag; 2953 __le16 len; 2954 u8 ctrl; 2955 u8 interval; 2956 u8 _rsv2[2]; 2957 } __packed data = { 2958 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 2959 .len = cpu_to_le16(sizeof(data) - 4), 2960 .ctrl = ctrl, 2961 }; 2962 2963 if (type == MCU_FW_LOG_WA) 2964 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 2965 &data, sizeof(data), true); 2966 2967 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2968 sizeof(data), true); 2969 } 2970 2971 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 2972 { 2973 struct { 2974 u8 _rsv[4]; 2975 2976 __le16 tag; 2977 __le16 len; 2978 __le32 module_idx; 2979 u8 level; 2980 u8 _rsv2[3]; 2981 } data = { 2982 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 2983 .len = cpu_to_le16(sizeof(data) - 4), 2984 .module_idx = cpu_to_le32(module), 2985 .level = level, 2986 }; 2987 2988 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2989 sizeof(data), false); 2990 } 2991 2992 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 2993 { 2994 struct { 2995 u8 enable; 2996 u8 _rsv[3]; 2997 } __packed req = { 2998 .enable = enabled 2999 }; 3000 3001 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 3002 sizeof(req), false); 3003 } 3004 3005 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 3006 { 3007 struct vow_rx_airtime *req; 3008 struct tlv *tlv; 3009 3010 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 3011 req = (struct vow_rx_airtime *)tlv; 3012 req->enable = true; 3013 req->band = band_idx; 3014 3015 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 3016 req = (struct vow_rx_airtime *)tlv; 3017 req->enable = true; 3018 req->band = band_idx; 3019 } 3020 3021 static int 3022 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 3023 { 3024 struct uni_header hdr = {}; 3025 struct sk_buff *skb; 3026 int len, num, i; 3027 3028 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) + 3029 mt7996_band_valid(dev, MT_BAND2)); 3030 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 3031 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3032 if (!skb) 3033 return -ENOMEM; 3034 3035 skb_put_data(skb, &hdr, sizeof(hdr)); 3036 3037 for (i = 0; i < __MT_MAX_BAND; i++) { 3038 if (mt7996_band_valid(dev, i)) 3039 mt7996_add_rx_airtime_tlv(skb, i); 3040 } 3041 3042 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3043 MCU_WM_UNI_CMD(VOW), true); 3044 } 3045 3046 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 3047 { 3048 int ret; 3049 3050 /* force firmware operation mode into normal state, 3051 * which should be set before firmware download stage. 3052 */ 3053 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 3054 3055 ret = mt7996_driver_own(dev, 0); 3056 if (ret) 3057 return ret; 3058 /* set driver own for band1 when two hif exist */ 3059 if (dev->hif2) { 3060 ret = mt7996_driver_own(dev, 1); 3061 if (ret) 3062 return ret; 3063 } 3064 3065 ret = mt7996_load_firmware(dev); 3066 if (ret) 3067 return ret; 3068 3069 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 3070 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 3071 if (ret) 3072 return ret; 3073 3074 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 3075 if (ret) 3076 return ret; 3077 3078 ret = mt7996_mcu_set_mwds(dev, 1); 3079 if (ret) 3080 return ret; 3081 3082 ret = mt7996_mcu_init_rx_airtime(dev); 3083 if (ret) 3084 return ret; 3085 3086 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 3087 MCU_WA_PARAM_RED, 0, 0); 3088 } 3089 3090 int mt7996_mcu_init(struct mt7996_dev *dev) 3091 { 3092 static const struct mt76_mcu_ops mt7996_mcu_ops = { 3093 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 3094 .mcu_skb_send_msg = mt7996_mcu_send_message, 3095 .mcu_parse_response = mt7996_mcu_parse_response, 3096 }; 3097 3098 dev->mt76.mcu_ops = &mt7996_mcu_ops; 3099 3100 return mt7996_mcu_init_firmware(dev); 3101 } 3102 3103 void mt7996_mcu_exit(struct mt7996_dev *dev) 3104 { 3105 mt7996_mcu_restart(&dev->mt76); 3106 if (mt7996_firmware_state(dev, false)) { 3107 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 3108 goto out; 3109 } 3110 3111 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 3112 if (dev->hif2) 3113 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 3114 MT_TOP_LPCR_HOST_FW_OWN); 3115 out: 3116 skb_queue_purge(&dev->mt76.mcu.res_q); 3117 } 3118 3119 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 3120 { 3121 struct { 3122 u8 __rsv[4]; 3123 } __packed hdr; 3124 struct hdr_trans_blacklist *req_blacklist; 3125 struct hdr_trans_en *req_en; 3126 struct sk_buff *skb; 3127 struct tlv *tlv; 3128 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 3129 3130 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3131 if (!skb) 3132 return -ENOMEM; 3133 3134 skb_put_data(skb, &hdr, sizeof(hdr)); 3135 3136 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 3137 req_en = (struct hdr_trans_en *)tlv; 3138 req_en->enable = hdr_trans; 3139 3140 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 3141 sizeof(struct hdr_trans_vlan)); 3142 3143 if (hdr_trans) { 3144 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 3145 sizeof(*req_blacklist)); 3146 req_blacklist = (struct hdr_trans_blacklist *)tlv; 3147 req_blacklist->enable = 1; 3148 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 3149 } 3150 3151 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3152 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 3153 } 3154 3155 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3156 struct ieee80211_bss_conf *link_conf) 3157 { 3158 #define MCU_EDCA_AC_PARAM 0 3159 #define WMM_AIFS_SET BIT(0) 3160 #define WMM_CW_MIN_SET BIT(1) 3161 #define WMM_CW_MAX_SET BIT(2) 3162 #define WMM_TXOP_SET BIT(3) 3163 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 3164 WMM_CW_MAX_SET | WMM_TXOP_SET) 3165 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf); 3166 struct { 3167 u8 bss_idx; 3168 u8 __rsv[3]; 3169 } __packed hdr = { 3170 .bss_idx = link->mt76.idx, 3171 }; 3172 struct sk_buff *skb; 3173 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 3174 int ac; 3175 3176 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3177 if (!skb) 3178 return -ENOMEM; 3179 3180 skb_put_data(skb, &hdr, sizeof(hdr)); 3181 3182 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 3183 struct ieee80211_tx_queue_params *q = &link->queue_params[ac]; 3184 struct edca *e; 3185 struct tlv *tlv; 3186 3187 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 3188 3189 e = (struct edca *)tlv; 3190 e->set = WMM_PARAM_SET; 3191 e->queue = ac; 3192 e->aifs = q->aifs; 3193 e->txop = cpu_to_le16(q->txop); 3194 3195 if (q->cw_min) 3196 e->cw_min = fls(q->cw_min); 3197 else 3198 e->cw_min = 5; 3199 3200 if (q->cw_max) 3201 e->cw_max = fls(q->cw_max); 3202 else 3203 e->cw_max = 10; 3204 } 3205 3206 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3207 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 3208 } 3209 3210 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 3211 { 3212 struct { 3213 u8 _rsv[4]; 3214 3215 __le16 tag; 3216 __le16 len; 3217 3218 __le32 ctrl; 3219 __le16 min_lpn; 3220 u8 rsv[2]; 3221 } __packed req = { 3222 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3223 .len = cpu_to_le16(sizeof(req) - 4), 3224 3225 .ctrl = cpu_to_le32(0x1), 3226 .min_lpn = cpu_to_le16(val), 3227 }; 3228 3229 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3230 &req, sizeof(req), true); 3231 } 3232 3233 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3234 const struct mt7996_dfs_pulse *pulse) 3235 { 3236 struct { 3237 u8 _rsv[4]; 3238 3239 __le16 tag; 3240 __le16 len; 3241 3242 __le32 ctrl; 3243 3244 __le32 max_width; /* us */ 3245 __le32 max_pwr; /* dbm */ 3246 __le32 min_pwr; /* dbm */ 3247 __le32 min_stgr_pri; /* us */ 3248 __le32 max_stgr_pri; /* us */ 3249 __le32 min_cr_pri; /* us */ 3250 __le32 max_cr_pri; /* us */ 3251 } __packed req = { 3252 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3253 .len = cpu_to_le16(sizeof(req) - 4), 3254 3255 .ctrl = cpu_to_le32(0x3), 3256 3257 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3258 __req_field(max_width), 3259 __req_field(max_pwr), 3260 __req_field(min_pwr), 3261 __req_field(min_stgr_pri), 3262 __req_field(max_stgr_pri), 3263 __req_field(min_cr_pri), 3264 __req_field(max_cr_pri), 3265 #undef __req_field 3266 }; 3267 3268 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3269 &req, sizeof(req), true); 3270 } 3271 3272 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3273 const struct mt7996_dfs_pattern *pattern) 3274 { 3275 struct { 3276 u8 _rsv[4]; 3277 3278 __le16 tag; 3279 __le16 len; 3280 3281 __le32 ctrl; 3282 __le16 radar_type; 3283 3284 u8 enb; 3285 u8 stgr; 3286 u8 min_crpn; 3287 u8 max_crpn; 3288 u8 min_crpr; 3289 u8 min_pw; 3290 __le32 min_pri; 3291 __le32 max_pri; 3292 u8 max_pw; 3293 u8 min_crbn; 3294 u8 max_crbn; 3295 u8 min_stgpn; 3296 u8 max_stgpn; 3297 u8 min_stgpr; 3298 u8 rsv[2]; 3299 __le32 min_stgpr_diff; 3300 } __packed req = { 3301 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3302 .len = cpu_to_le16(sizeof(req) - 4), 3303 3304 .ctrl = cpu_to_le32(0x2), 3305 .radar_type = cpu_to_le16(index), 3306 3307 #define __req_field_u8(field) .field = pattern->field 3308 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3309 __req_field_u8(enb), 3310 __req_field_u8(stgr), 3311 __req_field_u8(min_crpn), 3312 __req_field_u8(max_crpn), 3313 __req_field_u8(min_crpr), 3314 __req_field_u8(min_pw), 3315 __req_field_u32(min_pri), 3316 __req_field_u32(max_pri), 3317 __req_field_u8(max_pw), 3318 __req_field_u8(min_crbn), 3319 __req_field_u8(max_crbn), 3320 __req_field_u8(min_stgpn), 3321 __req_field_u8(max_stgpn), 3322 __req_field_u8(min_stgpr), 3323 __req_field_u32(min_stgpr_diff), 3324 #undef __req_field_u8 3325 #undef __req_field_u32 3326 }; 3327 3328 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3329 &req, sizeof(req), true); 3330 } 3331 3332 static int 3333 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3334 struct cfg80211_chan_def *chandef, 3335 int cmd) 3336 { 3337 struct mt7996_dev *dev = phy->dev; 3338 struct mt76_phy *mphy = phy->mt76; 3339 struct ieee80211_channel *chan = mphy->chandef.chan; 3340 int freq = mphy->chandef.center_freq1; 3341 struct mt7996_mcu_background_chain_ctrl req = { 3342 .tag = cpu_to_le16(0), 3343 .len = cpu_to_le16(sizeof(req) - 4), 3344 .monitor_scan_type = 2, /* simple rx */ 3345 }; 3346 3347 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3348 return -EINVAL; 3349 3350 if (!cfg80211_chandef_valid(&mphy->chandef)) 3351 return -EINVAL; 3352 3353 switch (cmd) { 3354 case CH_SWITCH_BACKGROUND_SCAN_START: { 3355 req.chan = chan->hw_value; 3356 req.central_chan = ieee80211_frequency_to_channel(freq); 3357 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3358 req.monitor_chan = chandef->chan->hw_value; 3359 req.monitor_central_chan = 3360 ieee80211_frequency_to_channel(chandef->center_freq1); 3361 req.monitor_bw = mt76_connac_chan_bw(chandef); 3362 req.band_idx = phy->mt76->band_idx; 3363 req.scan_mode = 1; 3364 break; 3365 } 3366 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3367 req.monitor_chan = chandef->chan->hw_value; 3368 req.monitor_central_chan = 3369 ieee80211_frequency_to_channel(chandef->center_freq1); 3370 req.band_idx = phy->mt76->band_idx; 3371 req.scan_mode = 2; 3372 break; 3373 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3374 req.chan = chan->hw_value; 3375 req.central_chan = ieee80211_frequency_to_channel(freq); 3376 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3377 req.tx_stream = hweight8(mphy->antenna_mask); 3378 req.rx_stream = mphy->antenna_mask; 3379 break; 3380 default: 3381 return -EINVAL; 3382 } 3383 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3384 3385 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 3386 &req, sizeof(req), false); 3387 } 3388 3389 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 3390 struct cfg80211_chan_def *chandef) 3391 { 3392 struct mt7996_dev *dev = phy->dev; 3393 int err, region; 3394 3395 if (!chandef) { /* disable offchain */ 3396 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2, 3397 0, 0); 3398 if (err) 3399 return err; 3400 3401 return mt7996_mcu_background_chain_ctrl(phy, NULL, 3402 CH_SWITCH_BACKGROUND_SCAN_STOP); 3403 } 3404 3405 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 3406 CH_SWITCH_BACKGROUND_SCAN_START); 3407 if (err) 3408 return err; 3409 3410 switch (dev->mt76.region) { 3411 case NL80211_DFS_ETSI: 3412 region = 0; 3413 break; 3414 case NL80211_DFS_JP: 3415 region = 2; 3416 break; 3417 case NL80211_DFS_FCC: 3418 default: 3419 region = 1; 3420 break; 3421 } 3422 3423 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2, 3424 0, region); 3425 } 3426 3427 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 3428 { 3429 static const u8 ch_band[] = { 3430 [NL80211_BAND_2GHZ] = 0, 3431 [NL80211_BAND_5GHZ] = 1, 3432 [NL80211_BAND_6GHZ] = 2, 3433 }; 3434 struct mt7996_dev *dev = phy->dev; 3435 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3436 int freq1 = chandef->center_freq1; 3437 u8 band_idx = phy->mt76->band_idx; 3438 struct { 3439 /* fixed field */ 3440 u8 __rsv[4]; 3441 3442 __le16 tag; 3443 __le16 len; 3444 u8 control_ch; 3445 u8 center_ch; 3446 u8 bw; 3447 u8 tx_path_num; 3448 u8 rx_path; /* mask or num */ 3449 u8 switch_reason; 3450 u8 band_idx; 3451 u8 center_ch2; /* for 80+80 only */ 3452 __le16 cac_case; 3453 u8 channel_band; 3454 u8 rsv0; 3455 __le32 outband_freq; 3456 u8 txpower_drop; 3457 u8 ap_bw; 3458 u8 ap_center_ch; 3459 u8 rsv1[53]; 3460 } __packed req = { 3461 .tag = cpu_to_le16(tag), 3462 .len = cpu_to_le16(sizeof(req) - 4), 3463 .control_ch = chandef->chan->hw_value, 3464 .center_ch = ieee80211_frequency_to_channel(freq1), 3465 .bw = mt76_connac_chan_bw(chandef), 3466 .tx_path_num = hweight16(phy->mt76->chainmask), 3467 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx], 3468 .band_idx = band_idx, 3469 .channel_band = ch_band[chandef->chan->band], 3470 }; 3471 3472 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 3473 req.switch_reason = CH_SWITCH_NORMAL; 3474 else if (phy->mt76->offchannel || 3475 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 3476 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 3477 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 3478 NL80211_IFTYPE_AP)) 3479 req.switch_reason = CH_SWITCH_DFS; 3480 else 3481 req.switch_reason = CH_SWITCH_NORMAL; 3482 3483 if (tag == UNI_CHANNEL_SWITCH) 3484 req.rx_path = hweight8(req.rx_path); 3485 3486 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 3487 int freq2 = chandef->center_freq2; 3488 3489 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 3490 } 3491 3492 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 3493 &req, sizeof(req), true); 3494 } 3495 3496 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 3497 { 3498 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 3499 #define PAGE_IDX_MASK GENMASK(4, 2) 3500 #define PER_PAGE_SIZE 0x400 3501 struct mt7996_mcu_eeprom req = { 3502 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3503 .buffer_mode = EE_MODE_BUFFER 3504 }; 3505 u16 eeprom_size = MT7996_EEPROM_SIZE; 3506 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 3507 u8 *eep = (u8 *)dev->mt76.eeprom.data; 3508 int eep_len, i; 3509 3510 for (i = 0; i < total; i++, eep += eep_len) { 3511 struct sk_buff *skb; 3512 int ret, msg_len; 3513 3514 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 3515 eep_len = eeprom_size % PER_PAGE_SIZE; 3516 else 3517 eep_len = PER_PAGE_SIZE; 3518 3519 msg_len = sizeof(req) + eep_len; 3520 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 3521 if (!skb) 3522 return -ENOMEM; 3523 3524 req.len = cpu_to_le16(msg_len - 4); 3525 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 3526 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 3527 req.buf_len = cpu_to_le16(eep_len); 3528 3529 skb_put_data(skb, &req, sizeof(req)); 3530 skb_put_data(skb, eep, eep_len); 3531 3532 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 3533 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 3534 if (ret) 3535 return ret; 3536 } 3537 3538 return 0; 3539 } 3540 3541 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 3542 { 3543 struct mt7996_mcu_eeprom req = { 3544 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3545 .len = cpu_to_le16(sizeof(req) - 4), 3546 .buffer_mode = EE_MODE_EFUSE, 3547 .format = EE_FORMAT_WHOLE 3548 }; 3549 3550 if (dev->flash_mode) 3551 return mt7996_mcu_set_eeprom_flash(dev); 3552 3553 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 3554 &req, sizeof(req), true); 3555 } 3556 3557 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len) 3558 { 3559 struct { 3560 u8 _rsv[4]; 3561 3562 __le16 tag; 3563 __le16 len; 3564 __le32 addr; 3565 __le32 valid; 3566 u8 data[16]; 3567 } __packed req = { 3568 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 3569 .len = cpu_to_le16(sizeof(req) - 4), 3570 .addr = cpu_to_le32(round_down(offset, 3571 MT7996_EEPROM_BLOCK_SIZE)), 3572 }; 3573 struct sk_buff *skb; 3574 bool valid; 3575 int ret; 3576 3577 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3578 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 3579 &req, sizeof(req), true, &skb); 3580 if (ret) 3581 return ret; 3582 3583 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 3584 if (valid) { 3585 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3586 3587 if (!buf) 3588 buf = (u8 *)dev->mt76.eeprom.data + addr; 3589 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE) 3590 buf_len = MT7996_EEPROM_BLOCK_SIZE; 3591 3592 skb_pull(skb, 48); 3593 memcpy(buf, skb->data, buf_len); 3594 } else { 3595 ret = -EINVAL; 3596 } 3597 3598 dev_kfree_skb(skb); 3599 3600 return ret; 3601 } 3602 3603 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 3604 { 3605 struct { 3606 u8 _rsv[4]; 3607 3608 __le16 tag; 3609 __le16 len; 3610 u8 num; 3611 u8 version; 3612 u8 die_idx; 3613 u8 _rsv2; 3614 } __packed req = { 3615 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 3616 .len = cpu_to_le16(sizeof(req) - 4), 3617 .version = 2, 3618 }; 3619 struct sk_buff *skb; 3620 int ret; 3621 3622 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3623 sizeof(req), true, &skb); 3624 if (ret) 3625 return ret; 3626 3627 *block_num = *(u8 *)(skb->data + 8); 3628 dev_kfree_skb(skb); 3629 3630 return 0; 3631 } 3632 3633 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3634 { 3635 #define NIC_CAP 3 3636 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3637 struct { 3638 u8 _rsv[4]; 3639 3640 __le16 tag; 3641 __le16 len; 3642 } __packed req = { 3643 .tag = cpu_to_le16(NIC_CAP), 3644 .len = cpu_to_le16(sizeof(req) - 4), 3645 }; 3646 struct sk_buff *skb; 3647 u8 *buf; 3648 int ret; 3649 3650 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3651 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3652 sizeof(req), true, &skb); 3653 if (ret) 3654 return ret; 3655 3656 /* fixed field */ 3657 skb_pull(skb, 4); 3658 3659 buf = skb->data; 3660 while (buf - skb->data < skb->len) { 3661 struct tlv *tlv = (struct tlv *)buf; 3662 3663 switch (le16_to_cpu(tlv->tag)) { 3664 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3665 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3666 break; 3667 default: 3668 break; 3669 } 3670 3671 buf += le16_to_cpu(tlv->len); 3672 } 3673 3674 dev_kfree_skb(skb); 3675 3676 return 0; 3677 } 3678 3679 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3680 { 3681 enum { 3682 IDX_TX_TIME, 3683 IDX_RX_TIME, 3684 IDX_OBSS_AIRTIME, 3685 IDX_NON_WIFI_TIME, 3686 IDX_NUM 3687 }; 3688 struct { 3689 struct { 3690 u8 band; 3691 u8 __rsv[3]; 3692 } hdr; 3693 struct { 3694 __le16 tag; 3695 __le16 len; 3696 __le32 offs; 3697 } data[IDX_NUM]; 3698 } __packed req = { 3699 .hdr.band = phy->mt76->band_idx, 3700 }; 3701 static const u32 offs[] = { 3702 [IDX_TX_TIME] = UNI_MIB_TX_TIME, 3703 [IDX_RX_TIME] = UNI_MIB_RX_TIME, 3704 [IDX_OBSS_AIRTIME] = UNI_MIB_OBSS_AIRTIME, 3705 [IDX_NON_WIFI_TIME] = UNI_MIB_NON_WIFI_TIME, 3706 }; 3707 struct mt76_channel_state *state = phy->mt76->chan_state; 3708 struct mt76_channel_state *state_ts = &phy->state_ts; 3709 struct mt7996_dev *dev = phy->dev; 3710 struct mt7996_mcu_mib *res; 3711 struct sk_buff *skb; 3712 int i, ret; 3713 3714 for (i = 0; i < IDX_NUM; i++) { 3715 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3716 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3717 req.data[i].offs = cpu_to_le32(offs[i]); 3718 } 3719 3720 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3721 &req, sizeof(req), true, &skb); 3722 if (ret) 3723 return ret; 3724 3725 skb_pull(skb, sizeof(req.hdr)); 3726 3727 res = (struct mt7996_mcu_mib *)(skb->data); 3728 3729 if (chan_switch) 3730 goto out; 3731 3732 #define __res_u64(s) le64_to_cpu(res[s].data) 3733 state->cc_tx += __res_u64(IDX_TX_TIME) - state_ts->cc_tx; 3734 state->cc_bss_rx += __res_u64(IDX_RX_TIME) - state_ts->cc_bss_rx; 3735 state->cc_rx += __res_u64(IDX_RX_TIME) + 3736 __res_u64(IDX_OBSS_AIRTIME) - 3737 state_ts->cc_rx; 3738 state->cc_busy += __res_u64(IDX_TX_TIME) + 3739 __res_u64(IDX_RX_TIME) + 3740 __res_u64(IDX_OBSS_AIRTIME) + 3741 __res_u64(IDX_NON_WIFI_TIME) - 3742 state_ts->cc_busy; 3743 out: 3744 state_ts->cc_tx = __res_u64(IDX_TX_TIME); 3745 state_ts->cc_bss_rx = __res_u64(IDX_RX_TIME); 3746 state_ts->cc_rx = __res_u64(IDX_RX_TIME) + __res_u64(IDX_OBSS_AIRTIME); 3747 state_ts->cc_busy = __res_u64(IDX_TX_TIME) + 3748 __res_u64(IDX_RX_TIME) + 3749 __res_u64(IDX_OBSS_AIRTIME) + 3750 __res_u64(IDX_NON_WIFI_TIME); 3751 #undef __res_u64 3752 3753 dev_kfree_skb(skb); 3754 3755 return 0; 3756 } 3757 3758 int mt7996_mcu_get_temperature(struct mt7996_phy *phy) 3759 { 3760 #define TEMPERATURE_QUERY 0 3761 #define GET_TEMPERATURE 0 3762 struct { 3763 u8 _rsv[4]; 3764 3765 __le16 tag; 3766 __le16 len; 3767 3768 u8 rsv1; 3769 u8 action; 3770 u8 band_idx; 3771 u8 rsv2; 3772 } req = { 3773 .tag = cpu_to_le16(TEMPERATURE_QUERY), 3774 .len = cpu_to_le16(sizeof(req) - 4), 3775 .action = GET_TEMPERATURE, 3776 .band_idx = phy->mt76->band_idx, 3777 }; 3778 struct mt7996_mcu_thermal { 3779 u8 _rsv[4]; 3780 3781 __le16 tag; 3782 __le16 len; 3783 3784 __le32 rsv; 3785 __le32 temperature; 3786 } __packed * res; 3787 struct sk_buff *skb; 3788 int ret; 3789 u32 temp; 3790 3791 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3792 &req, sizeof(req), true, &skb); 3793 if (ret) 3794 return ret; 3795 3796 res = (void *)skb->data; 3797 temp = le32_to_cpu(res->temperature); 3798 dev_kfree_skb(skb); 3799 3800 return temp; 3801 } 3802 3803 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state) 3804 { 3805 struct { 3806 u8 _rsv[4]; 3807 3808 __le16 tag; 3809 __le16 len; 3810 3811 struct mt7996_mcu_thermal_ctrl ctrl; 3812 } __packed req = { 3813 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG), 3814 .len = cpu_to_le16(sizeof(req) - 4), 3815 .ctrl = { 3816 .band_idx = phy->mt76->band_idx, 3817 }, 3818 }; 3819 int level, ret; 3820 3821 /* set duty cycle and level */ 3822 for (level = 0; level < 4; level++) { 3823 req.ctrl.duty.duty_level = level; 3824 req.ctrl.duty.duty_cycle = state; 3825 state /= 2; 3826 3827 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3828 &req, sizeof(req), false); 3829 if (ret) 3830 return ret; 3831 } 3832 3833 return 0; 3834 } 3835 3836 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable) 3837 { 3838 #define SUSTAIN_PERIOD 10 3839 struct { 3840 u8 _rsv[4]; 3841 3842 __le16 tag; 3843 __le16 len; 3844 3845 struct mt7996_mcu_thermal_ctrl ctrl; 3846 struct mt7996_mcu_thermal_enable enable; 3847 } __packed req = { 3848 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)), 3849 .ctrl = { 3850 .band_idx = phy->mt76->band_idx, 3851 .type.protect_type = 1, 3852 .type.trigger_type = 1, 3853 }, 3854 }; 3855 int ret; 3856 3857 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE); 3858 3859 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3860 &req, sizeof(req) - sizeof(req.enable), false); 3861 if (ret || !enable) 3862 return ret; 3863 3864 /* set high-temperature trigger threshold */ 3865 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE); 3866 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]); 3867 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 3868 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD); 3869 3870 req.len = cpu_to_le16(sizeof(req) - 4); 3871 3872 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3873 &req, sizeof(req), false); 3874 } 3875 3876 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 3877 { 3878 struct { 3879 u8 rsv[4]; 3880 3881 __le16 tag; 3882 __le16 len; 3883 3884 union { 3885 struct { 3886 __le32 mask; 3887 } __packed set; 3888 3889 struct { 3890 u8 method; 3891 u8 band; 3892 u8 rsv2[2]; 3893 } __packed trigger; 3894 }; 3895 } __packed req = { 3896 .tag = cpu_to_le16(action), 3897 .len = cpu_to_le16(sizeof(req) - 4), 3898 }; 3899 3900 switch (action) { 3901 case UNI_CMD_SER_SET: 3902 req.set.mask = cpu_to_le32(val); 3903 break; 3904 case UNI_CMD_SER_TRIGGER: 3905 req.trigger.method = val; 3906 req.trigger.band = band; 3907 break; 3908 default: 3909 return -EINVAL; 3910 } 3911 3912 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 3913 &req, sizeof(req), false); 3914 } 3915 3916 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 3917 { 3918 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 3919 #define BF_PROCESSING 4 3920 struct uni_header hdr; 3921 struct sk_buff *skb; 3922 struct tlv *tlv; 3923 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 3924 3925 memset(&hdr, 0, sizeof(hdr)); 3926 3927 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3928 if (!skb) 3929 return -ENOMEM; 3930 3931 skb_put_data(skb, &hdr, sizeof(hdr)); 3932 3933 switch (action) { 3934 case BF_SOUNDING_ON: { 3935 struct bf_sounding_on *req_snd_on; 3936 3937 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 3938 req_snd_on = (struct bf_sounding_on *)tlv; 3939 req_snd_on->snd_mode = BF_PROCESSING; 3940 break; 3941 } 3942 case BF_HW_EN_UPDATE: { 3943 struct bf_hw_en_status_update *req_hw_en; 3944 3945 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 3946 req_hw_en = (struct bf_hw_en_status_update *)tlv; 3947 req_hw_en->ebf = true; 3948 req_hw_en->ibf = dev->ibf; 3949 break; 3950 } 3951 case BF_MOD_EN_CTRL: { 3952 struct bf_mod_en_ctrl *req_mod_en; 3953 3954 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 3955 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 3956 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2; 3957 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ? 3958 GENMASK(2, 0) : GENMASK(1, 0); 3959 break; 3960 } 3961 default: 3962 return -EINVAL; 3963 } 3964 3965 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 3966 } 3967 3968 static int 3969 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 3970 { 3971 struct mt7996_dev *dev = phy->dev; 3972 struct { 3973 u8 band_idx; 3974 u8 __rsv[3]; 3975 3976 __le16 tag; 3977 __le16 len; 3978 3979 __le32 val; 3980 } __packed req = { 3981 .band_idx = phy->mt76->band_idx, 3982 .tag = cpu_to_le16(action), 3983 .len = cpu_to_le16(sizeof(req) - 4), 3984 .val = cpu_to_le32(val), 3985 }; 3986 3987 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3988 &req, sizeof(req), true); 3989 } 3990 3991 static int 3992 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 3993 struct ieee80211_he_obss_pd *he_obss_pd) 3994 { 3995 struct mt7996_dev *dev = phy->dev; 3996 u8 max_th = 82, non_srg_max_th = 62; 3997 struct { 3998 u8 band_idx; 3999 u8 __rsv[3]; 4000 4001 __le16 tag; 4002 __le16 len; 4003 4004 u8 pd_th_non_srg; 4005 u8 pd_th_srg; 4006 u8 period_offs; 4007 u8 rcpi_src; 4008 __le16 obss_pd_min; 4009 __le16 obss_pd_min_srg; 4010 u8 resp_txpwr_mode; 4011 u8 txpwr_restrict_mode; 4012 u8 txpwr_ref; 4013 u8 __rsv2[3]; 4014 } __packed req = { 4015 .band_idx = phy->mt76->band_idx, 4016 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 4017 .len = cpu_to_le16(sizeof(req) - 4), 4018 .obss_pd_min = cpu_to_le16(max_th), 4019 .obss_pd_min_srg = cpu_to_le16(max_th), 4020 .txpwr_restrict_mode = 2, 4021 .txpwr_ref = 21 4022 }; 4023 int ret; 4024 4025 /* disable firmware dynamical PD asjustment */ 4026 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 4027 if (ret) 4028 return ret; 4029 4030 if (he_obss_pd->sr_ctrl & 4031 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 4032 req.pd_th_non_srg = max_th; 4033 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 4034 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 4035 else 4036 req.pd_th_non_srg = non_srg_max_th; 4037 4038 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 4039 req.pd_th_srg = max_th - he_obss_pd->max_offset; 4040 4041 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4042 &req, sizeof(req), true); 4043 } 4044 4045 static int 4046 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif, 4047 struct ieee80211_he_obss_pd *he_obss_pd) 4048 { 4049 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4050 struct mt7996_dev *dev = phy->dev; 4051 u8 omac = mvif->deflink.mt76.omac_idx; 4052 struct { 4053 u8 band_idx; 4054 u8 __rsv[3]; 4055 4056 __le16 tag; 4057 __le16 len; 4058 4059 u8 omac; 4060 u8 __rsv2[3]; 4061 u8 flag[20]; 4062 } __packed req = { 4063 .band_idx = phy->mt76->band_idx, 4064 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 4065 .len = cpu_to_le16(sizeof(req) - 4), 4066 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 4067 }; 4068 int ret; 4069 4070 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 4071 req.flag[req.omac] = 0xf; 4072 else 4073 return 0; 4074 4075 /* switch to normal AP mode */ 4076 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 4077 if (ret) 4078 return ret; 4079 4080 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4081 &req, sizeof(req), true); 4082 } 4083 4084 static int 4085 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 4086 struct ieee80211_he_obss_pd *he_obss_pd) 4087 { 4088 struct mt7996_dev *dev = phy->dev; 4089 struct { 4090 u8 band_idx; 4091 u8 __rsv[3]; 4092 4093 __le16 tag; 4094 __le16 len; 4095 4096 __le32 color_l[2]; 4097 __le32 color_h[2]; 4098 __le32 bssid_l[2]; 4099 __le32 bssid_h[2]; 4100 } __packed req = { 4101 .band_idx = phy->mt76->band_idx, 4102 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 4103 .len = cpu_to_le16(sizeof(req) - 4), 4104 }; 4105 u32 bitmap; 4106 4107 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 4108 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 4109 4110 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 4111 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 4112 4113 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 4114 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 4115 4116 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 4117 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 4118 4119 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 4120 sizeof(req), true); 4121 } 4122 4123 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif, 4124 struct ieee80211_he_obss_pd *he_obss_pd) 4125 { 4126 int ret; 4127 4128 /* enable firmware scene detection algorithms */ 4129 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 4130 sr_scene_detect); 4131 if (ret) 4132 return ret; 4133 4134 /* firmware dynamically adjusts PD threshold so skip manual control */ 4135 if (sr_scene_detect && !he_obss_pd->enable) 4136 return 0; 4137 4138 /* enable spatial reuse */ 4139 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 4140 he_obss_pd->enable); 4141 if (ret) 4142 return ret; 4143 4144 if (sr_scene_detect || !he_obss_pd->enable) 4145 return 0; 4146 4147 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 4148 if (ret) 4149 return ret; 4150 4151 /* set SRG/non-SRG OBSS PD threshold */ 4152 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 4153 if (ret) 4154 return ret; 4155 4156 /* Set SR prohibit */ 4157 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 4158 if (ret) 4159 return ret; 4160 4161 /* set SRG BSS color/BSSID bitmap */ 4162 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 4163 } 4164 4165 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 4166 struct mt76_vif_link *mlink, 4167 struct cfg80211_he_bss_color *he_bss_color) 4168 { 4169 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 4170 struct bss_color_tlv *bss_color; 4171 struct sk_buff *skb; 4172 struct tlv *tlv; 4173 4174 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, len); 4175 if (IS_ERR(skb)) 4176 return PTR_ERR(skb); 4177 4178 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 4179 sizeof(*bss_color)); 4180 bss_color = (struct bss_color_tlv *)tlv; 4181 bss_color->enable = he_bss_color->enabled; 4182 bss_color->color = he_bss_color->color; 4183 4184 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4185 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 4186 } 4187 4188 #define TWT_AGRT_TRIGGER BIT(0) 4189 #define TWT_AGRT_ANNOUNCE BIT(1) 4190 #define TWT_AGRT_PROTECT BIT(2) 4191 4192 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 4193 struct mt7996_vif *mvif, 4194 struct mt7996_twt_flow *flow, 4195 int cmd) 4196 { 4197 struct { 4198 /* fixed field */ 4199 u8 bss; 4200 u8 _rsv[3]; 4201 4202 __le16 tag; 4203 __le16 len; 4204 u8 tbl_idx; 4205 u8 cmd; 4206 u8 own_mac_idx; 4207 u8 flowid; /* 0xff for group id */ 4208 __le16 peer_id; /* specify the peer_id (msb=0) 4209 * or group_id (msb=1) 4210 */ 4211 u8 duration; /* 256 us */ 4212 u8 bss_idx; 4213 __le64 start_tsf; 4214 __le16 mantissa; 4215 u8 exponent; 4216 u8 is_ap; 4217 u8 agrt_params; 4218 u8 __rsv2[23]; 4219 } __packed req = { 4220 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 4221 .len = cpu_to_le16(sizeof(req) - 4), 4222 .tbl_idx = flow->table_id, 4223 .cmd = cmd, 4224 .own_mac_idx = mvif->deflink.mt76.omac_idx, 4225 .flowid = flow->id, 4226 .peer_id = cpu_to_le16(flow->wcid), 4227 .duration = flow->duration, 4228 .bss = mvif->deflink.mt76.idx, 4229 .bss_idx = mvif->deflink.mt76.idx, 4230 .start_tsf = cpu_to_le64(flow->tsf), 4231 .mantissa = flow->mantissa, 4232 .exponent = flow->exp, 4233 .is_ap = true, 4234 }; 4235 4236 if (flow->protection) 4237 req.agrt_params |= TWT_AGRT_PROTECT; 4238 if (!flow->flowtype) 4239 req.agrt_params |= TWT_AGRT_ANNOUNCE; 4240 if (flow->trigger) 4241 req.agrt_params |= TWT_AGRT_TRIGGER; 4242 4243 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 4244 &req, sizeof(req), true); 4245 } 4246 4247 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 4248 { 4249 struct { 4250 u8 band_idx; 4251 u8 _rsv[3]; 4252 4253 __le16 tag; 4254 __le16 len; 4255 __le32 len_thresh; 4256 __le32 pkt_thresh; 4257 } __packed req = { 4258 .band_idx = phy->mt76->band_idx, 4259 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 4260 .len = cpu_to_le16(sizeof(req) - 4), 4261 .len_thresh = cpu_to_le32(val), 4262 .pkt_thresh = cpu_to_le32(0x2), 4263 }; 4264 4265 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4266 &req, sizeof(req), true); 4267 } 4268 4269 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 4270 { 4271 struct { 4272 u8 band_idx; 4273 u8 _rsv[3]; 4274 4275 __le16 tag; 4276 __le16 len; 4277 u8 enable; 4278 u8 _rsv2[3]; 4279 } __packed req = { 4280 .band_idx = phy->mt76->band_idx, 4281 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 4282 .len = cpu_to_le16(sizeof(req) - 4), 4283 .enable = enable, 4284 }; 4285 4286 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4287 &req, sizeof(req), true); 4288 } 4289 4290 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 4291 u8 rx_sel, u8 val) 4292 { 4293 struct { 4294 u8 _rsv[4]; 4295 4296 __le16 tag; 4297 __le16 len; 4298 4299 u8 ctrl; 4300 u8 rdd_idx; 4301 u8 rdd_rx_sel; 4302 u8 val; 4303 u8 rsv[4]; 4304 } __packed req = { 4305 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 4306 .len = cpu_to_le16(sizeof(req) - 4), 4307 .ctrl = cmd, 4308 .rdd_idx = index, 4309 .rdd_rx_sel = rx_sel, 4310 .val = val, 4311 }; 4312 4313 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 4314 &req, sizeof(req), true); 4315 } 4316 4317 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 4318 struct ieee80211_vif *vif, 4319 struct ieee80211_sta *sta) 4320 { 4321 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4322 struct mt7996_sta *msta; 4323 struct sk_buff *skb; 4324 4325 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->deflink.sta; 4326 4327 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, 4328 &msta->wcid, 4329 MT7996_STA_UPDATE_MAX_SIZE); 4330 if (IS_ERR(skb)) 4331 return PTR_ERR(skb); 4332 4333 /* starec hdr trans */ 4334 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, &msta->wcid); 4335 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4336 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 4337 } 4338 4339 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 4340 u16 rate_idx, bool beacon) 4341 { 4342 #define UNI_FIXED_RATE_TABLE_SET 0 4343 #define SPE_IXD_SELECT_TXD 0 4344 #define SPE_IXD_SELECT_BMC_WTBL 1 4345 struct mt7996_dev *dev = phy->dev; 4346 struct fixed_rate_table_ctrl req = { 4347 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET), 4348 .len = cpu_to_le16(sizeof(req) - 4), 4349 .table_idx = table_idx, 4350 .rate_idx = cpu_to_le16(rate_idx), 4351 .gi = 1, 4352 .he_ltf = 1, 4353 }; 4354 u8 band_idx = phy->mt76->band_idx; 4355 4356 if (beacon) { 4357 req.spe_idx_sel = SPE_IXD_SELECT_TXD; 4358 req.spe_idx = 24 + band_idx; 4359 phy->beacon_rate = rate_idx; 4360 } else { 4361 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL; 4362 } 4363 4364 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE), 4365 &req, sizeof(req), false); 4366 } 4367 4368 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 4369 { 4370 struct { 4371 u8 __rsv1[4]; 4372 4373 __le16 tag; 4374 __le16 len; 4375 __le16 idx; 4376 u8 __rsv2[2]; 4377 __le32 ofs; 4378 __le32 data; 4379 } __packed *res, req = { 4380 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 4381 .len = cpu_to_le16(sizeof(req) - 4), 4382 4383 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 4384 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4385 .data = set ? cpu_to_le32(*val) : 0, 4386 }; 4387 struct sk_buff *skb; 4388 int ret; 4389 4390 if (set) 4391 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 4392 &req, sizeof(req), true); 4393 4394 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 4395 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 4396 &req, sizeof(req), true, &skb); 4397 if (ret) 4398 return ret; 4399 4400 res = (void *)skb->data; 4401 *val = le32_to_cpu(res->data); 4402 dev_kfree_skb(skb); 4403 4404 return 0; 4405 } 4406 4407 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 4408 { 4409 struct { 4410 __le16 tag; 4411 __le16 len; 4412 u8 enable; 4413 u8 rsv[3]; 4414 } __packed req = { 4415 .len = cpu_to_le16(sizeof(req) - 4), 4416 .enable = true, 4417 }; 4418 4419 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 4420 &req, sizeof(req), false); 4421 } 4422 4423 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val) 4424 { 4425 struct { 4426 u8 __rsv1[4]; 4427 __le16 tag; 4428 __le16 len; 4429 union { 4430 struct { 4431 u8 type; 4432 u8 __rsv2[3]; 4433 } __packed platform_type; 4434 struct { 4435 u8 type; 4436 u8 dest; 4437 u8 __rsv2[2]; 4438 } __packed bypass_mode; 4439 struct { 4440 u8 path; 4441 u8 __rsv2[3]; 4442 } __packed txfree_path; 4443 struct { 4444 __le16 flush_one; 4445 __le16 flush_all; 4446 u8 __rsv2[4]; 4447 } __packed timeout; 4448 }; 4449 } __packed req = { 4450 .tag = cpu_to_le16(tag), 4451 .len = cpu_to_le16(sizeof(req) - 4), 4452 }; 4453 4454 switch (tag) { 4455 case UNI_RRO_SET_PLATFORM_TYPE: 4456 req.platform_type.type = val; 4457 break; 4458 case UNI_RRO_SET_BYPASS_MODE: 4459 req.bypass_mode.type = val; 4460 break; 4461 case UNI_RRO_SET_TXFREE_PATH: 4462 req.txfree_path.path = val; 4463 break; 4464 case UNI_RRO_SET_FLUSH_TIMEOUT: 4465 req.timeout.flush_one = cpu_to_le16(val); 4466 req.timeout.flush_all = cpu_to_le16(2 * val); 4467 break; 4468 default: 4469 return -EINVAL; 4470 } 4471 4472 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4473 sizeof(req), true); 4474 } 4475 4476 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 4477 { 4478 struct mt7996_dev *dev = phy->dev; 4479 struct { 4480 u8 _rsv[4]; 4481 4482 __le16 tag; 4483 __le16 len; 4484 } __packed req = { 4485 .tag = cpu_to_le16(tag), 4486 .len = cpu_to_le16(sizeof(req) - 4), 4487 }; 4488 4489 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 4490 &req, sizeof(req), false); 4491 } 4492 4493 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id) 4494 { 4495 struct { 4496 u8 __rsv[4]; 4497 4498 __le16 tag; 4499 __le16 len; 4500 __le16 session_id; 4501 u8 pad[4]; 4502 } __packed req = { 4503 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION), 4504 .len = cpu_to_le16(sizeof(req) - 4), 4505 .session_id = cpu_to_le16(id), 4506 }; 4507 4508 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4509 sizeof(req), true); 4510 } 4511 4512 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled) 4513 { 4514 struct mt7996_dev *dev = phy->dev; 4515 struct { 4516 u8 band_idx; 4517 u8 _rsv[3]; 4518 __le16 tag; 4519 __le16 len; 4520 u8 enable; 4521 u8 _pad[3]; 4522 } __packed req = { 4523 .band_idx = phy->mt76->band_idx, 4524 .tag = 0, 4525 .len = cpu_to_le16(sizeof(req) - 4), 4526 .enable = enabled, 4527 }; 4528 4529 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SNIFFER), &req, 4530 sizeof(req), true); 4531 } 4532 4533 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) 4534 { 4535 #define TX_POWER_LIMIT_TABLE_RATE 0 4536 struct mt7996_dev *dev = phy->dev; 4537 struct mt76_phy *mphy = phy->mt76; 4538 struct tx_power_limit_table_ctrl { 4539 u8 __rsv1[4]; 4540 4541 __le16 tag; 4542 __le16 len; 4543 u8 power_ctrl_id; 4544 u8 power_limit_type; 4545 u8 band_idx; 4546 } __packed req = { 4547 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL), 4548 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4), 4549 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL, 4550 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE, 4551 .band_idx = phy->mt76->band_idx, 4552 }; 4553 struct mt76_power_limits la = {}; 4554 struct sk_buff *skb; 4555 int i, tx_power; 4556 4557 tx_power = mt7996_get_power_bound(phy, phy->txpower); 4558 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 4559 &la, tx_power); 4560 mphy->txpower_cur = tx_power; 4561 4562 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 4563 sizeof(req) + MT7996_SKU_PATH_NUM); 4564 if (!skb) 4565 return -ENOMEM; 4566 4567 skb_put_data(skb, &req, sizeof(req)); 4568 /* cck and ofdm */ 4569 skb_put_data(skb, &la.cck, sizeof(la.cck)); 4570 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm)); 4571 /* ht20 */ 4572 skb_put_data(skb, &la.mcs[0], 8); 4573 /* ht40 */ 4574 skb_put_data(skb, &la.mcs[1], 9); 4575 4576 /* vht */ 4577 for (i = 0; i < 4; i++) { 4578 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); 4579 skb_put_zero(skb, 2); /* padding */ 4580 } 4581 4582 /* he */ 4583 skb_put_data(skb, &la.ru[0], sizeof(la.ru)); 4584 /* eht */ 4585 skb_put_data(skb, &la.eht[0], sizeof(la.eht)); 4586 4587 /* padding */ 4588 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM); 4589 4590 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4591 MCU_WM_UNI_CMD(TXPOWER), true); 4592 } 4593 4594 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode) 4595 { 4596 __le32 cp_mode; 4597 4598 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) || 4599 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO)) 4600 return -EINVAL; 4601 4602 cp_mode = cpu_to_le32(mode); 4603 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT), 4604 &cp_mode, sizeof(cp_mode), true); 4605 } 4606