1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 #define fw_name(_dev, name, ...) ({ \ 14 char *_fw; \ 15 switch (mt76_chip(&(_dev)->mt76)) { \ 16 case MT7992_DEVICE_ID: \ 17 switch ((_dev)->var.type) { \ 18 case MT7992_VAR_TYPE_23: \ 19 _fw = MT7992_##name##_23; \ 20 break; \ 21 default: \ 22 _fw = MT7992_##name; \ 23 } \ 24 break; \ 25 case MT7990_DEVICE_ID: \ 26 _fw = MT7990_##name; \ 27 break; \ 28 case MT7996_DEVICE_ID: \ 29 default: \ 30 switch ((_dev)->var.type) { \ 31 case MT7996_VAR_TYPE_233: \ 32 _fw = MT7996_##name##_233; \ 33 break; \ 34 default: \ 35 _fw = MT7996_##name; \ 36 } \ 37 break; \ 38 } \ 39 _fw; \ 40 }) 41 42 struct mt7996_patch_hdr { 43 char build_date[16]; 44 char platform[4]; 45 __be32 hw_sw_ver; 46 __be32 patch_ver; 47 __be16 checksum; 48 u16 reserved; 49 struct { 50 __be32 patch_ver; 51 __be32 subsys; 52 __be32 feature; 53 __be32 n_region; 54 __be32 crc; 55 u32 reserved[11]; 56 } desc; 57 } __packed; 58 59 struct mt7996_patch_sec { 60 __be32 type; 61 __be32 offs; 62 __be32 size; 63 union { 64 __be32 spec[13]; 65 struct { 66 __be32 addr; 67 __be32 len; 68 __be32 sec_key_idx; 69 __be32 align_len; 70 u32 reserved[9]; 71 } info; 72 }; 73 } __packed; 74 75 struct mt7996_fw_trailer { 76 u8 chip_id; 77 u8 eco_code; 78 u8 n_region; 79 u8 format_ver; 80 u8 format_flag; 81 u8 reserved[2]; 82 char fw_ver[10]; 83 char build_date[15]; 84 u32 crc; 85 } __packed; 86 87 struct mt7996_fw_region { 88 __le32 decomp_crc; 89 __le32 decomp_len; 90 __le32 decomp_blk_sz; 91 u8 reserved[4]; 92 __le32 addr; 93 __le32 len; 94 u8 feature_set; 95 u8 reserved1[15]; 96 } __packed; 97 98 #define MCU_PATCH_ADDRESS 0x200000 99 100 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 101 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 102 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 103 104 static bool sr_scene_detect = true; 105 module_param(sr_scene_detect, bool, 0644); 106 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 107 108 static u8 109 mt7996_mcu_get_sta_nss(u16 mcs_map) 110 { 111 u8 nss; 112 113 for (nss = 8; nss > 0; nss--) { 114 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 115 116 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 117 break; 118 } 119 120 return nss - 1; 121 } 122 123 static void 124 mt7996_mcu_set_sta_he_mcs(struct ieee80211_link_sta *link_sta, 125 struct mt7996_vif_link *link, 126 __le16 *he_mcs, u16 mcs_map) 127 { 128 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 129 enum nl80211_band band = link->phy->mt76->chandef.chan->band; 130 const u16 *mask = link->bitrate_mask.control[band].he_mcs; 131 132 for (nss = 0; nss < max_nss; nss++) { 133 int mcs; 134 135 switch ((mcs_map >> (2 * nss)) & 0x3) { 136 case IEEE80211_HE_MCS_SUPPORT_0_11: 137 mcs = GENMASK(11, 0); 138 break; 139 case IEEE80211_HE_MCS_SUPPORT_0_9: 140 mcs = GENMASK(9, 0); 141 break; 142 case IEEE80211_HE_MCS_SUPPORT_0_7: 143 mcs = GENMASK(7, 0); 144 break; 145 default: 146 mcs = 0; 147 } 148 149 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 150 151 switch (mcs) { 152 case 0 ... 7: 153 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 154 break; 155 case 8 ... 9: 156 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 157 break; 158 case 10 ... 11: 159 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 160 break; 161 default: 162 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 163 break; 164 } 165 mcs_map &= ~(0x3 << (nss * 2)); 166 mcs_map |= mcs << (nss * 2); 167 } 168 169 *he_mcs = cpu_to_le16(mcs_map); 170 } 171 172 static void 173 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_link_sta *link_sta, 174 __le16 *vht_mcs, const u16 *mask) 175 { 176 u16 mcs, mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); 177 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 178 179 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 180 switch (mcs_map & 0x3) { 181 case IEEE80211_VHT_MCS_SUPPORT_0_9: 182 mcs = GENMASK(9, 0); 183 break; 184 case IEEE80211_VHT_MCS_SUPPORT_0_8: 185 mcs = GENMASK(8, 0); 186 break; 187 case IEEE80211_VHT_MCS_SUPPORT_0_7: 188 mcs = GENMASK(7, 0); 189 break; 190 default: 191 mcs = 0; 192 } 193 194 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 195 } 196 } 197 198 static void 199 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_link_sta *link_sta, 200 u8 *ht_mcs, const u8 *mask) 201 { 202 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 203 204 for (nss = 0; nss < max_nss; nss++) 205 ht_mcs[nss] = link_sta->ht_cap.mcs.rx_mask[nss] & mask[nss]; 206 } 207 208 static int 209 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 210 struct sk_buff *skb, int seq) 211 { 212 struct mt7996_mcu_rxd *rxd; 213 struct mt7996_mcu_uni_event *event; 214 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 215 int ret = 0; 216 217 if (!skb) { 218 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 219 cmd, seq); 220 return -ETIMEDOUT; 221 } 222 223 rxd = (struct mt7996_mcu_rxd *)skb->data; 224 if (seq != rxd->seq) 225 return -EAGAIN; 226 227 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 228 skb_pull(skb, sizeof(*rxd) - 4); 229 ret = *skb->data; 230 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 231 rxd->eid == MCU_UNI_EVENT_RESULT) { 232 skb_pull(skb, sizeof(*rxd)); 233 event = (struct mt7996_mcu_uni_event *)skb->data; 234 ret = le32_to_cpu(event->status); 235 /* skip invalid event */ 236 if (mcu_cmd != event->cid) 237 ret = -EAGAIN; 238 } else { 239 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 240 } 241 242 return ret; 243 } 244 245 static int 246 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 247 int cmd, int *wait_seq) 248 { 249 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 250 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 251 struct mt76_connac2_mcu_uni_txd *uni_txd; 252 struct mt76_connac2_mcu_txd *mcu_txd; 253 enum mt76_mcuq_id qid; 254 __le32 *txd; 255 u32 val; 256 u8 seq; 257 258 mdev->mcu.timeout = 20 * HZ; 259 260 seq = ++dev->mt76.mcu.msg_seq & 0xf; 261 if (!seq) 262 seq = ++dev->mt76.mcu.msg_seq & 0xf; 263 264 if (cmd == MCU_CMD(FW_SCATTER)) { 265 qid = MT_MCUQ_FWDL; 266 goto exit; 267 } 268 269 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 270 txd = (__le32 *)skb_push(skb, txd_len); 271 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state) && mt7996_has_wa(dev)) 272 qid = MT_MCUQ_WA; 273 else 274 qid = MT_MCUQ_WM; 275 276 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 277 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 278 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 279 txd[0] = cpu_to_le32(val); 280 281 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 282 txd[1] = cpu_to_le32(val); 283 284 if (cmd & __MCU_CMD_FIELD_UNI) { 285 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 286 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 287 uni_txd->cid = cpu_to_le16(mcu_cmd); 288 uni_txd->s2d_index = MCU_S2D_H2CN; 289 uni_txd->pkt_type = MCU_PKT_ID; 290 uni_txd->seq = seq; 291 292 if (cmd & __MCU_CMD_FIELD_QUERY) 293 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 294 else 295 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 296 297 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 298 uni_txd->s2d_index = MCU_S2D_H2CN; 299 else if (cmd & __MCU_CMD_FIELD_WA) 300 uni_txd->s2d_index = MCU_S2D_H2C; 301 else if (cmd & __MCU_CMD_FIELD_WM) 302 uni_txd->s2d_index = MCU_S2D_H2N; 303 304 goto exit; 305 } 306 307 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 308 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 309 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 310 MT_TX_MCU_PORT_RX_Q0)); 311 mcu_txd->pkt_type = MCU_PKT_ID; 312 mcu_txd->seq = seq; 313 314 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 315 mcu_txd->set_query = MCU_Q_NA; 316 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 317 if (mcu_txd->ext_cid) { 318 mcu_txd->ext_cid_ack = 1; 319 320 if (cmd & __MCU_CMD_FIELD_QUERY) 321 mcu_txd->set_query = MCU_Q_QUERY; 322 else 323 mcu_txd->set_query = MCU_Q_SET; 324 } 325 326 if (cmd & __MCU_CMD_FIELD_WA) 327 mcu_txd->s2d_index = MCU_S2D_H2C; 328 else 329 mcu_txd->s2d_index = MCU_S2D_H2N; 330 331 exit: 332 if (wait_seq) 333 *wait_seq = seq; 334 335 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 336 } 337 338 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 339 { 340 struct { 341 u8 _rsv[4]; 342 343 __le16 tag; 344 __le16 len; 345 __le32 args[3]; 346 } __packed req = { 347 .args = { 348 cpu_to_le32(a1), 349 cpu_to_le32(a2), 350 cpu_to_le32(a3), 351 }, 352 }; 353 354 if (mt7996_has_wa(dev)) 355 return mt76_mcu_send_msg(&dev->mt76, cmd, &req.args, 356 sizeof(req.args), false); 357 358 req.tag = cpu_to_le16(cmd == MCU_WA_PARAM_CMD(QUERY) ? UNI_CMD_SDO_QUERY : 359 UNI_CMD_SDO_SET); 360 req.len = cpu_to_le16(sizeof(req) - 4); 361 362 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(SDO), &req, 363 sizeof(req), false); 364 } 365 366 static void 367 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 368 { 369 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 370 return; 371 372 ieee80211_csa_finish(vif, 0); 373 } 374 375 static void 376 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 377 { 378 struct mt76_phy *mphy = &dev->mt76.phy; 379 struct mt7996_mcu_rdd_report *r; 380 381 r = (struct mt7996_mcu_rdd_report *)skb->data; 382 383 switch (r->rdd_idx) { 384 case MT_RDD_IDX_BAND2: 385 mphy = dev->mt76.phys[MT_BAND2]; 386 break; 387 case MT_RDD_IDX_BAND1: 388 mphy = dev->mt76.phys[MT_BAND1]; 389 break; 390 case MT_RDD_IDX_BACKGROUND: 391 if (!dev->rdd2_phy) 392 return; 393 mphy = dev->rdd2_phy->mt76; 394 break; 395 default: 396 dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx); 397 return; 398 } 399 400 if (!mphy) 401 return; 402 403 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND) 404 cfg80211_background_radar_event(mphy->hw->wiphy, 405 &dev->rdd2_chandef, 406 GFP_ATOMIC); 407 else 408 ieee80211_radar_detected(mphy->hw, NULL); 409 dev->hw_pattern++; 410 } 411 412 static void 413 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 414 { 415 #define UNI_EVENT_FW_LOG_FORMAT 0 416 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 417 const char *data = (char *)&rxd[1] + 4, *type; 418 struct tlv *tlv = (struct tlv *)data; 419 int len; 420 421 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 422 len = skb->len - sizeof(*rxd); 423 data = (char *)&rxd[1]; 424 goto out; 425 } 426 427 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 428 return; 429 430 data += sizeof(*tlv) + 4; 431 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 432 433 out: 434 switch (rxd->s2d_index) { 435 case 0: 436 if (mt7996_debugfs_rx_log(dev, data, len)) 437 return; 438 439 type = "WM"; 440 break; 441 case 2: 442 type = "WA"; 443 break; 444 default: 445 type = "unknown"; 446 break; 447 } 448 449 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 450 } 451 452 static void 453 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 454 { 455 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 456 return; 457 458 ieee80211_color_change_finish(vif, 0); 459 } 460 461 static void 462 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 463 { 464 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 465 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 466 struct header { 467 u8 band; 468 u8 rsv[3]; 469 }; 470 struct mt76_phy *mphy = &dev->mt76.phy; 471 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 472 const char *data = (char *)&rxd[1], *tail; 473 struct header *hdr = (struct header *)data; 474 struct tlv *tlv = (struct tlv *)(data + 4); 475 476 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 477 return; 478 479 if (hdr->band && dev->mt76.phys[hdr->band]) 480 mphy = dev->mt76.phys[hdr->band]; 481 482 tail = skb->data + skb->len; 483 data += sizeof(struct header); 484 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 485 switch (le16_to_cpu(tlv->tag)) { 486 case UNI_EVENT_IE_COUNTDOWN_CSA: 487 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 488 IEEE80211_IFACE_ITER_RESUME_ALL, 489 mt7996_mcu_csa_finish, mphy->hw); 490 break; 491 case UNI_EVENT_IE_COUNTDOWN_BCC: 492 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 493 IEEE80211_IFACE_ITER_RESUME_ALL, 494 mt7996_mcu_cca_finish, mphy->hw); 495 break; 496 } 497 498 data += le16_to_cpu(tlv->len); 499 tlv = (struct tlv *)data; 500 } 501 } 502 503 static int 504 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate) 505 { 506 switch (mcu_rate->tx_mode) { 507 case MT_PHY_TYPE_CCK: 508 case MT_PHY_TYPE_OFDM: 509 break; 510 case MT_PHY_TYPE_HT: 511 case MT_PHY_TYPE_HT_GF: 512 case MT_PHY_TYPE_VHT: 513 if (mcu_rate->tx_gi) 514 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 515 else 516 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 517 break; 518 case MT_PHY_TYPE_HE_SU: 519 case MT_PHY_TYPE_HE_EXT_SU: 520 case MT_PHY_TYPE_HE_TB: 521 case MT_PHY_TYPE_HE_MU: 522 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2) 523 return -EINVAL; 524 rate->he_gi = mcu_rate->tx_gi; 525 break; 526 case MT_PHY_TYPE_EHT_SU: 527 case MT_PHY_TYPE_EHT_TRIG: 528 case MT_PHY_TYPE_EHT_MU: 529 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2) 530 return -EINVAL; 531 rate->eht_gi = mcu_rate->tx_gi; 532 break; 533 default: 534 return -EINVAL; 535 } 536 537 return 0; 538 } 539 540 static void 541 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 542 { 543 struct mt7996_mcu_all_sta_info_event *res; 544 u16 i; 545 546 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 547 548 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 549 550 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 551 u8 ac; 552 u16 wlan_idx; 553 struct mt76_wcid *wcid; 554 555 switch (le16_to_cpu(res->tag)) { 556 case UNI_ALL_STA_TXRX_RATE: 557 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx); 558 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 559 560 if (!wcid) 561 break; 562 563 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i])) 564 dev_err(dev->mt76.dev, "Failed to update TX GI\n"); 565 break; 566 case UNI_ALL_STA_TXRX_ADM_STAT: 567 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 568 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 569 570 if (!wcid) 571 break; 572 573 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 574 wcid->stats.tx_bytes += 575 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 576 wcid->stats.rx_bytes += 577 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 578 } 579 break; 580 case UNI_ALL_STA_TXRX_MSDU_COUNT: 581 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 582 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 583 584 if (!wcid) 585 break; 586 587 wcid->stats.tx_packets += 588 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 589 wcid->stats.rx_packets += 590 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 591 break; 592 default: 593 break; 594 } 595 } 596 } 597 598 static void 599 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb) 600 { 601 #define THERMAL_NOTIFY_TAG 0x4 602 #define THERMAL_NOTIFY 0x2 603 struct mt76_phy *mphy = &dev->mt76.phy; 604 struct mt7996_mcu_thermal_notify *n; 605 struct mt7996_phy *phy; 606 607 n = (struct mt7996_mcu_thermal_notify *)skb->data; 608 609 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG) 610 return; 611 612 if (n->event_id != THERMAL_NOTIFY) 613 return; 614 615 if (n->band_idx > MT_BAND2) 616 return; 617 618 mphy = dev->mt76.phys[n->band_idx]; 619 if (!mphy) 620 return; 621 622 phy = (struct mt7996_phy *)mphy->priv; 623 phy->throttle_state = n->duty_percent; 624 } 625 626 static void 627 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 628 { 629 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 630 631 switch (rxd->ext_eid) { 632 case MCU_EXT_EVENT_FW_LOG_2_HOST: 633 mt7996_mcu_rx_log_message(dev, skb); 634 break; 635 default: 636 break; 637 } 638 } 639 640 static void 641 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 642 { 643 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 644 645 switch (rxd->eid) { 646 case MCU_EVENT_EXT: 647 mt7996_mcu_rx_ext_event(dev, skb); 648 break; 649 case MCU_UNI_EVENT_THERMAL: 650 mt7996_mcu_rx_thermal_notify(dev, skb); 651 break; 652 default: 653 break; 654 } 655 dev_kfree_skb(skb); 656 } 657 658 static void 659 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb) 660 { 661 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data; 662 663 if (!dev->has_rro) 664 return; 665 666 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4); 667 668 switch (le16_to_cpu(event->tag)) { 669 case UNI_WED_RRO_BA_SESSION_STATUS: { 670 struct mt7996_mcu_wed_rro_ba_event *e; 671 672 while (skb->len >= sizeof(*e)) { 673 struct mt76_rx_tid *tid; 674 struct mt76_wcid *wcid; 675 u16 idx; 676 677 e = (void *)skb->data; 678 idx = le16_to_cpu(e->wlan_id); 679 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) 680 break; 681 682 wcid = rcu_dereference(dev->mt76.wcid[idx]); 683 if (!wcid || !wcid->sta) 684 break; 685 686 if (e->tid >= ARRAY_SIZE(wcid->aggr)) 687 break; 688 689 tid = rcu_dereference(wcid->aggr[e->tid]); 690 if (!tid) 691 break; 692 693 tid->id = le16_to_cpu(e->id); 694 skb_pull(skb, sizeof(*e)); 695 } 696 break; 697 } 698 case UNI_WED_RRO_BA_SESSION_DELETE: { 699 struct mt7996_mcu_wed_rro_ba_delete_event *e; 700 701 while (skb->len >= sizeof(*e)) { 702 struct mt7996_wed_rro_session_id *session; 703 704 e = (void *)skb->data; 705 session = kzalloc(sizeof(*session), GFP_ATOMIC); 706 if (!session) 707 break; 708 709 session->id = le16_to_cpu(e->session_id); 710 711 spin_lock_bh(&dev->wed_rro.lock); 712 list_add_tail(&session->list, &dev->wed_rro.poll_list); 713 spin_unlock_bh(&dev->wed_rro.lock); 714 715 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work); 716 skb_pull(skb, sizeof(*e)); 717 } 718 break; 719 } 720 default: 721 break; 722 } 723 } 724 725 static void 726 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 727 { 728 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 729 730 switch (rxd->eid) { 731 case MCU_UNI_EVENT_FW_LOG_2_HOST: 732 mt7996_mcu_rx_log_message(dev, skb); 733 break; 734 case MCU_UNI_EVENT_IE_COUNTDOWN: 735 mt7996_mcu_ie_countdown(dev, skb); 736 break; 737 case MCU_UNI_EVENT_RDD_REPORT: 738 mt7996_mcu_rx_radar_detected(dev, skb); 739 break; 740 case MCU_UNI_EVENT_ALL_STA_INFO: 741 mt7996_mcu_rx_all_sta_info_event(dev, skb); 742 break; 743 case MCU_UNI_EVENT_WED_RRO: 744 mt7996_mcu_wed_rro_event(dev, skb); 745 break; 746 default: 747 break; 748 } 749 dev_kfree_skb(skb); 750 } 751 752 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 753 { 754 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 755 756 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 757 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 758 return; 759 } 760 761 /* WA still uses legacy event*/ 762 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 763 !rxd->seq) 764 mt7996_mcu_rx_unsolicited_event(dev, skb); 765 else 766 mt76_mcu_rx_event(&dev->mt76, skb); 767 } 768 769 static struct tlv * 770 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 771 { 772 struct tlv *ptlv = skb_put_zero(skb, len); 773 774 ptlv->tag = cpu_to_le16(tag); 775 ptlv->len = cpu_to_le16(len); 776 777 return ptlv; 778 } 779 780 static void 781 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 782 { 783 static const u8 rlm_ch_band[] = { 784 [NL80211_BAND_2GHZ] = 1, 785 [NL80211_BAND_5GHZ] = 2, 786 [NL80211_BAND_6GHZ] = 3, 787 }; 788 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 789 struct bss_rlm_tlv *ch; 790 struct tlv *tlv; 791 int freq1 = chandef->center_freq1; 792 793 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 794 795 ch = (struct bss_rlm_tlv *)tlv; 796 ch->control_channel = chandef->chan->hw_value; 797 ch->center_chan = ieee80211_frequency_to_channel(freq1); 798 ch->bw = mt76_connac_chan_bw(chandef); 799 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 800 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 801 ch->band = rlm_ch_band[chandef->chan->band]; 802 803 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 804 int freq2 = chandef->center_freq2; 805 806 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 807 } 808 } 809 810 static void 811 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 812 { 813 struct bss_ra_tlv *ra; 814 struct tlv *tlv; 815 816 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 817 818 ra = (struct bss_ra_tlv *)tlv; 819 ra->short_preamble = true; 820 } 821 822 static void 823 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 824 struct ieee80211_bss_conf *link_conf, 825 struct mt7996_phy *phy) 826 { 827 #define DEFAULT_HE_PE_DURATION 4 828 #define DEFAULT_HE_DURATION_RTS_THRES 1023 829 const struct ieee80211_sta_he_cap *cap; 830 struct bss_info_uni_he *he; 831 struct tlv *tlv; 832 833 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 834 835 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 836 837 he = (struct bss_info_uni_he *)tlv; 838 he->he_pe_duration = link_conf->htc_trig_based_pkt_ext; 839 if (!he->he_pe_duration) 840 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 841 842 he->he_rts_thres = cpu_to_le16(link_conf->frame_time_rts_th); 843 if (!he->he_rts_thres) 844 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 845 846 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 847 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 848 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 849 } 850 851 static void 852 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_bss_conf *link_conf, 853 bool enable) 854 { 855 struct bss_info_uni_mbssid *mbssid; 856 struct tlv *tlv; 857 858 if (!link_conf->bssid_indicator && enable) 859 return; 860 861 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 862 863 mbssid = (struct bss_info_uni_mbssid *)tlv; 864 865 if (enable) { 866 mbssid->max_indicator = link_conf->bssid_indicator; 867 mbssid->mbss_idx = link_conf->bssid_index; 868 mbssid->tx_bss_omac_idx = 0; 869 } 870 } 871 872 static void 873 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink, 874 struct mt7996_phy *phy) 875 { 876 struct bss_rate_tlv *bmc; 877 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 878 enum nl80211_band band = chandef->chan->band; 879 struct tlv *tlv; 880 u8 idx = mlink->mcast_rates_idx ? 881 mlink->mcast_rates_idx : mlink->basic_rates_idx; 882 883 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 884 885 bmc = (struct bss_rate_tlv *)tlv; 886 887 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 888 bmc->bc_fixed_rate = idx; 889 bmc->mc_fixed_rate = idx; 890 } 891 892 static void 893 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 894 { 895 struct bss_txcmd_tlv *txcmd; 896 struct tlv *tlv; 897 898 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 899 900 txcmd = (struct bss_txcmd_tlv *)tlv; 901 txcmd->txcmd_mode = en; 902 } 903 904 static void 905 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 906 { 907 struct bss_mld_tlv *mld; 908 struct tlv *tlv; 909 910 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 911 912 mld = (struct bss_mld_tlv *)tlv; 913 mld->group_mld_id = 0xff; 914 mld->own_mld_id = mlink->idx; 915 mld->remap_idx = 0xff; 916 } 917 918 static void 919 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 920 { 921 struct bss_sec_tlv *sec; 922 struct tlv *tlv; 923 924 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 925 926 sec = (struct bss_sec_tlv *)tlv; 927 sec->cipher = mlink->cipher; 928 } 929 930 static int 931 mt7996_mcu_muar_config(struct mt7996_dev *dev, struct mt76_vif_link *mlink, 932 const u8 *addr, bool bssid, bool enable) 933 { 934 #define UNI_MUAR_ENTRY 2 935 u32 idx = mlink->omac_idx - REPEATER_BSSID_START; 936 struct { 937 struct { 938 u8 band; 939 u8 __rsv[3]; 940 } hdr; 941 942 __le16 tag; 943 __le16 len; 944 945 bool smesh; 946 u8 bssid; 947 u8 index; 948 u8 entry_add; 949 u8 addr[ETH_ALEN]; 950 u8 __rsv[2]; 951 } __packed req = { 952 .hdr.band = mlink->band_idx, 953 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 954 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 955 .smesh = false, 956 .index = idx * 2 + bssid, 957 .entry_add = true, 958 }; 959 960 if (enable) 961 memcpy(req.addr, addr, ETH_ALEN); 962 963 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 964 sizeof(req), true); 965 } 966 967 static void 968 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 969 { 970 struct bss_ifs_time_tlv *ifs_time; 971 struct tlv *tlv; 972 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 973 974 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 975 976 ifs_time = (struct bss_ifs_time_tlv *)tlv; 977 ifs_time->slot_valid = true; 978 ifs_time->sifs_valid = true; 979 ifs_time->rifs_valid = true; 980 ifs_time->eifs_valid = true; 981 982 ifs_time->slot_time = cpu_to_le16(phy->slottime); 983 ifs_time->sifs_time = cpu_to_le16(10); 984 ifs_time->rifs_time = cpu_to_le16(2); 985 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 986 987 if (is_2ghz) { 988 ifs_time->eifs_cck_valid = true; 989 ifs_time->eifs_cck_time = cpu_to_le16(314); 990 } 991 } 992 993 static int 994 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 995 struct ieee80211_vif *vif, 996 struct ieee80211_bss_conf *link_conf, 997 struct mt76_vif_link *mvif, 998 struct mt76_phy *phy, u16 wlan_idx, 999 bool enable) 1000 { 1001 struct cfg80211_chan_def *chandef = &phy->chandef; 1002 struct mt76_connac_bss_basic_tlv *bss; 1003 u32 type = CONNECTION_INFRA_AP; 1004 u16 sta_wlan_idx = wlan_idx; 1005 struct ieee80211_sta *sta; 1006 struct tlv *tlv; 1007 int idx; 1008 1009 switch (vif->type) { 1010 case NL80211_IFTYPE_MESH_POINT: 1011 case NL80211_IFTYPE_AP: 1012 case NL80211_IFTYPE_MONITOR: 1013 break; 1014 case NL80211_IFTYPE_STATION: 1015 if (enable) { 1016 rcu_read_lock(); 1017 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 1018 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 1019 if (sta) { 1020 struct mt76_wcid *wcid; 1021 1022 wcid = (struct mt76_wcid *)sta->drv_priv; 1023 sta_wlan_idx = wcid->idx; 1024 } 1025 rcu_read_unlock(); 1026 } 1027 type = CONNECTION_INFRA_STA; 1028 break; 1029 case NL80211_IFTYPE_ADHOC: 1030 type = CONNECTION_IBSS_ADHOC; 1031 break; 1032 default: 1033 WARN_ON(1); 1034 break; 1035 } 1036 1037 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 1038 1039 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 1040 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1041 bss->dtim_period = link_conf->dtim_period; 1042 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 1043 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 1044 bss->conn_type = cpu_to_le32(type); 1045 bss->omac_idx = mvif->omac_idx; 1046 bss->band_idx = mvif->band_idx; 1047 bss->wmm_idx = mvif->wmm_idx; 1048 bss->conn_state = !enable; 1049 bss->active = enable; 1050 1051 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1052 bss->hw_bss_idx = idx; 1053 1054 if (vif->type == NL80211_IFTYPE_MONITOR) { 1055 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 1056 return 0; 1057 } 1058 1059 memcpy(bss->bssid, link_conf->bssid, ETH_ALEN); 1060 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1061 bss->dtim_period = vif->bss_conf.dtim_period; 1062 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 1063 chandef->chan->band, NULL); 1064 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, &vif->bss_conf, 1065 chandef->chan->band); 1066 1067 return 0; 1068 } 1069 1070 static struct sk_buff * 1071 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len) 1072 { 1073 struct bss_req_hdr hdr = { 1074 .bss_idx = mvif->idx, 1075 }; 1076 struct sk_buff *skb; 1077 1078 skb = mt76_mcu_msg_alloc(dev, NULL, len); 1079 if (!skb) 1080 return ERR_PTR(-ENOMEM); 1081 1082 skb_put_data(skb, &hdr, sizeof(hdr)); 1083 1084 return skb; 1085 } 1086 1087 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1088 struct ieee80211_bss_conf *link_conf, 1089 struct mt76_vif_link *mlink, 1090 struct mt7996_sta_link *msta_link, int enable) 1091 { 1092 struct mt7996_dev *dev = phy->dev; 1093 struct sk_buff *skb; 1094 1095 if (mlink->omac_idx >= REPEATER_BSSID_START) { 1096 mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 1097 mt7996_mcu_muar_config(dev, mlink, link_conf->bssid, true, enable); 1098 } 1099 1100 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1101 MT7996_BSS_UPDATE_MAX_SIZE); 1102 if (IS_ERR(skb)) 1103 return PTR_ERR(skb); 1104 1105 /* bss_basic must be first */ 1106 mt7996_mcu_bss_basic_tlv(skb, vif, link_conf, mlink, phy->mt76, 1107 msta_link->wcid.idx, enable); 1108 mt7996_mcu_bss_sec_tlv(skb, mlink); 1109 1110 if (vif->type == NL80211_IFTYPE_MONITOR) 1111 goto out; 1112 1113 if (enable) { 1114 mt7996_mcu_bss_rfch_tlv(skb, phy); 1115 mt7996_mcu_bss_bmc_tlv(skb, mlink, phy); 1116 mt7996_mcu_bss_ra_tlv(skb, phy); 1117 mt7996_mcu_bss_txcmd_tlv(skb, true); 1118 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1119 1120 if (vif->bss_conf.he_support) 1121 mt7996_mcu_bss_he_tlv(skb, vif, link_conf, phy); 1122 1123 /* this tag is necessary no matter if the vif is MLD */ 1124 mt7996_mcu_bss_mld_tlv(skb, mlink); 1125 } 1126 1127 mt7996_mcu_bss_mbssid_tlv(skb, link_conf, enable); 1128 1129 out: 1130 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1131 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1132 } 1133 1134 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1135 struct ieee80211_bss_conf *link_conf) 1136 { 1137 struct mt7996_dev *dev = phy->dev; 1138 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 1139 struct sk_buff *skb; 1140 1141 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1142 MT7996_BSS_UPDATE_MAX_SIZE); 1143 if (IS_ERR(skb)) 1144 return PTR_ERR(skb); 1145 1146 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1147 1148 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1149 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1150 } 1151 1152 static int 1153 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif, 1154 struct ieee80211_ampdu_params *params, 1155 bool enable, bool tx) 1156 { 1157 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1158 struct sta_rec_ba_uni *ba; 1159 struct sk_buff *skb; 1160 struct tlv *tlv; 1161 1162 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid, 1163 MT7996_STA_UPDATE_MAX_SIZE); 1164 if (IS_ERR(skb)) 1165 return PTR_ERR(skb); 1166 1167 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1168 1169 ba = (struct sta_rec_ba_uni *)tlv; 1170 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1171 ba->winsize = cpu_to_le16(params->buf_size); 1172 ba->ssn = cpu_to_le16(params->ssn); 1173 ba->ba_en = enable << params->tid; 1174 ba->amsdu = params->amsdu; 1175 ba->tid = params->tid; 1176 ba->ba_rdd_rro = !tx && enable && dev->has_rro; 1177 1178 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1179 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1180 } 1181 1182 /** starec & wtbl **/ 1183 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 1184 struct ieee80211_ampdu_params *params, 1185 struct mt7996_vif_link *link, 1186 struct mt7996_sta_link *msta_link, bool enable) 1187 { 1188 if (enable && !params->amsdu) 1189 msta_link->wcid.amsdu = false; 1190 1191 return mt7996_mcu_sta_ba(dev, &link->mt76, params, enable, true); 1192 } 1193 1194 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1195 struct ieee80211_ampdu_params *params, 1196 struct mt7996_vif_link *link, bool enable) 1197 { 1198 return mt7996_mcu_sta_ba(dev, &link->mt76, params, enable, false); 1199 } 1200 1201 static void 1202 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, 1203 struct ieee80211_link_sta *link_sta, 1204 struct mt7996_vif_link *link) 1205 { 1206 struct ieee80211_he_cap_elem *elem = &link_sta->he_cap.he_cap_elem; 1207 struct ieee80211_he_mcs_nss_supp mcs_map; 1208 struct sta_rec_he_v2 *he; 1209 struct tlv *tlv; 1210 int i = 0; 1211 1212 if (!link_sta->he_cap.has_he) 1213 return; 1214 1215 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1216 1217 he = (struct sta_rec_he_v2 *)tlv; 1218 for (i = 0; i < 11; i++) { 1219 if (i < 6) 1220 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1221 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1222 } 1223 1224 mcs_map = link_sta->he_cap.he_mcs_nss_supp; 1225 switch (link_sta->bandwidth) { 1226 case IEEE80211_STA_RX_BW_160: 1227 if (elem->phy_cap_info[0] & 1228 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1229 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1230 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1231 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1232 1233 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1234 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1235 le16_to_cpu(mcs_map.rx_mcs_160)); 1236 fallthrough; 1237 default: 1238 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1239 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1240 le16_to_cpu(mcs_map.rx_mcs_80)); 1241 break; 1242 } 1243 1244 he->pkt_ext = 2; 1245 } 1246 1247 static void 1248 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, 1249 struct ieee80211_link_sta *link_sta) 1250 { 1251 struct sta_rec_he_6g_capa *he_6g; 1252 struct tlv *tlv; 1253 1254 if (!link_sta->he_6ghz_capa.capa) 1255 return; 1256 1257 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1258 1259 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1260 he_6g->capa = link_sta->he_6ghz_capa.capa; 1261 } 1262 1263 static void 1264 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, 1265 struct ieee80211_link_sta *link_sta) 1266 { 1267 struct mt7996_sta *msta = (struct mt7996_sta *)link_sta->sta->drv_priv; 1268 struct ieee80211_vif *vif = container_of((void *)msta->vif, 1269 struct ieee80211_vif, drv_priv); 1270 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1271 struct ieee80211_eht_cap_elem_fixed *elem; 1272 struct sta_rec_eht *eht; 1273 struct tlv *tlv; 1274 1275 if (!link_sta->eht_cap.has_eht) 1276 return; 1277 1278 mcs_map = &link_sta->eht_cap.eht_mcs_nss_supp; 1279 elem = &link_sta->eht_cap.eht_cap_elem; 1280 1281 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1282 1283 eht = (struct sta_rec_eht *)tlv; 1284 eht->tid_bitmap = 0xff; 1285 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1286 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1287 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1288 1289 if (vif->type != NL80211_IFTYPE_STATION && 1290 (link_sta->he_cap.he_cap_elem.phy_cap_info[0] & 1291 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1292 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1293 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1294 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1295 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1296 sizeof(eht->mcs_map_bw20)); 1297 return; 1298 } 1299 1300 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1301 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1302 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1303 } 1304 1305 static void 1306 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_link_sta *link_sta) 1307 { 1308 struct sta_rec_ht_uni *ht; 1309 struct tlv *tlv; 1310 1311 if (!link_sta->ht_cap.ht_supported) 1312 return; 1313 1314 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1315 1316 ht = (struct sta_rec_ht_uni *)tlv; 1317 ht->ht_cap = cpu_to_le16(link_sta->ht_cap.cap); 1318 ht->ampdu_param = u8_encode_bits(link_sta->ht_cap.ampdu_factor, 1319 IEEE80211_HT_AMPDU_PARM_FACTOR) | 1320 u8_encode_bits(link_sta->ht_cap.ampdu_density, 1321 IEEE80211_HT_AMPDU_PARM_DENSITY); 1322 } 1323 1324 static void 1325 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_link_sta *link_sta) 1326 { 1327 struct sta_rec_vht *vht; 1328 struct tlv *tlv; 1329 1330 /* For 6G band, this tlv is necessary to let hw work normally */ 1331 if (!link_sta->he_6ghz_capa.capa && !link_sta->vht_cap.vht_supported) 1332 return; 1333 1334 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1335 1336 vht = (struct sta_rec_vht *)tlv; 1337 vht->vht_cap = cpu_to_le32(link_sta->vht_cap.cap); 1338 vht->vht_rx_mcs_map = link_sta->vht_cap.vht_mcs.rx_mcs_map; 1339 vht->vht_tx_mcs_map = link_sta->vht_cap.vht_mcs.tx_mcs_map; 1340 } 1341 1342 static void 1343 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1344 struct ieee80211_vif *vif, 1345 struct ieee80211_link_sta *link_sta, 1346 struct mt7996_sta_link *msta_link) 1347 { 1348 struct sta_rec_amsdu *amsdu; 1349 struct tlv *tlv; 1350 1351 if (vif->type != NL80211_IFTYPE_STATION && 1352 vif->type != NL80211_IFTYPE_MESH_POINT && 1353 vif->type != NL80211_IFTYPE_AP) 1354 return; 1355 1356 if (!link_sta->agg.max_amsdu_len) 1357 return; 1358 1359 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1360 amsdu = (struct sta_rec_amsdu *)tlv; 1361 amsdu->max_amsdu_num = 8; 1362 amsdu->amsdu_en = true; 1363 msta_link->wcid.amsdu = true; 1364 1365 switch (link_sta->agg.max_amsdu_len) { 1366 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1367 amsdu->max_mpdu_size = 1368 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1369 return; 1370 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1371 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1372 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1373 return; 1374 default: 1375 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1376 return; 1377 } 1378 } 1379 1380 static void 1381 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1382 struct ieee80211_bss_conf *link_conf, 1383 struct ieee80211_link_sta *link_sta) 1384 { 1385 struct ieee80211_he_cap_elem *elem = &link_sta->he_cap.he_cap_elem; 1386 struct sta_rec_muru *muru; 1387 struct tlv *tlv; 1388 1389 if (link_conf->vif->type != NL80211_IFTYPE_STATION && 1390 link_conf->vif->type != NL80211_IFTYPE_AP) 1391 return; 1392 1393 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1394 1395 muru = (struct sta_rec_muru *)tlv; 1396 muru->cfg.mimo_dl_en = link_conf->eht_mu_beamformer || 1397 link_conf->he_mu_beamformer || 1398 link_conf->vht_mu_beamformer || 1399 link_conf->vht_mu_beamformee; 1400 muru->cfg.ofdma_dl_en = true; 1401 1402 if (link_sta->vht_cap.vht_supported) 1403 muru->mimo_dl.vht_mu_bfee = 1404 !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1405 1406 if (!link_sta->he_cap.has_he) 1407 return; 1408 1409 muru->mimo_dl.partial_bw_dl_mimo = 1410 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1411 1412 muru->mimo_ul.full_ul_mimo = 1413 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1414 muru->mimo_ul.partial_ul_mimo = 1415 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1416 1417 muru->ofdma_dl.punc_pream_rx = 1418 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1419 muru->ofdma_dl.he_20m_in_40m_2g = 1420 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1421 muru->ofdma_dl.he_20m_in_160m = 1422 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1423 muru->ofdma_dl.he_80m_in_160m = 1424 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1425 1426 muru->ofdma_ul.t_frame_dur = 1427 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1428 muru->ofdma_ul.mu_cascading = 1429 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1430 muru->ofdma_ul.uo_ra = 1431 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1432 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1433 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1434 } 1435 1436 static inline bool 1437 mt7996_is_ebf_supported(struct mt7996_phy *phy, 1438 struct ieee80211_bss_conf *link_conf, 1439 struct ieee80211_link_sta *link_sta, bool bfee) 1440 { 1441 int sts = hweight16(phy->mt76->chainmask); 1442 1443 if (link_conf->vif->type != NL80211_IFTYPE_STATION && 1444 link_conf->vif->type != NL80211_IFTYPE_AP) 1445 return false; 1446 1447 if (!bfee && sts < 2) 1448 return false; 1449 1450 if (link_sta->eht_cap.has_eht) { 1451 struct ieee80211_sta_eht_cap *pc = &link_sta->eht_cap; 1452 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1453 1454 if (bfee) 1455 return link_conf->eht_su_beamformee && 1456 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1457 else 1458 return link_conf->eht_su_beamformer && 1459 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1460 } 1461 1462 if (link_sta->he_cap.has_he) { 1463 struct ieee80211_he_cap_elem *pe = &link_sta->he_cap.he_cap_elem; 1464 1465 if (bfee) 1466 return link_conf->he_su_beamformee && 1467 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1468 else 1469 return link_conf->he_su_beamformer && 1470 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1471 } 1472 1473 if (link_sta->vht_cap.vht_supported) { 1474 u32 cap = link_sta->vht_cap.cap; 1475 1476 if (bfee) 1477 return link_conf->vht_su_beamformee && 1478 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1479 else 1480 return link_conf->vht_su_beamformer && 1481 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1482 } 1483 1484 return false; 1485 } 1486 1487 static void 1488 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf, struct mt7996_phy *phy) 1489 { 1490 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1491 bf->ndp_rate = 0; /* mcs0 */ 1492 if (is_mt7996(phy->mt76->dev)) 1493 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1494 else 1495 bf->ndpa_rate = MT7992_CFEND_RATE_DEFAULT; /* ofdm 6m */ 1496 1497 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1498 } 1499 1500 static void 1501 mt7996_mcu_sta_bfer_ht(struct ieee80211_link_sta *link_sta, 1502 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1503 bool explicit) 1504 { 1505 struct ieee80211_mcs_info *mcs = &link_sta->ht_cap.mcs; 1506 u8 n = 0; 1507 1508 bf->tx_mode = MT_PHY_TYPE_HT; 1509 1510 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1511 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1512 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1513 mcs->tx_params); 1514 else if (mcs->rx_mask[3]) 1515 n = 3; 1516 else if (mcs->rx_mask[2]) 1517 n = 2; 1518 else if (mcs->rx_mask[1]) 1519 n = 1; 1520 1521 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1522 bf->ncol = min_t(u8, bf->nrow, n); 1523 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1524 min_t(u8, MT7996_IBF_MAX_NC, n); 1525 } 1526 1527 static void 1528 mt7996_mcu_sta_bfer_vht(struct ieee80211_link_sta *link_sta, 1529 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1530 bool explicit) 1531 { 1532 struct ieee80211_sta_vht_cap *pc = &link_sta->vht_cap; 1533 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1534 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1535 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1536 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1537 1538 bf->tx_mode = MT_PHY_TYPE_VHT; 1539 1540 if (explicit) { 1541 u8 sts, snd_dim; 1542 1543 mt7996_mcu_sta_sounding_rate(bf, phy); 1544 1545 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1546 pc->cap); 1547 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1548 vc->cap); 1549 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1550 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1551 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, bf->ncol); 1552 1553 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_160) 1554 bf->nrow = 1; 1555 } else { 1556 bf->nrow = tx_ant; 1557 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1558 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1559 1560 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_160) 1561 bf->ibf_nrow = 1; 1562 } 1563 } 1564 1565 static void 1566 mt7996_mcu_sta_bfer_he(struct ieee80211_link_sta *link_sta, 1567 struct ieee80211_vif *vif, struct mt7996_phy *phy, 1568 struct sta_rec_bf *bf, bool explicit) 1569 { 1570 struct ieee80211_sta_he_cap *pc = &link_sta->he_cap; 1571 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1572 const struct ieee80211_sta_he_cap *vc = 1573 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1574 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1575 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1576 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1577 u8 snd_dim, sts; 1578 1579 if (!vc) 1580 return; 1581 1582 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1583 1584 mt7996_mcu_sta_sounding_rate(bf, phy); 1585 1586 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1587 pe->phy_cap_info[6]); 1588 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1589 pe->phy_cap_info[6]); 1590 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1591 ve->phy_cap_info[5]); 1592 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1593 pe->phy_cap_info[4]); 1594 bf->nrow = min_t(u8, snd_dim, sts); 1595 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1596 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1597 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1598 1599 if (link_sta->bandwidth != IEEE80211_STA_RX_BW_160) 1600 return; 1601 1602 /* go over for 160MHz and 80p80 */ 1603 if (pe->phy_cap_info[0] & 1604 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1605 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1606 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1607 1608 bf->ncol_gt_bw80 = nss_mcs; 1609 } 1610 1611 if (pe->phy_cap_info[0] & 1612 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1613 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1614 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1615 1616 if (bf->ncol_gt_bw80) 1617 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1618 else 1619 bf->ncol_gt_bw80 = nss_mcs; 1620 } 1621 1622 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1623 ve->phy_cap_info[5]); 1624 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1625 pe->phy_cap_info[4]); 1626 1627 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1628 } 1629 1630 static void 1631 mt7996_mcu_sta_bfer_eht(struct ieee80211_link_sta *link_sta, 1632 struct ieee80211_vif *vif, struct mt7996_phy *phy, 1633 struct sta_rec_bf *bf, bool explicit) 1634 { 1635 struct ieee80211_sta_eht_cap *pc = &link_sta->eht_cap; 1636 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1637 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1638 const struct ieee80211_sta_eht_cap *vc = 1639 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1640 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1641 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1642 IEEE80211_EHT_MCS_NSS_RX) - 1; 1643 u8 snd_dim, sts; 1644 1645 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1646 1647 mt7996_mcu_sta_sounding_rate(bf, phy); 1648 1649 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1650 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1651 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1652 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1653 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1654 bf->nrow = min_t(u8, snd_dim, sts); 1655 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1656 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1657 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1658 1659 if (link_sta->bandwidth < IEEE80211_STA_RX_BW_160) 1660 return; 1661 1662 switch (link_sta->bandwidth) { 1663 case IEEE80211_STA_RX_BW_160: 1664 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1665 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1666 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1667 IEEE80211_EHT_MCS_NSS_RX) - 1; 1668 1669 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1670 bf->ncol_gt_bw80 = nss_mcs; 1671 break; 1672 case IEEE80211_STA_RX_BW_320: 1673 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1674 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1675 ve->phy_cap_info[3]) << 1); 1676 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1677 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1678 IEEE80211_EHT_MCS_NSS_RX) - 1; 1679 1680 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1681 bf->ncol_gt_bw80 = nss_mcs << 4; 1682 break; 1683 default: 1684 break; 1685 } 1686 } 1687 1688 static void 1689 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1690 struct ieee80211_bss_conf *link_conf, 1691 struct ieee80211_link_sta *link_sta, 1692 struct mt7996_vif_link *link) 1693 { 1694 #define EBF_MODE BIT(0) 1695 #define IBF_MODE BIT(1) 1696 #define BF_MAT_ORDER 4 1697 struct ieee80211_vif *vif = link_conf->vif; 1698 struct mt7996_phy *phy = link->phy; 1699 int tx_ant = hweight16(phy->mt76->chainmask) - 1; 1700 struct sta_rec_bf *bf; 1701 struct tlv *tlv; 1702 static const u8 matrix[BF_MAT_ORDER][BF_MAT_ORDER] = { 1703 {0, 0, 0, 0}, 1704 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1705 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1706 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1707 }; 1708 bool ebf; 1709 1710 if (!(link_sta->ht_cap.ht_supported || link_sta->he_cap.has_he)) 1711 return; 1712 1713 ebf = mt7996_is_ebf_supported(phy, link_conf, link_sta, false); 1714 if (!ebf && !dev->ibf) 1715 return; 1716 1717 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1718 bf = (struct sta_rec_bf *)tlv; 1719 1720 /* he/eht: eBF only, except mt7992 that has 5T on 5GHz also supports iBF 1721 * vht: support eBF and iBF 1722 * ht: iBF only, since mac80211 lacks of eBF support 1723 */ 1724 if (link_sta->eht_cap.has_eht) 1725 mt7996_mcu_sta_bfer_eht(link_sta, vif, link->phy, bf, ebf); 1726 else if (link_sta->he_cap.has_he) 1727 mt7996_mcu_sta_bfer_he(link_sta, vif, link->phy, bf, ebf); 1728 else if (link_sta->vht_cap.vht_supported) 1729 mt7996_mcu_sta_bfer_vht(link_sta, link->phy, bf, ebf); 1730 else if (link_sta->ht_cap.ht_supported) 1731 mt7996_mcu_sta_bfer_ht(link_sta, link->phy, bf, ebf); 1732 else 1733 return; 1734 1735 bf->bf_cap = ebf ? EBF_MODE : (dev->ibf ? IBF_MODE : 0); 1736 if (is_mt7992(&dev->mt76) && tx_ant == 4) 1737 bf->bf_cap |= IBF_MODE; 1738 1739 bf->bw = link_sta->bandwidth; 1740 bf->ibf_dbw = link_sta->bandwidth; 1741 bf->ibf_nrow = tx_ant; 1742 1743 if (link_sta->eht_cap.has_eht || link_sta->he_cap.has_he) 1744 bf->ibf_timeout = is_mt7996(&dev->mt76) ? MT7996_IBF_TIMEOUT : 1745 MT7992_IBF_TIMEOUT; 1746 else if (!ebf && link_sta->bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1747 bf->ibf_timeout = MT7996_IBF_TIMEOUT_LEGACY; 1748 else 1749 bf->ibf_timeout = MT7996_IBF_TIMEOUT; 1750 1751 if (bf->ncol < BF_MAT_ORDER) { 1752 if (ebf) 1753 bf->mem_20m = tx_ant < BF_MAT_ORDER ? 1754 matrix[tx_ant][bf->ncol] : 0; 1755 else 1756 bf->mem_20m = bf->nrow < BF_MAT_ORDER ? 1757 matrix[bf->nrow][bf->ncol] : 0; 1758 } 1759 1760 switch (link_sta->bandwidth) { 1761 case IEEE80211_STA_RX_BW_160: 1762 case IEEE80211_STA_RX_BW_80: 1763 bf->mem_total = bf->mem_20m * 2; 1764 break; 1765 case IEEE80211_STA_RX_BW_40: 1766 bf->mem_total = bf->mem_20m; 1767 break; 1768 case IEEE80211_STA_RX_BW_20: 1769 default: 1770 break; 1771 } 1772 } 1773 1774 static void 1775 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1776 struct ieee80211_bss_conf *link_conf, 1777 struct ieee80211_link_sta *link_sta, 1778 struct mt7996_vif_link *link) 1779 { 1780 struct mt7996_phy *phy = link->phy; 1781 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1782 struct sta_rec_bfee *bfee; 1783 struct tlv *tlv; 1784 u8 nrow = 0; 1785 1786 if (!(link_sta->vht_cap.vht_supported || link_sta->he_cap.has_he)) 1787 return; 1788 1789 if (!mt7996_is_ebf_supported(phy, link_conf, link_sta, true)) 1790 return; 1791 1792 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1793 bfee = (struct sta_rec_bfee *)tlv; 1794 1795 if (link_sta->he_cap.has_he) { 1796 struct ieee80211_he_cap_elem *pe = &link_sta->he_cap.he_cap_elem; 1797 1798 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1799 pe->phy_cap_info[5]); 1800 } else if (link_sta->vht_cap.vht_supported) { 1801 struct ieee80211_sta_vht_cap *pc = &link_sta->vht_cap; 1802 1803 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1804 pc->cap); 1805 } 1806 1807 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1808 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1809 } 1810 1811 static void 1812 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb) 1813 { 1814 struct sta_rec_tx_proc *tx_proc; 1815 struct tlv *tlv; 1816 1817 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc)); 1818 1819 tx_proc = (struct sta_rec_tx_proc *)tlv; 1820 tx_proc->flag = cpu_to_le32(0); 1821 } 1822 1823 static void 1824 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1825 { 1826 struct sta_rec_hdrt *hdrt; 1827 struct tlv *tlv; 1828 1829 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1830 1831 hdrt = (struct sta_rec_hdrt *)tlv; 1832 hdrt->hdrt_mode = 1; 1833 } 1834 1835 static void 1836 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1837 struct ieee80211_vif *vif, struct mt76_wcid *wcid) 1838 { 1839 struct sta_rec_hdr_trans *hdr_trans; 1840 struct tlv *tlv; 1841 1842 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1843 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1844 hdr_trans->dis_rx_hdr_tran = true; 1845 1846 if (vif->type == NL80211_IFTYPE_STATION) 1847 hdr_trans->to_ds = true; 1848 else 1849 hdr_trans->from_ds = true; 1850 1851 if (!wcid) 1852 return; 1853 1854 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1855 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1856 hdr_trans->to_ds = true; 1857 hdr_trans->from_ds = true; 1858 } 1859 1860 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1861 hdr_trans->to_ds = true; 1862 hdr_trans->from_ds = true; 1863 hdr_trans->mesh = true; 1864 } 1865 } 1866 1867 static enum mcu_mmps_mode 1868 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1869 { 1870 switch (smps) { 1871 case IEEE80211_SMPS_OFF: 1872 return MCU_MMPS_DISABLE; 1873 case IEEE80211_SMPS_STATIC: 1874 return MCU_MMPS_STATIC; 1875 case IEEE80211_SMPS_DYNAMIC: 1876 return MCU_MMPS_DYNAMIC; 1877 default: 1878 return MCU_MMPS_DISABLE; 1879 } 1880 } 1881 1882 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1883 void *data, u16 version) 1884 { 1885 struct ra_fixed_rate *req; 1886 struct uni_header hdr; 1887 struct sk_buff *skb; 1888 struct tlv *tlv; 1889 int len; 1890 1891 len = sizeof(hdr) + sizeof(*req); 1892 1893 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1894 if (!skb) 1895 return -ENOMEM; 1896 1897 skb_put_data(skb, &hdr, sizeof(hdr)); 1898 1899 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1900 req = (struct ra_fixed_rate *)tlv; 1901 req->version = cpu_to_le16(version); 1902 memcpy(&req->rate, data, sizeof(req->rate)); 1903 1904 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1905 MCU_WM_UNI_CMD(RA), true); 1906 } 1907 1908 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, 1909 struct ieee80211_link_sta *link_sta, 1910 struct mt7996_vif_link *link, 1911 struct mt7996_sta_link *msta_link, 1912 void *data, u32 field) 1913 { 1914 struct sta_phy_uni *phy = data; 1915 struct sta_rec_ra_fixed_uni *ra; 1916 struct sk_buff *skb; 1917 struct tlv *tlv; 1918 1919 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 1920 &msta_link->wcid, 1921 MT7996_STA_UPDATE_MAX_SIZE); 1922 if (IS_ERR(skb)) 1923 return PTR_ERR(skb); 1924 1925 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1926 ra = (struct sta_rec_ra_fixed_uni *)tlv; 1927 1928 switch (field) { 1929 case RATE_PARAM_AUTO: 1930 break; 1931 case RATE_PARAM_FIXED: 1932 case RATE_PARAM_FIXED_MCS: 1933 case RATE_PARAM_FIXED_GI: 1934 case RATE_PARAM_FIXED_HE_LTF: 1935 if (phy) 1936 ra->phy = *phy; 1937 break; 1938 case RATE_PARAM_MMPS_UPDATE: 1939 ra->mmps_mode = mt7996_mcu_get_mmps_mode(link_sta->smps_mode); 1940 break; 1941 default: 1942 break; 1943 } 1944 ra->field = cpu_to_le32(field); 1945 1946 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1947 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1948 } 1949 1950 static int 1951 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, 1952 struct ieee80211_link_sta *link_sta, 1953 struct mt7996_vif_link *link, 1954 struct mt7996_sta_link *msta_link) 1955 { 1956 struct cfg80211_chan_def *chandef = &link->phy->mt76->chandef; 1957 struct cfg80211_bitrate_mask *mask = &link->bitrate_mask; 1958 enum nl80211_band band = chandef->chan->band; 1959 struct sta_phy_uni phy = {}; 1960 int ret, nrates = 0; 1961 1962 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1963 do { \ 1964 u8 i, gi = mask->control[band]._gi; \ 1965 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1966 phy.sgi = gi; \ 1967 phy.he_ltf = mask->control[band].he_ltf; \ 1968 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1969 if (!mask->control[band]._mcs[i]) \ 1970 continue; \ 1971 nrates += hweight16(mask->control[band]._mcs[i]); \ 1972 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1973 if (_ht) \ 1974 phy.mcs += 8 * i; \ 1975 } \ 1976 } while (0) 1977 1978 if (link_sta->he_cap.has_he) { 1979 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1980 } else if (link_sta->vht_cap.vht_supported) { 1981 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1982 } else if (link_sta->ht_cap.ht_supported) { 1983 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1984 } else { 1985 nrates = hweight32(mask->control[band].legacy); 1986 phy.mcs = ffs(mask->control[band].legacy) - 1; 1987 } 1988 #undef __sta_phy_bitrate_mask_check 1989 1990 /* fall back to auto rate control */ 1991 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1992 mask->control[band].he_gi == GENMASK(7, 0) && 1993 mask->control[band].he_ltf == GENMASK(7, 0) && 1994 nrates != 1) 1995 return 0; 1996 1997 /* fixed single rate */ 1998 if (nrates == 1) { 1999 ret = mt7996_mcu_set_fixed_field(dev, link_sta, link, 2000 msta_link, &phy, 2001 RATE_PARAM_FIXED_MCS); 2002 if (ret) 2003 return ret; 2004 } 2005 2006 /* fixed GI */ 2007 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 2008 mask->control[band].he_gi != GENMASK(7, 0)) { 2009 u32 addr; 2010 2011 /* firmware updates only TXCMD but doesn't take WTBL into 2012 * account, so driver should update here to reflect the 2013 * actual txrate hardware sends out. 2014 */ 2015 addr = mt7996_mac_wtbl_lmac_addr(dev, msta_link->wcid.idx, 7); 2016 if (link_sta->he_cap.has_he) 2017 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 2018 else 2019 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 2020 2021 ret = mt7996_mcu_set_fixed_field(dev, link_sta, link, 2022 msta_link, &phy, 2023 RATE_PARAM_FIXED_GI); 2024 if (ret) 2025 return ret; 2026 } 2027 2028 /* fixed HE_LTF */ 2029 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 2030 ret = mt7996_mcu_set_fixed_field(dev, link_sta, link, 2031 msta_link, &phy, 2032 RATE_PARAM_FIXED_HE_LTF); 2033 if (ret) 2034 return ret; 2035 } 2036 2037 return 0; 2038 } 2039 2040 static void 2041 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 2042 struct ieee80211_vif *vif, 2043 struct ieee80211_bss_conf *link_conf, 2044 struct ieee80211_link_sta *link_sta, 2045 struct mt7996_vif_link *link) 2046 { 2047 #define INIT_RCPI 180 2048 struct mt76_phy *mphy = link->phy->mt76; 2049 struct cfg80211_chan_def *chandef = &mphy->chandef; 2050 struct cfg80211_bitrate_mask *mask = &link->bitrate_mask; 2051 u32 cap = link_sta->sta->wme ? STA_CAP_WMM : 0; 2052 enum nl80211_band band = chandef->chan->band; 2053 struct sta_rec_ra_uni *ra; 2054 struct tlv *tlv; 2055 u32 supp_rate = link_sta->supp_rates[band]; 2056 2057 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 2058 ra = (struct sta_rec_ra_uni *)tlv; 2059 2060 ra->valid = true; 2061 ra->auto_rate = true; 2062 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, link_sta); 2063 ra->channel = chandef->chan->hw_value; 2064 ra->bw = (link_sta->bandwidth == IEEE80211_STA_RX_BW_320) ? 2065 CMD_CBW_320MHZ : link_sta->bandwidth; 2066 ra->phy.bw = ra->bw; 2067 ra->mmps_mode = mt7996_mcu_get_mmps_mode(link_sta->smps_mode); 2068 2069 if (supp_rate) { 2070 supp_rate &= mask->control[band].legacy; 2071 ra->rate_len = hweight32(supp_rate); 2072 2073 if (band == NL80211_BAND_2GHZ) { 2074 ra->supp_mode = MODE_CCK; 2075 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 2076 2077 if (ra->rate_len > 4) { 2078 ra->supp_mode |= MODE_OFDM; 2079 ra->supp_ofdm_rate = supp_rate >> 4; 2080 } 2081 } else { 2082 ra->supp_mode = MODE_OFDM; 2083 ra->supp_ofdm_rate = supp_rate; 2084 } 2085 } 2086 2087 if (link_sta->ht_cap.ht_supported) { 2088 ra->supp_mode |= MODE_HT; 2089 ra->af = link_sta->ht_cap.ampdu_factor; 2090 ra->ht_gf = !!(link_sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 2091 2092 cap |= STA_CAP_HT; 2093 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2094 cap |= STA_CAP_SGI_20; 2095 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2096 cap |= STA_CAP_SGI_40; 2097 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 2098 cap |= STA_CAP_TX_STBC; 2099 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 2100 cap |= STA_CAP_RX_STBC; 2101 if (link_conf->ht_ldpc && 2102 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 2103 cap |= STA_CAP_LDPC; 2104 2105 mt7996_mcu_set_sta_ht_mcs(link_sta, ra->ht_mcs, 2106 mask->control[band].ht_mcs); 2107 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 2108 } 2109 2110 if (link_sta->vht_cap.vht_supported) { 2111 u8 af; 2112 2113 ra->supp_mode |= MODE_VHT; 2114 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 2115 link_sta->vht_cap.cap); 2116 ra->af = max_t(u8, ra->af, af); 2117 2118 cap |= STA_CAP_VHT; 2119 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2120 cap |= STA_CAP_VHT_SGI_80; 2121 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2122 cap |= STA_CAP_VHT_SGI_160; 2123 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 2124 cap |= STA_CAP_VHT_TX_STBC; 2125 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 2126 cap |= STA_CAP_VHT_RX_STBC; 2127 if ((vif->type != NL80211_IFTYPE_AP || link_conf->vht_ldpc) && 2128 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 2129 cap |= STA_CAP_VHT_LDPC; 2130 2131 mt7996_mcu_set_sta_vht_mcs(link_sta, ra->supp_vht_mcs, 2132 mask->control[band].vht_mcs); 2133 } 2134 2135 if (link_sta->he_cap.has_he) { 2136 ra->supp_mode |= MODE_HE; 2137 cap |= STA_CAP_HE; 2138 2139 if (link_sta->he_6ghz_capa.capa) 2140 ra->af = le16_get_bits(link_sta->he_6ghz_capa.capa, 2141 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 2142 } 2143 ra->sta_cap = cpu_to_le32(cap); 2144 2145 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi)); 2146 } 2147 2148 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, 2149 struct ieee80211_vif *vif, 2150 struct ieee80211_bss_conf *link_conf, 2151 struct ieee80211_link_sta *link_sta, 2152 struct mt7996_vif_link *link, 2153 struct mt7996_sta_link *msta_link, bool changed) 2154 { 2155 struct sk_buff *skb; 2156 int ret; 2157 2158 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2159 &msta_link->wcid, 2160 MT7996_STA_UPDATE_MAX_SIZE); 2161 if (IS_ERR(skb)) 2162 return PTR_ERR(skb); 2163 2164 /* firmware rc algorithm refers to sta_rec_he for HE control. 2165 * once dev->rc_work changes the settings driver should also 2166 * update sta_rec_he here. 2167 */ 2168 if (changed) 2169 mt7996_mcu_sta_he_tlv(skb, link_sta, link); 2170 2171 /* sta_rec_ra accommodates BW, NSS and only MCS range format 2172 * i.e 0-{7,8,9} for VHT. 2173 */ 2174 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, link_conf, link_sta, link); 2175 2176 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2177 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2178 if (ret) 2179 return ret; 2180 2181 return mt7996_mcu_add_rate_ctrl_fixed(dev, link_sta, link, msta_link); 2182 } 2183 2184 static int 2185 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2186 struct ieee80211_sta *sta) 2187 { 2188 #define MT_STA_BSS_GROUP 1 2189 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2190 struct mt7996_sta_link *msta_link; 2191 struct mt7996_sta *msta; 2192 struct { 2193 u8 __rsv1[4]; 2194 2195 __le16 tag; 2196 __le16 len; 2197 __le16 wlan_idx; 2198 u8 __rsv2[2]; 2199 __le32 action; 2200 __le32 val; 2201 u8 __rsv3[8]; 2202 } __packed req = { 2203 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 2204 .len = cpu_to_le16(sizeof(req) - 4), 2205 .action = cpu_to_le32(MT_STA_BSS_GROUP), 2206 .val = cpu_to_le32(mvif->deflink.mt76.idx % 16), 2207 }; 2208 2209 msta = sta ? (struct mt7996_sta *)sta->drv_priv : NULL; 2210 msta_link = msta ? &msta->deflink : &mvif->deflink.msta_link; 2211 req.wlan_idx = cpu_to_le16(msta_link->wcid.idx); 2212 2213 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 2214 sizeof(req), true); 2215 } 2216 2217 static void 2218 mt7996_mcu_sta_mld_setup_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2219 struct ieee80211_vif *vif, 2220 struct ieee80211_sta *sta) 2221 { 2222 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2223 unsigned int nlinks = hweight16(sta->valid_links); 2224 struct mld_setup_link *mld_setup_link; 2225 struct ieee80211_link_sta *link_sta; 2226 struct sta_rec_mld_setup *mld_setup; 2227 struct mt7996_sta_link *msta_link; 2228 unsigned int link_id; 2229 struct tlv *tlv; 2230 2231 msta_link = mt76_dereference(msta->link[msta->deflink_id], &dev->mt76); 2232 if (!msta_link) 2233 return; 2234 2235 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MLD, 2236 sizeof(struct sta_rec_mld_setup) + 2237 sizeof(struct mld_setup_link) * nlinks); 2238 2239 mld_setup = (struct sta_rec_mld_setup *)tlv; 2240 memcpy(mld_setup->mld_addr, sta->addr, ETH_ALEN); 2241 mld_setup->setup_wcid = cpu_to_le16(msta_link->wcid.idx); 2242 mld_setup->primary_id = cpu_to_le16(msta_link->wcid.idx); 2243 2244 if (nlinks > 1) { 2245 link_id = __ffs(sta->valid_links & ~BIT(msta->deflink_id)); 2246 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 2247 if (!msta_link) 2248 return; 2249 } 2250 mld_setup->seconed_id = cpu_to_le16(msta_link->wcid.idx); 2251 mld_setup->link_num = nlinks; 2252 2253 mld_setup_link = (struct mld_setup_link *)mld_setup->link_info; 2254 for_each_sta_active_link(vif, sta, link_sta, link_id) { 2255 struct mt7996_vif_link *link; 2256 2257 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 2258 if (!msta_link) 2259 continue; 2260 2261 link = mt7996_vif_link(dev, vif, link_id); 2262 if (!link) 2263 continue; 2264 2265 mld_setup_link->wcid = cpu_to_le16(msta_link->wcid.idx); 2266 mld_setup_link->bss_idx = link->mt76.idx; 2267 mld_setup_link++; 2268 } 2269 } 2270 2271 static void 2272 mt7996_mcu_sta_eht_mld_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2273 struct ieee80211_sta *sta) 2274 { 2275 struct sta_rec_eht_mld *eht_mld; 2276 struct tlv *tlv; 2277 int i; 2278 2279 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT_MLD, sizeof(*eht_mld)); 2280 eht_mld = (struct sta_rec_eht_mld *)tlv; 2281 2282 for (i = 0; i < ARRAY_SIZE(eht_mld->str_cap); i++) 2283 eht_mld->str_cap[i] = 0x7; 2284 } 2285 2286 int mt7996_mcu_add_sta(struct mt7996_dev *dev, 2287 struct ieee80211_bss_conf *link_conf, 2288 struct ieee80211_link_sta *link_sta, 2289 struct mt7996_vif_link *link, 2290 struct mt7996_sta_link *msta_link, 2291 int conn_state, bool newly) 2292 { 2293 struct mt76_wcid *wcid = msta_link ? &msta_link->wcid : link->mt76.wcid; 2294 struct ieee80211_sta *sta = link_sta ? link_sta->sta : NULL; 2295 struct sk_buff *skb; 2296 int ret; 2297 2298 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, wcid, 2299 MT7996_STA_UPDATE_MAX_SIZE); 2300 if (IS_ERR(skb)) 2301 return PTR_ERR(skb); 2302 2303 /* starec basic */ 2304 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, link_conf, link_sta, 2305 conn_state, newly); 2306 2307 if (conn_state == CONN_STATE_DISCONNECT) 2308 goto out; 2309 2310 /* starec hdr trans */ 2311 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, link_conf->vif, wcid); 2312 /* starec tx proc */ 2313 mt7996_mcu_sta_tx_proc_tlv(skb); 2314 2315 /* tag order is in accordance with firmware dependency. */ 2316 if (link_sta) { 2317 /* starec hdrt mode */ 2318 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2319 if (conn_state == CONN_STATE_CONNECT) { 2320 /* starec bfer */ 2321 mt7996_mcu_sta_bfer_tlv(dev, skb, link_conf, link_sta, 2322 link); 2323 /* starec bfee */ 2324 mt7996_mcu_sta_bfee_tlv(dev, skb, link_conf, link_sta, 2325 link); 2326 } 2327 /* starec ht */ 2328 mt7996_mcu_sta_ht_tlv(skb, link_sta); 2329 /* starec vht */ 2330 mt7996_mcu_sta_vht_tlv(skb, link_sta); 2331 /* starec uapsd */ 2332 mt76_connac_mcu_sta_uapsd(skb, link_conf->vif, sta); 2333 /* starec amsdu */ 2334 mt7996_mcu_sta_amsdu_tlv(dev, skb, link_conf->vif, link_sta, 2335 msta_link); 2336 /* starec he */ 2337 mt7996_mcu_sta_he_tlv(skb, link_sta, link); 2338 /* starec he 6g*/ 2339 mt7996_mcu_sta_he_6g_tlv(skb, link_sta); 2340 /* starec eht */ 2341 mt7996_mcu_sta_eht_tlv(skb, link_sta); 2342 /* starec muru */ 2343 mt7996_mcu_sta_muru_tlv(dev, skb, link_conf, link_sta); 2344 2345 if (sta->mlo) { 2346 mt7996_mcu_sta_mld_setup_tlv(dev, skb, link_conf->vif, 2347 sta); 2348 mt7996_mcu_sta_eht_mld_tlv(dev, skb, sta); 2349 } 2350 } 2351 2352 ret = mt7996_mcu_add_group(dev, link_conf->vif, sta); 2353 if (ret) { 2354 dev_kfree_skb(skb); 2355 return ret; 2356 } 2357 out: 2358 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2359 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2360 } 2361 2362 int mt7996_mcu_teardown_mld_sta(struct mt7996_dev *dev, 2363 struct mt7996_vif_link *link, 2364 struct mt7996_sta_link *msta_link) 2365 { 2366 struct sk_buff *skb; 2367 2368 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2369 &msta_link->wcid, 2370 MT7996_STA_UPDATE_MAX_SIZE); 2371 if (IS_ERR(skb)) 2372 return PTR_ERR(skb); 2373 2374 mt76_connac_mcu_add_tlv(skb, STA_REC_MLD_OFF, sizeof(struct tlv)); 2375 2376 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2377 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2378 } 2379 2380 static int 2381 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 2382 struct sk_buff *skb, 2383 struct ieee80211_key_conf *key, 2384 enum set_key_cmd cmd) 2385 { 2386 struct sta_rec_sec_uni *sec; 2387 struct tlv *tlv; 2388 2389 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2390 sec = (struct sta_rec_sec_uni *)tlv; 2391 sec->add = cmd; 2392 2393 if (cmd == SET_KEY) { 2394 struct sec_key_uni *sec_key; 2395 u8 cipher; 2396 2397 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2398 if (cipher == MCU_CIPHER_NONE) 2399 return -EOPNOTSUPP; 2400 2401 sec_key = &sec->key[0]; 2402 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2403 sec_key->mgmt_prot = 0; 2404 sec_key->cipher_id = cipher; 2405 sec_key->cipher_len = sizeof(*sec_key); 2406 sec_key->key_id = key->keyidx; 2407 sec_key->key_len = key->keylen; 2408 sec_key->need_resp = 0; 2409 memcpy(sec_key->key, key->key, key->keylen); 2410 2411 if (cipher == MCU_CIPHER_TKIP) { 2412 /* Rx/Tx MIC keys are swapped */ 2413 memcpy(sec_key->key + 16, key->key + 24, 8); 2414 memcpy(sec_key->key + 24, key->key + 16, 8); 2415 } 2416 2417 sec->n_cipher = 1; 2418 } else { 2419 sec->n_cipher = 0; 2420 } 2421 2422 return 0; 2423 } 2424 2425 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2426 struct ieee80211_key_conf *key, int mcu_cmd, 2427 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2428 { 2429 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2430 struct sk_buff *skb; 2431 int ret; 2432 2433 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 2434 MT7996_STA_UPDATE_MAX_SIZE); 2435 if (IS_ERR(skb)) 2436 return PTR_ERR(skb); 2437 2438 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd); 2439 if (ret) 2440 return ret; 2441 2442 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2443 } 2444 2445 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, 2446 struct mt7996_vif_link *link, 2447 struct mt7996_sta_link *msta_link, u8 *pn) 2448 { 2449 #define TSC_TYPE_BIGTK_PN 2 2450 struct sta_rec_pn_info *pn_info; 2451 struct sk_buff *skb, *rskb; 2452 struct tlv *tlv; 2453 int ret; 2454 2455 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2456 &msta_link->wcid); 2457 if (IS_ERR(skb)) 2458 return PTR_ERR(skb); 2459 2460 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info)); 2461 pn_info = (struct sta_rec_pn_info *)tlv; 2462 2463 pn_info->tsc_type = TSC_TYPE_BIGTK_PN; 2464 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb, 2465 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE), 2466 true, &rskb); 2467 if (ret) 2468 return ret; 2469 2470 skb_pull(rskb, 4); 2471 2472 pn_info = (struct sta_rec_pn_info *)rskb->data; 2473 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO) 2474 memcpy(pn, pn_info->pn, 6); 2475 2476 dev_kfree_skb(rskb); 2477 return 0; 2478 } 2479 2480 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, 2481 struct mt7996_vif_link *link, 2482 struct mt7996_sta_link *msta_link, 2483 struct ieee80211_key_conf *key) 2484 { 2485 struct mt7996_mcu_bcn_prot_tlv *bcn_prot; 2486 struct sk_buff *skb; 2487 struct tlv *tlv; 2488 u8 pn[6] = {}; 2489 int len = sizeof(struct bss_req_hdr) + 2490 sizeof(struct mt7996_mcu_bcn_prot_tlv); 2491 int ret; 2492 2493 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, len); 2494 if (IS_ERR(skb)) 2495 return PTR_ERR(skb); 2496 2497 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot)); 2498 2499 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv; 2500 2501 ret = mt7996_mcu_get_pn(dev, link, msta_link, pn); 2502 if (ret) { 2503 dev_kfree_skb(skb); 2504 return ret; 2505 } 2506 2507 switch (key->cipher) { 2508 case WLAN_CIPHER_SUITE_AES_CMAC: 2509 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128; 2510 break; 2511 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 2512 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128; 2513 break; 2514 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 2515 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256; 2516 break; 2517 case WLAN_CIPHER_SUITE_BIP_CMAC_256: 2518 default: 2519 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n"); 2520 dev_kfree_skb(skb); 2521 return -EOPNOTSUPP; 2522 } 2523 2524 pn[0]++; 2525 memcpy(bcn_prot->pn, pn, 6); 2526 bcn_prot->enable = BP_SW_MODE; 2527 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN); 2528 bcn_prot->key_id = key->keyidx; 2529 2530 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2531 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2532 } 2533 2534 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 2535 struct ieee80211_bss_conf *link_conf, 2536 struct mt76_vif_link *mlink, bool enable) 2537 { 2538 struct mt7996_dev *dev = phy->dev; 2539 struct { 2540 struct req_hdr { 2541 u8 omac_idx; 2542 u8 band_idx; 2543 u8 __rsv[2]; 2544 } __packed hdr; 2545 struct req_tlv { 2546 __le16 tag; 2547 __le16 len; 2548 u8 active; 2549 u8 __rsv; 2550 u8 omac_addr[ETH_ALEN]; 2551 } __packed tlv; 2552 } data = { 2553 .hdr = { 2554 .omac_idx = mlink->omac_idx, 2555 .band_idx = mlink->band_idx, 2556 }, 2557 .tlv = { 2558 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2559 .len = cpu_to_le16(sizeof(struct req_tlv)), 2560 .active = enable, 2561 }, 2562 }; 2563 2564 if (mlink->omac_idx >= REPEATER_BSSID_START) 2565 return mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 2566 2567 memcpy(data.tlv.omac_addr, link_conf->addr, ETH_ALEN); 2568 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2569 &data, sizeof(data), true); 2570 } 2571 2572 static void 2573 mt7996_mcu_beacon_cntdwn(struct sk_buff *rskb, struct sk_buff *skb, 2574 struct ieee80211_mutable_offsets *offs, 2575 bool csa) 2576 { 2577 struct bss_bcn_cntdwn_tlv *info; 2578 struct tlv *tlv; 2579 u16 tag; 2580 2581 if (!offs->cntdwn_counter_offs[0]) 2582 return; 2583 2584 tag = csa ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 2585 2586 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 2587 2588 info = (struct bss_bcn_cntdwn_tlv *)tlv; 2589 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 2590 } 2591 2592 static void 2593 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 2594 struct bss_bcn_content_tlv *bcn, 2595 struct ieee80211_mutable_offsets *offs) 2596 { 2597 struct bss_bcn_mbss_tlv *mbss; 2598 const struct element *elem; 2599 struct tlv *tlv; 2600 2601 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 2602 2603 mbss = (struct bss_bcn_mbss_tlv *)tlv; 2604 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 2605 mbss->bitmap = cpu_to_le32(1); 2606 2607 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 2608 &skb->data[offs->mbssid_off], 2609 skb->len - offs->mbssid_off) { 2610 const struct element *sub_elem; 2611 2612 if (elem->datalen < 2) 2613 continue; 2614 2615 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 2616 const struct ieee80211_bssid_index *idx; 2617 const u8 *idx_ie; 2618 2619 /* not a valid BSS profile */ 2620 if (sub_elem->id || sub_elem->datalen < 4) 2621 continue; 2622 2623 /* Find WLAN_EID_MULTI_BSSID_IDX 2624 * in the merged nontransmitted profile 2625 */ 2626 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 2627 sub_elem->data, sub_elem->datalen); 2628 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 2629 continue; 2630 2631 idx = (void *)(idx_ie + 2); 2632 if (!idx->bssid_index || idx->bssid_index > 31) 2633 continue; 2634 2635 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 2636 skb->data); 2637 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 2638 } 2639 } 2640 } 2641 2642 static void 2643 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, 2644 struct ieee80211_bss_conf *link_conf, 2645 struct sk_buff *rskb, struct sk_buff *skb, 2646 struct bss_bcn_content_tlv *bcn, 2647 struct ieee80211_mutable_offsets *offs) 2648 { 2649 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2650 u8 *buf; 2651 2652 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2653 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 2654 2655 if (offs->cntdwn_counter_offs[0]) { 2656 u16 offset = offs->cntdwn_counter_offs[0]; 2657 2658 if (link_conf->csa_active) 2659 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 2660 if (link_conf->color_change_active) 2661 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 2662 } 2663 2664 buf = (u8 *)bcn + sizeof(*bcn); 2665 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 2666 BSS_CHANGED_BEACON); 2667 2668 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2669 } 2670 2671 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2672 struct ieee80211_bss_conf *link_conf) 2673 { 2674 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2675 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 2676 struct ieee80211_mutable_offsets offs; 2677 struct ieee80211_tx_info *info; 2678 struct sk_buff *skb, *rskb; 2679 struct tlv *tlv; 2680 struct bss_bcn_content_tlv *bcn; 2681 int len, extra_len = 0; 2682 2683 if (link_conf->nontransmitted) 2684 return 0; 2685 2686 if (!mlink) 2687 return -EINVAL; 2688 2689 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 2690 MT7996_MAX_BSS_OFFLOAD_SIZE); 2691 if (IS_ERR(rskb)) 2692 return PTR_ERR(rskb); 2693 2694 skb = ieee80211_beacon_get_template(hw, vif, &offs, link_conf->link_id); 2695 if (link_conf->enable_beacon && !skb) { 2696 dev_kfree_skb(rskb); 2697 return -EINVAL; 2698 } 2699 2700 if (skb) { 2701 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2702 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2703 dev_kfree_skb(rskb); 2704 dev_kfree_skb(skb); 2705 return -EINVAL; 2706 } 2707 2708 extra_len = skb->len; 2709 } 2710 2711 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + extra_len, 4); 2712 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2713 bcn = (struct bss_bcn_content_tlv *)tlv; 2714 bcn->enable = link_conf->enable_beacon; 2715 if (!bcn->enable) 2716 goto out; 2717 2718 info = IEEE80211_SKB_CB(skb); 2719 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx); 2720 2721 mt7996_mcu_beacon_cont(dev, link_conf, rskb, skb, bcn, &offs); 2722 if (link_conf->bssid_indicator) 2723 mt7996_mcu_beacon_mbss(rskb, skb, bcn, &offs); 2724 mt7996_mcu_beacon_cntdwn(rskb, skb, &offs, link_conf->csa_active); 2725 out: 2726 dev_kfree_skb(skb); 2727 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2728 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2729 } 2730 2731 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 2732 struct ieee80211_bss_conf *link_conf, 2733 struct mt7996_vif_link *link, u32 changed) 2734 { 2735 #define OFFLOAD_TX_MODE_SU BIT(0) 2736 #define OFFLOAD_TX_MODE_MU BIT(1) 2737 struct ieee80211_vif *vif = link_conf->vif; 2738 struct ieee80211_hw *hw = mt76_hw(dev); 2739 struct mt7996_phy *phy = link->phy; 2740 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2741 struct bss_inband_discovery_tlv *discov; 2742 struct ieee80211_tx_info *info; 2743 struct sk_buff *rskb, *skb = NULL; 2744 struct cfg80211_chan_def *chandef; 2745 enum nl80211_band band; 2746 struct tlv *tlv; 2747 u8 *buf, interval; 2748 int len; 2749 2750 if (!phy) 2751 return -EINVAL; 2752 2753 chandef = &phy->mt76->chandef; 2754 band = chandef->chan->band; 2755 2756 if (link_conf->nontransmitted) 2757 return 0; 2758 2759 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, 2760 MT7996_MAX_BSS_OFFLOAD_SIZE); 2761 if (IS_ERR(rskb)) 2762 return PTR_ERR(rskb); 2763 2764 if (changed & BSS_CHANGED_FILS_DISCOVERY && 2765 link_conf->fils_discovery.max_interval) { 2766 interval = link_conf->fils_discovery.max_interval; 2767 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 2768 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 2769 link_conf->unsol_bcast_probe_resp_interval) { 2770 interval = link_conf->unsol_bcast_probe_resp_interval; 2771 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 2772 } 2773 2774 if (!skb) { 2775 dev_kfree_skb(rskb); 2776 return -EINVAL; 2777 } 2778 2779 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2780 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2781 dev_kfree_skb(rskb); 2782 dev_kfree_skb(skb); 2783 return -EINVAL; 2784 } 2785 2786 info = IEEE80211_SKB_CB(skb); 2787 info->control.vif = vif; 2788 info->band = band; 2789 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2790 2791 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 2792 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2793 2794 discov = (struct bss_inband_discovery_tlv *)tlv; 2795 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2796 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2797 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2798 discov->tx_interval = interval; 2799 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2800 discov->enable = true; 2801 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2802 2803 buf = (u8 *)tlv + sizeof(*discov); 2804 2805 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2806 2807 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2808 2809 dev_kfree_skb(skb); 2810 2811 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2812 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2813 } 2814 2815 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2816 { 2817 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2818 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2819 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2820 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2821 return -EIO; 2822 } 2823 2824 /* clear irq when the driver own success */ 2825 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2826 MT_TOP_LPCR_HOST_BAND_STAT); 2827 2828 return 0; 2829 } 2830 2831 static u32 mt7996_patch_sec_mode(u32 key_info) 2832 { 2833 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2834 2835 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2836 return 0; 2837 2838 if (sec == MT7996_SEC_MODE_AES) 2839 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2840 else 2841 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2842 2843 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2844 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2845 } 2846 2847 static int mt7996_load_patch(struct mt7996_dev *dev) 2848 { 2849 const struct mt7996_patch_hdr *hdr; 2850 const struct firmware *fw = NULL; 2851 int i, ret, sem; 2852 2853 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2854 switch (sem) { 2855 case PATCH_IS_DL: 2856 return 0; 2857 case PATCH_NOT_DL_SEM_SUCCESS: 2858 break; 2859 default: 2860 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2861 return -EAGAIN; 2862 } 2863 2864 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev); 2865 if (ret) 2866 goto out; 2867 2868 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2869 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2870 ret = -EINVAL; 2871 goto out; 2872 } 2873 2874 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2875 2876 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2877 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2878 2879 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2880 struct mt7996_patch_sec *sec; 2881 const u8 *dl; 2882 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2883 2884 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2885 i * sizeof(*sec)); 2886 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2887 PATCH_SEC_TYPE_INFO) { 2888 ret = -EINVAL; 2889 goto out; 2890 } 2891 2892 addr = be32_to_cpu(sec->info.addr); 2893 len = be32_to_cpu(sec->info.len); 2894 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2895 dl = fw->data + be32_to_cpu(sec->offs); 2896 2897 mode |= mt7996_patch_sec_mode(sec_key_idx); 2898 2899 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2900 mode); 2901 if (ret) { 2902 dev_err(dev->mt76.dev, "Download request failed\n"); 2903 goto out; 2904 } 2905 2906 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2907 dl, len, 4096); 2908 if (ret) { 2909 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2910 goto out; 2911 } 2912 } 2913 2914 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2915 if (ret) 2916 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2917 2918 out: 2919 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2920 switch (sem) { 2921 case PATCH_REL_SEM_SUCCESS: 2922 break; 2923 default: 2924 ret = -EAGAIN; 2925 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2926 break; 2927 } 2928 release_firmware(fw); 2929 2930 return ret; 2931 } 2932 2933 static int 2934 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2935 const struct mt7996_fw_trailer *hdr, 2936 const u8 *data, enum mt7996_ram_type type) 2937 { 2938 int i, offset = 0; 2939 u32 override = 0, option = 0; 2940 2941 for (i = 0; i < hdr->n_region; i++) { 2942 const struct mt7996_fw_region *region; 2943 int err; 2944 u32 len, addr, mode; 2945 2946 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2947 (hdr->n_region - i) * sizeof(*region)); 2948 /* DSP and WA use same mode */ 2949 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2950 region->feature_set, 2951 type != MT7996_RAM_TYPE_WM); 2952 len = le32_to_cpu(region->len); 2953 addr = le32_to_cpu(region->addr); 2954 2955 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2956 override = addr; 2957 2958 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2959 mode); 2960 if (err) { 2961 dev_err(dev->mt76.dev, "Download request failed\n"); 2962 return err; 2963 } 2964 2965 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2966 data + offset, len, 4096); 2967 if (err) { 2968 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2969 return err; 2970 } 2971 2972 offset += len; 2973 } 2974 2975 if (override) 2976 option |= FW_START_OVERRIDE; 2977 2978 if (type == MT7996_RAM_TYPE_WA) 2979 option |= FW_START_WORKING_PDA_CR4; 2980 else if (type == MT7996_RAM_TYPE_DSP) 2981 option |= FW_START_WORKING_PDA_DSP; 2982 2983 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2984 } 2985 2986 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 2987 const char *fw_file, enum mt7996_ram_type ram_type) 2988 { 2989 const struct mt7996_fw_trailer *hdr; 2990 const struct firmware *fw; 2991 int ret; 2992 2993 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 2994 if (ret) 2995 return ret; 2996 2997 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2998 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2999 ret = -EINVAL; 3000 goto out; 3001 } 3002 3003 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3004 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 3005 fw_type, hdr->fw_ver, hdr->build_date); 3006 3007 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 3008 if (ret) { 3009 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 3010 goto out; 3011 } 3012 3013 snprintf(dev->mt76.hw->wiphy->fw_version, 3014 sizeof(dev->mt76.hw->wiphy->fw_version), 3015 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3016 3017 out: 3018 release_firmware(fw); 3019 3020 return ret; 3021 } 3022 3023 static int mt7996_load_ram(struct mt7996_dev *dev) 3024 { 3025 int ret; 3026 3027 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM), 3028 MT7996_RAM_TYPE_WM); 3029 if (ret) 3030 return ret; 3031 3032 if (!mt7996_has_wa(dev)) 3033 return 0; 3034 3035 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP), 3036 MT7996_RAM_TYPE_DSP); 3037 if (ret) 3038 return ret; 3039 3040 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA), 3041 MT7996_RAM_TYPE_WA); 3042 } 3043 3044 static int 3045 mt7996_firmware_state(struct mt7996_dev *dev, u8 fw_state) 3046 { 3047 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, fw_state); 3048 3049 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 3050 state, 1000)) { 3051 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 3052 return -EIO; 3053 } 3054 return 0; 3055 } 3056 3057 static int 3058 mt7996_mcu_restart(struct mt76_dev *dev) 3059 { 3060 struct { 3061 u8 __rsv1[4]; 3062 3063 __le16 tag; 3064 __le16 len; 3065 u8 power_mode; 3066 u8 __rsv2[3]; 3067 } __packed req = { 3068 .tag = cpu_to_le16(UNI_POWER_OFF), 3069 .len = cpu_to_le16(sizeof(req) - 4), 3070 .power_mode = 1, 3071 }; 3072 3073 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 3074 sizeof(req), false); 3075 } 3076 3077 static int mt7996_load_firmware(struct mt7996_dev *dev) 3078 { 3079 u8 fw_state; 3080 int ret; 3081 3082 /* make sure fw is download state */ 3083 if (mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD)) { 3084 /* restart firmware once */ 3085 mt7996_mcu_restart(&dev->mt76); 3086 ret = mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD); 3087 if (ret) { 3088 dev_err(dev->mt76.dev, 3089 "Firmware is not ready for download\n"); 3090 return ret; 3091 } 3092 } 3093 3094 ret = mt7996_load_patch(dev); 3095 if (ret) 3096 return ret; 3097 3098 ret = mt7996_load_ram(dev); 3099 if (ret) 3100 return ret; 3101 3102 fw_state = mt7996_has_wa(dev) ? FW_STATE_RDY : FW_STATE_NORMAL_TRX; 3103 ret = mt7996_firmware_state(dev, fw_state); 3104 if (ret) 3105 return ret; 3106 3107 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 3108 3109 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 3110 3111 return 0; 3112 } 3113 3114 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 3115 { 3116 struct { 3117 u8 _rsv[4]; 3118 3119 __le16 tag; 3120 __le16 len; 3121 u8 ctrl; 3122 u8 interval; 3123 u8 _rsv2[2]; 3124 } __packed data = { 3125 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 3126 .len = cpu_to_le16(sizeof(data) - 4), 3127 .ctrl = ctrl, 3128 }; 3129 3130 if (type == MCU_FW_LOG_WA) 3131 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 3132 &data, sizeof(data), true); 3133 3134 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3135 sizeof(data), true); 3136 } 3137 3138 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 3139 { 3140 struct { 3141 u8 _rsv[4]; 3142 3143 __le16 tag; 3144 __le16 len; 3145 __le32 module_idx; 3146 u8 level; 3147 u8 _rsv2[3]; 3148 } data = { 3149 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 3150 .len = cpu_to_le16(sizeof(data) - 4), 3151 .module_idx = cpu_to_le32(module), 3152 .level = level, 3153 }; 3154 3155 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3156 sizeof(data), false); 3157 } 3158 3159 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 3160 { 3161 struct { 3162 u8 enable; 3163 u8 _rsv[3]; 3164 } __packed req = { 3165 .enable = enabled 3166 }; 3167 3168 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 3169 sizeof(req), false); 3170 } 3171 3172 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 3173 { 3174 struct vow_rx_airtime *req; 3175 struct tlv *tlv; 3176 3177 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 3178 req = (struct vow_rx_airtime *)tlv; 3179 req->enable = true; 3180 req->band = band_idx; 3181 3182 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 3183 req = (struct vow_rx_airtime *)tlv; 3184 req->enable = true; 3185 req->band = band_idx; 3186 } 3187 3188 static int 3189 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 3190 { 3191 struct uni_header hdr = {}; 3192 struct sk_buff *skb; 3193 int len, num, i; 3194 3195 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) + 3196 mt7996_band_valid(dev, MT_BAND2)); 3197 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 3198 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3199 if (!skb) 3200 return -ENOMEM; 3201 3202 skb_put_data(skb, &hdr, sizeof(hdr)); 3203 3204 for (i = 0; i < __MT_MAX_BAND; i++) { 3205 if (mt7996_band_valid(dev, i)) 3206 mt7996_add_rx_airtime_tlv(skb, i); 3207 } 3208 3209 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3210 MCU_WM_UNI_CMD(VOW), true); 3211 } 3212 3213 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 3214 { 3215 int ret; 3216 3217 /* force firmware operation mode into normal state, 3218 * which should be set before firmware download stage. 3219 */ 3220 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 3221 3222 ret = mt7996_driver_own(dev, 0); 3223 if (ret) 3224 return ret; 3225 /* set driver own for band1 when two hif exist */ 3226 if (dev->hif2) { 3227 ret = mt7996_driver_own(dev, 1); 3228 if (ret) 3229 return ret; 3230 } 3231 3232 ret = mt7996_load_firmware(dev); 3233 if (ret) 3234 return ret; 3235 3236 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 3237 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 3238 if (ret) 3239 return ret; 3240 3241 if (mt7996_has_wa(dev)) { 3242 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 3243 if (ret) 3244 return ret; 3245 3246 ret = mt7996_mcu_set_mwds(dev, 1); 3247 if (ret) 3248 return ret; 3249 } 3250 3251 ret = mt7996_mcu_init_rx_airtime(dev); 3252 if (ret) 3253 return ret; 3254 3255 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 3256 MCU_WA_PARAM_RED, 0, 0); 3257 } 3258 3259 int mt7996_mcu_init(struct mt7996_dev *dev) 3260 { 3261 static const struct mt76_mcu_ops mt7996_mcu_ops = { 3262 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 3263 .mcu_skb_send_msg = mt7996_mcu_send_message, 3264 .mcu_parse_response = mt7996_mcu_parse_response, 3265 }; 3266 3267 dev->mt76.mcu_ops = &mt7996_mcu_ops; 3268 3269 return mt7996_mcu_init_firmware(dev); 3270 } 3271 3272 void mt7996_mcu_exit(struct mt7996_dev *dev) 3273 { 3274 mt7996_mcu_restart(&dev->mt76); 3275 if (mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD)) { 3276 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 3277 goto out; 3278 } 3279 3280 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 3281 if (dev->hif2) 3282 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 3283 MT_TOP_LPCR_HOST_FW_OWN); 3284 out: 3285 skb_queue_purge(&dev->mt76.mcu.res_q); 3286 } 3287 3288 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 3289 { 3290 struct { 3291 u8 __rsv[4]; 3292 } __packed hdr; 3293 struct hdr_trans_blacklist *req_blacklist; 3294 struct hdr_trans_en *req_en; 3295 struct sk_buff *skb; 3296 struct tlv *tlv; 3297 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 3298 3299 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3300 if (!skb) 3301 return -ENOMEM; 3302 3303 skb_put_data(skb, &hdr, sizeof(hdr)); 3304 3305 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 3306 req_en = (struct hdr_trans_en *)tlv; 3307 req_en->enable = hdr_trans; 3308 3309 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 3310 sizeof(struct hdr_trans_vlan)); 3311 3312 if (hdr_trans) { 3313 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 3314 sizeof(*req_blacklist)); 3315 req_blacklist = (struct hdr_trans_blacklist *)tlv; 3316 req_blacklist->enable = 1; 3317 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 3318 } 3319 3320 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3321 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 3322 } 3323 3324 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3325 struct ieee80211_bss_conf *link_conf) 3326 { 3327 #define MCU_EDCA_AC_PARAM 0 3328 #define WMM_AIFS_SET BIT(0) 3329 #define WMM_CW_MIN_SET BIT(1) 3330 #define WMM_CW_MAX_SET BIT(2) 3331 #define WMM_TXOP_SET BIT(3) 3332 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 3333 WMM_CW_MAX_SET | WMM_TXOP_SET) 3334 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf); 3335 struct { 3336 u8 bss_idx; 3337 u8 __rsv[3]; 3338 } __packed hdr = { 3339 .bss_idx = link->mt76.idx, 3340 }; 3341 struct sk_buff *skb; 3342 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 3343 int ac; 3344 3345 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3346 if (!skb) 3347 return -ENOMEM; 3348 3349 skb_put_data(skb, &hdr, sizeof(hdr)); 3350 3351 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 3352 struct ieee80211_tx_queue_params *q = &link->queue_params[ac]; 3353 struct edca *e; 3354 struct tlv *tlv; 3355 3356 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 3357 3358 e = (struct edca *)tlv; 3359 e->set = WMM_PARAM_SET; 3360 e->queue = ac; 3361 e->aifs = q->aifs; 3362 e->txop = cpu_to_le16(q->txop); 3363 3364 if (q->cw_min) 3365 e->cw_min = fls(q->cw_min); 3366 else 3367 e->cw_min = 5; 3368 3369 if (q->cw_max) 3370 e->cw_max = fls(q->cw_max); 3371 else 3372 e->cw_max = 10; 3373 } 3374 3375 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3376 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 3377 } 3378 3379 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 3380 { 3381 struct { 3382 u8 _rsv[4]; 3383 3384 __le16 tag; 3385 __le16 len; 3386 3387 __le32 ctrl; 3388 __le16 min_lpn; 3389 u8 rsv[2]; 3390 } __packed req = { 3391 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3392 .len = cpu_to_le16(sizeof(req) - 4), 3393 3394 .ctrl = cpu_to_le32(0x1), 3395 .min_lpn = cpu_to_le16(val), 3396 }; 3397 3398 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3399 &req, sizeof(req), true); 3400 } 3401 3402 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3403 const struct mt7996_dfs_pulse *pulse) 3404 { 3405 struct { 3406 u8 _rsv[4]; 3407 3408 __le16 tag; 3409 __le16 len; 3410 3411 __le32 ctrl; 3412 3413 __le32 max_width; /* us */ 3414 __le32 max_pwr; /* dbm */ 3415 __le32 min_pwr; /* dbm */ 3416 __le32 min_stgr_pri; /* us */ 3417 __le32 max_stgr_pri; /* us */ 3418 __le32 min_cr_pri; /* us */ 3419 __le32 max_cr_pri; /* us */ 3420 } __packed req = { 3421 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3422 .len = cpu_to_le16(sizeof(req) - 4), 3423 3424 .ctrl = cpu_to_le32(0x3), 3425 3426 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3427 __req_field(max_width), 3428 __req_field(max_pwr), 3429 __req_field(min_pwr), 3430 __req_field(min_stgr_pri), 3431 __req_field(max_stgr_pri), 3432 __req_field(min_cr_pri), 3433 __req_field(max_cr_pri), 3434 #undef __req_field 3435 }; 3436 3437 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3438 &req, sizeof(req), true); 3439 } 3440 3441 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3442 const struct mt7996_dfs_pattern *pattern) 3443 { 3444 struct { 3445 u8 _rsv[4]; 3446 3447 __le16 tag; 3448 __le16 len; 3449 3450 __le32 ctrl; 3451 __le16 radar_type; 3452 3453 u8 enb; 3454 u8 stgr; 3455 u8 min_crpn; 3456 u8 max_crpn; 3457 u8 min_crpr; 3458 u8 min_pw; 3459 __le32 min_pri; 3460 __le32 max_pri; 3461 u8 max_pw; 3462 u8 min_crbn; 3463 u8 max_crbn; 3464 u8 min_stgpn; 3465 u8 max_stgpn; 3466 u8 min_stgpr; 3467 u8 rsv[2]; 3468 __le32 min_stgpr_diff; 3469 } __packed req = { 3470 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3471 .len = cpu_to_le16(sizeof(req) - 4), 3472 3473 .ctrl = cpu_to_le32(0x2), 3474 .radar_type = cpu_to_le16(index), 3475 3476 #define __req_field_u8(field) .field = pattern->field 3477 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3478 __req_field_u8(enb), 3479 __req_field_u8(stgr), 3480 __req_field_u8(min_crpn), 3481 __req_field_u8(max_crpn), 3482 __req_field_u8(min_crpr), 3483 __req_field_u8(min_pw), 3484 __req_field_u32(min_pri), 3485 __req_field_u32(max_pri), 3486 __req_field_u8(max_pw), 3487 __req_field_u8(min_crbn), 3488 __req_field_u8(max_crbn), 3489 __req_field_u8(min_stgpn), 3490 __req_field_u8(max_stgpn), 3491 __req_field_u8(min_stgpr), 3492 __req_field_u32(min_stgpr_diff), 3493 #undef __req_field_u8 3494 #undef __req_field_u32 3495 }; 3496 3497 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3498 &req, sizeof(req), true); 3499 } 3500 3501 static int 3502 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3503 struct cfg80211_chan_def *chandef, 3504 int cmd) 3505 { 3506 struct mt7996_dev *dev = phy->dev; 3507 struct mt76_phy *mphy = phy->mt76; 3508 struct ieee80211_channel *chan = mphy->chandef.chan; 3509 int freq = mphy->chandef.center_freq1; 3510 struct mt7996_mcu_background_chain_ctrl req = { 3511 .tag = cpu_to_le16(0), 3512 .len = cpu_to_le16(sizeof(req) - 4), 3513 .monitor_scan_type = 2, /* simple rx */ 3514 }; 3515 3516 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3517 return -EINVAL; 3518 3519 if (!cfg80211_chandef_valid(&mphy->chandef)) 3520 return -EINVAL; 3521 3522 switch (cmd) { 3523 case CH_SWITCH_BACKGROUND_SCAN_START: { 3524 req.chan = chan->hw_value; 3525 req.central_chan = ieee80211_frequency_to_channel(freq); 3526 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3527 req.monitor_chan = chandef->chan->hw_value; 3528 req.monitor_central_chan = 3529 ieee80211_frequency_to_channel(chandef->center_freq1); 3530 req.monitor_bw = mt76_connac_chan_bw(chandef); 3531 req.band_idx = phy->mt76->band_idx; 3532 req.scan_mode = 1; 3533 break; 3534 } 3535 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3536 req.monitor_chan = chandef->chan->hw_value; 3537 req.monitor_central_chan = 3538 ieee80211_frequency_to_channel(chandef->center_freq1); 3539 req.band_idx = phy->mt76->band_idx; 3540 req.scan_mode = 2; 3541 break; 3542 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3543 req.chan = chan->hw_value; 3544 req.central_chan = ieee80211_frequency_to_channel(freq); 3545 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3546 req.tx_stream = hweight8(mphy->antenna_mask); 3547 req.rx_stream = mphy->antenna_mask; 3548 break; 3549 default: 3550 return -EINVAL; 3551 } 3552 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3553 3554 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 3555 &req, sizeof(req), false); 3556 } 3557 3558 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 3559 struct cfg80211_chan_def *chandef) 3560 { 3561 struct mt7996_dev *dev = phy->dev; 3562 int err, region, rdd_idx = mt7996_get_rdd_idx(phy, true); 3563 3564 if (!chandef) { /* disable offchain */ 3565 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, rdd_idx, 0); 3566 if (err) 3567 return err; 3568 3569 return mt7996_mcu_background_chain_ctrl(phy, NULL, 3570 CH_SWITCH_BACKGROUND_SCAN_STOP); 3571 } 3572 3573 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 3574 CH_SWITCH_BACKGROUND_SCAN_START); 3575 if (err) 3576 return err; 3577 3578 switch (dev->mt76.region) { 3579 case NL80211_DFS_ETSI: 3580 region = 0; 3581 break; 3582 case NL80211_DFS_JP: 3583 region = 2; 3584 break; 3585 case NL80211_DFS_FCC: 3586 default: 3587 region = 1; 3588 break; 3589 } 3590 3591 return mt7996_mcu_rdd_cmd(dev, RDD_START, rdd_idx, region); 3592 } 3593 3594 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 3595 { 3596 static const u8 ch_band[] = { 3597 [NL80211_BAND_2GHZ] = 0, 3598 [NL80211_BAND_5GHZ] = 1, 3599 [NL80211_BAND_6GHZ] = 2, 3600 }; 3601 struct mt7996_dev *dev = phy->dev; 3602 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3603 int freq1 = chandef->center_freq1; 3604 u8 band_idx = phy->mt76->band_idx; 3605 struct { 3606 /* fixed field */ 3607 u8 __rsv[4]; 3608 3609 __le16 tag; 3610 __le16 len; 3611 u8 control_ch; 3612 u8 center_ch; 3613 u8 bw; 3614 u8 tx_path_num; 3615 u8 rx_path; /* mask or num */ 3616 u8 switch_reason; 3617 u8 band_idx; 3618 u8 center_ch2; /* for 80+80 only */ 3619 __le16 cac_case; 3620 u8 channel_band; 3621 u8 rsv0; 3622 __le32 outband_freq; 3623 u8 txpower_drop; 3624 u8 ap_bw; 3625 u8 ap_center_ch; 3626 u8 rsv1[53]; 3627 } __packed req = { 3628 .tag = cpu_to_le16(tag), 3629 .len = cpu_to_le16(sizeof(req) - 4), 3630 .control_ch = chandef->chan->hw_value, 3631 .center_ch = ieee80211_frequency_to_channel(freq1), 3632 .bw = mt76_connac_chan_bw(chandef), 3633 .tx_path_num = hweight16(phy->mt76->chainmask), 3634 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx], 3635 .band_idx = band_idx, 3636 .channel_band = ch_band[chandef->chan->band], 3637 }; 3638 3639 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 3640 req.switch_reason = CH_SWITCH_NORMAL; 3641 else if (phy->mt76->offchannel || 3642 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 3643 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 3644 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 3645 NL80211_IFTYPE_AP)) 3646 req.switch_reason = CH_SWITCH_DFS; 3647 else 3648 req.switch_reason = CH_SWITCH_NORMAL; 3649 3650 if (tag == UNI_CHANNEL_SWITCH) 3651 req.rx_path = hweight8(req.rx_path); 3652 3653 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 3654 int freq2 = chandef->center_freq2; 3655 3656 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 3657 } 3658 3659 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 3660 &req, sizeof(req), true); 3661 } 3662 3663 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 3664 { 3665 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 3666 #define PAGE_IDX_MASK GENMASK(4, 2) 3667 #define PER_PAGE_SIZE 0x400 3668 struct mt7996_mcu_eeprom req = { 3669 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3670 .buffer_mode = EE_MODE_BUFFER 3671 }; 3672 u16 eeprom_size = MT7996_EEPROM_SIZE; 3673 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 3674 u8 *eep = (u8 *)dev->mt76.eeprom.data; 3675 int eep_len, i; 3676 3677 for (i = 0; i < total; i++, eep += eep_len) { 3678 struct sk_buff *skb; 3679 int ret, msg_len; 3680 3681 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 3682 eep_len = eeprom_size % PER_PAGE_SIZE; 3683 else 3684 eep_len = PER_PAGE_SIZE; 3685 3686 msg_len = sizeof(req) + eep_len; 3687 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 3688 if (!skb) 3689 return -ENOMEM; 3690 3691 req.len = cpu_to_le16(msg_len - 4); 3692 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 3693 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 3694 req.buf_len = cpu_to_le16(eep_len); 3695 3696 skb_put_data(skb, &req, sizeof(req)); 3697 skb_put_data(skb, eep, eep_len); 3698 3699 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 3700 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 3701 if (ret) 3702 return ret; 3703 } 3704 3705 return 0; 3706 } 3707 3708 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 3709 { 3710 struct mt7996_mcu_eeprom req = { 3711 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3712 .len = cpu_to_le16(sizeof(req) - 4), 3713 .buffer_mode = EE_MODE_EFUSE, 3714 .format = EE_FORMAT_WHOLE 3715 }; 3716 3717 if (dev->flash_mode) 3718 return mt7996_mcu_set_eeprom_flash(dev); 3719 3720 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 3721 &req, sizeof(req), true); 3722 } 3723 3724 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len) 3725 { 3726 struct { 3727 u8 _rsv[4]; 3728 3729 __le16 tag; 3730 __le16 len; 3731 __le32 addr; 3732 __le32 valid; 3733 u8 data[16]; 3734 } __packed req = { 3735 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 3736 .len = cpu_to_le16(sizeof(req) - 4), 3737 .addr = cpu_to_le32(round_down(offset, 3738 MT7996_EEPROM_BLOCK_SIZE)), 3739 }; 3740 struct sk_buff *skb; 3741 bool valid; 3742 int ret; 3743 3744 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3745 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 3746 &req, sizeof(req), true, &skb); 3747 if (ret) 3748 return ret; 3749 3750 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 3751 if (valid) { 3752 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3753 3754 if (!buf) 3755 buf = (u8 *)dev->mt76.eeprom.data + addr; 3756 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE) 3757 buf_len = MT7996_EEPROM_BLOCK_SIZE; 3758 3759 skb_pull(skb, 48); 3760 memcpy(buf, skb->data, buf_len); 3761 } else { 3762 ret = -EINVAL; 3763 } 3764 3765 dev_kfree_skb(skb); 3766 3767 return ret; 3768 } 3769 3770 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 3771 { 3772 struct { 3773 u8 _rsv[4]; 3774 3775 __le16 tag; 3776 __le16 len; 3777 u8 num; 3778 u8 version; 3779 u8 die_idx; 3780 u8 _rsv2; 3781 } __packed req = { 3782 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 3783 .len = cpu_to_le16(sizeof(req) - 4), 3784 .version = 2, 3785 }; 3786 struct sk_buff *skb; 3787 int ret; 3788 3789 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3790 sizeof(req), true, &skb); 3791 if (ret) 3792 return ret; 3793 3794 *block_num = *(u8 *)(skb->data + 8); 3795 dev_kfree_skb(skb); 3796 3797 return 0; 3798 } 3799 3800 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3801 { 3802 #define NIC_CAP 3 3803 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3804 struct { 3805 u8 _rsv[4]; 3806 3807 __le16 tag; 3808 __le16 len; 3809 } __packed req = { 3810 .tag = cpu_to_le16(NIC_CAP), 3811 .len = cpu_to_le16(sizeof(req) - 4), 3812 }; 3813 struct sk_buff *skb; 3814 u8 *buf; 3815 int ret; 3816 3817 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3818 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3819 sizeof(req), true, &skb); 3820 if (ret) 3821 return ret; 3822 3823 /* fixed field */ 3824 skb_pull(skb, 4); 3825 3826 buf = skb->data; 3827 while (buf - skb->data < skb->len) { 3828 struct tlv *tlv = (struct tlv *)buf; 3829 3830 switch (le16_to_cpu(tlv->tag)) { 3831 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3832 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3833 break; 3834 default: 3835 break; 3836 } 3837 3838 buf += le16_to_cpu(tlv->len); 3839 } 3840 3841 dev_kfree_skb(skb); 3842 3843 return 0; 3844 } 3845 3846 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3847 { 3848 enum { 3849 IDX_TX_TIME, 3850 IDX_RX_TIME, 3851 IDX_OBSS_AIRTIME, 3852 IDX_NON_WIFI_TIME, 3853 IDX_NUM 3854 }; 3855 struct { 3856 struct { 3857 u8 band; 3858 u8 __rsv[3]; 3859 } hdr; 3860 struct { 3861 __le16 tag; 3862 __le16 len; 3863 __le32 offs; 3864 } data[IDX_NUM]; 3865 } __packed req = { 3866 .hdr.band = phy->mt76->band_idx, 3867 }; 3868 static const u32 offs[] = { 3869 [IDX_TX_TIME] = UNI_MIB_TX_TIME, 3870 [IDX_RX_TIME] = UNI_MIB_RX_TIME, 3871 [IDX_OBSS_AIRTIME] = UNI_MIB_OBSS_AIRTIME, 3872 [IDX_NON_WIFI_TIME] = UNI_MIB_NON_WIFI_TIME, 3873 }; 3874 struct mt76_channel_state *state = phy->mt76->chan_state; 3875 struct mt76_channel_state *state_ts = &phy->state_ts; 3876 struct mt7996_dev *dev = phy->dev; 3877 struct mt7996_mcu_mib *res; 3878 struct sk_buff *skb; 3879 int i, ret; 3880 3881 for (i = 0; i < IDX_NUM; i++) { 3882 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3883 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3884 req.data[i].offs = cpu_to_le32(offs[i]); 3885 } 3886 3887 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3888 &req, sizeof(req), true, &skb); 3889 if (ret) 3890 return ret; 3891 3892 skb_pull(skb, sizeof(req.hdr)); 3893 3894 res = (struct mt7996_mcu_mib *)(skb->data); 3895 3896 if (chan_switch) 3897 goto out; 3898 3899 #define __res_u64(s) le64_to_cpu(res[s].data) 3900 state->cc_tx += __res_u64(IDX_TX_TIME) - state_ts->cc_tx; 3901 state->cc_bss_rx += __res_u64(IDX_RX_TIME) - state_ts->cc_bss_rx; 3902 state->cc_rx += __res_u64(IDX_RX_TIME) + 3903 __res_u64(IDX_OBSS_AIRTIME) - 3904 state_ts->cc_rx; 3905 state->cc_busy += __res_u64(IDX_TX_TIME) + 3906 __res_u64(IDX_RX_TIME) + 3907 __res_u64(IDX_OBSS_AIRTIME) + 3908 __res_u64(IDX_NON_WIFI_TIME) - 3909 state_ts->cc_busy; 3910 out: 3911 state_ts->cc_tx = __res_u64(IDX_TX_TIME); 3912 state_ts->cc_bss_rx = __res_u64(IDX_RX_TIME); 3913 state_ts->cc_rx = __res_u64(IDX_RX_TIME) + __res_u64(IDX_OBSS_AIRTIME); 3914 state_ts->cc_busy = __res_u64(IDX_TX_TIME) + 3915 __res_u64(IDX_RX_TIME) + 3916 __res_u64(IDX_OBSS_AIRTIME) + 3917 __res_u64(IDX_NON_WIFI_TIME); 3918 #undef __res_u64 3919 3920 dev_kfree_skb(skb); 3921 3922 return 0; 3923 } 3924 3925 int mt7996_mcu_get_temperature(struct mt7996_phy *phy) 3926 { 3927 #define TEMPERATURE_QUERY 0 3928 #define GET_TEMPERATURE 0 3929 struct { 3930 u8 _rsv[4]; 3931 3932 __le16 tag; 3933 __le16 len; 3934 3935 u8 rsv1; 3936 u8 action; 3937 u8 band_idx; 3938 u8 rsv2; 3939 } req = { 3940 .tag = cpu_to_le16(TEMPERATURE_QUERY), 3941 .len = cpu_to_le16(sizeof(req) - 4), 3942 .action = GET_TEMPERATURE, 3943 .band_idx = phy->mt76->band_idx, 3944 }; 3945 struct mt7996_mcu_thermal { 3946 u8 _rsv[4]; 3947 3948 __le16 tag; 3949 __le16 len; 3950 3951 __le32 rsv; 3952 __le32 temperature; 3953 } __packed * res; 3954 struct sk_buff *skb; 3955 int ret; 3956 u32 temp; 3957 3958 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3959 &req, sizeof(req), true, &skb); 3960 if (ret) 3961 return ret; 3962 3963 res = (void *)skb->data; 3964 temp = le32_to_cpu(res->temperature); 3965 dev_kfree_skb(skb); 3966 3967 return temp; 3968 } 3969 3970 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state) 3971 { 3972 struct { 3973 u8 _rsv[4]; 3974 3975 __le16 tag; 3976 __le16 len; 3977 3978 struct mt7996_mcu_thermal_ctrl ctrl; 3979 } __packed req = { 3980 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG), 3981 .len = cpu_to_le16(sizeof(req) - 4), 3982 .ctrl = { 3983 .band_idx = phy->mt76->band_idx, 3984 }, 3985 }; 3986 int level, ret; 3987 3988 /* set duty cycle and level */ 3989 for (level = 0; level < 4; level++) { 3990 req.ctrl.duty.duty_level = level; 3991 req.ctrl.duty.duty_cycle = state; 3992 state /= 2; 3993 3994 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3995 &req, sizeof(req), false); 3996 if (ret) 3997 return ret; 3998 } 3999 4000 return 0; 4001 } 4002 4003 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable) 4004 { 4005 #define SUSTAIN_PERIOD 10 4006 struct { 4007 u8 _rsv[4]; 4008 4009 __le16 tag; 4010 __le16 len; 4011 4012 struct mt7996_mcu_thermal_ctrl ctrl; 4013 struct mt7996_mcu_thermal_enable enable; 4014 } __packed req = { 4015 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)), 4016 .ctrl = { 4017 .band_idx = phy->mt76->band_idx, 4018 .type.protect_type = 1, 4019 .type.trigger_type = 1, 4020 }, 4021 }; 4022 int ret; 4023 4024 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE); 4025 4026 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4027 &req, sizeof(req) - sizeof(req.enable), false); 4028 if (ret || !enable) 4029 return ret; 4030 4031 /* set high-temperature trigger threshold */ 4032 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE); 4033 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]); 4034 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 4035 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD); 4036 4037 req.len = cpu_to_le16(sizeof(req) - 4); 4038 4039 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4040 &req, sizeof(req), false); 4041 } 4042 4043 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 4044 { 4045 struct { 4046 u8 rsv[4]; 4047 4048 __le16 tag; 4049 __le16 len; 4050 4051 union { 4052 struct { 4053 __le32 mask; 4054 } __packed set; 4055 4056 struct { 4057 u8 method; 4058 u8 band; 4059 u8 rsv2[2]; 4060 } __packed trigger; 4061 }; 4062 } __packed req = { 4063 .tag = cpu_to_le16(action), 4064 .len = cpu_to_le16(sizeof(req) - 4), 4065 }; 4066 4067 switch (action) { 4068 case UNI_CMD_SER_SET: 4069 req.set.mask = cpu_to_le32(val); 4070 break; 4071 case UNI_CMD_SER_TRIGGER: 4072 req.trigger.method = val; 4073 req.trigger.band = band; 4074 break; 4075 default: 4076 return -EINVAL; 4077 } 4078 4079 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 4080 &req, sizeof(req), false); 4081 } 4082 4083 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 4084 { 4085 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 4086 #define BF_PROCESSING 4 4087 struct uni_header hdr; 4088 struct sk_buff *skb; 4089 struct tlv *tlv; 4090 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 4091 4092 memset(&hdr, 0, sizeof(hdr)); 4093 4094 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 4095 if (!skb) 4096 return -ENOMEM; 4097 4098 skb_put_data(skb, &hdr, sizeof(hdr)); 4099 4100 switch (action) { 4101 case BF_SOUNDING_ON: { 4102 struct bf_sounding_on *req_snd_on; 4103 4104 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 4105 req_snd_on = (struct bf_sounding_on *)tlv; 4106 req_snd_on->snd_mode = BF_PROCESSING; 4107 break; 4108 } 4109 case BF_HW_EN_UPDATE: { 4110 struct bf_hw_en_status_update *req_hw_en; 4111 4112 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 4113 req_hw_en = (struct bf_hw_en_status_update *)tlv; 4114 req_hw_en->ebf = true; 4115 req_hw_en->ibf = dev->ibf; 4116 break; 4117 } 4118 case BF_MOD_EN_CTRL: { 4119 struct bf_mod_en_ctrl *req_mod_en; 4120 4121 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 4122 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 4123 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2; 4124 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ? 4125 GENMASK(2, 0) : GENMASK(1, 0); 4126 break; 4127 } 4128 default: 4129 return -EINVAL; 4130 } 4131 4132 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 4133 } 4134 4135 static int 4136 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 4137 { 4138 struct mt7996_dev *dev = phy->dev; 4139 struct { 4140 u8 band_idx; 4141 u8 __rsv[3]; 4142 4143 __le16 tag; 4144 __le16 len; 4145 4146 __le32 val; 4147 } __packed req = { 4148 .band_idx = phy->mt76->band_idx, 4149 .tag = cpu_to_le16(action), 4150 .len = cpu_to_le16(sizeof(req) - 4), 4151 .val = cpu_to_le32(val), 4152 }; 4153 4154 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4155 &req, sizeof(req), true); 4156 } 4157 4158 static int 4159 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 4160 struct ieee80211_he_obss_pd *he_obss_pd) 4161 { 4162 struct mt7996_dev *dev = phy->dev; 4163 u8 max_th = 82, non_srg_max_th = 62; 4164 struct { 4165 u8 band_idx; 4166 u8 __rsv[3]; 4167 4168 __le16 tag; 4169 __le16 len; 4170 4171 u8 pd_th_non_srg; 4172 u8 pd_th_srg; 4173 u8 period_offs; 4174 u8 rcpi_src; 4175 __le16 obss_pd_min; 4176 __le16 obss_pd_min_srg; 4177 u8 resp_txpwr_mode; 4178 u8 txpwr_restrict_mode; 4179 u8 txpwr_ref; 4180 u8 __rsv2[3]; 4181 } __packed req = { 4182 .band_idx = phy->mt76->band_idx, 4183 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 4184 .len = cpu_to_le16(sizeof(req) - 4), 4185 .obss_pd_min = cpu_to_le16(max_th), 4186 .obss_pd_min_srg = cpu_to_le16(max_th), 4187 .txpwr_restrict_mode = 2, 4188 .txpwr_ref = 21 4189 }; 4190 int ret; 4191 4192 /* disable firmware dynamical PD asjustment */ 4193 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 4194 if (ret) 4195 return ret; 4196 4197 if (he_obss_pd->sr_ctrl & 4198 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 4199 req.pd_th_non_srg = max_th; 4200 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 4201 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 4202 else 4203 req.pd_th_non_srg = non_srg_max_th; 4204 4205 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 4206 req.pd_th_srg = max_th - he_obss_pd->max_offset; 4207 4208 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4209 &req, sizeof(req), true); 4210 } 4211 4212 static int 4213 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, 4214 struct mt7996_vif_link *link, 4215 struct ieee80211_he_obss_pd *he_obss_pd) 4216 { 4217 struct mt7996_dev *dev = phy->dev; 4218 u8 omac = link->mt76.omac_idx; 4219 struct { 4220 u8 band_idx; 4221 u8 __rsv[3]; 4222 4223 __le16 tag; 4224 __le16 len; 4225 4226 u8 omac; 4227 u8 __rsv2[3]; 4228 u8 flag[20]; 4229 } __packed req = { 4230 .band_idx = phy->mt76->band_idx, 4231 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 4232 .len = cpu_to_le16(sizeof(req) - 4), 4233 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 4234 }; 4235 int ret; 4236 4237 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 4238 req.flag[req.omac] = 0xf; 4239 else 4240 return 0; 4241 4242 /* switch to normal AP mode */ 4243 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 4244 if (ret) 4245 return ret; 4246 4247 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4248 &req, sizeof(req), true); 4249 } 4250 4251 static int 4252 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 4253 struct ieee80211_he_obss_pd *he_obss_pd) 4254 { 4255 struct mt7996_dev *dev = phy->dev; 4256 struct { 4257 u8 band_idx; 4258 u8 __rsv[3]; 4259 4260 __le16 tag; 4261 __le16 len; 4262 4263 __le32 color_l[2]; 4264 __le32 color_h[2]; 4265 __le32 bssid_l[2]; 4266 __le32 bssid_h[2]; 4267 } __packed req = { 4268 .band_idx = phy->mt76->band_idx, 4269 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 4270 .len = cpu_to_le16(sizeof(req) - 4), 4271 }; 4272 u32 bitmap; 4273 4274 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 4275 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 4276 4277 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 4278 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 4279 4280 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 4281 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 4282 4283 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 4284 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 4285 4286 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 4287 sizeof(req), true); 4288 } 4289 4290 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, 4291 struct mt7996_vif_link *link, 4292 struct ieee80211_he_obss_pd *he_obss_pd) 4293 { 4294 int ret; 4295 4296 /* enable firmware scene detection algorithms */ 4297 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 4298 sr_scene_detect); 4299 if (ret) 4300 return ret; 4301 4302 /* firmware dynamically adjusts PD threshold so skip manual control */ 4303 if (sr_scene_detect && !he_obss_pd->enable) 4304 return 0; 4305 4306 /* enable spatial reuse */ 4307 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 4308 he_obss_pd->enable); 4309 if (ret) 4310 return ret; 4311 4312 if (sr_scene_detect || !he_obss_pd->enable) 4313 return 0; 4314 4315 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 4316 if (ret) 4317 return ret; 4318 4319 /* set SRG/non-SRG OBSS PD threshold */ 4320 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 4321 if (ret) 4322 return ret; 4323 4324 /* Set SR prohibit */ 4325 ret = mt7996_mcu_set_obss_spr_siga(phy, link, he_obss_pd); 4326 if (ret) 4327 return ret; 4328 4329 /* set SRG BSS color/BSSID bitmap */ 4330 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 4331 } 4332 4333 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 4334 struct mt76_vif_link *mlink, 4335 struct cfg80211_he_bss_color *he_bss_color) 4336 { 4337 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 4338 struct bss_color_tlv *bss_color; 4339 struct sk_buff *skb; 4340 struct tlv *tlv; 4341 4342 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, len); 4343 if (IS_ERR(skb)) 4344 return PTR_ERR(skb); 4345 4346 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 4347 sizeof(*bss_color)); 4348 bss_color = (struct bss_color_tlv *)tlv; 4349 bss_color->enable = he_bss_color->enabled; 4350 bss_color->color = he_bss_color->color; 4351 4352 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4353 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 4354 } 4355 4356 #define TWT_AGRT_TRIGGER BIT(0) 4357 #define TWT_AGRT_ANNOUNCE BIT(1) 4358 #define TWT_AGRT_PROTECT BIT(2) 4359 4360 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 4361 struct mt7996_vif_link *link, 4362 struct mt7996_twt_flow *flow, 4363 int cmd) 4364 { 4365 struct { 4366 /* fixed field */ 4367 u8 bss; 4368 u8 _rsv[3]; 4369 4370 __le16 tag; 4371 __le16 len; 4372 u8 tbl_idx; 4373 u8 cmd; 4374 u8 own_mac_idx; 4375 u8 flowid; /* 0xff for group id */ 4376 __le16 peer_id; /* specify the peer_id (msb=0) 4377 * or group_id (msb=1) 4378 */ 4379 u8 duration; /* 256 us */ 4380 u8 bss_idx; 4381 __le64 start_tsf; 4382 __le16 mantissa; 4383 u8 exponent; 4384 u8 is_ap; 4385 u8 agrt_params; 4386 u8 __rsv2[23]; 4387 } __packed req = { 4388 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 4389 .len = cpu_to_le16(sizeof(req) - 4), 4390 .tbl_idx = flow->table_id, 4391 .cmd = cmd, 4392 .own_mac_idx = link->mt76.omac_idx, 4393 .flowid = flow->id, 4394 .peer_id = cpu_to_le16(flow->wcid), 4395 .duration = flow->duration, 4396 .bss = link->mt76.idx, 4397 .bss_idx = link->mt76.idx, 4398 .start_tsf = cpu_to_le64(flow->tsf), 4399 .mantissa = flow->mantissa, 4400 .exponent = flow->exp, 4401 .is_ap = true, 4402 }; 4403 4404 if (flow->protection) 4405 req.agrt_params |= TWT_AGRT_PROTECT; 4406 if (!flow->flowtype) 4407 req.agrt_params |= TWT_AGRT_ANNOUNCE; 4408 if (flow->trigger) 4409 req.agrt_params |= TWT_AGRT_TRIGGER; 4410 4411 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 4412 &req, sizeof(req), true); 4413 } 4414 4415 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 4416 { 4417 struct { 4418 u8 band_idx; 4419 u8 _rsv[3]; 4420 4421 __le16 tag; 4422 __le16 len; 4423 __le32 len_thresh; 4424 __le32 pkt_thresh; 4425 } __packed req = { 4426 .band_idx = phy->mt76->band_idx, 4427 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 4428 .len = cpu_to_le16(sizeof(req) - 4), 4429 .len_thresh = cpu_to_le32(val), 4430 .pkt_thresh = cpu_to_le32(0x2), 4431 }; 4432 4433 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4434 &req, sizeof(req), true); 4435 } 4436 4437 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 4438 { 4439 struct { 4440 u8 band_idx; 4441 u8 _rsv[3]; 4442 4443 __le16 tag; 4444 __le16 len; 4445 u8 enable; 4446 u8 _rsv2[3]; 4447 } __packed req = { 4448 .band_idx = phy->mt76->band_idx, 4449 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 4450 .len = cpu_to_le16(sizeof(req) - 4), 4451 .enable = enable, 4452 }; 4453 4454 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4455 &req, sizeof(req), true); 4456 } 4457 4458 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 rdd_idx, u8 val) 4459 { 4460 struct { 4461 u8 _rsv[4]; 4462 4463 __le16 tag; 4464 __le16 len; 4465 4466 u8 ctrl; 4467 u8 rdd_idx; 4468 u8 rdd_rx_sel; 4469 u8 val; 4470 u8 rsv[4]; 4471 } __packed req = { 4472 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 4473 .len = cpu_to_le16(sizeof(req) - 4), 4474 .ctrl = cmd, 4475 .rdd_idx = rdd_idx, 4476 .val = val, 4477 }; 4478 4479 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 4480 &req, sizeof(req), true); 4481 } 4482 4483 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 4484 struct ieee80211_vif *vif, 4485 struct mt7996_vif_link *link, 4486 struct mt7996_sta_link *msta_link) 4487 { 4488 struct sk_buff *skb; 4489 4490 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 4491 &msta_link->wcid, 4492 MT7996_STA_UPDATE_MAX_SIZE); 4493 if (IS_ERR(skb)) 4494 return PTR_ERR(skb); 4495 4496 /* starec hdr trans */ 4497 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, &msta_link->wcid); 4498 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4499 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 4500 } 4501 4502 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 4503 u16 rate_idx, bool beacon) 4504 { 4505 #define UNI_FIXED_RATE_TABLE_SET 0 4506 #define SPE_IXD_SELECT_TXD 0 4507 #define SPE_IXD_SELECT_BMC_WTBL 1 4508 struct mt7996_dev *dev = phy->dev; 4509 struct fixed_rate_table_ctrl req = { 4510 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET), 4511 .len = cpu_to_le16(sizeof(req) - 4), 4512 .table_idx = table_idx, 4513 .rate_idx = cpu_to_le16(rate_idx), 4514 .gi = 1, 4515 .he_ltf = 1, 4516 }; 4517 u8 band_idx = phy->mt76->band_idx; 4518 4519 if (beacon) { 4520 req.spe_idx_sel = SPE_IXD_SELECT_TXD; 4521 req.spe_idx = 24 + band_idx; 4522 phy->beacon_rate = rate_idx; 4523 } else { 4524 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL; 4525 } 4526 4527 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE), 4528 &req, sizeof(req), false); 4529 } 4530 4531 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 4532 { 4533 struct { 4534 u8 __rsv1[4]; 4535 4536 __le16 tag; 4537 __le16 len; 4538 __le16 idx; 4539 u8 __rsv2[2]; 4540 __le32 ofs; 4541 __le32 data; 4542 } __packed *res, req = { 4543 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 4544 .len = cpu_to_le16(sizeof(req) - 4), 4545 4546 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 4547 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4548 .data = set ? cpu_to_le32(*val) : 0, 4549 }; 4550 struct sk_buff *skb; 4551 int ret; 4552 4553 if (set) 4554 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 4555 &req, sizeof(req), true); 4556 4557 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 4558 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 4559 &req, sizeof(req), true, &skb); 4560 if (ret) 4561 return ret; 4562 4563 res = (void *)skb->data; 4564 *val = le32_to_cpu(res->data); 4565 dev_kfree_skb(skb); 4566 4567 return 0; 4568 } 4569 4570 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 4571 { 4572 struct { 4573 __le16 tag; 4574 __le16 len; 4575 u8 enable; 4576 u8 rsv[3]; 4577 } __packed req = { 4578 .len = cpu_to_le16(sizeof(req) - 4), 4579 .enable = true, 4580 }; 4581 4582 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 4583 &req, sizeof(req), false); 4584 } 4585 4586 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val) 4587 { 4588 struct { 4589 u8 __rsv1[4]; 4590 __le16 tag; 4591 __le16 len; 4592 union { 4593 struct { 4594 u8 type; 4595 u8 __rsv2[3]; 4596 } __packed platform_type; 4597 struct { 4598 u8 type; 4599 u8 dest; 4600 u8 __rsv2[2]; 4601 } __packed bypass_mode; 4602 struct { 4603 u8 path; 4604 u8 __rsv2[3]; 4605 } __packed txfree_path; 4606 struct { 4607 __le16 flush_one; 4608 __le16 flush_all; 4609 u8 __rsv2[4]; 4610 } __packed timeout; 4611 }; 4612 } __packed req = { 4613 .tag = cpu_to_le16(tag), 4614 .len = cpu_to_le16(sizeof(req) - 4), 4615 }; 4616 4617 switch (tag) { 4618 case UNI_RRO_SET_PLATFORM_TYPE: 4619 req.platform_type.type = val; 4620 break; 4621 case UNI_RRO_SET_BYPASS_MODE: 4622 req.bypass_mode.type = val; 4623 break; 4624 case UNI_RRO_SET_TXFREE_PATH: 4625 req.txfree_path.path = val; 4626 break; 4627 case UNI_RRO_SET_FLUSH_TIMEOUT: 4628 req.timeout.flush_one = cpu_to_le16(val); 4629 req.timeout.flush_all = cpu_to_le16(2 * val); 4630 break; 4631 default: 4632 return -EINVAL; 4633 } 4634 4635 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4636 sizeof(req), true); 4637 } 4638 4639 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 4640 { 4641 struct mt7996_dev *dev = phy->dev; 4642 struct { 4643 u8 _rsv[4]; 4644 4645 __le16 tag; 4646 __le16 len; 4647 } __packed req = { 4648 .tag = cpu_to_le16(tag), 4649 .len = cpu_to_le16(sizeof(req) - 4), 4650 }; 4651 4652 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 4653 &req, sizeof(req), false); 4654 } 4655 4656 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id) 4657 { 4658 struct { 4659 u8 __rsv[4]; 4660 4661 __le16 tag; 4662 __le16 len; 4663 __le16 session_id; 4664 u8 pad[4]; 4665 } __packed req = { 4666 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION), 4667 .len = cpu_to_le16(sizeof(req) - 4), 4668 .session_id = cpu_to_le16(id), 4669 }; 4670 4671 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4672 sizeof(req), true); 4673 } 4674 4675 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled) 4676 { 4677 struct mt7996_dev *dev = phy->dev; 4678 struct { 4679 u8 band_idx; 4680 u8 _rsv[3]; 4681 __le16 tag; 4682 __le16 len; 4683 u8 enable; 4684 u8 _pad[3]; 4685 } __packed req = { 4686 .band_idx = phy->mt76->band_idx, 4687 .tag = 0, 4688 .len = cpu_to_le16(sizeof(req) - 4), 4689 .enable = enabled, 4690 }; 4691 4692 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SNIFFER), &req, 4693 sizeof(req), true); 4694 } 4695 4696 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) 4697 { 4698 #define TX_POWER_LIMIT_TABLE_RATE 0 4699 struct mt7996_dev *dev = phy->dev; 4700 struct mt76_phy *mphy = phy->mt76; 4701 struct tx_power_limit_table_ctrl { 4702 u8 __rsv1[4]; 4703 4704 __le16 tag; 4705 __le16 len; 4706 u8 power_ctrl_id; 4707 u8 power_limit_type; 4708 u8 band_idx; 4709 } __packed req = { 4710 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL), 4711 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4), 4712 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL, 4713 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE, 4714 .band_idx = phy->mt76->band_idx, 4715 }; 4716 struct mt76_power_limits la = {}; 4717 struct sk_buff *skb; 4718 int i, tx_power; 4719 4720 tx_power = mt76_get_power_bound(mphy, phy->txpower); 4721 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 4722 &la, tx_power); 4723 mphy->txpower_cur = tx_power; 4724 4725 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 4726 sizeof(req) + MT7996_SKU_PATH_NUM); 4727 if (!skb) 4728 return -ENOMEM; 4729 4730 skb_put_data(skb, &req, sizeof(req)); 4731 /* cck and ofdm */ 4732 skb_put_data(skb, &la.cck, sizeof(la.cck)); 4733 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm)); 4734 /* ht20 */ 4735 skb_put_data(skb, &la.mcs[0], 8); 4736 /* ht40 */ 4737 skb_put_data(skb, &la.mcs[1], 9); 4738 4739 /* vht */ 4740 for (i = 0; i < 4; i++) { 4741 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); 4742 skb_put_zero(skb, 2); /* padding */ 4743 } 4744 4745 /* he */ 4746 skb_put_data(skb, &la.ru[0], sizeof(la.ru)); 4747 /* eht */ 4748 skb_put_data(skb, &la.eht[0], sizeof(la.eht)); 4749 4750 /* padding */ 4751 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM); 4752 4753 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4754 MCU_WM_UNI_CMD(TXPOWER), true); 4755 } 4756 4757 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode) 4758 { 4759 __le32 cp_mode; 4760 4761 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) || 4762 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO)) 4763 return -EINVAL; 4764 4765 if (!mt7996_has_wa(dev)) { 4766 struct { 4767 u8 _rsv[4]; 4768 4769 __le16 tag; 4770 __le16 len; 4771 u8 cp_mode; 4772 u8 rsv[3]; 4773 } __packed req = { 4774 .tag = cpu_to_le16(UNI_CMD_SDO_CP_MODE), 4775 .len = cpu_to_le16(sizeof(req) - 4), 4776 .cp_mode = mode, 4777 }; 4778 4779 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(SDO), 4780 &req, sizeof(req), false); 4781 } 4782 4783 cp_mode = cpu_to_le32(mode); 4784 4785 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT), 4786 &cp_mode, sizeof(cp_mode), true); 4787 } 4788