1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 struct mt7996_patch_hdr { 14 char build_date[16]; 15 char platform[4]; 16 __be32 hw_sw_ver; 17 __be32 patch_ver; 18 __be16 checksum; 19 u16 reserved; 20 struct { 21 __be32 patch_ver; 22 __be32 subsys; 23 __be32 feature; 24 __be32 n_region; 25 __be32 crc; 26 u32 reserved[11]; 27 } desc; 28 } __packed; 29 30 struct mt7996_patch_sec { 31 __be32 type; 32 __be32 offs; 33 __be32 size; 34 union { 35 __be32 spec[13]; 36 struct { 37 __be32 addr; 38 __be32 len; 39 __be32 sec_key_idx; 40 __be32 align_len; 41 u32 reserved[9]; 42 } info; 43 }; 44 } __packed; 45 46 struct mt7996_fw_trailer { 47 u8 chip_id; 48 u8 eco_code; 49 u8 n_region; 50 u8 format_ver; 51 u8 format_flag; 52 u8 reserved[2]; 53 char fw_ver[10]; 54 char build_date[15]; 55 u32 crc; 56 } __packed; 57 58 struct mt7996_fw_region { 59 __le32 decomp_crc; 60 __le32 decomp_len; 61 __le32 decomp_blk_sz; 62 u8 reserved[4]; 63 __le32 addr; 64 __le32 len; 65 u8 feature_set; 66 u8 reserved1[15]; 67 } __packed; 68 69 #define MCU_PATCH_ADDRESS 0x200000 70 71 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 72 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 73 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 74 75 static bool sr_scene_detect = true; 76 module_param(sr_scene_detect, bool, 0644); 77 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 78 79 static u8 80 mt7996_mcu_get_sta_nss(u16 mcs_map) 81 { 82 u8 nss; 83 84 for (nss = 8; nss > 0; nss--) { 85 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 86 87 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 88 break; 89 } 90 91 return nss - 1; 92 } 93 94 static void 95 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 96 u16 mcs_map) 97 { 98 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 99 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; 100 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; 101 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 102 103 for (nss = 0; nss < max_nss; nss++) { 104 int mcs; 105 106 switch ((mcs_map >> (2 * nss)) & 0x3) { 107 case IEEE80211_HE_MCS_SUPPORT_0_11: 108 mcs = GENMASK(11, 0); 109 break; 110 case IEEE80211_HE_MCS_SUPPORT_0_9: 111 mcs = GENMASK(9, 0); 112 break; 113 case IEEE80211_HE_MCS_SUPPORT_0_7: 114 mcs = GENMASK(7, 0); 115 break; 116 default: 117 mcs = 0; 118 } 119 120 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 121 122 switch (mcs) { 123 case 0 ... 7: 124 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 125 break; 126 case 8 ... 9: 127 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 128 break; 129 case 10 ... 11: 130 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 131 break; 132 default: 133 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 134 break; 135 } 136 mcs_map &= ~(0x3 << (nss * 2)); 137 mcs_map |= mcs << (nss * 2); 138 } 139 140 *he_mcs = cpu_to_le16(mcs_map); 141 } 142 143 static void 144 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 145 const u16 *mask) 146 { 147 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 148 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 149 150 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 151 switch (mcs_map & 0x3) { 152 case IEEE80211_VHT_MCS_SUPPORT_0_9: 153 mcs = GENMASK(9, 0); 154 break; 155 case IEEE80211_VHT_MCS_SUPPORT_0_8: 156 mcs = GENMASK(8, 0); 157 break; 158 case IEEE80211_VHT_MCS_SUPPORT_0_7: 159 mcs = GENMASK(7, 0); 160 break; 161 default: 162 mcs = 0; 163 } 164 165 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 166 } 167 } 168 169 static void 170 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 171 const u8 *mask) 172 { 173 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 174 175 for (nss = 0; nss < max_nss; nss++) 176 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 177 } 178 179 static int 180 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 181 struct sk_buff *skb, int seq) 182 { 183 struct mt7996_mcu_rxd *rxd; 184 struct mt7996_mcu_uni_event *event; 185 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 186 int ret = 0; 187 188 if (!skb) { 189 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 190 cmd, seq); 191 return -ETIMEDOUT; 192 } 193 194 rxd = (struct mt7996_mcu_rxd *)skb->data; 195 if (seq != rxd->seq) 196 return -EAGAIN; 197 198 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 199 skb_pull(skb, sizeof(*rxd) - 4); 200 ret = *skb->data; 201 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 202 rxd->eid == MCU_UNI_EVENT_RESULT) { 203 skb_pull(skb, sizeof(*rxd)); 204 event = (struct mt7996_mcu_uni_event *)skb->data; 205 ret = le32_to_cpu(event->status); 206 /* skip invalid event */ 207 if (mcu_cmd != event->cid) 208 ret = -EAGAIN; 209 } else { 210 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 211 } 212 213 return ret; 214 } 215 216 static int 217 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 218 int cmd, int *wait_seq) 219 { 220 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 221 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 222 struct mt76_connac2_mcu_uni_txd *uni_txd; 223 struct mt76_connac2_mcu_txd *mcu_txd; 224 enum mt76_mcuq_id qid; 225 __le32 *txd; 226 u32 val; 227 u8 seq; 228 229 mdev->mcu.timeout = 20 * HZ; 230 231 seq = ++dev->mt76.mcu.msg_seq & 0xf; 232 if (!seq) 233 seq = ++dev->mt76.mcu.msg_seq & 0xf; 234 235 if (cmd == MCU_CMD(FW_SCATTER)) { 236 qid = MT_MCUQ_FWDL; 237 goto exit; 238 } 239 240 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 241 txd = (__le32 *)skb_push(skb, txd_len); 242 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 243 qid = MT_MCUQ_WA; 244 else 245 qid = MT_MCUQ_WM; 246 247 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 248 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 249 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 250 txd[0] = cpu_to_le32(val); 251 252 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 253 txd[1] = cpu_to_le32(val); 254 255 if (cmd & __MCU_CMD_FIELD_UNI) { 256 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 257 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 258 uni_txd->cid = cpu_to_le16(mcu_cmd); 259 uni_txd->s2d_index = MCU_S2D_H2CN; 260 uni_txd->pkt_type = MCU_PKT_ID; 261 uni_txd->seq = seq; 262 263 if (cmd & __MCU_CMD_FIELD_QUERY) 264 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 265 else 266 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 267 268 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 269 uni_txd->s2d_index = MCU_S2D_H2CN; 270 else if (cmd & __MCU_CMD_FIELD_WA) 271 uni_txd->s2d_index = MCU_S2D_H2C; 272 else if (cmd & __MCU_CMD_FIELD_WM) 273 uni_txd->s2d_index = MCU_S2D_H2N; 274 275 goto exit; 276 } 277 278 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 279 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 280 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 281 MT_TX_MCU_PORT_RX_Q0)); 282 mcu_txd->pkt_type = MCU_PKT_ID; 283 mcu_txd->seq = seq; 284 285 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 286 mcu_txd->set_query = MCU_Q_NA; 287 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 288 if (mcu_txd->ext_cid) { 289 mcu_txd->ext_cid_ack = 1; 290 291 if (cmd & __MCU_CMD_FIELD_QUERY) 292 mcu_txd->set_query = MCU_Q_QUERY; 293 else 294 mcu_txd->set_query = MCU_Q_SET; 295 } 296 297 if (cmd & __MCU_CMD_FIELD_WA) 298 mcu_txd->s2d_index = MCU_S2D_H2C; 299 else 300 mcu_txd->s2d_index = MCU_S2D_H2N; 301 302 exit: 303 if (wait_seq) 304 *wait_seq = seq; 305 306 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 307 } 308 309 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 310 { 311 struct { 312 __le32 args[3]; 313 } req = { 314 .args = { 315 cpu_to_le32(a1), 316 cpu_to_le32(a2), 317 cpu_to_le32(a3), 318 }, 319 }; 320 321 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 322 } 323 324 static void 325 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 326 { 327 if (vif->bss_conf.csa_active) 328 ieee80211_csa_finish(vif); 329 } 330 331 static void 332 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 333 { 334 struct mt76_phy *mphy = &dev->mt76.phy; 335 struct mt7996_mcu_rdd_report *r; 336 337 r = (struct mt7996_mcu_rdd_report *)skb->data; 338 339 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys)) 340 return; 341 342 mphy = dev->mt76.phys[r->band_idx]; 343 if (!mphy) 344 return; 345 346 if (r->band_idx == MT_RX_SEL2) 347 cfg80211_background_radar_event(mphy->hw->wiphy, 348 &dev->rdd2_chandef, 349 GFP_ATOMIC); 350 else 351 ieee80211_radar_detected(mphy->hw); 352 dev->hw_pattern++; 353 } 354 355 static void 356 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 357 { 358 #define UNI_EVENT_FW_LOG_FORMAT 0 359 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 360 const char *data = (char *)&rxd[1] + 4, *type; 361 struct tlv *tlv = (struct tlv *)data; 362 int len; 363 364 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 365 len = skb->len - sizeof(*rxd); 366 data = (char *)&rxd[1]; 367 goto out; 368 } 369 370 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 371 return; 372 373 data += sizeof(*tlv) + 4; 374 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 375 376 out: 377 switch (rxd->s2d_index) { 378 case 0: 379 if (mt7996_debugfs_rx_log(dev, data, len)) 380 return; 381 382 type = "WM"; 383 break; 384 case 2: 385 type = "WA"; 386 break; 387 default: 388 type = "unknown"; 389 break; 390 } 391 392 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 393 } 394 395 static void 396 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 397 { 398 if (!vif->bss_conf.color_change_active) 399 return; 400 401 ieee80211_color_change_finish(vif); 402 } 403 404 static void 405 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 406 { 407 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 408 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 409 struct header { 410 u8 band; 411 u8 rsv[3]; 412 }; 413 struct mt76_phy *mphy = &dev->mt76.phy; 414 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 415 const char *data = (char *)&rxd[1], *tail; 416 struct header *hdr = (struct header *)data; 417 struct tlv *tlv = (struct tlv *)(data + 4); 418 419 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 420 return; 421 422 if (hdr->band && dev->mt76.phys[hdr->band]) 423 mphy = dev->mt76.phys[hdr->band]; 424 425 tail = skb->data + skb->len; 426 data += sizeof(struct header); 427 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 428 switch (le16_to_cpu(tlv->tag)) { 429 case UNI_EVENT_IE_COUNTDOWN_CSA: 430 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 431 IEEE80211_IFACE_ITER_RESUME_ALL, 432 mt7996_mcu_csa_finish, mphy->hw); 433 break; 434 case UNI_EVENT_IE_COUNTDOWN_BCC: 435 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 436 IEEE80211_IFACE_ITER_RESUME_ALL, 437 mt7996_mcu_cca_finish, mphy->hw); 438 break; 439 } 440 441 data += le16_to_cpu(tlv->len); 442 tlv = (struct tlv *)data; 443 } 444 } 445 446 static void 447 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 448 { 449 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 450 451 switch (rxd->ext_eid) { 452 case MCU_EXT_EVENT_FW_LOG_2_HOST: 453 mt7996_mcu_rx_log_message(dev, skb); 454 break; 455 default: 456 break; 457 } 458 } 459 460 static void 461 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 462 { 463 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 464 465 switch (rxd->eid) { 466 case MCU_EVENT_EXT: 467 mt7996_mcu_rx_ext_event(dev, skb); 468 break; 469 default: 470 break; 471 } 472 dev_kfree_skb(skb); 473 } 474 475 static void 476 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 477 { 478 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 479 480 switch (rxd->eid) { 481 case MCU_UNI_EVENT_FW_LOG_2_HOST: 482 mt7996_mcu_rx_log_message(dev, skb); 483 break; 484 case MCU_UNI_EVENT_IE_COUNTDOWN: 485 mt7996_mcu_ie_countdown(dev, skb); 486 break; 487 case MCU_UNI_EVENT_RDD_REPORT: 488 mt7996_mcu_rx_radar_detected(dev, skb); 489 break; 490 default: 491 break; 492 } 493 dev_kfree_skb(skb); 494 } 495 496 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 497 { 498 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 499 500 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 501 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 502 return; 503 } 504 505 /* WA still uses legacy event*/ 506 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 507 !rxd->seq) 508 mt7996_mcu_rx_unsolicited_event(dev, skb); 509 else 510 mt76_mcu_rx_event(&dev->mt76, skb); 511 } 512 513 static struct tlv * 514 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 515 { 516 struct tlv *ptlv, tlv = { 517 .tag = cpu_to_le16(tag), 518 .len = cpu_to_le16(len), 519 }; 520 521 ptlv = skb_put(skb, len); 522 memcpy(ptlv, &tlv, sizeof(tlv)); 523 524 return ptlv; 525 } 526 527 static void 528 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 529 struct mt7996_phy *phy) 530 { 531 static const u8 rlm_ch_band[] = { 532 [NL80211_BAND_2GHZ] = 1, 533 [NL80211_BAND_5GHZ] = 2, 534 [NL80211_BAND_6GHZ] = 3, 535 }; 536 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 537 struct bss_rlm_tlv *ch; 538 struct tlv *tlv; 539 int freq1 = chandef->center_freq1; 540 541 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 542 543 ch = (struct bss_rlm_tlv *)tlv; 544 ch->control_channel = chandef->chan->hw_value; 545 ch->center_chan = ieee80211_frequency_to_channel(freq1); 546 ch->bw = mt76_connac_chan_bw(chandef); 547 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 548 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 549 ch->band = rlm_ch_band[chandef->chan->band]; 550 551 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 552 int freq2 = chandef->center_freq2; 553 554 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 555 } 556 } 557 558 static void 559 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 560 struct mt7996_phy *phy) 561 { 562 struct bss_ra_tlv *ra; 563 struct tlv *tlv; 564 565 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 566 567 ra = (struct bss_ra_tlv *)tlv; 568 ra->short_preamble = true; 569 } 570 571 static void 572 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 573 struct mt7996_phy *phy) 574 { 575 #define DEFAULT_HE_PE_DURATION 4 576 #define DEFAULT_HE_DURATION_RTS_THRES 1023 577 const struct ieee80211_sta_he_cap *cap; 578 struct bss_info_uni_he *he; 579 struct tlv *tlv; 580 581 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 582 583 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 584 585 he = (struct bss_info_uni_he *)tlv; 586 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 587 if (!he->he_pe_duration) 588 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 589 590 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 591 if (!he->he_rts_thres) 592 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 593 594 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 595 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 596 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 597 } 598 599 static void 600 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 601 struct mt7996_phy *phy) 602 { 603 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 604 struct bss_rate_tlv *bmc; 605 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 606 enum nl80211_band band = chandef->chan->band; 607 struct tlv *tlv; 608 u8 idx = mvif->mcast_rates_idx ? 609 mvif->mcast_rates_idx : mvif->basic_rates_idx; 610 611 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 612 613 bmc = (struct bss_rate_tlv *)tlv; 614 615 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 616 bmc->bc_fixed_rate = idx; 617 bmc->mc_fixed_rate = idx; 618 } 619 620 static void 621 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 622 { 623 struct bss_txcmd_tlv *txcmd; 624 struct tlv *tlv; 625 626 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 627 628 txcmd = (struct bss_txcmd_tlv *)tlv; 629 txcmd->txcmd_mode = en; 630 } 631 632 static void 633 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 634 { 635 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 636 struct bss_mld_tlv *mld; 637 struct tlv *tlv; 638 639 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 640 641 mld = (struct bss_mld_tlv *)tlv; 642 mld->group_mld_id = 0xff; 643 mld->own_mld_id = mvif->mt76.idx; 644 mld->remap_idx = 0xff; 645 } 646 647 static void 648 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 649 { 650 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 651 struct bss_sec_tlv *sec; 652 struct tlv *tlv; 653 654 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 655 656 sec = (struct bss_sec_tlv *)tlv; 657 sec->cipher = mvif->cipher; 658 } 659 660 static int 661 mt7996_mcu_muar_config(struct mt7996_phy *phy, struct ieee80211_vif *vif, 662 bool bssid, bool enable) 663 { 664 #define UNI_MUAR_ENTRY 2 665 struct mt7996_dev *dev = phy->dev; 666 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 667 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START; 668 const u8 *addr = vif->addr; 669 670 struct { 671 struct { 672 u8 band; 673 u8 __rsv[3]; 674 } hdr; 675 676 __le16 tag; 677 __le16 len; 678 679 bool smesh; 680 u8 bssid; 681 u8 index; 682 u8 entry_add; 683 u8 addr[ETH_ALEN]; 684 u8 __rsv[2]; 685 } __packed req = { 686 .hdr.band = phy->mt76->band_idx, 687 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 688 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 689 .smesh = false, 690 .index = idx * 2 + bssid, 691 .entry_add = true, 692 }; 693 694 if (bssid) 695 addr = vif->bss_conf.bssid; 696 697 if (enable) 698 memcpy(req.addr, addr, ETH_ALEN); 699 700 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 701 sizeof(req), true); 702 } 703 704 static int 705 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 706 struct ieee80211_vif *vif, 707 struct ieee80211_sta *sta, 708 struct mt76_phy *phy, u16 wlan_idx, 709 bool enable) 710 { 711 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 712 struct cfg80211_chan_def *chandef = &phy->chandef; 713 struct mt76_connac_bss_basic_tlv *bss; 714 u32 type = CONNECTION_INFRA_AP; 715 struct tlv *tlv; 716 int idx; 717 718 switch (vif->type) { 719 case NL80211_IFTYPE_MESH_POINT: 720 case NL80211_IFTYPE_AP: 721 case NL80211_IFTYPE_MONITOR: 722 break; 723 case NL80211_IFTYPE_STATION: 724 if (enable) { 725 rcu_read_lock(); 726 if (!sta) 727 sta = ieee80211_find_sta(vif, 728 vif->bss_conf.bssid); 729 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 730 if (sta) { 731 struct mt76_wcid *wcid; 732 733 wcid = (struct mt76_wcid *)sta->drv_priv; 734 wlan_idx = wcid->idx; 735 } 736 rcu_read_unlock(); 737 } 738 type = CONNECTION_INFRA_STA; 739 break; 740 case NL80211_IFTYPE_ADHOC: 741 type = CONNECTION_IBSS_ADHOC; 742 break; 743 default: 744 WARN_ON(1); 745 break; 746 } 747 748 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 749 750 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 751 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 752 bss->dtim_period = vif->bss_conf.dtim_period; 753 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 754 bss->sta_idx = cpu_to_le16(wlan_idx); 755 bss->conn_type = cpu_to_le32(type); 756 bss->omac_idx = mvif->omac_idx; 757 bss->band_idx = mvif->band_idx; 758 bss->wmm_idx = mvif->wmm_idx; 759 bss->conn_state = !enable; 760 bss->active = enable; 761 762 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 763 bss->hw_bss_idx = idx; 764 765 if (vif->type == NL80211_IFTYPE_MONITOR) { 766 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 767 return 0; 768 } 769 770 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 771 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 772 bss->dtim_period = vif->bss_conf.dtim_period; 773 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 774 chandef->chan->band, NULL); 775 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, vif, 776 chandef->chan->band); 777 778 return 0; 779 } 780 781 static struct sk_buff * 782 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif *mvif, int len) 783 { 784 struct bss_req_hdr hdr = { 785 .bss_idx = mvif->idx, 786 }; 787 struct sk_buff *skb; 788 789 skb = mt76_mcu_msg_alloc(dev, NULL, len); 790 if (!skb) 791 return ERR_PTR(-ENOMEM); 792 793 skb_put_data(skb, &hdr, sizeof(hdr)); 794 795 return skb; 796 } 797 798 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, 799 struct ieee80211_vif *vif, int enable) 800 { 801 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 802 struct mt7996_dev *dev = phy->dev; 803 struct sk_buff *skb; 804 805 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { 806 mt7996_mcu_muar_config(phy, vif, false, enable); 807 mt7996_mcu_muar_config(phy, vif, true, enable); 808 } 809 810 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 811 MT7996_BSS_UPDATE_MAX_SIZE); 812 if (IS_ERR(skb)) 813 return PTR_ERR(skb); 814 815 /* bss_basic must be first */ 816 mt7996_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, 817 mvif->sta.wcid.idx, enable); 818 mt7996_mcu_bss_sec_tlv(skb, vif); 819 820 if (vif->type == NL80211_IFTYPE_MONITOR) 821 goto out; 822 823 if (enable) { 824 mt7996_mcu_bss_rfch_tlv(skb, vif, phy); 825 mt7996_mcu_bss_bmc_tlv(skb, vif, phy); 826 mt7996_mcu_bss_ra_tlv(skb, vif, phy); 827 mt7996_mcu_bss_txcmd_tlv(skb, true); 828 829 if (vif->bss_conf.he_support) 830 mt7996_mcu_bss_he_tlv(skb, vif, phy); 831 832 /* this tag is necessary no matter if the vif is MLD */ 833 mt7996_mcu_bss_mld_tlv(skb, vif); 834 } 835 out: 836 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 837 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 838 } 839 840 static int 841 mt7996_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 842 struct ieee80211_ampdu_params *params, 843 bool enable, bool tx) 844 { 845 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 846 struct sta_rec_ba_uni *ba; 847 struct sk_buff *skb; 848 struct tlv *tlv; 849 850 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 851 MT7996_STA_UPDATE_MAX_SIZE); 852 if (IS_ERR(skb)) 853 return PTR_ERR(skb); 854 855 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 856 857 ba = (struct sta_rec_ba_uni *)tlv; 858 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 859 ba->winsize = cpu_to_le16(params->buf_size); 860 ba->ssn = cpu_to_le16(params->ssn); 861 ba->ba_en = enable << params->tid; 862 ba->amsdu = params->amsdu; 863 ba->tid = params->tid; 864 865 return mt76_mcu_skb_send_msg(dev, skb, 866 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 867 } 868 869 /** starec & wtbl **/ 870 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 871 struct ieee80211_ampdu_params *params, 872 bool enable) 873 { 874 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 875 struct mt7996_vif *mvif = msta->vif; 876 877 if (enable && !params->amsdu) 878 msta->wcid.amsdu = false; 879 880 return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 881 enable, true); 882 } 883 884 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 885 struct ieee80211_ampdu_params *params, 886 bool enable) 887 { 888 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 889 struct mt7996_vif *mvif = msta->vif; 890 891 return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 892 enable, false); 893 } 894 895 static void 896 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 897 { 898 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 899 struct ieee80211_he_mcs_nss_supp mcs_map; 900 struct sta_rec_he_v2 *he; 901 struct tlv *tlv; 902 int i = 0; 903 904 if (!sta->deflink.he_cap.has_he) 905 return; 906 907 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 908 909 he = (struct sta_rec_he_v2 *)tlv; 910 for (i = 0; i < 11; i++) { 911 if (i < 6) 912 he->he_mac_cap[i] = elem->mac_cap_info[i]; 913 he->he_phy_cap[i] = elem->phy_cap_info[i]; 914 } 915 916 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 917 switch (sta->deflink.bandwidth) { 918 case IEEE80211_STA_RX_BW_160: 919 if (elem->phy_cap_info[0] & 920 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 921 mt7996_mcu_set_sta_he_mcs(sta, 922 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 923 le16_to_cpu(mcs_map.rx_mcs_80p80)); 924 925 mt7996_mcu_set_sta_he_mcs(sta, 926 &he->max_nss_mcs[CMD_HE_MCS_BW160], 927 le16_to_cpu(mcs_map.rx_mcs_160)); 928 fallthrough; 929 default: 930 mt7996_mcu_set_sta_he_mcs(sta, 931 &he->max_nss_mcs[CMD_HE_MCS_BW80], 932 le16_to_cpu(mcs_map.rx_mcs_80)); 933 break; 934 } 935 936 he->pkt_ext = 2; 937 } 938 939 static void 940 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 941 { 942 struct sta_rec_he_6g_capa *he_6g; 943 struct tlv *tlv; 944 945 if (!sta->deflink.he_6ghz_capa.capa) 946 return; 947 948 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 949 950 he_6g = (struct sta_rec_he_6g_capa *)tlv; 951 he_6g->capa = sta->deflink.he_6ghz_capa.capa; 952 } 953 954 static void 955 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 956 { 957 struct ieee80211_eht_mcs_nss_supp *mcs_map; 958 struct ieee80211_eht_cap_elem_fixed *elem; 959 struct sta_rec_eht *eht; 960 struct tlv *tlv; 961 962 if (!sta->deflink.eht_cap.has_eht) 963 return; 964 965 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp; 966 elem = &sta->deflink.eht_cap.eht_cap_elem; 967 968 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 969 970 eht = (struct sta_rec_eht *)tlv; 971 eht->tid_bitmap = 0xff; 972 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 973 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 974 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 975 976 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_20) 977 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, sizeof(eht->mcs_map_bw20)); 978 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 979 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 980 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 981 } 982 983 static void 984 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 985 { 986 struct sta_rec_ht *ht; 987 struct tlv *tlv; 988 989 if (!sta->deflink.ht_cap.ht_supported) 990 return; 991 992 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 993 994 ht = (struct sta_rec_ht *)tlv; 995 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 996 } 997 998 static void 999 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1000 { 1001 struct sta_rec_vht *vht; 1002 struct tlv *tlv; 1003 1004 /* For 6G band, this tlv is necessary to let hw work normally */ 1005 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported) 1006 return; 1007 1008 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1009 1010 vht = (struct sta_rec_vht *)tlv; 1011 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 1012 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 1013 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 1014 } 1015 1016 static void 1017 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1018 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1019 { 1020 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1021 struct sta_rec_amsdu *amsdu; 1022 struct tlv *tlv; 1023 1024 if (vif->type != NL80211_IFTYPE_STATION && 1025 vif->type != NL80211_IFTYPE_MESH_POINT && 1026 vif->type != NL80211_IFTYPE_AP) 1027 return; 1028 1029 if (!sta->deflink.agg.max_amsdu_len) 1030 return; 1031 1032 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1033 amsdu = (struct sta_rec_amsdu *)tlv; 1034 amsdu->max_amsdu_num = 8; 1035 amsdu->amsdu_en = true; 1036 msta->wcid.amsdu = true; 1037 1038 switch (sta->deflink.agg.max_amsdu_len) { 1039 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1040 amsdu->max_mpdu_size = 1041 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1042 return; 1043 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1044 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1045 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1046 return; 1047 default: 1048 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1049 return; 1050 } 1051 } 1052 1053 static inline bool 1054 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1055 struct ieee80211_sta *sta, bool bfee) 1056 { 1057 int sts = hweight16(phy->mt76->chainmask); 1058 1059 if (vif->type != NL80211_IFTYPE_STATION && 1060 vif->type != NL80211_IFTYPE_AP) 1061 return false; 1062 1063 if (!bfee && sts < 2) 1064 return false; 1065 1066 if (sta->deflink.eht_cap.has_eht) { 1067 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1068 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1069 1070 if (bfee) 1071 return vif->bss_conf.eht_su_beamformee && 1072 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1073 else 1074 return vif->bss_conf.eht_su_beamformer && 1075 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1076 } 1077 1078 if (sta->deflink.he_cap.has_he) { 1079 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1080 1081 if (bfee) 1082 return vif->bss_conf.he_su_beamformee && 1083 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1084 else 1085 return vif->bss_conf.he_su_beamformer && 1086 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1087 } 1088 1089 if (sta->deflink.vht_cap.vht_supported) { 1090 u32 cap = sta->deflink.vht_cap.cap; 1091 1092 if (bfee) 1093 return vif->bss_conf.vht_su_beamformee && 1094 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1095 else 1096 return vif->bss_conf.vht_su_beamformer && 1097 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1098 } 1099 1100 return false; 1101 } 1102 1103 static void 1104 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf) 1105 { 1106 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1107 bf->ndp_rate = 0; /* mcs0 */ 1108 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1109 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1110 } 1111 1112 static void 1113 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1114 struct sta_rec_bf *bf) 1115 { 1116 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1117 u8 n = 0; 1118 1119 bf->tx_mode = MT_PHY_TYPE_HT; 1120 1121 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1122 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1123 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1124 mcs->tx_params); 1125 else if (mcs->rx_mask[3]) 1126 n = 3; 1127 else if (mcs->rx_mask[2]) 1128 n = 2; 1129 else if (mcs->rx_mask[1]) 1130 n = 1; 1131 1132 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1133 bf->ncol = min_t(u8, bf->nrow, n); 1134 bf->ibf_ncol = n; 1135 } 1136 1137 static void 1138 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1139 struct sta_rec_bf *bf, bool explicit) 1140 { 1141 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1142 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1143 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1144 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1145 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1146 1147 bf->tx_mode = MT_PHY_TYPE_VHT; 1148 1149 if (explicit) { 1150 u8 sts, snd_dim; 1151 1152 mt7996_mcu_sta_sounding_rate(bf); 1153 1154 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1155 pc->cap); 1156 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1157 vc->cap); 1158 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1159 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1160 bf->ibf_ncol = bf->ncol; 1161 1162 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1163 bf->nrow = 1; 1164 } else { 1165 bf->nrow = tx_ant; 1166 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1167 bf->ibf_ncol = nss_mcs; 1168 1169 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1170 bf->ibf_nrow = 1; 1171 } 1172 } 1173 1174 static void 1175 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1176 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1177 { 1178 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1179 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1180 const struct ieee80211_sta_he_cap *vc = 1181 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1182 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1183 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1184 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1185 u8 snd_dim, sts; 1186 1187 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1188 1189 mt7996_mcu_sta_sounding_rate(bf); 1190 1191 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1192 pe->phy_cap_info[6]); 1193 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1194 pe->phy_cap_info[6]); 1195 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1196 ve->phy_cap_info[5]); 1197 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1198 pe->phy_cap_info[4]); 1199 bf->nrow = min_t(u8, snd_dim, sts); 1200 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1201 bf->ibf_ncol = bf->ncol; 1202 1203 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1204 return; 1205 1206 /* go over for 160MHz and 80p80 */ 1207 if (pe->phy_cap_info[0] & 1208 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1209 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1210 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1211 1212 bf->ncol_gt_bw80 = nss_mcs; 1213 } 1214 1215 if (pe->phy_cap_info[0] & 1216 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1217 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1218 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1219 1220 if (bf->ncol_gt_bw80) 1221 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1222 else 1223 bf->ncol_gt_bw80 = nss_mcs; 1224 } 1225 1226 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1227 ve->phy_cap_info[5]); 1228 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1229 pe->phy_cap_info[4]); 1230 1231 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1232 } 1233 1234 static void 1235 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1236 struct mt7996_phy *phy, struct sta_rec_bf *bf) 1237 { 1238 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1239 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1240 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1241 const struct ieee80211_sta_eht_cap *vc = 1242 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1243 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1244 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1245 IEEE80211_EHT_MCS_NSS_RX) - 1; 1246 u8 snd_dim, sts; 1247 1248 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1249 1250 mt7996_mcu_sta_sounding_rate(bf); 1251 1252 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1253 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1254 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1255 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1256 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1257 bf->nrow = min_t(u8, snd_dim, sts); 1258 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1259 bf->ibf_ncol = bf->ncol; 1260 1261 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160) 1262 return; 1263 1264 switch (sta->deflink.bandwidth) { 1265 case IEEE80211_STA_RX_BW_160: 1266 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1267 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1268 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1269 IEEE80211_EHT_MCS_NSS_RX) - 1; 1270 1271 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1272 bf->ncol_gt_bw80 = nss_mcs; 1273 break; 1274 case IEEE80211_STA_RX_BW_320: 1275 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1276 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1277 ve->phy_cap_info[3]) << 1); 1278 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1279 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1280 IEEE80211_EHT_MCS_NSS_RX) - 1; 1281 1282 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1283 bf->ncol_gt_bw80 = nss_mcs << 4; 1284 break; 1285 default: 1286 break; 1287 } 1288 } 1289 1290 static void 1291 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1292 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1293 { 1294 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1295 struct mt7996_phy *phy = mvif->phy; 1296 int tx_ant = hweight8(phy->mt76->chainmask) - 1; 1297 struct sta_rec_bf *bf; 1298 struct tlv *tlv; 1299 const u8 matrix[4][4] = { 1300 {0, 0, 0, 0}, 1301 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1302 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1303 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1304 }; 1305 bool ebf; 1306 1307 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1308 return; 1309 1310 ebf = mt7996_is_ebf_supported(phy, vif, sta, false); 1311 if (!ebf && !dev->ibf) 1312 return; 1313 1314 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1315 bf = (struct sta_rec_bf *)tlv; 1316 1317 /* he/eht: eBF only, in accordance with spec 1318 * vht: support eBF and iBF 1319 * ht: iBF only, since mac80211 lacks of eBF support 1320 */ 1321 if (sta->deflink.eht_cap.has_eht && ebf) 1322 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf); 1323 else if (sta->deflink.he_cap.has_he && ebf) 1324 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf); 1325 else if (sta->deflink.vht_cap.vht_supported) 1326 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1327 else if (sta->deflink.ht_cap.ht_supported) 1328 mt7996_mcu_sta_bfer_ht(sta, phy, bf); 1329 else 1330 return; 1331 1332 bf->bf_cap = ebf ? ebf : dev->ibf << 1; 1333 bf->bw = sta->deflink.bandwidth; 1334 bf->ibf_dbw = sta->deflink.bandwidth; 1335 bf->ibf_nrow = tx_ant; 1336 1337 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1338 bf->ibf_timeout = 0x48; 1339 else 1340 bf->ibf_timeout = 0x18; 1341 1342 if (ebf && bf->nrow != tx_ant) 1343 bf->mem_20m = matrix[tx_ant][bf->ncol]; 1344 else 1345 bf->mem_20m = matrix[bf->nrow][bf->ncol]; 1346 1347 switch (sta->deflink.bandwidth) { 1348 case IEEE80211_STA_RX_BW_160: 1349 case IEEE80211_STA_RX_BW_80: 1350 bf->mem_total = bf->mem_20m * 2; 1351 break; 1352 case IEEE80211_STA_RX_BW_40: 1353 bf->mem_total = bf->mem_20m; 1354 break; 1355 case IEEE80211_STA_RX_BW_20: 1356 default: 1357 break; 1358 } 1359 } 1360 1361 static void 1362 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1363 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1364 { 1365 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1366 struct mt7996_phy *phy = mvif->phy; 1367 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1368 struct sta_rec_bfee *bfee; 1369 struct tlv *tlv; 1370 u8 nrow = 0; 1371 1372 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1373 return; 1374 1375 if (!mt7996_is_ebf_supported(phy, vif, sta, true)) 1376 return; 1377 1378 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1379 bfee = (struct sta_rec_bfee *)tlv; 1380 1381 if (sta->deflink.he_cap.has_he) { 1382 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1383 1384 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1385 pe->phy_cap_info[5]); 1386 } else if (sta->deflink.vht_cap.vht_supported) { 1387 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1388 1389 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1390 pc->cap); 1391 } 1392 1393 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1394 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1395 } 1396 1397 static void 1398 mt7996_mcu_sta_phy_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1399 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1400 { 1401 struct sta_rec_phy *phy; 1402 struct tlv *tlv; 1403 u8 af = 0, mm = 0; 1404 1405 if (!sta->deflink.ht_cap.ht_supported && !sta->deflink.he_6ghz_capa.capa) 1406 return; 1407 1408 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); 1409 1410 phy = (struct sta_rec_phy *)tlv; 1411 if (sta->deflink.ht_cap.ht_supported) { 1412 af = sta->deflink.ht_cap.ampdu_factor; 1413 mm = sta->deflink.ht_cap.ampdu_density; 1414 } 1415 1416 if (sta->deflink.vht_cap.vht_supported) { 1417 u8 vht_af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1418 sta->deflink.vht_cap.cap); 1419 1420 af = max_t(u8, af, vht_af); 1421 } 1422 1423 if (sta->deflink.he_6ghz_capa.capa) { 1424 af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1425 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1426 mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1427 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 1428 } 1429 1430 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, af) | 1431 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, mm); 1432 phy->max_ampdu_len = af; 1433 } 1434 1435 static void 1436 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1437 { 1438 struct sta_rec_hdrt *hdrt; 1439 struct tlv *tlv; 1440 1441 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1442 1443 hdrt = (struct sta_rec_hdrt *)tlv; 1444 hdrt->hdrt_mode = 1; 1445 } 1446 1447 static void 1448 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1449 struct ieee80211_vif *vif, 1450 struct ieee80211_sta *sta) 1451 { 1452 struct sta_rec_hdr_trans *hdr_trans; 1453 struct mt76_wcid *wcid; 1454 struct tlv *tlv; 1455 1456 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1457 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1458 hdr_trans->dis_rx_hdr_tran = true; 1459 1460 if (vif->type == NL80211_IFTYPE_STATION) 1461 hdr_trans->to_ds = true; 1462 else 1463 hdr_trans->from_ds = true; 1464 1465 wcid = (struct mt76_wcid *)sta->drv_priv; 1466 if (!wcid) 1467 return; 1468 1469 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1470 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1471 hdr_trans->to_ds = true; 1472 hdr_trans->from_ds = true; 1473 } 1474 1475 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1476 hdr_trans->to_ds = true; 1477 hdr_trans->from_ds = true; 1478 hdr_trans->mesh = true; 1479 } 1480 } 1481 1482 static enum mcu_mmps_mode 1483 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1484 { 1485 switch (smps) { 1486 case IEEE80211_SMPS_OFF: 1487 return MCU_MMPS_DISABLE; 1488 case IEEE80211_SMPS_STATIC: 1489 return MCU_MMPS_STATIC; 1490 case IEEE80211_SMPS_DYNAMIC: 1491 return MCU_MMPS_DYNAMIC; 1492 default: 1493 return MCU_MMPS_DISABLE; 1494 } 1495 } 1496 1497 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1498 void *data, u16 version) 1499 { 1500 struct ra_fixed_rate *req; 1501 struct uni_header hdr; 1502 struct sk_buff *skb; 1503 struct tlv *tlv; 1504 int len; 1505 1506 len = sizeof(hdr) + sizeof(*req); 1507 1508 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1509 if (!skb) 1510 return -ENOMEM; 1511 1512 skb_put_data(skb, &hdr, sizeof(hdr)); 1513 1514 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1515 req = (struct ra_fixed_rate *)tlv; 1516 req->version = cpu_to_le16(version); 1517 memcpy(&req->rate, data, sizeof(req->rate)); 1518 1519 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1520 MCU_WM_UNI_CMD(RA), true); 1521 } 1522 1523 static void 1524 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 1525 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1526 { 1527 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1528 struct mt76_phy *mphy = mvif->phy->mt76; 1529 struct cfg80211_chan_def *chandef = &mphy->chandef; 1530 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1531 enum nl80211_band band = chandef->chan->band; 1532 struct sta_rec_ra *ra; 1533 struct tlv *tlv; 1534 u32 supp_rate = sta->deflink.supp_rates[band]; 1535 u32 cap = sta->wme ? STA_CAP_WMM : 0; 1536 1537 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 1538 ra = (struct sta_rec_ra *)tlv; 1539 1540 ra->valid = true; 1541 ra->auto_rate = true; 1542 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta); 1543 ra->channel = chandef->chan->hw_value; 1544 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ? 1545 CMD_CBW_320MHZ : sta->deflink.bandwidth; 1546 ra->phy.bw = ra->bw; 1547 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 1548 1549 if (supp_rate) { 1550 supp_rate &= mask->control[band].legacy; 1551 ra->rate_len = hweight32(supp_rate); 1552 1553 if (band == NL80211_BAND_2GHZ) { 1554 ra->supp_mode = MODE_CCK; 1555 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 1556 1557 if (ra->rate_len > 4) { 1558 ra->supp_mode |= MODE_OFDM; 1559 ra->supp_ofdm_rate = supp_rate >> 4; 1560 } 1561 } else { 1562 ra->supp_mode = MODE_OFDM; 1563 ra->supp_ofdm_rate = supp_rate; 1564 } 1565 } 1566 1567 if (sta->deflink.ht_cap.ht_supported) { 1568 ra->supp_mode |= MODE_HT; 1569 ra->af = sta->deflink.ht_cap.ampdu_factor; 1570 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 1571 1572 cap |= STA_CAP_HT; 1573 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1574 cap |= STA_CAP_SGI_20; 1575 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1576 cap |= STA_CAP_SGI_40; 1577 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 1578 cap |= STA_CAP_TX_STBC; 1579 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1580 cap |= STA_CAP_RX_STBC; 1581 if (vif->bss_conf.ht_ldpc && 1582 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 1583 cap |= STA_CAP_LDPC; 1584 1585 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 1586 mask->control[band].ht_mcs); 1587 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 1588 } 1589 1590 if (sta->deflink.vht_cap.vht_supported) { 1591 u8 af; 1592 1593 ra->supp_mode |= MODE_VHT; 1594 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1595 sta->deflink.vht_cap.cap); 1596 ra->af = max_t(u8, ra->af, af); 1597 1598 cap |= STA_CAP_VHT; 1599 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1600 cap |= STA_CAP_VHT_SGI_80; 1601 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1602 cap |= STA_CAP_VHT_SGI_160; 1603 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 1604 cap |= STA_CAP_VHT_TX_STBC; 1605 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 1606 cap |= STA_CAP_VHT_RX_STBC; 1607 if (vif->bss_conf.vht_ldpc && 1608 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 1609 cap |= STA_CAP_VHT_LDPC; 1610 1611 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 1612 mask->control[band].vht_mcs); 1613 } 1614 1615 if (sta->deflink.he_cap.has_he) { 1616 ra->supp_mode |= MODE_HE; 1617 cap |= STA_CAP_HE; 1618 1619 if (sta->deflink.he_6ghz_capa.capa) 1620 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1621 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1622 } 1623 ra->sta_cap = cpu_to_le32(cap); 1624 } 1625 1626 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1627 struct ieee80211_sta *sta, bool changed) 1628 { 1629 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1630 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1631 struct sk_buff *skb; 1632 1633 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1634 &msta->wcid, 1635 MT7996_STA_UPDATE_MAX_SIZE); 1636 if (IS_ERR(skb)) 1637 return PTR_ERR(skb); 1638 1639 /* firmware rc algorithm refers to sta_rec_he for HE control. 1640 * once dev->rc_work changes the settings driver should also 1641 * update sta_rec_he here. 1642 */ 1643 if (changed) 1644 mt7996_mcu_sta_he_tlv(skb, sta); 1645 1646 /* sta_rec_ra accommodates BW, NSS and only MCS range format 1647 * i.e 0-{7,8,9} for VHT. 1648 */ 1649 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 1650 1651 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1652 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1653 } 1654 1655 static int 1656 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1657 struct ieee80211_sta *sta) 1658 { 1659 #define MT_STA_BSS_GROUP 1 1660 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1661 struct mt7996_sta *msta; 1662 struct { 1663 u8 __rsv1[4]; 1664 1665 __le16 tag; 1666 __le16 len; 1667 __le16 wlan_idx; 1668 u8 __rsv2[2]; 1669 __le32 action; 1670 __le32 val; 1671 u8 __rsv3[8]; 1672 } __packed req = { 1673 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 1674 .len = cpu_to_le16(sizeof(req) - 4), 1675 .action = cpu_to_le32(MT_STA_BSS_GROUP), 1676 .val = cpu_to_le32(mvif->mt76.idx % 16), 1677 }; 1678 1679 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 1680 req.wlan_idx = cpu_to_le16(msta->wcid.idx); 1681 1682 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 1683 sizeof(req), true); 1684 } 1685 1686 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1687 struct ieee80211_sta *sta, bool enable) 1688 { 1689 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1690 struct mt7996_sta *msta; 1691 struct sk_buff *skb; 1692 int ret; 1693 1694 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 1695 1696 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1697 &msta->wcid, 1698 MT7996_STA_UPDATE_MAX_SIZE); 1699 if (IS_ERR(skb)) 1700 return PTR_ERR(skb); 1701 1702 /* starec basic */ 1703 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, sta, enable, 1704 !rcu_access_pointer(dev->mt76.wcid[msta->wcid.idx])); 1705 if (!enable) 1706 goto out; 1707 1708 /* tag order is in accordance with firmware dependency. */ 1709 if (sta) { 1710 /* starec phy */ 1711 mt7996_mcu_sta_phy_tlv(dev, skb, vif, sta); 1712 /* starec hdrt mode */ 1713 mt7996_mcu_sta_hdrt_tlv(dev, skb); 1714 /* starec bfer */ 1715 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta); 1716 /* starec ht */ 1717 mt7996_mcu_sta_ht_tlv(skb, sta); 1718 /* starec vht */ 1719 mt7996_mcu_sta_vht_tlv(skb, sta); 1720 /* starec uapsd */ 1721 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 1722 /* starec amsdu */ 1723 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 1724 /* starec he */ 1725 mt7996_mcu_sta_he_tlv(skb, sta); 1726 /* starec he 6g*/ 1727 mt7996_mcu_sta_he_6g_tlv(skb, sta); 1728 /* starec eht */ 1729 mt7996_mcu_sta_eht_tlv(skb, sta); 1730 /* TODO: starec muru */ 1731 /* starec bfee */ 1732 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta); 1733 /* starec hdr trans */ 1734 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta); 1735 } 1736 1737 ret = mt7996_mcu_add_group(dev, vif, sta); 1738 if (ret) { 1739 dev_kfree_skb(skb); 1740 return ret; 1741 } 1742 out: 1743 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1744 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1745 } 1746 1747 static int 1748 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 1749 struct mt76_connac_sta_key_conf *sta_key_conf, 1750 struct sk_buff *skb, 1751 struct ieee80211_key_conf *key, 1752 enum set_key_cmd cmd) 1753 { 1754 struct sta_rec_sec_uni *sec; 1755 struct tlv *tlv; 1756 1757 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 1758 sec = (struct sta_rec_sec_uni *)tlv; 1759 sec->add = cmd; 1760 1761 if (cmd == SET_KEY) { 1762 struct sec_key_uni *sec_key; 1763 u8 cipher; 1764 1765 cipher = mt76_connac_mcu_get_cipher(key->cipher); 1766 if (cipher == MCU_CIPHER_NONE) 1767 return -EOPNOTSUPP; 1768 1769 sec_key = &sec->key[0]; 1770 sec_key->cipher_len = sizeof(*sec_key); 1771 1772 if (cipher == MCU_CIPHER_BIP_CMAC_128) { 1773 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 1774 sec_key->cipher_id = MCU_CIPHER_AES_CCMP; 1775 sec_key->key_id = sta_key_conf->keyidx; 1776 sec_key->key_len = 16; 1777 memcpy(sec_key->key, sta_key_conf->key, 16); 1778 1779 sec_key = &sec->key[1]; 1780 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 1781 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; 1782 sec_key->cipher_len = sizeof(*sec_key); 1783 sec_key->key_len = 16; 1784 memcpy(sec_key->key, key->key, 16); 1785 sec->n_cipher = 2; 1786 } else { 1787 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 1788 sec_key->cipher_id = cipher; 1789 sec_key->key_id = key->keyidx; 1790 sec_key->key_len = key->keylen; 1791 memcpy(sec_key->key, key->key, key->keylen); 1792 1793 if (cipher == MCU_CIPHER_TKIP) { 1794 /* Rx/Tx MIC keys are swapped */ 1795 memcpy(sec_key->key + 16, key->key + 24, 8); 1796 memcpy(sec_key->key + 24, key->key + 16, 8); 1797 } 1798 1799 /* store key_conf for BIP batch update */ 1800 if (cipher == MCU_CIPHER_AES_CCMP) { 1801 memcpy(sta_key_conf->key, key->key, key->keylen); 1802 sta_key_conf->keyidx = key->keyidx; 1803 } 1804 1805 sec->n_cipher = 1; 1806 } 1807 } else { 1808 sec->n_cipher = 0; 1809 } 1810 1811 return 0; 1812 } 1813 1814 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 1815 struct mt76_connac_sta_key_conf *sta_key_conf, 1816 struct ieee80211_key_conf *key, int mcu_cmd, 1817 struct mt76_wcid *wcid, enum set_key_cmd cmd) 1818 { 1819 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1820 struct sk_buff *skb; 1821 int ret; 1822 1823 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 1824 MT7996_STA_UPDATE_MAX_SIZE); 1825 if (IS_ERR(skb)) 1826 return PTR_ERR(skb); 1827 1828 ret = mt7996_mcu_sta_key_tlv(wcid, sta_key_conf, skb, key, cmd); 1829 if (ret) 1830 return ret; 1831 1832 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 1833 } 1834 1835 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, 1836 struct ieee80211_vif *vif, bool enable) 1837 { 1838 struct mt7996_dev *dev = phy->dev; 1839 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1840 struct { 1841 struct req_hdr { 1842 u8 omac_idx; 1843 u8 band_idx; 1844 u8 __rsv[2]; 1845 } __packed hdr; 1846 struct req_tlv { 1847 __le16 tag; 1848 __le16 len; 1849 u8 active; 1850 u8 __rsv; 1851 u8 omac_addr[ETH_ALEN]; 1852 } __packed tlv; 1853 } data = { 1854 .hdr = { 1855 .omac_idx = mvif->mt76.omac_idx, 1856 .band_idx = mvif->mt76.band_idx, 1857 }, 1858 .tlv = { 1859 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1860 .len = cpu_to_le16(sizeof(struct req_tlv)), 1861 .active = enable, 1862 }, 1863 }; 1864 1865 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) 1866 return mt7996_mcu_muar_config(phy, vif, false, enable); 1867 1868 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 1869 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 1870 &data, sizeof(data), true); 1871 } 1872 1873 static void 1874 mt7996_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, 1875 struct sk_buff *skb, 1876 struct ieee80211_mutable_offsets *offs) 1877 { 1878 struct bss_bcn_cntdwn_tlv *info; 1879 struct tlv *tlv; 1880 u16 tag; 1881 1882 if (!offs->cntdwn_counter_offs[0]) 1883 return; 1884 1885 tag = vif->bss_conf.csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 1886 1887 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 1888 1889 info = (struct bss_bcn_cntdwn_tlv *)tlv; 1890 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 1891 } 1892 1893 static void 1894 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1895 struct sk_buff *rskb, struct sk_buff *skb, 1896 struct bss_bcn_content_tlv *bcn, 1897 struct ieee80211_mutable_offsets *offs) 1898 { 1899 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1900 u8 *buf; 1901 1902 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 1903 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 1904 1905 if (offs->cntdwn_counter_offs[0]) { 1906 u16 offset = offs->cntdwn_counter_offs[0]; 1907 1908 if (vif->bss_conf.csa_active) 1909 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 1910 if (vif->bss_conf.color_change_active) 1911 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 1912 } 1913 1914 buf = (u8 *)bcn + sizeof(*bcn) - MAX_BEACON_SIZE; 1915 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 1916 BSS_CHANGED_BEACON); 1917 1918 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 1919 } 1920 1921 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, 1922 struct ieee80211_vif *vif, int en) 1923 { 1924 struct mt7996_dev *dev = mt7996_hw_dev(hw); 1925 struct mt7996_phy *phy = mt7996_hw_phy(hw); 1926 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1927 struct ieee80211_mutable_offsets offs; 1928 struct ieee80211_tx_info *info; 1929 struct sk_buff *skb, *rskb; 1930 struct tlv *tlv; 1931 struct bss_bcn_content_tlv *bcn; 1932 1933 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 1934 MT7996_BEACON_UPDATE_SIZE); 1935 if (IS_ERR(rskb)) 1936 return PTR_ERR(rskb); 1937 1938 tlv = mt7996_mcu_add_uni_tlv(rskb, 1939 UNI_BSS_INFO_BCN_CONTENT, sizeof(*bcn)); 1940 bcn = (struct bss_bcn_content_tlv *)tlv; 1941 bcn->enable = en; 1942 1943 if (!en) 1944 goto out; 1945 1946 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0); 1947 if (!skb) 1948 return -EINVAL; 1949 1950 if (skb->len > MAX_BEACON_SIZE - MT_TXD_SIZE) { 1951 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 1952 dev_kfree_skb(skb); 1953 return -EINVAL; 1954 } 1955 1956 info = IEEE80211_SKB_CB(skb); 1957 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 1958 1959 mt7996_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); 1960 /* TODO: subtag - 11v MBSSID */ 1961 mt7996_mcu_beacon_cntdwn(vif, rskb, skb, &offs); 1962 dev_kfree_skb(skb); 1963 out: 1964 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 1965 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1966 } 1967 1968 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 1969 struct ieee80211_vif *vif, u32 changed) 1970 { 1971 #define OFFLOAD_TX_MODE_SU BIT(0) 1972 #define OFFLOAD_TX_MODE_MU BIT(1) 1973 struct ieee80211_hw *hw = mt76_hw(dev); 1974 struct mt7996_phy *phy = mt7996_hw_phy(hw); 1975 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1976 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1977 enum nl80211_band band = chandef->chan->band; 1978 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1979 struct bss_inband_discovery_tlv *discov; 1980 struct ieee80211_tx_info *info; 1981 struct sk_buff *rskb, *skb = NULL; 1982 struct tlv *tlv; 1983 u8 *buf, interval; 1984 1985 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 1986 MT7996_INBAND_FRAME_SIZE); 1987 if (IS_ERR(rskb)) 1988 return PTR_ERR(rskb); 1989 1990 if (changed & BSS_CHANGED_FILS_DISCOVERY && 1991 vif->bss_conf.fils_discovery.max_interval) { 1992 interval = vif->bss_conf.fils_discovery.max_interval; 1993 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 1994 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 1995 vif->bss_conf.unsol_bcast_probe_resp_interval) { 1996 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 1997 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 1998 } 1999 2000 if (!skb) 2001 return -EINVAL; 2002 2003 if (skb->len > MAX_INBAND_FRAME_SIZE - MT_TXD_SIZE) { 2004 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2005 dev_kfree_skb(skb); 2006 return -EINVAL; 2007 } 2008 2009 info = IEEE80211_SKB_CB(skb); 2010 info->control.vif = vif; 2011 info->band = band; 2012 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2013 2014 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, sizeof(*discov)); 2015 2016 discov = (struct bss_inband_discovery_tlv *)tlv; 2017 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2018 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2019 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2020 discov->tx_interval = interval; 2021 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2022 discov->enable = true; 2023 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2024 2025 buf = (u8 *)tlv + sizeof(*discov) - MAX_INBAND_FRAME_SIZE; 2026 2027 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2028 2029 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2030 2031 dev_kfree_skb(skb); 2032 2033 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2034 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2035 } 2036 2037 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2038 { 2039 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2040 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2041 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2042 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2043 return -EIO; 2044 } 2045 2046 /* clear irq when the driver own success */ 2047 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2048 MT_TOP_LPCR_HOST_BAND_STAT); 2049 2050 return 0; 2051 } 2052 2053 static u32 mt7996_patch_sec_mode(u32 key_info) 2054 { 2055 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2056 2057 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2058 return 0; 2059 2060 if (sec == MT7996_SEC_MODE_AES) 2061 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2062 else 2063 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2064 2065 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2066 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2067 } 2068 2069 static int mt7996_load_patch(struct mt7996_dev *dev) 2070 { 2071 const struct mt7996_patch_hdr *hdr; 2072 const struct firmware *fw = NULL; 2073 int i, ret, sem; 2074 2075 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2076 switch (sem) { 2077 case PATCH_IS_DL: 2078 return 0; 2079 case PATCH_NOT_DL_SEM_SUCCESS: 2080 break; 2081 default: 2082 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2083 return -EAGAIN; 2084 } 2085 2086 ret = request_firmware(&fw, MT7996_ROM_PATCH, dev->mt76.dev); 2087 if (ret) 2088 goto out; 2089 2090 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2091 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2092 ret = -EINVAL; 2093 goto out; 2094 } 2095 2096 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2097 2098 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2099 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2100 2101 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2102 struct mt7996_patch_sec *sec; 2103 const u8 *dl; 2104 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2105 2106 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2107 i * sizeof(*sec)); 2108 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2109 PATCH_SEC_TYPE_INFO) { 2110 ret = -EINVAL; 2111 goto out; 2112 } 2113 2114 addr = be32_to_cpu(sec->info.addr); 2115 len = be32_to_cpu(sec->info.len); 2116 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2117 dl = fw->data + be32_to_cpu(sec->offs); 2118 2119 mode |= mt7996_patch_sec_mode(sec_key_idx); 2120 2121 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2122 mode); 2123 if (ret) { 2124 dev_err(dev->mt76.dev, "Download request failed\n"); 2125 goto out; 2126 } 2127 2128 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2129 dl, len, 4096); 2130 if (ret) { 2131 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2132 goto out; 2133 } 2134 } 2135 2136 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2137 if (ret) 2138 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2139 2140 out: 2141 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2142 switch (sem) { 2143 case PATCH_REL_SEM_SUCCESS: 2144 break; 2145 default: 2146 ret = -EAGAIN; 2147 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2148 break; 2149 } 2150 release_firmware(fw); 2151 2152 return ret; 2153 } 2154 2155 static int 2156 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2157 const struct mt7996_fw_trailer *hdr, 2158 const u8 *data, bool is_wa) 2159 { 2160 int i, offset = 0; 2161 u32 override = 0, option = 0; 2162 2163 for (i = 0; i < hdr->n_region; i++) { 2164 const struct mt7996_fw_region *region; 2165 int err; 2166 u32 len, addr, mode; 2167 2168 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2169 (hdr->n_region - i) * sizeof(*region)); 2170 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2171 region->feature_set, is_wa); 2172 len = le32_to_cpu(region->len); 2173 addr = le32_to_cpu(region->addr); 2174 2175 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2176 override = addr; 2177 2178 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2179 mode); 2180 if (err) { 2181 dev_err(dev->mt76.dev, "Download request failed\n"); 2182 return err; 2183 } 2184 2185 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2186 data + offset, len, 4096); 2187 if (err) { 2188 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2189 return err; 2190 } 2191 2192 offset += len; 2193 } 2194 2195 if (override) 2196 option |= FW_START_OVERRIDE; 2197 2198 if (is_wa) 2199 option |= FW_START_WORKING_PDA_CR4; 2200 2201 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2202 } 2203 2204 static int mt7996_load_ram(struct mt7996_dev *dev) 2205 { 2206 const struct mt7996_fw_trailer *hdr; 2207 const struct firmware *fw; 2208 int ret; 2209 2210 ret = request_firmware(&fw, MT7996_FIRMWARE_WM, dev->mt76.dev); 2211 if (ret) 2212 return ret; 2213 2214 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2215 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2216 ret = -EINVAL; 2217 goto out; 2218 } 2219 2220 hdr = (const struct mt7996_fw_trailer *)(fw->data + fw->size - sizeof(*hdr)); 2221 2222 dev_info(dev->mt76.dev, "WM Firmware Version: %.10s, Build Time: %.15s\n", 2223 hdr->fw_ver, hdr->build_date); 2224 2225 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, false); 2226 if (ret) { 2227 dev_err(dev->mt76.dev, "Failed to start WM firmware\n"); 2228 goto out; 2229 } 2230 2231 release_firmware(fw); 2232 2233 ret = request_firmware(&fw, MT7996_FIRMWARE_WA, dev->mt76.dev); 2234 if (ret) 2235 return ret; 2236 2237 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2238 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2239 ret = -EINVAL; 2240 goto out; 2241 } 2242 2243 hdr = (const struct mt7996_fw_trailer *)(fw->data + fw->size - sizeof(*hdr)); 2244 2245 dev_info(dev->mt76.dev, "WA Firmware Version: %.10s, Build Time: %.15s\n", 2246 hdr->fw_ver, hdr->build_date); 2247 2248 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, true); 2249 if (ret) { 2250 dev_err(dev->mt76.dev, "Failed to start WA firmware\n"); 2251 goto out; 2252 } 2253 2254 snprintf(dev->mt76.hw->wiphy->fw_version, 2255 sizeof(dev->mt76.hw->wiphy->fw_version), 2256 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2257 2258 out: 2259 release_firmware(fw); 2260 2261 return ret; 2262 } 2263 2264 static int 2265 mt7996_firmware_state(struct mt7996_dev *dev, bool wa) 2266 { 2267 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2268 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2269 2270 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2271 state, 1000)) { 2272 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2273 return -EIO; 2274 } 2275 return 0; 2276 } 2277 2278 static int 2279 mt7996_mcu_restart(struct mt76_dev *dev) 2280 { 2281 struct { 2282 u8 __rsv1[4]; 2283 2284 __le16 tag; 2285 __le16 len; 2286 u8 power_mode; 2287 u8 __rsv2[3]; 2288 } __packed req = { 2289 .tag = cpu_to_le16(UNI_POWER_OFF), 2290 .len = cpu_to_le16(sizeof(req) - 4), 2291 .power_mode = 1, 2292 }; 2293 2294 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 2295 sizeof(req), false); 2296 } 2297 2298 static int mt7996_load_firmware(struct mt7996_dev *dev) 2299 { 2300 int ret; 2301 2302 /* make sure fw is download state */ 2303 if (mt7996_firmware_state(dev, false)) { 2304 /* restart firmware once */ 2305 mt7996_mcu_restart(&dev->mt76); 2306 ret = mt7996_firmware_state(dev, false); 2307 if (ret) { 2308 dev_err(dev->mt76.dev, 2309 "Firmware is not ready for download\n"); 2310 return ret; 2311 } 2312 } 2313 2314 ret = mt7996_load_patch(dev); 2315 if (ret) 2316 return ret; 2317 2318 ret = mt7996_load_ram(dev); 2319 if (ret) 2320 return ret; 2321 2322 ret = mt7996_firmware_state(dev, true); 2323 if (ret) 2324 return ret; 2325 2326 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2327 2328 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2329 2330 return 0; 2331 } 2332 2333 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 2334 { 2335 struct { 2336 u8 _rsv[4]; 2337 2338 __le16 tag; 2339 __le16 len; 2340 u8 ctrl; 2341 u8 interval; 2342 u8 _rsv2[2]; 2343 } __packed data = { 2344 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 2345 .len = cpu_to_le16(sizeof(data) - 4), 2346 .ctrl = ctrl, 2347 }; 2348 2349 if (type == MCU_FW_LOG_WA) 2350 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 2351 &data, sizeof(data), true); 2352 2353 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2354 sizeof(data), true); 2355 } 2356 2357 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 2358 { 2359 struct { 2360 u8 _rsv[4]; 2361 2362 __le16 tag; 2363 __le16 len; 2364 __le32 module_idx; 2365 u8 level; 2366 u8 _rsv2[3]; 2367 } data = { 2368 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 2369 .len = cpu_to_le16(sizeof(data) - 4), 2370 .module_idx = cpu_to_le32(module), 2371 .level = level, 2372 }; 2373 2374 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 2375 sizeof(data), false); 2376 } 2377 2378 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 2379 { 2380 struct { 2381 u8 enable; 2382 u8 _rsv[3]; 2383 } __packed req = { 2384 .enable = enabled 2385 }; 2386 2387 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 2388 sizeof(req), false); 2389 } 2390 2391 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 2392 { 2393 struct vow_rx_airtime *req; 2394 struct tlv *tlv; 2395 2396 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 2397 req = (struct vow_rx_airtime *)tlv; 2398 req->enable = true; 2399 req->band = band_idx; 2400 2401 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 2402 req = (struct vow_rx_airtime *)tlv; 2403 req->enable = true; 2404 req->band = band_idx; 2405 } 2406 2407 static int 2408 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 2409 { 2410 struct uni_header hdr = {}; 2411 struct sk_buff *skb; 2412 int len, num; 2413 2414 num = 2 + 2 * (dev->dbdc_support + dev->tbtc_support); 2415 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 2416 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2417 if (!skb) 2418 return -ENOMEM; 2419 2420 skb_put_data(skb, &hdr, sizeof(hdr)); 2421 2422 mt7996_add_rx_airtime_tlv(skb, dev->mt76.phy.band_idx); 2423 2424 if (dev->dbdc_support) 2425 mt7996_add_rx_airtime_tlv(skb, MT_BAND1); 2426 2427 if (dev->tbtc_support) 2428 mt7996_add_rx_airtime_tlv(skb, MT_BAND2); 2429 2430 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2431 MCU_WM_UNI_CMD(VOW), true); 2432 } 2433 2434 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 2435 { 2436 int ret; 2437 2438 /* force firmware operation mode into normal state, 2439 * which should be set before firmware download stage. 2440 */ 2441 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 2442 2443 ret = mt7996_driver_own(dev, 0); 2444 if (ret) 2445 return ret; 2446 /* set driver own for band1 when two hif exist */ 2447 if (dev->hif2) { 2448 ret = mt7996_driver_own(dev, 1); 2449 if (ret) 2450 return ret; 2451 } 2452 2453 ret = mt7996_load_firmware(dev); 2454 if (ret) 2455 return ret; 2456 2457 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 2458 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 2459 if (ret) 2460 return ret; 2461 2462 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 2463 if (ret) 2464 return ret; 2465 2466 ret = mt7996_mcu_set_mwds(dev, 1); 2467 if (ret) 2468 return ret; 2469 2470 ret = mt7996_mcu_init_rx_airtime(dev); 2471 if (ret) 2472 return ret; 2473 2474 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 2475 MCU_WA_PARAM_RED, 0, 0); 2476 } 2477 2478 int mt7996_mcu_init(struct mt7996_dev *dev) 2479 { 2480 static const struct mt76_mcu_ops mt7996_mcu_ops = { 2481 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 2482 .mcu_skb_send_msg = mt7996_mcu_send_message, 2483 .mcu_parse_response = mt7996_mcu_parse_response, 2484 }; 2485 2486 dev->mt76.mcu_ops = &mt7996_mcu_ops; 2487 2488 return mt7996_mcu_init_firmware(dev); 2489 } 2490 2491 void mt7996_mcu_exit(struct mt7996_dev *dev) 2492 { 2493 mt7996_mcu_restart(&dev->mt76); 2494 if (mt7996_firmware_state(dev, false)) { 2495 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 2496 goto out; 2497 } 2498 2499 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 2500 if (dev->hif2) 2501 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 2502 MT_TOP_LPCR_HOST_FW_OWN); 2503 out: 2504 skb_queue_purge(&dev->mt76.mcu.res_q); 2505 } 2506 2507 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 2508 { 2509 struct { 2510 u8 __rsv[4]; 2511 } __packed hdr; 2512 struct hdr_trans_blacklist *req_blacklist; 2513 struct hdr_trans_en *req_en; 2514 struct sk_buff *skb; 2515 struct tlv *tlv; 2516 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 2517 2518 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2519 if (!skb) 2520 return -ENOMEM; 2521 2522 skb_put_data(skb, &hdr, sizeof(hdr)); 2523 2524 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 2525 req_en = (struct hdr_trans_en *)tlv; 2526 req_en->enable = hdr_trans; 2527 2528 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 2529 sizeof(struct hdr_trans_vlan)); 2530 2531 if (hdr_trans) { 2532 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 2533 sizeof(*req_blacklist)); 2534 req_blacklist = (struct hdr_trans_blacklist *)tlv; 2535 req_blacklist->enable = 1; 2536 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 2537 } 2538 2539 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2540 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 2541 } 2542 2543 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif) 2544 { 2545 #define MCU_EDCA_AC_PARAM 0 2546 #define WMM_AIFS_SET BIT(0) 2547 #define WMM_CW_MIN_SET BIT(1) 2548 #define WMM_CW_MAX_SET BIT(2) 2549 #define WMM_TXOP_SET BIT(3) 2550 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 2551 WMM_CW_MAX_SET | WMM_TXOP_SET) 2552 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2553 struct { 2554 u8 bss_idx; 2555 u8 __rsv[3]; 2556 } __packed hdr = { 2557 .bss_idx = mvif->mt76.idx, 2558 }; 2559 struct sk_buff *skb; 2560 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 2561 int ac; 2562 2563 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2564 if (!skb) 2565 return -ENOMEM; 2566 2567 skb_put_data(skb, &hdr, sizeof(hdr)); 2568 2569 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 2570 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; 2571 struct edca *e; 2572 struct tlv *tlv; 2573 2574 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 2575 2576 e = (struct edca *)tlv; 2577 e->set = WMM_PARAM_SET; 2578 e->queue = ac + mvif->mt76.wmm_idx * MT7996_MAX_WMM_SETS; 2579 e->aifs = q->aifs; 2580 e->txop = cpu_to_le16(q->txop); 2581 2582 if (q->cw_min) 2583 e->cw_min = fls(q->cw_min); 2584 else 2585 e->cw_min = 5; 2586 2587 if (q->cw_max) 2588 e->cw_max = fls(q->cw_max); 2589 else 2590 e->cw_max = 10; 2591 } 2592 2593 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2594 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 2595 } 2596 2597 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 2598 { 2599 struct { 2600 u8 _rsv[4]; 2601 2602 __le16 tag; 2603 __le16 len; 2604 2605 __le32 ctrl; 2606 __le16 min_lpn; 2607 u8 rsv[2]; 2608 } __packed req = { 2609 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 2610 .len = cpu_to_le16(sizeof(req) - 4), 2611 2612 .ctrl = cpu_to_le32(0x1), 2613 .min_lpn = cpu_to_le16(val), 2614 }; 2615 2616 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 2617 &req, sizeof(req), true); 2618 } 2619 2620 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 2621 const struct mt7996_dfs_pulse *pulse) 2622 { 2623 struct { 2624 u8 _rsv[4]; 2625 2626 __le16 tag; 2627 __le16 len; 2628 2629 __le32 ctrl; 2630 2631 __le32 max_width; /* us */ 2632 __le32 max_pwr; /* dbm */ 2633 __le32 min_pwr; /* dbm */ 2634 __le32 min_stgr_pri; /* us */ 2635 __le32 max_stgr_pri; /* us */ 2636 __le32 min_cr_pri; /* us */ 2637 __le32 max_cr_pri; /* us */ 2638 } __packed req = { 2639 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 2640 .len = cpu_to_le16(sizeof(req) - 4), 2641 2642 .ctrl = cpu_to_le32(0x3), 2643 2644 #define __req_field(field) .field = cpu_to_le32(pulse->field) 2645 __req_field(max_width), 2646 __req_field(max_pwr), 2647 __req_field(min_pwr), 2648 __req_field(min_stgr_pri), 2649 __req_field(max_stgr_pri), 2650 __req_field(min_cr_pri), 2651 __req_field(max_cr_pri), 2652 #undef __req_field 2653 }; 2654 2655 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 2656 &req, sizeof(req), true); 2657 } 2658 2659 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 2660 const struct mt7996_dfs_pattern *pattern) 2661 { 2662 struct { 2663 u8 _rsv[4]; 2664 2665 __le16 tag; 2666 __le16 len; 2667 2668 __le32 ctrl; 2669 __le16 radar_type; 2670 2671 u8 enb; 2672 u8 stgr; 2673 u8 min_crpn; 2674 u8 max_crpn; 2675 u8 min_crpr; 2676 u8 min_pw; 2677 __le32 min_pri; 2678 __le32 max_pri; 2679 u8 max_pw; 2680 u8 min_crbn; 2681 u8 max_crbn; 2682 u8 min_stgpn; 2683 u8 max_stgpn; 2684 u8 min_stgpr; 2685 u8 rsv[2]; 2686 __le32 min_stgpr_diff; 2687 } __packed req = { 2688 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 2689 .len = cpu_to_le16(sizeof(req) - 4), 2690 2691 .ctrl = cpu_to_le32(0x2), 2692 .radar_type = cpu_to_le16(index), 2693 2694 #define __req_field_u8(field) .field = pattern->field 2695 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 2696 __req_field_u8(enb), 2697 __req_field_u8(stgr), 2698 __req_field_u8(min_crpn), 2699 __req_field_u8(max_crpn), 2700 __req_field_u8(min_crpr), 2701 __req_field_u8(min_pw), 2702 __req_field_u32(min_pri), 2703 __req_field_u32(max_pri), 2704 __req_field_u8(max_pw), 2705 __req_field_u8(min_crbn), 2706 __req_field_u8(max_crbn), 2707 __req_field_u8(min_stgpn), 2708 __req_field_u8(max_stgpn), 2709 __req_field_u8(min_stgpr), 2710 __req_field_u32(min_stgpr_diff), 2711 #undef __req_field_u8 2712 #undef __req_field_u32 2713 }; 2714 2715 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 2716 &req, sizeof(req), true); 2717 } 2718 2719 static int 2720 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 2721 struct cfg80211_chan_def *chandef, 2722 int cmd) 2723 { 2724 struct mt7996_dev *dev = phy->dev; 2725 struct mt76_phy *mphy = phy->mt76; 2726 struct ieee80211_channel *chan = mphy->chandef.chan; 2727 int freq = mphy->chandef.center_freq1; 2728 struct mt7996_mcu_background_chain_ctrl req = { 2729 .tag = cpu_to_le16(0), 2730 .len = cpu_to_le16(sizeof(req) - 4), 2731 .monitor_scan_type = 2, /* simple rx */ 2732 }; 2733 2734 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 2735 return -EINVAL; 2736 2737 if (!cfg80211_chandef_valid(&mphy->chandef)) 2738 return -EINVAL; 2739 2740 switch (cmd) { 2741 case CH_SWITCH_BACKGROUND_SCAN_START: { 2742 req.chan = chan->hw_value; 2743 req.central_chan = ieee80211_frequency_to_channel(freq); 2744 req.bw = mt76_connac_chan_bw(&mphy->chandef); 2745 req.monitor_chan = chandef->chan->hw_value; 2746 req.monitor_central_chan = 2747 ieee80211_frequency_to_channel(chandef->center_freq1); 2748 req.monitor_bw = mt76_connac_chan_bw(chandef); 2749 req.band_idx = phy->mt76->band_idx; 2750 req.scan_mode = 1; 2751 break; 2752 } 2753 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 2754 req.monitor_chan = chandef->chan->hw_value; 2755 req.monitor_central_chan = 2756 ieee80211_frequency_to_channel(chandef->center_freq1); 2757 req.band_idx = phy->mt76->band_idx; 2758 req.scan_mode = 2; 2759 break; 2760 case CH_SWITCH_BACKGROUND_SCAN_STOP: 2761 req.chan = chan->hw_value; 2762 req.central_chan = ieee80211_frequency_to_channel(freq); 2763 req.bw = mt76_connac_chan_bw(&mphy->chandef); 2764 req.tx_stream = hweight8(mphy->antenna_mask); 2765 req.rx_stream = mphy->antenna_mask; 2766 break; 2767 default: 2768 return -EINVAL; 2769 } 2770 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 2771 2772 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 2773 &req, sizeof(req), false); 2774 } 2775 2776 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 2777 struct cfg80211_chan_def *chandef) 2778 { 2779 struct mt7996_dev *dev = phy->dev; 2780 int err, region; 2781 2782 if (!chandef) { /* disable offchain */ 2783 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2, 2784 0, 0); 2785 if (err) 2786 return err; 2787 2788 return mt7996_mcu_background_chain_ctrl(phy, NULL, 2789 CH_SWITCH_BACKGROUND_SCAN_STOP); 2790 } 2791 2792 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 2793 CH_SWITCH_BACKGROUND_SCAN_START); 2794 if (err) 2795 return err; 2796 2797 switch (dev->mt76.region) { 2798 case NL80211_DFS_ETSI: 2799 region = 0; 2800 break; 2801 case NL80211_DFS_JP: 2802 region = 2; 2803 break; 2804 case NL80211_DFS_FCC: 2805 default: 2806 region = 1; 2807 break; 2808 } 2809 2810 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2, 2811 0, region); 2812 } 2813 2814 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 2815 { 2816 static const u8 ch_band[] = { 2817 [NL80211_BAND_2GHZ] = 0, 2818 [NL80211_BAND_5GHZ] = 1, 2819 [NL80211_BAND_6GHZ] = 2, 2820 }; 2821 struct mt7996_dev *dev = phy->dev; 2822 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 2823 int freq1 = chandef->center_freq1; 2824 u8 band_idx = phy->mt76->band_idx; 2825 struct { 2826 /* fixed field */ 2827 u8 __rsv[4]; 2828 2829 __le16 tag; 2830 __le16 len; 2831 u8 control_ch; 2832 u8 center_ch; 2833 u8 bw; 2834 u8 tx_path_num; 2835 u8 rx_path; /* mask or num */ 2836 u8 switch_reason; 2837 u8 band_idx; 2838 u8 center_ch2; /* for 80+80 only */ 2839 __le16 cac_case; 2840 u8 channel_band; 2841 u8 rsv0; 2842 __le32 outband_freq; 2843 u8 txpower_drop; 2844 u8 ap_bw; 2845 u8 ap_center_ch; 2846 u8 rsv1[53]; 2847 } __packed req = { 2848 .tag = cpu_to_le16(tag), 2849 .len = cpu_to_le16(sizeof(req) - 4), 2850 .control_ch = chandef->chan->hw_value, 2851 .center_ch = ieee80211_frequency_to_channel(freq1), 2852 .bw = mt76_connac_chan_bw(chandef), 2853 .tx_path_num = hweight16(phy->mt76->chainmask), 2854 .rx_path = phy->mt76->chainmask >> dev->chainshift[band_idx], 2855 .band_idx = band_idx, 2856 .channel_band = ch_band[chandef->chan->band], 2857 }; 2858 2859 if (tag == UNI_CHANNEL_RX_PATH || 2860 dev->mt76.hw->conf.flags & IEEE80211_CONF_MONITOR) 2861 req.switch_reason = CH_SWITCH_NORMAL; 2862 else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 2863 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 2864 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 2865 NL80211_IFTYPE_AP)) 2866 req.switch_reason = CH_SWITCH_DFS; 2867 else 2868 req.switch_reason = CH_SWITCH_NORMAL; 2869 2870 if (tag == UNI_CHANNEL_SWITCH) 2871 req.rx_path = hweight8(req.rx_path); 2872 2873 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 2874 int freq2 = chandef->center_freq2; 2875 2876 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 2877 } 2878 2879 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 2880 &req, sizeof(req), true); 2881 } 2882 2883 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 2884 { 2885 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 2886 #define PAGE_IDX_MASK GENMASK(4, 2) 2887 #define PER_PAGE_SIZE 0x400 2888 struct mt7996_mcu_eeprom req = { 2889 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 2890 .buffer_mode = EE_MODE_BUFFER 2891 }; 2892 u16 eeprom_size = MT7996_EEPROM_SIZE; 2893 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 2894 u8 *eep = (u8 *)dev->mt76.eeprom.data; 2895 int eep_len, i; 2896 2897 for (i = 0; i < total; i++, eep += eep_len) { 2898 struct sk_buff *skb; 2899 int ret, msg_len; 2900 2901 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 2902 eep_len = eeprom_size % PER_PAGE_SIZE; 2903 else 2904 eep_len = PER_PAGE_SIZE; 2905 2906 msg_len = sizeof(req) + eep_len; 2907 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 2908 if (!skb) 2909 return -ENOMEM; 2910 2911 req.len = cpu_to_le16(msg_len - 4); 2912 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 2913 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 2914 req.buf_len = cpu_to_le16(eep_len); 2915 2916 skb_put_data(skb, &req, sizeof(req)); 2917 skb_put_data(skb, eep, eep_len); 2918 2919 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2920 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 2921 if (ret) 2922 return ret; 2923 } 2924 2925 return 0; 2926 } 2927 2928 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 2929 { 2930 struct mt7996_mcu_eeprom req = { 2931 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 2932 .len = cpu_to_le16(sizeof(req) - 4), 2933 .buffer_mode = EE_MODE_EFUSE, 2934 .format = EE_FORMAT_WHOLE 2935 }; 2936 2937 if (dev->flash_mode) 2938 return mt7996_mcu_set_eeprom_flash(dev); 2939 2940 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 2941 &req, sizeof(req), true); 2942 } 2943 2944 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset) 2945 { 2946 struct { 2947 u8 _rsv[4]; 2948 2949 __le16 tag; 2950 __le16 len; 2951 __le32 addr; 2952 __le32 valid; 2953 u8 data[16]; 2954 } __packed req = { 2955 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 2956 .len = cpu_to_le16(sizeof(req) - 4), 2957 .addr = cpu_to_le32(round_down(offset, 2958 MT7996_EEPROM_BLOCK_SIZE)), 2959 }; 2960 struct sk_buff *skb; 2961 bool valid; 2962 int ret; 2963 2964 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 2965 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 2966 &req, sizeof(req), true, &skb); 2967 if (ret) 2968 return ret; 2969 2970 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 2971 if (valid) { 2972 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 2973 u8 *buf = (u8 *)dev->mt76.eeprom.data + addr; 2974 2975 skb_pull(skb, 64); 2976 memcpy(buf, skb->data, MT7996_EEPROM_BLOCK_SIZE); 2977 } 2978 2979 dev_kfree_skb(skb); 2980 2981 return 0; 2982 } 2983 2984 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 2985 { 2986 struct { 2987 u8 _rsv[4]; 2988 2989 __le16 tag; 2990 __le16 len; 2991 u8 num; 2992 u8 version; 2993 u8 die_idx; 2994 u8 _rsv2; 2995 } __packed req = { 2996 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 2997 .len = cpu_to_le16(sizeof(req) - 4), 2998 .version = 2, 2999 }; 3000 struct sk_buff *skb; 3001 int ret; 3002 3003 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3004 sizeof(req), true, &skb); 3005 if (ret) 3006 return ret; 3007 3008 *block_num = *(u8 *)(skb->data + 8); 3009 dev_kfree_skb(skb); 3010 3011 return 0; 3012 } 3013 3014 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3015 { 3016 #define NIC_CAP 3 3017 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3018 struct { 3019 u8 _rsv[4]; 3020 3021 __le16 tag; 3022 __le16 len; 3023 } __packed req = { 3024 .tag = cpu_to_le16(NIC_CAP), 3025 .len = cpu_to_le16(sizeof(req) - 4), 3026 }; 3027 struct sk_buff *skb; 3028 u8 *buf; 3029 int ret; 3030 3031 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3032 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3033 sizeof(req), true, &skb); 3034 if (ret) 3035 return ret; 3036 3037 /* fixed field */ 3038 skb_pull(skb, 4); 3039 3040 buf = skb->data; 3041 while (buf - skb->data < skb->len) { 3042 struct tlv *tlv = (struct tlv *)buf; 3043 3044 switch (le16_to_cpu(tlv->tag)) { 3045 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3046 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3047 break; 3048 default: 3049 break; 3050 } 3051 3052 buf += le16_to_cpu(tlv->len); 3053 } 3054 3055 dev_kfree_skb(skb); 3056 3057 return 0; 3058 } 3059 3060 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3061 { 3062 struct { 3063 struct { 3064 u8 band; 3065 u8 __rsv[3]; 3066 } hdr; 3067 struct { 3068 __le16 tag; 3069 __le16 len; 3070 __le32 offs; 3071 } data[4]; 3072 } __packed req = { 3073 .hdr.band = phy->mt76->band_idx, 3074 }; 3075 /* strict order */ 3076 static const u32 offs[] = { 3077 UNI_MIB_TX_TIME, 3078 UNI_MIB_RX_TIME, 3079 UNI_MIB_OBSS_AIRTIME, 3080 UNI_MIB_NON_WIFI_TIME, 3081 }; 3082 struct mt76_channel_state *state = phy->mt76->chan_state; 3083 struct mt76_channel_state *state_ts = &phy->state_ts; 3084 struct mt7996_dev *dev = phy->dev; 3085 struct mt7996_mcu_mib *res; 3086 struct sk_buff *skb; 3087 int i, ret; 3088 3089 for (i = 0; i < 4; i++) { 3090 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3091 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3092 req.data[i].offs = cpu_to_le32(offs[i]); 3093 } 3094 3095 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3096 &req, sizeof(req), true, &skb); 3097 if (ret) 3098 return ret; 3099 3100 skb_pull(skb, sizeof(req.hdr)); 3101 3102 res = (struct mt7996_mcu_mib *)(skb->data); 3103 3104 if (chan_switch) 3105 goto out; 3106 3107 #define __res_u64(s) le64_to_cpu(res[s].data) 3108 state->cc_tx += __res_u64(1) - state_ts->cc_tx; 3109 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx; 3110 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx; 3111 state->cc_busy += __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3) - 3112 state_ts->cc_busy; 3113 3114 out: 3115 state_ts->cc_tx = __res_u64(1); 3116 state_ts->cc_bss_rx = __res_u64(2); 3117 state_ts->cc_rx = __res_u64(2) + __res_u64(3); 3118 state_ts->cc_busy = __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3); 3119 #undef __res_u64 3120 3121 dev_kfree_skb(skb); 3122 3123 return 0; 3124 } 3125 3126 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 3127 { 3128 struct { 3129 u8 rsv[4]; 3130 3131 __le16 tag; 3132 __le16 len; 3133 3134 union { 3135 struct { 3136 __le32 mask; 3137 } __packed set; 3138 3139 struct { 3140 u8 method; 3141 u8 band; 3142 u8 rsv2[2]; 3143 } __packed trigger; 3144 }; 3145 } __packed req = { 3146 .tag = cpu_to_le16(action), 3147 .len = cpu_to_le16(sizeof(req) - 4), 3148 }; 3149 3150 switch (action) { 3151 case UNI_CMD_SER_SET: 3152 req.set.mask = cpu_to_le32(val); 3153 break; 3154 case UNI_CMD_SER_TRIGGER: 3155 req.trigger.method = val; 3156 req.trigger.band = band; 3157 break; 3158 default: 3159 return -EINVAL; 3160 } 3161 3162 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 3163 &req, sizeof(req), false); 3164 } 3165 3166 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 3167 { 3168 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 3169 #define BF_PROCESSING 4 3170 struct uni_header hdr; 3171 struct sk_buff *skb; 3172 struct tlv *tlv; 3173 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 3174 3175 memset(&hdr, 0, sizeof(hdr)); 3176 3177 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3178 if (!skb) 3179 return -ENOMEM; 3180 3181 skb_put_data(skb, &hdr, sizeof(hdr)); 3182 3183 switch (action) { 3184 case BF_SOUNDING_ON: { 3185 struct bf_sounding_on *req_snd_on; 3186 3187 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 3188 req_snd_on = (struct bf_sounding_on *)tlv; 3189 req_snd_on->snd_mode = BF_PROCESSING; 3190 break; 3191 } 3192 case BF_HW_EN_UPDATE: { 3193 struct bf_hw_en_status_update *req_hw_en; 3194 3195 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 3196 req_hw_en = (struct bf_hw_en_status_update *)tlv; 3197 req_hw_en->ebf = true; 3198 req_hw_en->ibf = dev->ibf; 3199 break; 3200 } 3201 case BF_MOD_EN_CTRL: { 3202 struct bf_mod_en_ctrl *req_mod_en; 3203 3204 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 3205 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 3206 req_mod_en->bf_num = 2; 3207 req_mod_en->bf_bitmap = GENMASK(0, 0); 3208 break; 3209 } 3210 default: 3211 return -EINVAL; 3212 } 3213 3214 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 3215 } 3216 3217 static int 3218 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 3219 { 3220 struct mt7996_dev *dev = phy->dev; 3221 struct { 3222 u8 band_idx; 3223 u8 __rsv[3]; 3224 3225 __le16 tag; 3226 __le16 len; 3227 3228 __le32 val; 3229 } __packed req = { 3230 .band_idx = phy->mt76->band_idx, 3231 .tag = cpu_to_le16(action), 3232 .len = cpu_to_le16(sizeof(req) - 4), 3233 .val = cpu_to_le32(val), 3234 }; 3235 3236 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3237 &req, sizeof(req), true); 3238 } 3239 3240 static int 3241 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 3242 struct ieee80211_he_obss_pd *he_obss_pd) 3243 { 3244 struct mt7996_dev *dev = phy->dev; 3245 u8 max_th = 82, non_srg_max_th = 62; 3246 struct { 3247 u8 band_idx; 3248 u8 __rsv[3]; 3249 3250 __le16 tag; 3251 __le16 len; 3252 3253 u8 pd_th_non_srg; 3254 u8 pd_th_srg; 3255 u8 period_offs; 3256 u8 rcpi_src; 3257 __le16 obss_pd_min; 3258 __le16 obss_pd_min_srg; 3259 u8 resp_txpwr_mode; 3260 u8 txpwr_restrict_mode; 3261 u8 txpwr_ref; 3262 u8 __rsv2[3]; 3263 } __packed req = { 3264 .band_idx = phy->mt76->band_idx, 3265 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 3266 .len = cpu_to_le16(sizeof(req) - 4), 3267 .obss_pd_min = cpu_to_le16(max_th), 3268 .obss_pd_min_srg = cpu_to_le16(max_th), 3269 .txpwr_restrict_mode = 2, 3270 .txpwr_ref = 21 3271 }; 3272 int ret; 3273 3274 /* disable firmware dynamical PD asjustment */ 3275 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 3276 if (ret) 3277 return ret; 3278 3279 if (he_obss_pd->sr_ctrl & 3280 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 3281 req.pd_th_non_srg = max_th; 3282 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 3283 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 3284 else 3285 req.pd_th_non_srg = non_srg_max_th; 3286 3287 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 3288 req.pd_th_srg = max_th - he_obss_pd->max_offset; 3289 3290 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3291 &req, sizeof(req), true); 3292 } 3293 3294 static int 3295 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif, 3296 struct ieee80211_he_obss_pd *he_obss_pd) 3297 { 3298 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3299 struct mt7996_dev *dev = phy->dev; 3300 u8 omac = mvif->mt76.omac_idx; 3301 struct { 3302 u8 band_idx; 3303 u8 __rsv[3]; 3304 3305 __le16 tag; 3306 __le16 len; 3307 3308 u8 omac; 3309 u8 __rsv2[3]; 3310 u8 flag[20]; 3311 } __packed req = { 3312 .band_idx = phy->mt76->band_idx, 3313 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 3314 .len = cpu_to_le16(sizeof(req) - 4), 3315 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 3316 }; 3317 int ret; 3318 3319 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 3320 req.flag[req.omac] = 0xf; 3321 else 3322 return 0; 3323 3324 /* switch to normal AP mode */ 3325 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 3326 if (ret) 3327 return ret; 3328 3329 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 3330 &req, sizeof(req), true); 3331 } 3332 3333 static int 3334 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 3335 struct ieee80211_he_obss_pd *he_obss_pd) 3336 { 3337 struct mt7996_dev *dev = phy->dev; 3338 struct { 3339 u8 band_idx; 3340 u8 __rsv[3]; 3341 3342 __le16 tag; 3343 __le16 len; 3344 3345 __le32 color_l[2]; 3346 __le32 color_h[2]; 3347 __le32 bssid_l[2]; 3348 __le32 bssid_h[2]; 3349 } __packed req = { 3350 .band_idx = phy->mt76->band_idx, 3351 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 3352 .len = cpu_to_le16(sizeof(req) - 4), 3353 }; 3354 u32 bitmap; 3355 3356 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 3357 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 3358 3359 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 3360 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 3361 3362 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 3363 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 3364 3365 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 3366 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 3367 3368 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 3369 sizeof(req), true); 3370 } 3371 3372 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif, 3373 struct ieee80211_he_obss_pd *he_obss_pd) 3374 { 3375 int ret; 3376 3377 /* enable firmware scene detection algorithms */ 3378 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 3379 sr_scene_detect); 3380 if (ret) 3381 return ret; 3382 3383 /* firmware dynamically adjusts PD threshold so skip manual control */ 3384 if (sr_scene_detect && !he_obss_pd->enable) 3385 return 0; 3386 3387 /* enable spatial reuse */ 3388 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 3389 he_obss_pd->enable); 3390 if (ret) 3391 return ret; 3392 3393 if (sr_scene_detect || !he_obss_pd->enable) 3394 return 0; 3395 3396 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 3397 if (ret) 3398 return ret; 3399 3400 /* set SRG/non-SRG OBSS PD threshold */ 3401 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 3402 if (ret) 3403 return ret; 3404 3405 /* Set SR prohibit */ 3406 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 3407 if (ret) 3408 return ret; 3409 3410 /* set SRG BSS color/BSSID bitmap */ 3411 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 3412 } 3413 3414 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3415 struct cfg80211_he_bss_color *he_bss_color) 3416 { 3417 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 3418 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3419 struct bss_color_tlv *bss_color; 3420 struct sk_buff *skb; 3421 struct tlv *tlv; 3422 3423 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len); 3424 if (IS_ERR(skb)) 3425 return PTR_ERR(skb); 3426 3427 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 3428 sizeof(*bss_color)); 3429 bss_color = (struct bss_color_tlv *)tlv; 3430 bss_color->enable = he_bss_color->enabled; 3431 bss_color->color = he_bss_color->color; 3432 3433 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3434 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 3435 } 3436 3437 #define TWT_AGRT_TRIGGER BIT(0) 3438 #define TWT_AGRT_ANNOUNCE BIT(1) 3439 #define TWT_AGRT_PROTECT BIT(2) 3440 3441 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 3442 struct mt7996_vif *mvif, 3443 struct mt7996_twt_flow *flow, 3444 int cmd) 3445 { 3446 struct { 3447 u8 _rsv[4]; 3448 3449 __le16 tag; 3450 __le16 len; 3451 u8 tbl_idx; 3452 u8 cmd; 3453 u8 own_mac_idx; 3454 u8 flowid; /* 0xff for group id */ 3455 __le16 peer_id; /* specify the peer_id (msb=0) 3456 * or group_id (msb=1) 3457 */ 3458 u8 duration; /* 256 us */ 3459 u8 bss_idx; 3460 __le64 start_tsf; 3461 __le16 mantissa; 3462 u8 exponent; 3463 u8 is_ap; 3464 u8 agrt_params; 3465 u8 __rsv2[135]; 3466 } __packed req = { 3467 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 3468 .len = cpu_to_le16(sizeof(req) - 4), 3469 .tbl_idx = flow->table_id, 3470 .cmd = cmd, 3471 .own_mac_idx = mvif->mt76.omac_idx, 3472 .flowid = flow->id, 3473 .peer_id = cpu_to_le16(flow->wcid), 3474 .duration = flow->duration, 3475 .bss_idx = mvif->mt76.idx, 3476 .start_tsf = cpu_to_le64(flow->tsf), 3477 .mantissa = flow->mantissa, 3478 .exponent = flow->exp, 3479 .is_ap = true, 3480 }; 3481 3482 if (flow->protection) 3483 req.agrt_params |= TWT_AGRT_PROTECT; 3484 if (!flow->flowtype) 3485 req.agrt_params |= TWT_AGRT_ANNOUNCE; 3486 if (flow->trigger) 3487 req.agrt_params |= TWT_AGRT_TRIGGER; 3488 3489 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 3490 &req, sizeof(req), true); 3491 } 3492 3493 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 3494 { 3495 struct { 3496 u8 band_idx; 3497 u8 _rsv[3]; 3498 3499 __le16 tag; 3500 __le16 len; 3501 __le32 len_thresh; 3502 __le32 pkt_thresh; 3503 } __packed req = { 3504 .band_idx = phy->mt76->band_idx, 3505 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 3506 .len = cpu_to_le16(sizeof(req) - 4), 3507 .len_thresh = cpu_to_le32(val), 3508 .pkt_thresh = cpu_to_le32(0x2), 3509 }; 3510 3511 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 3512 &req, sizeof(req), true); 3513 } 3514 3515 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 3516 { 3517 struct { 3518 u8 band_idx; 3519 u8 _rsv[3]; 3520 3521 __le16 tag; 3522 __le16 len; 3523 u8 enable; 3524 u8 _rsv2[3]; 3525 } __packed req = { 3526 .band_idx = phy->mt76->band_idx, 3527 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 3528 .len = cpu_to_le16(sizeof(req) - 4), 3529 .enable = enable, 3530 }; 3531 3532 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 3533 &req, sizeof(req), true); 3534 } 3535 3536 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 3537 u8 rx_sel, u8 val) 3538 { 3539 struct { 3540 u8 _rsv[4]; 3541 3542 __le16 tag; 3543 __le16 len; 3544 3545 u8 ctrl; 3546 u8 rdd_idx; 3547 u8 rdd_rx_sel; 3548 u8 val; 3549 u8 rsv[4]; 3550 } __packed req = { 3551 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 3552 .len = cpu_to_le16(sizeof(req) - 4), 3553 .ctrl = cmd, 3554 .rdd_idx = index, 3555 .rdd_rx_sel = rx_sel, 3556 .val = val, 3557 }; 3558 3559 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3560 &req, sizeof(req), true); 3561 } 3562 3563 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 3564 struct ieee80211_vif *vif, 3565 struct ieee80211_sta *sta) 3566 { 3567 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3568 struct mt7996_sta *msta; 3569 struct sk_buff *skb; 3570 3571 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta; 3572 3573 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 3574 &msta->wcid, 3575 MT7996_STA_UPDATE_MAX_SIZE); 3576 if (IS_ERR(skb)) 3577 return PTR_ERR(skb); 3578 3579 /* starec hdr trans */ 3580 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta); 3581 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3582 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 3583 } 3584 3585 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 3586 { 3587 struct { 3588 u8 __rsv1[4]; 3589 3590 __le16 tag; 3591 __le16 len; 3592 __le16 idx; 3593 u8 __rsv2[2]; 3594 __le32 ofs; 3595 __le32 data; 3596 } __packed *res, req = { 3597 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 3598 .len = cpu_to_le16(sizeof(req) - 4), 3599 3600 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 3601 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 3602 .data = set ? cpu_to_le32(*val) : 0, 3603 }; 3604 struct sk_buff *skb; 3605 int ret; 3606 3607 if (set) 3608 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 3609 &req, sizeof(req), true); 3610 3611 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3612 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 3613 &req, sizeof(req), true, &skb); 3614 if (ret) 3615 return ret; 3616 3617 res = (void *)skb->data; 3618 *val = le32_to_cpu(res->data); 3619 dev_kfree_skb(skb); 3620 3621 return 0; 3622 } 3623 3624 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 3625 { 3626 struct { 3627 __le16 tag; 3628 __le16 len; 3629 u8 enable; 3630 u8 rsv[3]; 3631 } __packed req = { 3632 .len = cpu_to_le16(sizeof(req) - 4), 3633 .enable = true, 3634 }; 3635 3636 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 3637 &req, sizeof(req), false); 3638 } 3639 3640 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u8 val) 3641 { 3642 struct { 3643 u8 __rsv1[4]; 3644 3645 __le16 tag; 3646 __le16 len; 3647 3648 union { 3649 struct { 3650 u8 type; 3651 u8 __rsv2[3]; 3652 } __packed platform_type; 3653 struct { 3654 u8 type; 3655 u8 dest; 3656 u8 __rsv2[2]; 3657 } __packed bypass_mode; 3658 struct { 3659 u8 path; 3660 u8 __rsv2[3]; 3661 } __packed txfree_path; 3662 }; 3663 } __packed req = { 3664 .tag = cpu_to_le16(tag), 3665 .len = cpu_to_le16(sizeof(req) - 4), 3666 }; 3667 3668 switch (tag) { 3669 case UNI_RRO_SET_PLATFORM_TYPE: 3670 req.platform_type.type = val; 3671 break; 3672 case UNI_RRO_SET_BYPASS_MODE: 3673 req.bypass_mode.type = val; 3674 break; 3675 case UNI_RRO_SET_TXFREE_PATH: 3676 req.txfree_path.path = val; 3677 break; 3678 default: 3679 return -EINVAL; 3680 } 3681 3682 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 3683 sizeof(req), true); 3684 } 3685