1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* Copyright (C) 2023 MediaTek Inc. */ 3 4 #include <linux/devcoredump.h> 5 #include <linux/etherdevice.h> 6 #include <linux/timekeeping.h> 7 #include "mt7925.h" 8 #include "../dma.h" 9 #include "regd.h" 10 #include "mac.h" 11 #include "mcu.h" 12 13 bool mt7925_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask) 14 { 15 u32 wtbl_update; 16 17 if (is_mt7928(&dev->mt76)) 18 wtbl_update = MT7928_WTBL_UPDATE; 19 else 20 wtbl_update = MT7925_WTBL_UPDATE; 21 22 mt76_rmw(dev, wtbl_update, MT_WTBL_UPDATE_WLAN_IDX, 23 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 24 25 return mt76_poll(dev, wtbl_update, MT_WTBL_UPDATE_BUSY, 26 0, 5000); 27 } 28 29 static void mt7925_mac_sta_poll(struct mt792x_dev *dev) 30 { 31 static const u8 ac_to_tid[] = { 32 [IEEE80211_AC_BE] = 0, 33 [IEEE80211_AC_BK] = 1, 34 [IEEE80211_AC_VI] = 4, 35 [IEEE80211_AC_VO] = 6 36 }; 37 struct ieee80211_sta *sta; 38 struct mt792x_sta *msta; 39 struct mt792x_link_sta *mlink; 40 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS]; 41 LIST_HEAD(sta_poll_list); 42 struct rate_info *rate; 43 s8 rssi[4]; 44 int i; 45 46 spin_lock_bh(&dev->mt76.sta_poll_lock); 47 list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list); 48 spin_unlock_bh(&dev->mt76.sta_poll_lock); 49 50 while (true) { 51 bool clear = false; 52 u32 addr, val; 53 u16 idx; 54 u8 bw; 55 56 if (list_empty(&sta_poll_list)) 57 break; 58 mlink = list_first_entry(&sta_poll_list, 59 struct mt792x_link_sta, wcid.poll_list); 60 msta = mlink->sta; 61 spin_lock_bh(&dev->mt76.sta_poll_lock); 62 list_del_init(&mlink->wcid.poll_list); 63 spin_unlock_bh(&dev->mt76.sta_poll_lock); 64 65 idx = mlink->wcid.idx; 66 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, MT_WTBL_AC0_CTT_OFFSET); 67 68 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 69 u32 tx_last = mlink->airtime_ac[i]; 70 u32 rx_last = mlink->airtime_ac[i + 4]; 71 72 mlink->airtime_ac[i] = mt76_rr(dev, addr); 73 mlink->airtime_ac[i + 4] = mt76_rr(dev, addr + 4); 74 75 tx_time[i] = mlink->airtime_ac[i] - tx_last; 76 rx_time[i] = mlink->airtime_ac[i + 4] - rx_last; 77 78 if ((tx_last | rx_last) & BIT(30)) 79 clear = true; 80 81 addr += 8; 82 } 83 84 if (clear) { 85 mt7925_mac_wtbl_update(dev, idx, 86 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 87 memset(mlink->airtime_ac, 0, sizeof(mlink->airtime_ac)); 88 } 89 90 if (!mlink->wcid.sta) 91 continue; 92 93 sta = container_of((void *)msta, struct ieee80211_sta, 94 drv_priv); 95 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 96 u8 q = mt76_connac_lmac_mapping(i); 97 u32 tx_cur = tx_time[q]; 98 u32 rx_cur = rx_time[q]; 99 u8 tid = ac_to_tid[i]; 100 101 if (!tx_cur && !rx_cur) 102 continue; 103 104 ieee80211_sta_register_airtime(sta, tid, tx_cur, 105 rx_cur); 106 } 107 108 /* We don't support reading GI info from txs packets. 109 * For accurate tx status reporting and AQL improvement, 110 * we need to make sure that flags match so polling GI 111 * from per-sta counters directly. 112 */ 113 rate = &mlink->wcid.rate; 114 115 switch (rate->bw) { 116 case RATE_INFO_BW_160: 117 bw = IEEE80211_STA_RX_BW_160; 118 break; 119 case RATE_INFO_BW_80: 120 bw = IEEE80211_STA_RX_BW_80; 121 break; 122 case RATE_INFO_BW_40: 123 bw = IEEE80211_STA_RX_BW_40; 124 break; 125 default: 126 bw = IEEE80211_STA_RX_BW_20; 127 break; 128 } 129 130 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 6); 131 val = mt76_rr(dev, addr); 132 if (rate->flags & RATE_INFO_FLAGS_EHT_MCS) { 133 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 5); 134 val = mt76_rr(dev, addr); 135 rate->eht_gi = FIELD_GET(GENMASK(25, 24), val); 136 } else if (rate->flags & RATE_INFO_FLAGS_HE_MCS) { 137 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw; 138 139 rate->he_gi = (val & (0x3 << offs)) >> offs; 140 } else if (rate->flags & 141 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) { 142 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw)) 143 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 144 else 145 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 146 } 147 148 /* get signal strength of resp frames (CTS/BA/ACK) */ 149 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 34); 150 val = mt76_rr(dev, addr); 151 152 rssi[0] = to_rssi(GENMASK(7, 0), val); 153 rssi[1] = to_rssi(GENMASK(15, 8), val); 154 rssi[2] = to_rssi(GENMASK(23, 16), val); 155 rssi[3] = to_rssi(GENMASK(31, 24), val); 156 157 mlink->ack_signal = 158 mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi); 159 160 ewma_avg_signal_add(&mlink->avg_ack_signal, -mlink->ack_signal); 161 } 162 } 163 164 void mt7925_mac_set_fixed_rate_table(struct mt792x_dev *dev, 165 u8 tbl_idx, u16 rate_idx) 166 { 167 u32 ctrl = MT_WTBL_ITCR_WR | MT_WTBL_ITCR_EXEC | tbl_idx; 168 169 if (is_mt7928(&dev->mt76)) { 170 mt76_wr(dev, MT7928_WTBL_ITDR0, rate_idx); 171 /* use wtbl spe idx */ 172 mt76_wr(dev, MT7928_WTBL_ITDR1, MT_WTBL_SPE_IDX_SEL); 173 mt76_wr(dev, MT7928_WTBL_ITCR, ctrl); 174 } else { 175 mt76_wr(dev, MT_WTBL_ITDR0, rate_idx); 176 /* use wtbl spe idx */ 177 mt76_wr(dev, MT_WTBL_ITDR1, MT_WTBL_SPE_IDX_SEL); 178 mt76_wr(dev, MT_WTBL_ITCR, ctrl); 179 } 180 } 181 182 /* The HW does not translate the mac header to 802.3 for mesh point */ 183 static int mt7925_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) 184 { 185 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 186 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap); 187 struct mt792x_sta *msta = (struct mt792x_sta *)status->wcid; 188 __le32 *rxd = (__le32 *)skb->data; 189 struct ieee80211_sta *sta; 190 struct ieee80211_vif *vif; 191 struct ieee80211_hdr hdr; 192 u16 frame_control; 193 194 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != 195 MT_RXD3_NORMAL_U2M) 196 return -EINVAL; 197 198 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4)) 199 return -EINVAL; 200 201 if (!msta || !msta->vif) 202 return -EINVAL; 203 204 sta = container_of((void *)msta, struct ieee80211_sta, drv_priv); 205 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); 206 207 /* store the info from RXD and ethhdr to avoid being overridden */ 208 frame_control = le32_get_bits(rxd[8], MT_RXD8_FRAME_CONTROL); 209 hdr.frame_control = cpu_to_le16(frame_control); 210 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[10], MT_RXD10_SEQ_CTRL)); 211 hdr.duration_id = 0; 212 213 ether_addr_copy(hdr.addr1, vif->addr); 214 ether_addr_copy(hdr.addr2, sta->addr); 215 switch (frame_control & (IEEE80211_FCTL_TODS | 216 IEEE80211_FCTL_FROMDS)) { 217 case 0: 218 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); 219 break; 220 case IEEE80211_FCTL_FROMDS: 221 ether_addr_copy(hdr.addr3, eth_hdr->h_source); 222 break; 223 case IEEE80211_FCTL_TODS: 224 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 225 break; 226 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: 227 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 228 ether_addr_copy(hdr.addr4, eth_hdr->h_source); 229 break; 230 default: 231 break; 232 } 233 234 skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2); 235 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || 236 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) 237 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); 238 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) 239 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); 240 else 241 skb_pull(skb, 2); 242 243 if (ieee80211_has_order(hdr.frame_control)) 244 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[11], 245 IEEE80211_HT_CTL_LEN); 246 if (ieee80211_is_data_qos(hdr.frame_control)) { 247 __le16 qos_ctrl; 248 249 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[10], MT_RXD10_QOS_CTL)); 250 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, 251 IEEE80211_QOS_CTL_LEN); 252 } 253 254 if (ieee80211_has_a4(hdr.frame_control)) 255 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 256 else 257 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6); 258 259 return 0; 260 } 261 262 static int 263 mt7925_mac_fill_rx_rate(struct mt792x_dev *dev, 264 struct mt76_rx_status *status, 265 struct ieee80211_supported_band *sband, 266 __le32 *rxv, u8 *mode) 267 { 268 u32 v0, v2; 269 u8 stbc, gi, bw, dcm, nss; 270 int i, idx; 271 bool cck = false; 272 273 v0 = le32_to_cpu(rxv[0]); 274 v2 = le32_to_cpu(rxv[2]); 275 276 idx = FIELD_GET(MT_PRXV_TX_RATE, v0); 277 i = idx; 278 nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1; 279 280 stbc = FIELD_GET(MT_PRXV_HT_STBC, v2); 281 gi = FIELD_GET(MT_PRXV_HT_SHORT_GI, v2); 282 *mode = FIELD_GET(MT_PRXV_TX_MODE, v2); 283 dcm = FIELD_GET(MT_PRXV_DCM, v2); 284 bw = FIELD_GET(MT_PRXV_FRAME_MODE, v2); 285 286 switch (*mode) { 287 case MT_PHY_TYPE_CCK: 288 cck = true; 289 fallthrough; 290 case MT_PHY_TYPE_OFDM: 291 i = mt76_get_rate(&dev->mt76, sband, i, cck); 292 break; 293 case MT_PHY_TYPE_HT_GF: 294 case MT_PHY_TYPE_HT: 295 status->encoding = RX_ENC_HT; 296 if (gi) 297 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 298 if (i > 31) 299 return -EINVAL; 300 break; 301 case MT_PHY_TYPE_VHT: 302 status->nss = nss; 303 status->encoding = RX_ENC_VHT; 304 if (gi) 305 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 306 if (i > 11) 307 return -EINVAL; 308 break; 309 case MT_PHY_TYPE_HE_MU: 310 case MT_PHY_TYPE_HE_SU: 311 case MT_PHY_TYPE_HE_EXT_SU: 312 case MT_PHY_TYPE_HE_TB: 313 status->nss = nss; 314 status->encoding = RX_ENC_HE; 315 i &= GENMASK(3, 0); 316 317 if (gi <= NL80211_RATE_INFO_HE_GI_3_2) 318 status->he_gi = gi; 319 320 status->he_dcm = dcm; 321 break; 322 case MT_PHY_TYPE_EHT_SU: 323 case MT_PHY_TYPE_EHT_TRIG: 324 case MT_PHY_TYPE_EHT_MU: 325 status->nss = nss; 326 status->encoding = RX_ENC_EHT; 327 i &= GENMASK(3, 0); 328 329 if (gi <= NL80211_RATE_INFO_EHT_GI_3_2) 330 status->eht.gi = gi; 331 break; 332 default: 333 return -EINVAL; 334 } 335 status->rate_idx = i; 336 337 switch (bw) { 338 case IEEE80211_STA_RX_BW_20: 339 break; 340 case IEEE80211_STA_RX_BW_40: 341 if (*mode & MT_PHY_TYPE_HE_EXT_SU && 342 (idx & MT_PRXV_TX_ER_SU_106T)) { 343 status->bw = RATE_INFO_BW_HE_RU; 344 status->he_ru = 345 NL80211_RATE_INFO_HE_RU_ALLOC_106; 346 } else { 347 status->bw = RATE_INFO_BW_40; 348 } 349 break; 350 case IEEE80211_STA_RX_BW_80: 351 status->bw = RATE_INFO_BW_80; 352 break; 353 case IEEE80211_STA_RX_BW_160: 354 status->bw = RATE_INFO_BW_160; 355 break; 356 /* RXV can report 320 in two positions */ 357 case IEEE80211_STA_RX_BW_320: 358 case IEEE80211_STA_RX_BW_320 + 1: 359 status->bw = RATE_INFO_BW_320; 360 break; 361 default: 362 return -EINVAL; 363 } 364 365 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; 366 if (*mode < MT_PHY_TYPE_HE_SU && gi) 367 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 368 369 return 0; 370 } 371 372 static int 373 mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) 374 { 375 u32 csum_mask = MT_RXD3_NORMAL_IP_SUM | MT_RXD3_NORMAL_UDP_TCP_SUM; 376 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 377 bool hdr_trans, unicast, insert_ccmp_hdr = false; 378 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info; 379 u16 hdr_gap; 380 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data; 381 struct mt76_phy *mphy = &dev->mt76.phy; 382 struct mt792x_phy *phy = &dev->phy; 383 struct ieee80211_supported_band *sband; 384 u32 csum_status = *(u32 *)skb->cb; 385 u32 rxd1 = le32_to_cpu(rxd[1]); 386 u32 rxd2 = le32_to_cpu(rxd[2]); 387 u32 rxd3 = le32_to_cpu(rxd[3]); 388 u32 rxd4 = le32_to_cpu(rxd[4]); 389 struct mt792x_link_sta *mlink; 390 u8 mode = 0; /* , band_idx; */ 391 u16 seq_ctrl = 0; 392 __le16 fc = 0; 393 int idx; 394 395 memset(status, 0, sizeof(*status)); 396 397 if (!test_bit(MT76_STATE_RUNNING, &mphy->state)) 398 return -EINVAL; 399 400 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR) 401 return -EINVAL; 402 403 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS; 404 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM)) 405 return -EINVAL; 406 407 /* ICV error or CCMP/BIP/WPI MIC error */ 408 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR) 409 status->flag |= RX_FLAG_ONLY_MONITOR; 410 411 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3); 412 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; 413 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); 414 status->wcid = mt792x_rx_get_wcid(dev, idx, unicast); 415 416 if (status->wcid) { 417 mlink = container_of(status->wcid, struct mt792x_link_sta, wcid); 418 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 419 } 420 421 mt792x_get_status_freq_info(status, chfreq); 422 423 switch (status->band) { 424 case NL80211_BAND_5GHZ: 425 sband = &mphy->sband_5g.sband; 426 break; 427 case NL80211_BAND_6GHZ: 428 sband = &mphy->sband_6g.sband; 429 break; 430 default: 431 sband = &mphy->sband_2g.sband; 432 break; 433 } 434 435 if (!sband->channels) 436 return -EINVAL; 437 438 if (mt76_is_mmio(&dev->mt76) && (rxd3 & csum_mask) == csum_mask && 439 !(csum_status & (BIT(0) | BIT(2) | BIT(3)))) 440 skb->ip_summed = CHECKSUM_UNNECESSARY; 441 442 if (rxd3 & MT_RXD3_NORMAL_FCS_ERR) 443 status->flag |= RX_FLAG_FAILED_FCS_CRC; 444 445 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR) 446 status->flag |= RX_FLAG_MMIC_ERROR; 447 448 if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 && 449 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) { 450 status->flag |= RX_FLAG_DECRYPTED; 451 status->flag |= RX_FLAG_IV_STRIPPED; 452 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED; 453 } 454 455 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2); 456 457 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR) 458 return -EINVAL; 459 460 rxd += 8; 461 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) { 462 u32 v0 = le32_to_cpu(rxd[0]); 463 u32 v2 = le32_to_cpu(rxd[2]); 464 465 /* TODO: need to map rxd address */ 466 fc = cpu_to_le16(FIELD_GET(MT_RXD8_FRAME_CONTROL, v0)); 467 seq_ctrl = FIELD_GET(MT_RXD10_SEQ_CTRL, v2); 468 qos_ctl = FIELD_GET(MT_RXD10_QOS_CTL, v2); 469 470 rxd += 4; 471 if ((u8 *)rxd - skb->data >= skb->len) 472 return -EINVAL; 473 } 474 475 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) { 476 u8 *data = (u8 *)rxd; 477 478 if (status->flag & RX_FLAG_DECRYPTED) { 479 switch (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2)) { 480 case MT_CIPHER_AES_CCMP: 481 case MT_CIPHER_CCMP_CCX: 482 case MT_CIPHER_CCMP_256: 483 insert_ccmp_hdr = 484 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); 485 fallthrough; 486 case MT_CIPHER_TKIP: 487 case MT_CIPHER_TKIP_NO_MIC: 488 case MT_CIPHER_GCMP: 489 case MT_CIPHER_GCMP_256: 490 status->iv[0] = data[5]; 491 status->iv[1] = data[4]; 492 status->iv[2] = data[3]; 493 status->iv[3] = data[2]; 494 status->iv[4] = data[1]; 495 status->iv[5] = data[0]; 496 break; 497 default: 498 break; 499 } 500 } 501 rxd += 4; 502 if ((u8 *)rxd - skb->data >= skb->len) 503 return -EINVAL; 504 } 505 506 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) { 507 status->timestamp = le32_to_cpu(rxd[0]); 508 status->flag |= RX_FLAG_MACTIME_START; 509 510 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) { 511 status->flag |= RX_FLAG_AMPDU_DETAILS; 512 513 /* all subframes of an A-MPDU have the same timestamp */ 514 if (phy->rx_ampdu_ts != status->timestamp) { 515 if (!++phy->ampdu_ref) 516 phy->ampdu_ref++; 517 } 518 phy->rx_ampdu_ts = status->timestamp; 519 520 status->ampdu_ref = phy->ampdu_ref; 521 } 522 523 rxd += 4; 524 if ((u8 *)rxd - skb->data >= skb->len) 525 return -EINVAL; 526 } 527 528 /* RXD Group 3 - P-RXV */ 529 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) { 530 u32 v3; 531 int ret; 532 533 rxv = rxd; 534 rxd += 4; 535 if ((u8 *)rxd - skb->data >= skb->len) 536 return -EINVAL; 537 538 v3 = le32_to_cpu(rxv[3]); 539 540 status->chains = mphy->antenna_mask; 541 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v3); 542 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v3); 543 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v3); 544 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v3); 545 546 /* RXD Group 5 - C-RXV */ 547 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) { 548 rxd += 24; 549 if ((u8 *)rxd - skb->data >= skb->len) 550 return -EINVAL; 551 } 552 553 ret = mt7925_mac_fill_rx_rate(dev, status, sband, rxv, &mode); 554 if (ret < 0) 555 return ret; 556 } 557 558 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4); 559 status->amsdu = !!amsdu_info; 560 if (status->amsdu) { 561 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME; 562 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME; 563 } 564 565 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad; 566 if (hdr_trans && ieee80211_has_morefrags(fc)) { 567 if (mt7925_reverse_frag0_hdr_trans(skb, hdr_gap)) 568 return -EINVAL; 569 hdr_trans = false; 570 } else { 571 int pad_start = 0; 572 573 skb_pull(skb, hdr_gap); 574 if (!hdr_trans && status->amsdu) { 575 pad_start = ieee80211_get_hdrlen_from_skb(skb); 576 } else if (hdr_trans && (rxd2 & MT_RXD2_NORMAL_HDR_TRANS_ERROR)) { 577 /* When header translation failure is indicated, 578 * the hardware will insert an extra 2-byte field 579 * containing the data length after the protocol 580 * type field. 581 */ 582 pad_start = 12; 583 if (get_unaligned_be16(skb->data + pad_start) == ETH_P_8021Q) 584 pad_start += 4; 585 else 586 pad_start = 0; 587 } 588 589 if (pad_start) { 590 memmove(skb->data + 2, skb->data, pad_start); 591 skb_pull(skb, 2); 592 } 593 } 594 595 if (!hdr_trans) { 596 struct ieee80211_hdr *hdr; 597 598 if (insert_ccmp_hdr) { 599 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1); 600 601 mt76_insert_ccmp_hdr(skb, key_id); 602 } 603 604 hdr = mt76_skb_get_hdr(skb); 605 fc = hdr->frame_control; 606 if (ieee80211_is_data_qos(fc)) { 607 seq_ctrl = le16_to_cpu(hdr->seq_ctrl); 608 qos_ctl = *ieee80211_get_qos_ctl(hdr); 609 } 610 skb_set_mac_header(skb, (unsigned char *)hdr - skb->data); 611 } else { 612 status->flag |= RX_FLAG_8023; 613 } 614 615 mt792x_mac_assoc_rssi(dev, skb); 616 617 if (rxv && !(status->flag & RX_FLAG_8023)) { 618 switch (status->encoding) { 619 case RX_ENC_EHT: 620 mt76_connac3_mac_decode_eht_radiotap(skb, rxv, mode); 621 break; 622 case RX_ENC_HE: 623 mt76_connac3_mac_decode_he_radiotap(skb, rxv, mode); 624 break; 625 default: 626 break; 627 } 628 } 629 630 if (!status->wcid || !ieee80211_is_data_qos(fc)) 631 return 0; 632 633 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc); 634 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl); 635 status->qos_ctl = qos_ctl; 636 637 return 0; 638 } 639 640 static void 641 mt7925_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb, 642 struct mt76_wcid *wcid) 643 { 644 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 645 u8 fc_type, fc_stype; 646 u16 ethertype; 647 bool wmm = false; 648 u32 val; 649 650 if (wcid->sta) { 651 struct ieee80211_sta *sta; 652 653 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv); 654 wmm = sta->wme; 655 } 656 657 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) | 658 FIELD_PREP(MT_TXD1_TID, tid); 659 660 ethertype = get_unaligned_be16(&skb->data[12]); 661 if (ethertype >= ETH_P_802_3_MIN) 662 val |= MT_TXD1_ETH_802_3; 663 664 txwi[1] |= cpu_to_le32(val); 665 666 fc_type = IEEE80211_FTYPE_DATA >> 2; 667 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0; 668 669 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 670 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 671 672 txwi[2] |= cpu_to_le32(val); 673 } 674 675 static void 676 mt7925_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, 677 struct sk_buff *skb, 678 struct ieee80211_key_conf *key) 679 { 680 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 681 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 682 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 683 bool multicast = is_multicast_ether_addr(hdr->addr1); 684 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 685 __le16 fc = hdr->frame_control; 686 u8 fc_type, fc_stype; 687 u32 val; 688 689 if (ieee80211_is_action(fc) && 690 skb->len >= IEEE80211_MIN_ACTION_SIZE(action_code) && 691 mgmt->u.action.category == WLAN_CATEGORY_BACK && 692 mgmt->u.action.action_code == WLAN_ACTION_ADDBA_REQ) 693 tid = MT_TX_ADDBA; 694 else if (ieee80211_is_mgmt(hdr->frame_control)) 695 tid = MT_TX_NORMAL; 696 697 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | 698 FIELD_PREP(MT_TXD1_HDR_INFO, 699 ieee80211_get_hdrlen_from_skb(skb) / 2) | 700 FIELD_PREP(MT_TXD1_TID, tid); 701 702 if (!ieee80211_is_data(fc) || multicast || 703 info->flags & IEEE80211_TX_CTL_USE_MINRATE) 704 val |= MT_TXD1_FIXED_RATE; 705 706 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) && 707 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { 708 val |= MT_TXD1_BIP; 709 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME); 710 } 711 712 txwi[1] |= cpu_to_le32(val); 713 714 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; 715 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; 716 717 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 718 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 719 720 txwi[2] |= cpu_to_le32(val); 721 722 if (is_mt7928(dev) && ieee80211_is_mgmt(hdr->frame_control)) 723 txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU); 724 725 txwi[3] |= cpu_to_le32(FIELD_PREP(MT_TXD3_BCM, multicast)); 726 if (ieee80211_is_beacon(fc)) 727 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); 728 729 if (info->flags & IEEE80211_TX_CTL_INJECTED) { 730 u16 seqno = le16_to_cpu(hdr->seq_ctrl); 731 732 if (ieee80211_is_back_req(hdr->frame_control)) { 733 struct ieee80211_bar *bar; 734 735 bar = (struct ieee80211_bar *)skb->data; 736 seqno = le16_to_cpu(bar->start_seq_num); 737 } 738 739 val = MT_TXD3_SN_VALID | 740 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); 741 txwi[3] |= cpu_to_le32(val); 742 txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU); 743 } 744 } 745 746 void 747 mt7925_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 748 struct sk_buff *skb, struct mt76_wcid *wcid, 749 struct ieee80211_key_conf *key, int pid, 750 enum mt76_txq_id qid, u32 changed) 751 { 752 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 753 struct ieee80211_vif *vif = info->control.vif; 754 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0; 755 u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE; 756 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 757 struct mt76_vif_link *mvif; 758 bool beacon = !!(changed & (BSS_CHANGED_BEACON | 759 BSS_CHANGED_BEACON_ENABLED)); 760 bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP | 761 BSS_CHANGED_FILS_DISCOVERY)); 762 struct mt792x_bss_conf *mconf; 763 764 mconf = vif ? mt792x_vif_to_link((struct mt792x_vif *)vif->drv_priv, 765 wcid->link_id) : NULL; 766 mvif = mconf ? (struct mt76_vif_link *)&mconf->mt76 : NULL; 767 768 if (mvif) { 769 omac_idx = mvif->omac_idx; 770 wmm_idx = mvif->wmm_idx; 771 band_idx = mvif->band_idx; 772 } 773 774 if (inband_disc) { 775 p_fmt = MT_TX_TYPE_FW; 776 q_idx = MT_LMAC_ALTX0; 777 } else if (beacon) { 778 p_fmt = MT_TX_TYPE_FW; 779 q_idx = MT_LMAC_BCN0; 780 } else if (qid >= MT_TXQ_PSD) { 781 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 782 q_idx = MT_LMAC_ALTX0; 783 } else { 784 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 785 q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS + 786 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); 787 788 /* counting non-offloading skbs */ 789 wcid->stats.tx_bytes += skb->len; 790 wcid->stats.tx_packets++; 791 } 792 793 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | 794 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | 795 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 796 txwi[0] = cpu_to_le32(val); 797 798 val = FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | 799 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); 800 801 if (band_idx) 802 val |= FIELD_PREP(MT_TXD1_TGID, band_idx); 803 804 txwi[1] = cpu_to_le32(val); 805 txwi[2] = 0; 806 807 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15); 808 809 if (key) 810 val |= MT_TXD3_PROTECT_FRAME; 811 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 812 val |= MT_TXD3_NO_ACK; 813 if (wcid->amsdu) 814 val |= MT_TXD3_HW_AMSDU; 815 816 txwi[3] = cpu_to_le32(val); 817 txwi[4] = 0; 818 819 val = FIELD_PREP(MT_TXD5_PID, pid); 820 if (pid >= MT_PACKET_ID_FIRST) { 821 val |= MT_TXD5_TX_STATUS_HOST; 822 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 823 txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU); 824 } 825 826 txwi[5] = cpu_to_le32(val); 827 828 if (is_mt7928(dev)) 829 val = MT_TXD6_DAS | FIELD_PREP(MT_TXD6_MSDU_CNT_V2, 1); 830 else 831 val = MT_TXD6_DAS | FIELD_PREP(MT_TXD6_MSDU_CNT, 1); 832 833 if (vif && (!ieee80211_vif_is_mld(vif) || 834 (q_idx >= MT_LMAC_ALTX0 && q_idx <= MT_LMAC_BCN0))) 835 val |= MT_TXD6_DIS_MAT; 836 txwi[6] = cpu_to_le32(val); 837 txwi[7] = 0; 838 839 if (is_8023) 840 mt7925_mac_write_txwi_8023(txwi, skb, wcid); 841 else 842 mt7925_mac_write_txwi_80211(dev, txwi, skb, key); 843 844 if (txwi[1] & cpu_to_le32(MT_TXD1_FIXED_RATE)) { 845 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 846 bool mcast = ieee80211_is_data(hdr->frame_control) && 847 is_multicast_ether_addr(hdr->addr1); 848 u8 idx = MT792x_BASIC_RATES_TBL; 849 850 if (mvif) { 851 if (mcast && mvif->mcast_rates_idx) 852 idx = mvif->mcast_rates_idx; 853 else if (beacon && mvif->beacon_rates_idx) 854 idx = mvif->beacon_rates_idx; 855 else 856 idx = mvif->basic_rates_idx; 857 } 858 859 txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_TX_RATE, idx)); 860 861 if (is_mt7928(dev)) 862 txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_BW_V2, 8)); 863 864 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 865 } 866 } 867 EXPORT_SYMBOL_GPL(mt7925_mac_write_txwi); 868 869 static void mt7925_tx_check_aggr(struct ieee80211_sta *sta, struct sk_buff *skb, 870 struct mt76_wcid *wcid) 871 { 872 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 873 struct ieee80211_link_sta *link_sta; 874 struct mt792x_sta *msta; 875 bool is_8023; 876 u16 fc, tid; 877 878 if (!sta) 879 return; 880 881 link_sta = rcu_dereference(sta->link[wcid->link_id]); 882 if (!link_sta) 883 return; 884 885 if (!(link_sta->ht_cap.ht_supported || link_sta->he_cap.has_he)) 886 return; 887 888 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 889 is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 890 891 if (is_8023) { 892 fc = IEEE80211_FTYPE_DATA | 893 (sta->wme ? IEEE80211_STYPE_QOS_DATA : 894 IEEE80211_STYPE_DATA); 895 } else { 896 /* No need to get precise TID for Action/Management Frame, 897 * since it will not meet the following Frame Control 898 * condition anyway. 899 */ 900 901 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 902 903 fc = le16_to_cpu(hdr->frame_control) & 904 (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE); 905 } 906 907 if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA))) 908 return; 909 910 msta = (struct mt792x_sta *)sta->drv_priv; 911 912 /* Packets belonging to the same TID can be transmitted over multiple 913 * links. Keep the TX BA session state in the primary link so all links 914 * share the same AMPDU bookkeeping. 915 */ 916 if (!test_and_set_bit(tid, &msta->deflink.wcid.ampdu_state)) { 917 if (ieee80211_start_tx_ba_session(sta, tid, 0)) 918 clear_bit(tid, &msta->deflink.wcid.ampdu_state); 919 920 } 921 } 922 923 static bool 924 mt7925_mac_add_txs_skb(struct mt792x_dev *dev, struct mt76_wcid *wcid, 925 int pid, __le32 *txs_data) 926 { 927 struct mt76_sta_stats *stats = &wcid->stats; 928 struct ieee80211_supported_band *sband; 929 struct mt76_dev *mdev = &dev->mt76; 930 struct mt76_phy *mphy; 931 struct ieee80211_tx_info *info; 932 struct sk_buff_head list; 933 struct rate_info rate = {}; 934 struct sk_buff *skb; 935 bool cck = false; 936 u32 txrate, txs, mode, stbc; 937 938 mt76_tx_status_lock(mdev, &list); 939 skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); 940 if (!skb) 941 goto out_no_skb; 942 943 txs = le32_to_cpu(txs_data[0]); 944 info = IEEE80211_SKB_CB(skb); 945 if (!(txs & MT_TXS0_ACK_ERROR_MASK)) 946 info->flags |= IEEE80211_TX_STAT_ACK; 947 948 info->status.ampdu_len = 1; 949 info->status.ampdu_ack_len = !!(info->flags & 950 IEEE80211_TX_STAT_ACK); 951 952 info->status.rates[0].idx = -1; 953 954 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); 955 956 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 957 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 958 stbc = le32_get_bits(txs_data[3], MT_TXS3_RATE_STBC); 959 960 if (stbc && rate.nss > 1) 961 rate.nss >>= 1; 962 963 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 964 stats->tx_nss[rate.nss - 1]++; 965 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 966 stats->tx_mcs[rate.mcs]++; 967 968 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 969 switch (mode) { 970 case MT_PHY_TYPE_CCK: 971 cck = true; 972 fallthrough; 973 case MT_PHY_TYPE_OFDM: 974 mphy = mt76_dev_phy(mdev, wcid->phy_idx); 975 976 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 977 sband = &mphy->sband_5g.sband; 978 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 979 sband = &mphy->sband_6g.sband; 980 else 981 sband = &mphy->sband_2g.sband; 982 983 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck); 984 rate.legacy = sband->bitrates[rate.mcs].bitrate; 985 break; 986 case MT_PHY_TYPE_HT: 987 case MT_PHY_TYPE_HT_GF: 988 if (rate.mcs > 31) 989 goto out; 990 991 rate.flags = RATE_INFO_FLAGS_MCS; 992 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 993 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 994 break; 995 case MT_PHY_TYPE_VHT: 996 if (rate.mcs > 9) 997 goto out; 998 999 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 1000 break; 1001 case MT_PHY_TYPE_HE_SU: 1002 case MT_PHY_TYPE_HE_EXT_SU: 1003 case MT_PHY_TYPE_HE_TB: 1004 case MT_PHY_TYPE_HE_MU: 1005 if (rate.mcs > 11) 1006 goto out; 1007 1008 rate.he_gi = wcid->rate.he_gi; 1009 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 1010 rate.flags = RATE_INFO_FLAGS_HE_MCS; 1011 break; 1012 case MT_PHY_TYPE_EHT_SU: 1013 case MT_PHY_TYPE_EHT_TRIG: 1014 case MT_PHY_TYPE_EHT_MU: 1015 if (rate.mcs > 13) 1016 goto out; 1017 1018 rate.eht_gi = wcid->rate.eht_gi; 1019 rate.flags = RATE_INFO_FLAGS_EHT_MCS; 1020 break; 1021 default: 1022 goto out; 1023 } 1024 1025 stats->tx_mode[mode]++; 1026 1027 switch (FIELD_GET(MT_TXS0_BW, txs)) { 1028 case IEEE80211_STA_RX_BW_320: 1029 rate.bw = RATE_INFO_BW_320; 1030 stats->tx_bw[4]++; 1031 break; 1032 case IEEE80211_STA_RX_BW_160: 1033 rate.bw = RATE_INFO_BW_160; 1034 stats->tx_bw[3]++; 1035 break; 1036 case IEEE80211_STA_RX_BW_80: 1037 rate.bw = RATE_INFO_BW_80; 1038 stats->tx_bw[2]++; 1039 break; 1040 case IEEE80211_STA_RX_BW_40: 1041 rate.bw = RATE_INFO_BW_40; 1042 stats->tx_bw[1]++; 1043 break; 1044 default: 1045 rate.bw = RATE_INFO_BW_20; 1046 stats->tx_bw[0]++; 1047 break; 1048 } 1049 wcid->rate = rate; 1050 1051 out: 1052 mt76_tx_status_skb_done(mdev, skb, &list); 1053 1054 out_no_skb: 1055 mt76_tx_status_unlock(mdev, &list); 1056 1057 return !!skb; 1058 } 1059 1060 static bool 1061 mt7928_mac_add_txs_skb_msg(struct mt792x_dev *dev, struct mt76_wcid *wcid, 1062 int pid, struct mt7928_uni_txdone_event *pevt) 1063 { 1064 struct mt76_sta_stats *stats = &wcid->stats; 1065 struct ieee80211_supported_band *sband; 1066 struct mt76_dev *mdev = &dev->mt76; 1067 struct ieee80211_tx_info *info; 1068 struct sk_buff_head list; 1069 u32 txrate, mode, stbc; 1070 struct rate_info rate; 1071 struct mt76_phy *mphy; 1072 struct sk_buff *skb; 1073 bool cck = false; 1074 1075 mt76_tx_status_lock(mdev, &list); 1076 skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); 1077 if (!skb) 1078 goto out_no_skb; 1079 1080 info = IEEE80211_SKB_CB(skb); 1081 if (!pevt->status) 1082 info->flags |= IEEE80211_TX_STAT_ACK; 1083 1084 info->status.ampdu_len = 1; 1085 info->status.ampdu_ack_len = !!(info->flags & 1086 IEEE80211_TX_STAT_ACK); 1087 1088 info->status.rates[0].idx = -1; 1089 1090 txrate = le16_to_cpu(pevt->tx_rate); 1091 1092 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 1093 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 1094 stbc = FIELD_GET(MT_TX_RATE_STBC, txrate); 1095 1096 if (stbc && rate.nss > 1) 1097 rate.nss >>= 1; 1098 1099 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 1100 stats->tx_nss[rate.nss - 1]++; 1101 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 1102 stats->tx_mcs[rate.mcs]++; 1103 1104 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 1105 switch (mode) { 1106 case MT_PHY_TYPE_CCK: 1107 cck = true; 1108 fallthrough; 1109 case MT_PHY_TYPE_OFDM: 1110 mphy = mt76_dev_phy(mdev, wcid->phy_idx); 1111 1112 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 1113 sband = &mphy->sband_5g.sband; 1114 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 1115 sband = &mphy->sband_6g.sband; 1116 else 1117 sband = &mphy->sband_2g.sband; 1118 1119 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck); 1120 rate.legacy = sband->bitrates[rate.mcs].bitrate; 1121 break; 1122 case MT_PHY_TYPE_HT: 1123 case MT_PHY_TYPE_HT_GF: 1124 if (rate.mcs > 31) 1125 goto out; 1126 1127 rate.flags = RATE_INFO_FLAGS_MCS; 1128 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 1129 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 1130 break; 1131 case MT_PHY_TYPE_VHT: 1132 if (rate.mcs > 9) 1133 goto out; 1134 1135 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 1136 break; 1137 case MT_PHY_TYPE_HE_SU: 1138 case MT_PHY_TYPE_HE_EXT_SU: 1139 case MT_PHY_TYPE_HE_TB: 1140 case MT_PHY_TYPE_HE_MU: 1141 if (rate.mcs > 11) 1142 goto out; 1143 1144 rate.he_gi = wcid->rate.he_gi; 1145 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 1146 rate.flags = RATE_INFO_FLAGS_HE_MCS; 1147 break; 1148 case MT_PHY_TYPE_EHT_SU: 1149 case MT_PHY_TYPE_EHT_TRIG: 1150 case MT_PHY_TYPE_EHT_MU: 1151 if (rate.mcs > 13) 1152 goto out; 1153 1154 rate.eht_gi = wcid->rate.eht_gi; 1155 rate.flags = RATE_INFO_FLAGS_EHT_MCS; 1156 break; 1157 default: 1158 goto out; 1159 } 1160 1161 stats->tx_mode[mode]++; 1162 1163 switch (pevt->bw) { 1164 case IEEE80211_STA_RX_BW_160: 1165 rate.bw = RATE_INFO_BW_160; 1166 stats->tx_bw[3]++; 1167 break; 1168 case IEEE80211_STA_RX_BW_80: 1169 rate.bw = RATE_INFO_BW_80; 1170 stats->tx_bw[2]++; 1171 break; 1172 case IEEE80211_STA_RX_BW_40: 1173 rate.bw = RATE_INFO_BW_40; 1174 stats->tx_bw[1]++; 1175 break; 1176 default: 1177 rate.bw = RATE_INFO_BW_20; 1178 stats->tx_bw[0]++; 1179 break; 1180 } 1181 wcid->rate = rate; 1182 1183 out: 1184 mt76_tx_status_skb_done(mdev, skb, &list); 1185 1186 out_no_skb: 1187 mt76_tx_status_unlock(mdev, &list); 1188 1189 return !!skb; 1190 } 1191 1192 void mt7928_mac_add_txs_msg(struct mt792x_dev *dev, 1193 void *evt) 1194 { 1195 struct mt7928_uni_txdone_event *done_evt; 1196 struct mt792x_link_sta *mlink = NULL; 1197 struct mt76_wcid *wcid; 1198 u16 wcidx; 1199 u8 pid; 1200 1201 done_evt = (struct mt7928_uni_txdone_event *)evt; 1202 wcidx = done_evt->wcid; 1203 pid = done_evt->pid; 1204 1205 if (pid < MT_PACKET_ID_FIRST) 1206 return; 1207 1208 if (wcidx >= MT792x_WTBL_SIZE) 1209 return; 1210 1211 rcu_read_lock(); 1212 1213 wcid = mt76_wcid_ptr(dev, wcidx); 1214 if (!wcid) 1215 goto out; 1216 1217 mlink = container_of(wcid, struct mt792x_link_sta, wcid); 1218 1219 mt7928_mac_add_txs_skb_msg(dev, wcid, pid, done_evt); 1220 if (!wcid->sta) 1221 goto out; 1222 1223 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 1224 1225 out: 1226 rcu_read_unlock(); 1227 } 1228 1229 void mt7925_mac_add_txs(struct mt792x_dev *dev, void *data) 1230 { 1231 struct mt792x_link_sta *mlink = NULL; 1232 __le32 *txs_data = data; 1233 struct mt76_wcid *wcid; 1234 u8 pid, txs_fm; 1235 u16 wcidx; 1236 1237 txs_fm = le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT); 1238 1239 if (is_mt7928(&dev->mt76)) { 1240 if (txs_fm != TXS_FM_MPDU && txs_fm != TXS_FM_PPDU) 1241 return; 1242 } else if (txs_fm > 1) { 1243 return; 1244 } 1245 1246 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); 1247 pid = le32_get_bits(txs_data[3], MT_TXS3_PID); 1248 1249 if (pid < MT_PACKET_ID_FIRST) 1250 return; 1251 1252 if (wcidx >= MT792x_WTBL_SIZE) 1253 return; 1254 1255 rcu_read_lock(); 1256 1257 wcid = mt76_wcid_ptr(dev, wcidx); 1258 if (!wcid) 1259 goto out; 1260 1261 mlink = container_of(wcid, struct mt792x_link_sta, wcid); 1262 1263 mt7925_mac_add_txs_skb(dev, wcid, pid, txs_data); 1264 if (!wcid->sta) 1265 goto out; 1266 1267 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 1268 1269 out: 1270 rcu_read_unlock(); 1271 } 1272 1273 void mt7925_txwi_free(struct mt792x_dev *dev, struct mt76_txwi_cache *t, 1274 struct ieee80211_sta *sta, struct mt76_wcid *wcid, 1275 struct list_head *free_list) 1276 { 1277 struct mt76_dev *mdev = &dev->mt76; 1278 __le32 *txwi; 1279 u16 wcid_idx; 1280 1281 mt76_connac_txp_skb_unmap(mdev, t); 1282 if (!t->skb) 1283 goto out; 1284 1285 txwi = (__le32 *)mt76_get_txwi_ptr(mdev, t); 1286 if (sta) { 1287 if (likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE))) 1288 mt7925_tx_check_aggr(sta, t->skb, wcid); 1289 1290 wcid_idx = wcid->idx; 1291 } else { 1292 wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 1293 } 1294 1295 __mt76_tx_complete_skb(mdev, wcid_idx, t->skb, free_list); 1296 out: 1297 t->skb = NULL; 1298 mt76_put_txwi(mdev, t); 1299 } 1300 EXPORT_SYMBOL_GPL(mt7925_txwi_free); 1301 1302 static void 1303 mt7925_mac_tx_free(struct mt792x_dev *dev, void *data, int len) 1304 { 1305 __le32 *tx_free = (__le32 *)data, *cur_info; 1306 struct mt76_dev *mdev = &dev->mt76; 1307 struct mt76_txwi_cache *txwi; 1308 struct ieee80211_sta *sta = NULL; 1309 struct mt76_wcid *wcid = NULL; 1310 LIST_HEAD(free_list); 1311 struct sk_buff *skb, *tmp; 1312 void *end = data + len; 1313 bool wake = false; 1314 u16 total, count = 0; 1315 1316 /* clean DMA queues and unmap buffers first */ 1317 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); 1318 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); 1319 1320 if (WARN_ON_ONCE(le32_get_bits(tx_free[1], MT_TXFREE1_VER) < 4)) 1321 return; 1322 1323 total = le32_get_bits(tx_free[0], MT_TXFREE0_MSDU_CNT); 1324 for (cur_info = &tx_free[2]; count < total; cur_info++) { 1325 u32 msdu, info; 1326 u8 i; 1327 1328 if (WARN_ON_ONCE((void *)cur_info >= end)) 1329 return; 1330 /* 1'b1: new wcid pair. 1331 * 1'b0: msdu_id with the same 'wcid pair' as above. 1332 */ 1333 info = le32_to_cpu(*cur_info); 1334 if (info & MT_TXFREE_INFO_PAIR) { 1335 struct mt792x_link_sta *mlink; 1336 u16 idx; 1337 1338 idx = FIELD_GET(MT_TXFREE_INFO_WLAN_ID, info); 1339 wcid = mt76_wcid_ptr(dev, idx); 1340 sta = wcid_to_sta(wcid); 1341 if (!sta) 1342 continue; 1343 1344 mlink = container_of(wcid, struct mt792x_link_sta, wcid); 1345 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 1346 continue; 1347 } 1348 1349 if (info & MT_TXFREE_INFO_HEADER) { 1350 if (wcid) { 1351 u32 count = FIELD_GET(MT_TXFREE_INFO_COUNT, info); 1352 1353 wcid->stats.tx_retries += count ? count - 1 : 0; 1354 wcid->stats.tx_failed += 1355 !!FIELD_GET(MT_TXFREE_INFO_STAT, info); 1356 } 1357 continue; 1358 } 1359 1360 for (i = 0; i < 2; i++) { 1361 msdu = (info >> (15 * i)) & MT_TXFREE_INFO_MSDU_ID; 1362 if (msdu == MT_TXFREE_INFO_MSDU_ID) 1363 continue; 1364 1365 count++; 1366 txwi = mt76_token_release(mdev, msdu, &wake); 1367 if (!txwi) 1368 continue; 1369 1370 mt7925_txwi_free(dev, txwi, sta, wcid, &free_list); 1371 } 1372 } 1373 1374 mt7925_mac_sta_poll(dev); 1375 1376 if (wake) 1377 mt76_set_tx_blocked(&dev->mt76, false); 1378 1379 mt76_worker_schedule(&dev->mt76.tx_worker); 1380 1381 list_for_each_entry_safe(skb, tmp, &free_list, list) { 1382 skb_list_del_init(skb); 1383 napi_consume_skb(skb, 1); 1384 } 1385 } 1386 1387 bool mt7925_rx_check(struct mt76_dev *mdev, void *data, int len) 1388 { 1389 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1390 __le32 *rxd = (__le32 *)data; 1391 __le32 *end = (__le32 *)&rxd[len / 4]; 1392 enum rx_pkt_type type; 1393 1394 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 1395 if (type != PKT_TYPE_NORMAL) { 1396 u32 sw_type = le32_get_bits(rxd[0], MT_RXD0_SW_PKT_TYPE_MASK); 1397 1398 if (unlikely((sw_type & MT_RXD0_SW_PKT_TYPE_MAP) == 1399 MT_RXD0_SW_PKT_TYPE_FRAME)) 1400 return true; 1401 } 1402 1403 switch (type) { 1404 case PKT_TYPE_TXRX_NOTIFY: 1405 if (!mt76_is_mmio(mdev)) 1406 return false; 1407 mt7925_mac_tx_free(dev, data, len); 1408 return false; 1409 case PKT_TYPE_TXS: 1410 for (rxd += 4; rxd + 12 <= end; rxd += 12) 1411 mt7925_mac_add_txs(dev, rxd); 1412 return false; 1413 default: 1414 return true; 1415 } 1416 } 1417 EXPORT_SYMBOL_GPL(mt7925_rx_check); 1418 1419 void mt7925_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 1420 struct sk_buff *skb, u32 *info) 1421 { 1422 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1423 __le32 *rxd = (__le32 *)skb->data; 1424 __le32 *end = (__le32 *)&skb->data[skb->len]; 1425 enum rx_pkt_type type; 1426 u16 flag; 1427 1428 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 1429 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); 1430 if (type != PKT_TYPE_NORMAL) { 1431 u32 sw_type = le32_get_bits(rxd[0], MT_RXD0_SW_PKT_TYPE_MASK); 1432 1433 if (unlikely((sw_type & MT_RXD0_SW_PKT_TYPE_MAP) == 1434 MT_RXD0_SW_PKT_TYPE_FRAME)) 1435 type = PKT_TYPE_NORMAL; 1436 } 1437 1438 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 1439 type = PKT_TYPE_NORMAL_MCU; 1440 1441 switch (type) { 1442 case PKT_TYPE_TXRX_NOTIFY: 1443 if (!mt76_is_mmio(mdev)) { 1444 napi_consume_skb(skb, 1); 1445 break; 1446 } 1447 mt7925_mac_tx_free(dev, skb->data, skb->len); 1448 napi_consume_skb(skb, 1); 1449 break; 1450 case PKT_TYPE_RX_EVENT: 1451 mt7925_mcu_rx_event(dev, skb); 1452 break; 1453 case PKT_TYPE_TXS: 1454 for (rxd += 2; rxd + 8 <= end; rxd += 8) 1455 mt7925_mac_add_txs(dev, rxd); 1456 dev_kfree_skb(skb); 1457 break; 1458 case PKT_TYPE_NORMAL_MCU: 1459 case PKT_TYPE_NORMAL: 1460 if (!mt7925_mac_fill_rx(dev, skb)) { 1461 mt76_rx(&dev->mt76, q, skb); 1462 return; 1463 } 1464 fallthrough; 1465 default: 1466 dev_kfree_skb(skb); 1467 break; 1468 } 1469 } 1470 EXPORT_SYMBOL_GPL(mt7925_queue_rx_skb); 1471 1472 static void 1473 mt7925_vif_connect_iter(void *priv, u8 *mac, 1474 struct ieee80211_vif *vif) 1475 { 1476 struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 1477 unsigned long valid = ieee80211_vif_is_mld(vif) ? 1478 mvif->valid_links : BIT(0); 1479 struct mt792x_dev *dev = mvif->phy->dev; 1480 struct ieee80211_hw *hw = mt76_hw(dev); 1481 struct ieee80211_bss_conf *bss_conf; 1482 struct mt792x_bss_conf *mconf; 1483 int i; 1484 1485 if (vif->type == NL80211_IFTYPE_STATION) 1486 ieee80211_disconnect(vif, true); 1487 1488 for_each_set_bit(i, &valid, IEEE80211_MLD_MAX_NUM_LINKS) { 1489 bss_conf = mt792x_vif_to_bss_conf(vif, i); 1490 if (!bss_conf) 1491 continue; 1492 1493 mconf = mt792x_vif_to_link(mvif, i); 1494 1495 mt76_connac_mcu_uni_add_dev(&dev->mphy, bss_conf, &mconf->mt76, 1496 &mvif->sta.deflink.wcid, true); 1497 mt7925_mcu_set_tx(dev, bss_conf); 1498 } 1499 1500 if (vif->type == NL80211_IFTYPE_AP) { 1501 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.deflink.wcid, 1502 true, NULL); 1503 mt7925_mcu_sta_update(dev, NULL, vif, 1504 &mvif->sta.deflink, true, 1505 MT76_STA_INFO_STATE_NONE); 1506 mt7925_mcu_uni_add_beacon_offload(dev, hw, vif, true); 1507 } 1508 } 1509 1510 /* system error recovery */ 1511 void mt7925_mac_reset_work(struct work_struct *work) 1512 { 1513 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 1514 reset_work); 1515 struct ieee80211_hw *hw = mt76_hw(dev); 1516 struct mt76_connac_pm *pm = &dev->pm; 1517 int i, ret; 1518 1519 if (atomic_read(&dev->mt76.bus_hung)) 1520 return; 1521 1522 dev_dbg(dev->mt76.dev, "chip reset\n"); 1523 dev->hw_full_reset = true; 1524 ieee80211_stop_queues(hw); 1525 1526 cancel_delayed_work_sync(&dev->mphy.mac_work); 1527 cancel_delayed_work_sync(&pm->ps_work); 1528 cancel_delayed_work_sync(&dev->mlo_pm_work); 1529 cancel_work_sync(&pm->wake_work); 1530 1531 for (i = 0; i < 10; i++) { 1532 if (test_bit(MT76_REMOVED, &dev->mphy.state)) 1533 goto out; 1534 1535 mutex_lock(&dev->mt76.mutex); 1536 ret = mt792x_dev_reset(dev); 1537 mutex_unlock(&dev->mt76.mutex); 1538 1539 if (!ret) 1540 break; 1541 } 1542 1543 if (atomic_read(&dev->mt76.bus_hung)) 1544 return; 1545 1546 if (i == 10) 1547 dev_err(dev->mt76.dev, "chip reset failed\n"); 1548 1549 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) { 1550 struct cfg80211_scan_info info = { 1551 .aborted = true, 1552 }; 1553 1554 ieee80211_scan_completed(dev->mphy.hw, &info); 1555 } 1556 1557 out: 1558 dev->hw_full_reset = false; 1559 pm->suspended = false; 1560 if (test_bit(MT76_REMOVED, &dev->mphy.state)) 1561 return; 1562 1563 ieee80211_wake_queues(hw); 1564 ieee80211_iterate_active_interfaces(hw, 1565 IEEE80211_IFACE_ITER_RESUME_ALL, 1566 mt7925_vif_connect_iter, NULL); 1567 mt76_connac_power_save_sched(&dev->mt76.phy, pm); 1568 1569 mt7925_regd_change(&dev->phy, "00"); 1570 } 1571 1572 void mt7925_coredump_work(struct work_struct *work) 1573 { 1574 struct mt792x_dev *dev; 1575 char *dump, *data; 1576 1577 dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, 1578 coredump.work.work); 1579 1580 if (time_is_after_jiffies(dev->coredump.last_activity + 1581 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) { 1582 queue_delayed_work(dev->mt76.wq, &dev->coredump.work, 1583 MT76_CONNAC_COREDUMP_TIMEOUT); 1584 return; 1585 } 1586 1587 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ); 1588 data = dump; 1589 1590 while (true) { 1591 struct sk_buff *skb; 1592 1593 spin_lock_bh(&dev->mt76.lock); 1594 skb = __skb_dequeue(&dev->coredump.msg_list); 1595 spin_unlock_bh(&dev->mt76.lock); 1596 1597 if (!skb) 1598 break; 1599 1600 skb_pull(skb, sizeof(struct mt7925_mcu_rxd) + 8); 1601 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) { 1602 dev_kfree_skb(skb); 1603 continue; 1604 } 1605 1606 memcpy(data, skb->data, skb->len); 1607 data += skb->len; 1608 1609 dev_kfree_skb(skb); 1610 } 1611 1612 if (dump) 1613 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ, 1614 GFP_KERNEL); 1615 1616 mt792x_reset(&dev->mt76); 1617 } 1618 1619 /* usb_sdio */ 1620 static void 1621 mt7925_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid, 1622 enum mt76_txq_id qid, struct ieee80211_sta *sta, 1623 struct ieee80211_key_conf *key, int pid, 1624 struct sk_buff *skb) 1625 { 1626 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); 1627 1628 memset(txwi, 0, MT_SDIO_TXD_SIZE); 1629 mt7925_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0); 1630 skb_push(skb, MT_SDIO_TXD_SIZE); 1631 } 1632 1633 int mt7925_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 1634 enum mt76_txq_id qid, struct mt76_wcid *wcid, 1635 struct ieee80211_sta *sta, 1636 struct mt76_tx_info *tx_info) 1637 { 1638 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1639 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 1640 struct ieee80211_key_conf *key = info->control.hw_key; 1641 struct sk_buff *skb = tx_info->skb; 1642 int err, pad, pktid; 1643 1644 if (unlikely(tx_info->skb->len <= ETH_HLEN)) 1645 return -EINVAL; 1646 1647 if (!wcid) 1648 wcid = &dev->mt76.global_wcid; 1649 1650 err = skb_cow_head(skb, MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE); 1651 if (err) 1652 return err; 1653 1654 if (sta) { 1655 struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; 1656 1657 if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) { 1658 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; 1659 msta->deflink.last_txs = jiffies; 1660 } 1661 } 1662 1663 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); 1664 mt7925_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb); 1665 1666 mt792x_skb_add_usb_sdio_hdr(dev, skb, 0); 1667 pad = round_up(skb->len, 4) - skb->len; 1668 if (mt76_is_usb(mdev)) 1669 pad += 4; 1670 1671 err = mt76_skb_adjust_pad(skb, pad); 1672 if (err) 1673 /* Release pktid in case of error. */ 1674 idr_remove(&wcid->pktid, pktid); 1675 1676 return err; 1677 } 1678 EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_prepare_skb); 1679 1680 void mt7925_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 1681 struct mt76_queue_entry *e) 1682 { 1683 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); 1684 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; 1685 struct ieee80211_sta *sta; 1686 struct mt76_wcid *wcid; 1687 u16 idx; 1688 1689 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 1690 wcid = __mt76_wcid_ptr(mdev, idx); 1691 sta = wcid_to_sta(wcid); 1692 1693 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) 1694 mt7925_tx_check_aggr(sta, e->skb, wcid); 1695 1696 skb_pull(e->skb, headroom); 1697 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 1698 } 1699 EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_complete_skb); 1700 1701 bool mt7925_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) 1702 { 1703 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1704 1705 mt792x_mutex_acquire(dev); 1706 mt7925_mac_sta_poll(dev); 1707 mt792x_mutex_release(dev); 1708 1709 return false; 1710 } 1711 EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_status_data); 1712 1713 #if IS_ENABLED(CONFIG_IPV6) 1714 void mt7925_set_ipv6_ns_work(struct work_struct *work) 1715 { 1716 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 1717 ipv6_ns_work); 1718 struct sk_buff *skb; 1719 int ret = 0; 1720 1721 do { 1722 skb = skb_dequeue(&dev->ipv6_ns_list); 1723 1724 if (!skb) 1725 break; 1726 1727 mt792x_mutex_acquire(dev); 1728 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1729 MCU_UNI_CMD(OFFLOAD), true); 1730 mt792x_mutex_release(dev); 1731 1732 } while (!ret); 1733 1734 if (ret) 1735 skb_queue_purge(&dev->ipv6_ns_list); 1736 } 1737 #endif 1738