1c5c32d63SJB Tsai /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2c5c32d63SJB Tsai /* Copyright (C) 2025 MediaTek Inc. */ 3c5c32d63SJB Tsai 4c5c32d63SJB Tsai #ifndef __MT7921_REGD_H 5c5c32d63SJB Tsai #define __MT7921_REGD_H 6c5c32d63SJB Tsai 7*9b80bd9cSCharlie-cy Wu #include "mt7921.h" 8*9b80bd9cSCharlie-cy Wu 9*9b80bd9cSCharlie-cy Wu struct mt7921_regd_rule_header { 10*9b80bd9cSCharlie-cy Wu u8 alpha2[2]; 11*9b80bd9cSCharlie-cy Wu u8 dfs_region; 12*9b80bd9cSCharlie-cy Wu u8 rsv[13]; 13*9b80bd9cSCharlie-cy Wu }; 14*9b80bd9cSCharlie-cy Wu 15*9b80bd9cSCharlie-cy Wu struct mt7921_regd_rule { 16*9b80bd9cSCharlie-cy Wu __le32 start_freq; 17*9b80bd9cSCharlie-cy Wu __le32 end_freq; 18*9b80bd9cSCharlie-cy Wu __le32 max_bw; 19*9b80bd9cSCharlie-cy Wu __le32 eirp; 20*9b80bd9cSCharlie-cy Wu __le32 flags; 21*9b80bd9cSCharlie-cy Wu u8 rsv[12]; 22*9b80bd9cSCharlie-cy Wu }; 23*9b80bd9cSCharlie-cy Wu 24*9b80bd9cSCharlie-cy Wu struct mt7921_regd_cc { 25*9b80bd9cSCharlie-cy Wu u8 alpha2[2]; 26*9b80bd9cSCharlie-cy Wu u8 ver; 27*9b80bd9cSCharlie-cy Wu u8 rsv; 28*9b80bd9cSCharlie-cy Wu __le32 n_reg_rules; 29*9b80bd9cSCharlie-cy Wu u8 sign_type; 30*9b80bd9cSCharlie-cy Wu u8 rsv1[7]; 31*9b80bd9cSCharlie-cy Wu u8 data[]; 32*9b80bd9cSCharlie-cy Wu }; 33*9b80bd9cSCharlie-cy Wu 34*9b80bd9cSCharlie-cy Wu struct mt7921_regd_rule_ev { 35*9b80bd9cSCharlie-cy Wu __le16 tag; 36*9b80bd9cSCharlie-cy Wu __le16 len; 37*9b80bd9cSCharlie-cy Wu __le32 n_reg_rules; 38*9b80bd9cSCharlie-cy Wu u8 dfs_region; 39*9b80bd9cSCharlie-cy Wu u8 rsv[15]; 40*9b80bd9cSCharlie-cy Wu struct mt7921_regd_rule reg_rule[]; 41*9b80bd9cSCharlie-cy Wu }; 42*9b80bd9cSCharlie-cy Wu 43*9b80bd9cSCharlie-cy Wu struct mt7921_regd_query_req { 44*9b80bd9cSCharlie-cy Wu u8 ver; 45*9b80bd9cSCharlie-cy Wu u8 sign_type; 46*9b80bd9cSCharlie-cy Wu u8 rsv1[2]; 47*9b80bd9cSCharlie-cy Wu __le32 size; 48*9b80bd9cSCharlie-cy Wu u8 alpha2[2]; 49*9b80bd9cSCharlie-cy Wu u8 rsv2[2]; 50*9b80bd9cSCharlie-cy Wu __le32 n_reg_rules; 51*9b80bd9cSCharlie-cy Wu u8 rsv3[64]; 52*9b80bd9cSCharlie-cy Wu u8 data[]; 53*9b80bd9cSCharlie-cy Wu }; 54*9b80bd9cSCharlie-cy Wu 55*9b80bd9cSCharlie-cy Wu #define MT7921_REGD_SUPPORTED(phy) \ 56*9b80bd9cSCharlie-cy Wu (((phy)->chip_cap & MT792x_CHIP_CAP_REGD_EN) && \ 57*9b80bd9cSCharlie-cy Wu (phy)->clc[MT792x_CLC_REGD]) 58c5c32d63SJB Tsai 59e8809813SJB Tsai int mt7921_mcu_regd_update(struct mt792x_dev *dev, u8 *alpha2, 60e8809813SJB Tsai enum environment_cap country_ie_env); 611f83a837SCharlie-cy Wu int __mt7921_mcu_regd_update(struct mt792x_dev *dev, u8 *alpha2, 621f83a837SCharlie-cy Wu enum environment_cap country_ie_env); 63c5c32d63SJB Tsai void mt7921_regd_notifier(struct wiphy *wiphy, 64c5c32d63SJB Tsai struct regulatory_request *request); 65fbb493cdSJB Tsai bool mt7921_regd_clc_supported(struct mt792x_dev *dev); 66ae05055dSJB Tsai int mt7921_regd_change(struct mt792x_phy *phy, char *alpha2); 67ae05055dSJB Tsai int mt7921_regd_init(struct mt792x_phy *phy); 68*9b80bd9cSCharlie-cy Wu int mt7921_regd_update(struct mt792x_phy *phy, char *alpha2); 69c5c32d63SJB Tsai 70c5c32d63SJB Tsai #endif 71