1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2021 MediaTek Inc. */ 3 4 #include "mt7921.h" 5 #include "../dma.h" 6 #include "../mt76_connac2_mac.h" 7 8 int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 9 enum mt76_txq_id qid, struct mt76_wcid *wcid, 10 struct ieee80211_sta *sta, 11 struct mt76_tx_info *tx_info) 12 { 13 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 14 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 15 struct ieee80211_key_conf *key = info->control.hw_key; 16 struct mt76_connac_hw_txp *txp; 17 struct mt76_txwi_cache *t; 18 int id, pid; 19 u8 *txwi = (u8 *)txwi_ptr; 20 21 if (unlikely(tx_info->skb->len <= ETH_HLEN)) 22 return -EINVAL; 23 24 if (!wcid) 25 wcid = &dev->mt76.global_wcid; 26 27 t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); 28 t->skb = tx_info->skb; 29 30 id = mt76_token_consume(mdev, &t); 31 if (id < 0) 32 return id; 33 34 if (sta) { 35 struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; 36 37 if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) { 38 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; 39 msta->deflink.last_txs = jiffies; 40 } 41 } 42 43 pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb); 44 mt76_connac2_mac_write_txwi(mdev, txwi_ptr, tx_info->skb, wcid, key, 45 pid, qid, 0); 46 47 txp = (struct mt76_connac_hw_txp *)(txwi + MT_TXD_SIZE); 48 memset(txp, 0, sizeof(struct mt76_connac_hw_txp)); 49 mt76_connac_write_hw_txp(mdev, tx_info, txp, id); 50 51 tx_info->skb = NULL; 52 53 return 0; 54 } 55 56 int mt7921e_mac_reset(struct mt792x_dev *dev) 57 { 58 int i, err; 59 60 mt792xe_mcu_drv_pmctrl(dev); 61 62 mt76_connac_free_pending_tx_skbs(&dev->pm, NULL); 63 64 mt76_wr(dev, dev->irq_map->host_irq_enable, 0); 65 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0); 66 67 set_bit(MT76_MCU_RESET, &dev->mphy.state); 68 wake_up(&dev->mt76.mcu.wait); 69 skb_queue_purge(&dev->mt76.mcu.res_q); 70 71 mt76_txq_schedule_all(&dev->mphy); 72 73 mt76_worker_disable(&dev->mt76.tx_worker); 74 napi_disable(&dev->mt76.napi[MT_RXQ_MAIN]); 75 napi_disable(&dev->mt76.napi[MT_RXQ_MCU]); 76 napi_disable(&dev->mt76.napi[MT_RXQ_MCU_WA]); 77 napi_disable(&dev->mt76.tx_napi); 78 79 mt76_connac2_tx_token_put(&dev->mt76); 80 idr_init(&dev->mt76.token); 81 82 mt792x_wpdma_reset(dev, true); 83 84 local_bh_disable(); 85 mt76_for_each_q_rx(&dev->mt76, i) { 86 napi_enable(&dev->mt76.napi[i]); 87 napi_schedule(&dev->mt76.napi[i]); 88 } 89 local_bh_enable(); 90 91 dev->fw_assert = false; 92 clear_bit(MT76_MCU_RESET, &dev->mphy.state); 93 94 mt76_wr(dev, dev->irq_map->host_irq_enable, 95 dev->irq_map->tx.all_complete_mask | 96 MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD); 97 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); 98 99 err = mt7921e_driver_own(dev); 100 if (err) 101 goto out; 102 103 err = mt7921_run_firmware(dev); 104 if (err) 105 goto out; 106 107 err = mt7921_mcu_set_eeprom(dev); 108 if (err) 109 goto out; 110 111 err = mt7921_mac_init(dev); 112 if (err) 113 goto out; 114 115 err = __mt7921_start(&dev->phy); 116 out: 117 118 local_bh_disable(); 119 napi_enable(&dev->mt76.tx_napi); 120 napi_schedule(&dev->mt76.tx_napi); 121 local_bh_enable(); 122 123 mt76_worker_enable(&dev->mt76.tx_worker); 124 125 return err; 126 } 127