xref: /linux/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h (revision 48fab5bbef4092d925ab3214773ad12e68807223)
1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #ifndef __MT7921_H
5 #define __MT7921_H
6 
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #include "../mt76_connac_mcu.h"
10 #include "regs.h"
11 
12 #define MT7921_MAX_INTERFACES		4
13 #define MT7921_MAX_WMM_SETS		4
14 #define MT7921_WTBL_SIZE		20
15 #define MT7921_WTBL_RESERVED		(MT7921_WTBL_SIZE - 1)
16 #define MT7921_WTBL_STA			(MT7921_WTBL_RESERVED - \
17 					 MT7921_MAX_INTERFACES)
18 
19 #define MT7921_PM_TIMEOUT		(HZ / 12)
20 #define MT7921_HW_SCAN_TIMEOUT		(HZ / 10)
21 #define MT7921_WATCHDOG_TIME		(HZ / 4)
22 #define MT7921_RESET_TIMEOUT		(30 * HZ)
23 
24 #define MT7921_TX_RING_SIZE		2048
25 #define MT7921_TX_MCU_RING_SIZE		256
26 #define MT7921_TX_FWDL_RING_SIZE	128
27 
28 #define MT7921_RX_RING_SIZE		1536
29 #define MT7921_RX_MCU_RING_SIZE		512
30 
31 #define MT7921_DRV_OWN_RETRY_COUNT	10
32 #define MT7921_MCU_INIT_RETRY_COUNT	10
33 
34 #define MT7921_FIRMWARE_WM		"mediatek/WIFI_RAM_CODE_MT7961_1.bin"
35 #define MT7921_ROM_PATCH		"mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin"
36 
37 #define MT7922_FIRMWARE_WM		"mediatek/WIFI_RAM_CODE_MT7922_1.bin"
38 #define MT7922_ROM_PATCH		"mediatek/WIFI_MT7922_patch_mcu_1_1_hdr.bin"
39 
40 #define MT7921_EEPROM_SIZE		3584
41 #define MT7921_TOKEN_SIZE		8192
42 
43 #define MT7921_CFEND_RATE_DEFAULT	0x49	/* OFDM 24M */
44 #define MT7921_CFEND_RATE_11B		0x03	/* 11B LP, 11M */
45 
46 #define MT7921_SKU_RATE_NUM		161
47 #define MT7921_SKU_MAX_DELTA_IDX	MT7921_SKU_RATE_NUM
48 #define MT7921_SKU_TABLE_SIZE		(MT7921_SKU_RATE_NUM + 1)
49 
50 #define MT7921_SDIO_HDR_TX_BYTES	GENMASK(15, 0)
51 #define MT7921_SDIO_HDR_PKT_TYPE	GENMASK(17, 16)
52 
53 enum mt7921_sdio_pkt_type {
54 	MT7921_SDIO_TXD,
55 	MT7921_SDIO_DATA,
56 	MT7921_SDIO_CMD,
57 	MT7921_SDIO_FWDL,
58 };
59 
60 struct mt7921_sdio_intr {
61 	u32 isr;
62 	struct {
63 		u32 wtqcr[16];
64 	} tx;
65 	struct {
66 		u16 num[2];
67 		u16 len0[16];
68 		u16 len1[128];
69 	} rx;
70 	u32 rec_mb[2];
71 } __packed;
72 
73 #define to_rssi(field, rxv)		((FIELD_GET(field, rxv) - 220) / 2)
74 #define to_rcpi(rssi)			(2 * (rssi) + 220)
75 
76 struct mt7921_vif;
77 struct mt7921_sta;
78 
79 enum mt7921_txq_id {
80 	MT7921_TXQ_BAND0,
81 	MT7921_TXQ_BAND1,
82 	MT7921_TXQ_FWDL = 16,
83 	MT7921_TXQ_MCU_WM,
84 };
85 
86 enum mt7921_rxq_id {
87 	MT7921_RXQ_BAND0 = 0,
88 	MT7921_RXQ_BAND1,
89 	MT7921_RXQ_MCU_WM = 0,
90 };
91 
92 struct mt7921_sta_key_conf {
93 	s8 keyidx;
94 	u8 key[16];
95 };
96 
97 struct mt7921_sta {
98 	struct mt76_wcid wcid; /* must be first */
99 
100 	struct mt7921_vif *vif;
101 
102 	struct list_head poll_list;
103 	u32 airtime_ac[8];
104 
105 	unsigned long last_txs;
106 	unsigned long ampdu_state;
107 
108 	struct mt7921_sta_key_conf bip;
109 };
110 
111 DECLARE_EWMA(rssi, 10, 8);
112 
113 struct mt7921_vif {
114 	struct mt76_vif mt76; /* must be first */
115 
116 	struct mt7921_sta sta;
117 	struct mt7921_sta *wep_sta;
118 
119 	struct mt7921_phy *phy;
120 
121 	struct ewma_rssi rssi;
122 
123 	struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
124 };
125 
126 struct mib_stats {
127 	u32 ack_fail_cnt;
128 	u32 fcs_err_cnt;
129 	u32 rts_cnt;
130 	u32 rts_retries_cnt;
131 	u32 ba_miss_cnt;
132 };
133 
134 struct mt7921_phy {
135 	struct mt76_phy *mt76;
136 	struct mt7921_dev *dev;
137 
138 	struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
139 
140 	u32 rxfilter;
141 	u64 omac_mask;
142 
143 	u16 noise;
144 
145 	s16 coverage_class;
146 	u8 slottime;
147 
148 	u32 rx_ampdu_ts;
149 	u32 ampdu_ref;
150 
151 	struct mib_stats mib;
152 
153 	u8 sta_work_count;
154 
155 	struct sk_buff_head scan_event_list;
156 	struct delayed_work scan_work;
157 };
158 
159 #define mt7921_init_reset(dev)		((dev)->hif_ops->init_reset(dev))
160 #define mt7921_dev_reset(dev)		((dev)->hif_ops->reset(dev))
161 #define mt7921_mcu_init(dev)		((dev)->hif_ops->mcu_init(dev))
162 #define __mt7921_mcu_drv_pmctrl(dev)	((dev)->hif_ops->drv_own(dev))
163 #define	__mt7921_mcu_fw_pmctrl(dev)	((dev)->hif_ops->fw_own(dev))
164 struct mt7921_hif_ops {
165 	int (*init_reset)(struct mt7921_dev *dev);
166 	int (*reset)(struct mt7921_dev *dev);
167 	int (*mcu_init)(struct mt7921_dev *dev);
168 	int (*drv_own)(struct mt7921_dev *dev);
169 	int (*fw_own)(struct mt7921_dev *dev);
170 };
171 
172 struct mt7921_dev {
173 	union { /* must be first */
174 		struct mt76_dev mt76;
175 		struct mt76_phy mphy;
176 	};
177 
178 	const struct mt76_bus_ops *bus_ops;
179 	struct mt7921_phy phy;
180 	struct tasklet_struct irq_tasklet;
181 
182 	struct work_struct reset_work;
183 	bool hw_full_reset:1;
184 	bool hw_init_done:1;
185 
186 	struct list_head sta_poll_list;
187 	spinlock_t sta_poll_lock;
188 
189 	u8 fw_debug;
190 
191 	struct mt76_connac_pm pm;
192 	struct mt76_connac_coredump coredump;
193 	const struct mt7921_hif_ops *hif_ops;
194 };
195 
196 enum {
197 	TXPWR_USER,
198 	TXPWR_EEPROM,
199 	TXPWR_MAC,
200 	TXPWR_MAX_NUM,
201 };
202 
203 struct mt7921_txpwr {
204 	u8 ch;
205 	u8 rsv[3];
206 	struct {
207 		u8 ch;
208 		u8 cck[4];
209 		u8 ofdm[8];
210 		u8 ht20[8];
211 		u8 ht40[9];
212 		u8 vht20[12];
213 		u8 vht40[12];
214 		u8 vht80[12];
215 		u8 vht160[12];
216 		u8 he26[12];
217 		u8 he52[12];
218 		u8 he106[12];
219 		u8 he242[12];
220 		u8 he484[12];
221 		u8 he996[12];
222 		u8 he996x2[12];
223 	} data[TXPWR_MAX_NUM];
224 };
225 
226 enum {
227 	MT_LMAC_AC00,
228 	MT_LMAC_AC01,
229 	MT_LMAC_AC02,
230 	MT_LMAC_AC03,
231 	MT_LMAC_ALTX0 = 0x10,
232 	MT_LMAC_BMC0,
233 	MT_LMAC_BCN0,
234 };
235 
236 static inline struct mt7921_phy *
237 mt7921_hw_phy(struct ieee80211_hw *hw)
238 {
239 	struct mt76_phy *phy = hw->priv;
240 
241 	return phy->priv;
242 }
243 
244 static inline struct mt7921_dev *
245 mt7921_hw_dev(struct ieee80211_hw *hw)
246 {
247 	struct mt76_phy *phy = hw->priv;
248 
249 	return container_of(phy->dev, struct mt7921_dev, mt76);
250 }
251 
252 #define mt7921_mutex_acquire(dev)	\
253 	mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
254 #define mt7921_mutex_release(dev)	\
255 	mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
256 
257 static inline u8 mt7921_lmac_mapping(struct mt7921_dev *dev, u8 ac)
258 {
259 	/* LMAC uses the reverse order of mac80211 AC indexes */
260 	return 3 - ac;
261 }
262 
263 extern const struct ieee80211_ops mt7921_ops;
264 extern struct pci_driver mt7921_pci_driver;
265 
266 u32 mt7921_reg_map(struct mt7921_dev *dev, u32 addr);
267 
268 int __mt7921_start(struct mt7921_phy *phy);
269 int mt7921_register_device(struct mt7921_dev *dev);
270 void mt7921_unregister_device(struct mt7921_dev *dev);
271 int mt7921_dma_init(struct mt7921_dev *dev);
272 int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force);
273 int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev);
274 void mt7921_dma_cleanup(struct mt7921_dev *dev);
275 int mt7921_run_firmware(struct mt7921_dev *dev);
276 int mt7921_mcu_add_key(struct mt7921_dev *dev, struct ieee80211_vif *vif,
277 		       struct mt7921_sta *msta, struct ieee80211_key_conf *key,
278 		       enum set_key_cmd cmd);
279 int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta,
280 			  struct ieee80211_vif *vif, bool enable,
281 			  enum mt76_sta_info_state state);
282 int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd);
283 int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif);
284 int mt7921_mcu_set_eeprom(struct mt7921_dev *dev);
285 int mt7921_mcu_get_eeprom(struct mt7921_dev *dev, u32 offset);
286 int mt7921_mcu_get_rx_rate(struct mt7921_phy *phy, struct ieee80211_vif *vif,
287 			   struct ieee80211_sta *sta, struct rate_info *rate);
288 int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl);
289 void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb);
290 void mt7921_mcu_exit(struct mt7921_dev *dev);
291 
292 static inline void mt7921_irq_enable(struct mt7921_dev *dev, u32 mask)
293 {
294 	mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
295 
296 	tasklet_schedule(&dev->irq_tasklet);
297 }
298 
299 static inline u32
300 mt7921_reg_map_l1(struct mt7921_dev *dev, u32 addr)
301 {
302 	u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr);
303 	u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr);
304 
305 	mt76_rmw_field(dev, MT_HIF_REMAP_L1, MT_HIF_REMAP_L1_MASK, base);
306 	/* use read to push write */
307 	mt76_rr(dev, MT_HIF_REMAP_L1);
308 
309 	return MT_HIF_REMAP_BASE_L1 + offset;
310 }
311 
312 static inline u32
313 mt7921_l1_rr(struct mt7921_dev *dev, u32 addr)
314 {
315 	return mt76_rr(dev, mt7921_reg_map_l1(dev, addr));
316 }
317 
318 static inline void
319 mt7921_l1_wr(struct mt7921_dev *dev, u32 addr, u32 val)
320 {
321 	mt76_wr(dev, mt7921_reg_map_l1(dev, addr), val);
322 }
323 
324 static inline u32
325 mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val)
326 {
327 	val |= mt7921_l1_rr(dev, addr) & ~mask;
328 	mt7921_l1_wr(dev, addr, val);
329 
330 	return val;
331 }
332 
333 #define mt7921_l1_set(dev, addr, val)	mt7921_l1_rmw(dev, addr, 0, val)
334 #define mt7921_l1_clear(dev, addr, val)	mt7921_l1_rmw(dev, addr, val, 0)
335 
336 static inline bool mt7921_dma_need_reinit(struct mt7921_dev *dev)
337 {
338 	return !mt76_get_field(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
339 }
340 
341 static inline void mt7921_mcu_tx_cleanup(struct mt7921_dev *dev)
342 {
343 	mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
344 	mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], false);
345 }
346 
347 static inline void mt7921_skb_add_sdio_hdr(struct sk_buff *skb,
348 					   enum mt7921_sdio_pkt_type type)
349 {
350 	u32 hdr;
351 
352 	hdr = FIELD_PREP(MT7921_SDIO_HDR_TX_BYTES, skb->len + sizeof(hdr)) |
353 	      FIELD_PREP(MT7921_SDIO_HDR_PKT_TYPE, type);
354 
355 	put_unaligned_le32(hdr, skb_push(skb, sizeof(hdr)));
356 }
357 
358 int mt7921_mac_init(struct mt7921_dev *dev);
359 bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask);
360 void mt7921_mac_reset_counters(struct mt7921_phy *phy);
361 void mt7921_mac_set_timing(struct mt7921_phy *phy);
362 int mt7921_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
363 		       struct ieee80211_sta *sta);
364 void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
365 			  struct ieee80211_sta *sta);
366 void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
367 			   struct ieee80211_sta *sta);
368 void mt7921_mac_work(struct work_struct *work);
369 void mt7921_mac_reset_work(struct work_struct *work);
370 void mt7921_mac_update_mib_stats(struct mt7921_phy *phy);
371 void mt7921_reset(struct mt76_dev *mdev);
372 int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
373 			   enum mt76_txq_id qid, struct mt76_wcid *wcid,
374 			   struct ieee80211_sta *sta,
375 			   struct mt76_tx_info *tx_info);
376 
377 void mt7921_tx_worker(struct mt76_worker *w);
378 void mt7921e_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
379 int mt7921_init_tx_queues(struct mt7921_phy *phy, int idx, int n_desc);
380 void mt7921_tx_token_put(struct mt7921_dev *dev);
381 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
382 			 struct sk_buff *skb);
383 void mt7921_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
384 void mt7921_stats_work(struct work_struct *work);
385 void mt7921_set_stream_he_caps(struct mt7921_phy *phy);
386 void mt7921_update_channel(struct mt76_phy *mphy);
387 int mt7921_init_debugfs(struct mt7921_dev *dev);
388 
389 int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev,
390 				 struct ieee80211_vif *vif,
391 				 bool enable);
392 int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev,
393 			 struct ieee80211_ampdu_params *params,
394 			 bool enable);
395 int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev,
396 			 struct ieee80211_ampdu_params *params,
397 			 bool enable);
398 void mt7921_scan_work(struct work_struct *work);
399 int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif);
400 int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev);
401 int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev);
402 void mt7921_pm_wake_work(struct work_struct *work);
403 void mt7921_pm_power_save_work(struct work_struct *work);
404 bool mt7921_wait_for_mcu_init(struct mt7921_dev *dev);
405 void mt7921_coredump_work(struct work_struct *work);
406 int mt7921_wfsys_reset(struct mt7921_dev *dev);
407 int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr);
408 int mt7921_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
409 			void *data, int len);
410 int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg,
411 			 struct netlink_callback *cb, void *data, int len);
412 void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi,
413 			   struct sk_buff *skb, struct mt76_wcid *wcid,
414 			   struct ieee80211_key_conf *key, int pid,
415 			   bool beacon);
416 void mt7921_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi);
417 void mt7921_mac_sta_poll(struct mt7921_dev *dev);
418 int mt7921_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb,
419 			    int cmd, int *wait_seq);
420 int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd,
421 			      struct sk_buff *skb, int seq);
422 int mt7921_mcu_restart(struct mt76_dev *dev);
423 
424 void mt7921e_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
425 			  struct sk_buff *skb);
426 int mt7921e_mac_reset(struct mt7921_dev *dev);
427 int mt7921e_mcu_init(struct mt7921_dev *dev);
428 int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev);
429 int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev);
430 
431 int mt7921s_mcu_init(struct mt7921_dev *dev);
432 int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev);
433 int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev);
434 int mt7921s_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
435 			   enum mt76_txq_id qid, struct mt76_wcid *wcid,
436 			   struct ieee80211_sta *sta,
437 			   struct mt76_tx_info *tx_info);
438 void mt7921s_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
439 bool mt7921s_tx_status_data(struct mt76_dev *mdev, u8 *update);
440 #endif
441