xref: /linux/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h (revision 022159b0e13fba711aabe549e6b3631b1d33dc66)
1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #ifndef __MT7921_MCU_H
5 #define __MT7921_MCU_H
6 
7 #include "../mt76_connac_mcu.h"
8 
9 struct mt7921_mcu_txd {
10 	__le32 txd[8];
11 
12 	__le16 len;
13 	__le16 pq_id;
14 
15 	u8 cid;
16 	u8 pkt_type;
17 	u8 set_query; /* FW don't care */
18 	u8 seq;
19 
20 	u8 uc_d2b0_rev;
21 	u8 ext_cid;
22 	u8 s2d_index;
23 	u8 ext_cid_ack;
24 
25 	u32 reserved[5];
26 } __packed __aligned(4);
27 
28 /**
29  * struct mt7921_uni_txd - mcu command descriptor for firmware v3
30  * @txd: hardware descriptor
31  * @len: total length not including txd
32  * @cid: command identifier
33  * @pkt_type: must be 0xa0 (cmd packet by long format)
34  * @frag_n: fragment number
35  * @seq: sequence number
36  * @checksum: 0 mean there is no checksum
37  * @s2d_index: index for command source and destination
38  *  Definition              | value | note
39  *  CMD_S2D_IDX_H2N         | 0x00  | command from HOST to WM
40  *  CMD_S2D_IDX_C2N         | 0x01  | command from WA to WM
41  *  CMD_S2D_IDX_H2C         | 0x02  | command from HOST to WA
42  *  CMD_S2D_IDX_H2N_AND_H2C | 0x03  | command from HOST to WA and WM
43  *
44  * @option: command option
45  *  BIT[0]: UNI_CMD_OPT_BIT_ACK
46  *          set to 1 to request a fw reply
47  *          if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
48  *          is set, mcu firmware will send response event EID = 0x01
49  *          (UNI_EVENT_ID_CMD_RESULT) to the host.
50  *  BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
51  *          0: original command
52  *          1: unified command
53  *  BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
54  *          0: QUERY command
55  *          1: SET command
56  */
57 struct mt7921_uni_txd {
58 	__le32 txd[8];
59 
60 	/* DW1 */
61 	__le16 len;
62 	__le16 cid;
63 
64 	/* DW2 */
65 	u8 reserved;
66 	u8 pkt_type;
67 	u8 frag_n;
68 	u8 seq;
69 
70 	/* DW3 */
71 	__le16 checksum;
72 	u8 s2d_index;
73 	u8 option;
74 
75 	/* DW4 */
76 	u8 reserved2[4];
77 } __packed __aligned(4);
78 
79 /* event table */
80 enum {
81 	MCU_EVENT_REG_ACCESS = 0x05,
82 	MCU_EVENT_SCAN_DONE = 0x0d,
83 	MCU_EVENT_BSS_ABSENCE  = 0x11,
84 	MCU_EVENT_BSS_BEACON_LOSS = 0x13,
85 	MCU_EVENT_CH_PRIVILEGE = 0x18,
86 	MCU_EVENT_SCHED_SCAN_DONE = 0x23,
87 	MCU_EVENT_DBG_MSG = 0x27,
88 };
89 
90 /* ext event table */
91 enum {
92 	MCU_EXT_EVENT_RATE_REPORT = 0x87,
93 };
94 
95 struct mt7921_mcu_rxd {
96 	__le32 rxd[6];
97 
98 	__le16 len;
99 	__le16 pkt_type_id;
100 
101 	u8 eid;
102 	u8 seq;
103 	__le16 __rsv;
104 
105 	u8 ext_eid;
106 	u8 __rsv1[2];
107 	u8 s2d_index;
108 };
109 
110 struct mt7921_mcu_eeprom_info {
111 	__le32 addr;
112 	__le32 valid;
113 	u8 data[16];
114 } __packed;
115 
116 #define MT_RA_RATE_NSS			GENMASK(8, 6)
117 #define MT_RA_RATE_MCS			GENMASK(3, 0)
118 #define MT_RA_RATE_TX_MODE		GENMASK(12, 9)
119 #define MT_RA_RATE_DCM_EN		BIT(4)
120 #define MT_RA_RATE_BW			GENMASK(14, 13)
121 
122 #define MCU_PQ_ID(p, q)			(((p) << 15) | ((q) << 10))
123 #define MCU_PKT_ID			0xa0
124 
125 enum {
126 	MCU_Q_QUERY,
127 	MCU_Q_SET,
128 	MCU_Q_RESERVED,
129 	MCU_Q_NA
130 };
131 
132 enum {
133 	MCU_S2D_H2N,
134 	MCU_S2D_C2N,
135 	MCU_S2D_H2C,
136 	MCU_S2D_H2CN
137 };
138 
139 struct mt7921_mcu_uni_event {
140 	u8 cid;
141 	u8 pad[3];
142 	__le32 status; /* 0: success, others: fail */
143 } __packed;
144 
145 enum {
146 	PATCH_NOT_DL_SEM_FAIL,
147 	PATCH_IS_DL,
148 	PATCH_NOT_DL_SEM_SUCCESS,
149 	PATCH_REL_SEM_SUCCESS
150 };
151 
152 enum {
153 	FW_STATE_INITIAL,
154 	FW_STATE_FW_DOWNLOAD,
155 	FW_STATE_NORMAL_OPERATION,
156 	FW_STATE_NORMAL_TRX,
157 	FW_STATE_WACPU_RDY        = 7
158 };
159 
160 enum {
161 	EE_MODE_EFUSE,
162 	EE_MODE_BUFFER,
163 };
164 
165 enum {
166 	EE_FORMAT_BIN,
167 	EE_FORMAT_WHOLE,
168 	EE_FORMAT_MULTIPLE,
169 };
170 
171 enum {
172 	MCU_PHY_STATE_TX_RATE,
173 	MCU_PHY_STATE_RX_RATE,
174 	MCU_PHY_STATE_RSSI,
175 	MCU_PHY_STATE_CONTENTION_RX_RATE,
176 	MCU_PHY_STATE_OFDMLQ_CNINFO,
177 };
178 
179 #define STA_TYPE_STA			BIT(0)
180 #define STA_TYPE_AP			BIT(1)
181 #define STA_TYPE_ADHOC			BIT(2)
182 #define STA_TYPE_WDS			BIT(4)
183 #define STA_TYPE_BC			BIT(5)
184 
185 #define NETWORK_INFRA			BIT(16)
186 #define NETWORK_P2P			BIT(17)
187 #define NETWORK_IBSS			BIT(18)
188 #define NETWORK_WDS			BIT(21)
189 
190 #define CONNECTION_INFRA_STA		(STA_TYPE_STA | NETWORK_INFRA)
191 #define CONNECTION_INFRA_AP		(STA_TYPE_AP | NETWORK_INFRA)
192 #define CONNECTION_P2P_GC		(STA_TYPE_STA | NETWORK_P2P)
193 #define CONNECTION_P2P_GO		(STA_TYPE_AP | NETWORK_P2P)
194 #define CONNECTION_IBSS_ADHOC		(STA_TYPE_ADHOC | NETWORK_IBSS)
195 #define CONNECTION_WDS			(STA_TYPE_WDS | NETWORK_WDS)
196 #define CONNECTION_INFRA_BC		(STA_TYPE_BC | NETWORK_INFRA)
197 
198 struct sec_key {
199 	u8 cipher_id;
200 	u8 cipher_len;
201 	u8 key_id;
202 	u8 key_len;
203 	u8 key[32];
204 } __packed;
205 
206 struct sta_rec_sec {
207 	__le16 tag;
208 	__le16 len;
209 	u8 add;
210 	u8 n_cipher;
211 	u8 rsv[2];
212 
213 	struct sec_key key[2];
214 } __packed;
215 
216 enum mt7921_cipher_type {
217 	MT_CIPHER_NONE,
218 	MT_CIPHER_WEP40,
219 	MT_CIPHER_WEP104,
220 	MT_CIPHER_WEP128,
221 	MT_CIPHER_TKIP,
222 	MT_CIPHER_AES_CCMP,
223 	MT_CIPHER_CCMP_256,
224 	MT_CIPHER_GCMP,
225 	MT_CIPHER_GCMP_256,
226 	MT_CIPHER_WAPI,
227 	MT_CIPHER_BIP_CMAC_128,
228 };
229 
230 enum {
231 	CH_SWITCH_NORMAL = 0,
232 	CH_SWITCH_SCAN = 3,
233 	CH_SWITCH_MCC = 4,
234 	CH_SWITCH_DFS = 5,
235 	CH_SWITCH_BACKGROUND_SCAN_START = 6,
236 	CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,
237 	CH_SWITCH_BACKGROUND_SCAN_STOP = 8,
238 	CH_SWITCH_SCAN_BYPASS_DPD = 9
239 };
240 
241 enum {
242 	THERMAL_SENSOR_TEMP_QUERY,
243 	THERMAL_SENSOR_MANUAL_CTRL,
244 	THERMAL_SENSOR_INFO_QUERY,
245 	THERMAL_SENSOR_TASK_CTRL,
246 };
247 
248 enum {
249 	MT_EBF = BIT(0),	/* explicit beamforming */
250 	MT_IBF = BIT(1)		/* implicit beamforming */
251 };
252 
253 #define MT7921_WTBL_UPDATE_MAX_SIZE	(sizeof(struct wtbl_req_hdr) +	\
254 					 sizeof(struct wtbl_generic) +	\
255 					 sizeof(struct wtbl_rx) +	\
256 					 sizeof(struct wtbl_ht) +	\
257 					 sizeof(struct wtbl_vht) +	\
258 					 sizeof(struct wtbl_hdr_trans) +\
259 					 sizeof(struct wtbl_ba) +	\
260 					 sizeof(struct wtbl_smps))
261 
262 #define MT7921_STA_UPDATE_MAX_SIZE	(sizeof(struct sta_req_hdr) +	\
263 					 sizeof(struct sta_rec_basic) +	\
264 					 sizeof(struct sta_rec_ht) +	\
265 					 sizeof(struct sta_rec_he) +	\
266 					 sizeof(struct sta_rec_ba) +	\
267 					 sizeof(struct sta_rec_vht) +	\
268 					 sizeof(struct sta_rec_uapsd) + \
269 					 sizeof(struct sta_rec_amsdu) +	\
270 					 sizeof(struct tlv) +		\
271 					 MT7921_WTBL_UPDATE_MAX_SIZE)
272 
273 #define MT7921_WTBL_UPDATE_BA_SIZE	(sizeof(struct wtbl_req_hdr) +	\
274 					 sizeof(struct wtbl_ba))
275 
276 #define STA_CAP_WMM			BIT(0)
277 #define STA_CAP_SGI_20			BIT(4)
278 #define STA_CAP_SGI_40			BIT(5)
279 #define STA_CAP_TX_STBC			BIT(6)
280 #define STA_CAP_RX_STBC			BIT(7)
281 #define STA_CAP_VHT_SGI_80		BIT(16)
282 #define STA_CAP_VHT_SGI_160		BIT(17)
283 #define STA_CAP_VHT_TX_STBC		BIT(18)
284 #define STA_CAP_VHT_RX_STBC		BIT(19)
285 #define STA_CAP_VHT_LDPC		BIT(23)
286 #define STA_CAP_LDPC			BIT(24)
287 #define STA_CAP_HT			BIT(26)
288 #define STA_CAP_VHT			BIT(27)
289 #define STA_CAP_HE			BIT(28)
290 
291 struct mt7921_mcu_reg_event {
292 	__le32 reg;
293 	__le32 val;
294 } __packed;
295 
296 struct mt7921_mcu_tx_config {
297 	u8 peer_addr[ETH_ALEN];
298 	u8 sw;
299 	u8 dis_rx_hdr_tran;
300 
301 	u8 aad_om;
302 	u8 pfmu_idx;
303 	__le16 partial_aid;
304 
305 	u8 ibf;
306 	u8 ebf;
307 	u8 is_ht;
308 	u8 is_vht;
309 
310 	u8 mesh;
311 	u8 baf_en;
312 	u8 cf_ack;
313 	u8 rdg_ba;
314 
315 	u8 rdg;
316 	u8 pm;
317 	u8 rts;
318 	u8 smps;
319 
320 	u8 txop_ps;
321 	u8 not_update_ipsm;
322 	u8 skip_tx;
323 	u8 ldpc;
324 
325 	u8 qos;
326 	u8 from_ds;
327 	u8 to_ds;
328 	u8 dyn_bw;
329 
330 	u8 amdsu_cross_lg;
331 	u8 check_per;
332 	u8 gid_63;
333 	u8 he;
334 
335 	u8 vht_ibf;
336 	u8 vht_ebf;
337 	u8 vht_ldpc;
338 	u8 he_ldpc;
339 } __packed;
340 
341 struct mt7921_mcu_sec_config {
342 	u8 wpi_flag;
343 	u8 rv;
344 	u8 ikv;
345 	u8 rkv;
346 
347 	u8 rcid;
348 	u8 rca1;
349 	u8 rca2;
350 	u8 even_pn;
351 
352 	u8 key_id;
353 	u8 muar_idx;
354 	u8 cipher_suit;
355 	u8 rsv[1];
356 } __packed;
357 
358 struct mt7921_mcu_key_config {
359 	u8 key[32];
360 } __packed;
361 
362 struct mt7921_mcu_rate_info {
363 	u8 mpdu_fail;
364 	u8 mpdu_tx;
365 	u8 rate_idx;
366 	u8 rsv[1];
367 	__le16 rate[8];
368 } __packed;
369 
370 struct mt7921_mcu_ba_config {
371 	u8 ba_en;
372 	u8 rsv[3];
373 	__le32 ba_winsize;
374 } __packed;
375 
376 struct mt7921_mcu_ant_id_config {
377 	u8 ant_id[4];
378 } __packed;
379 
380 struct mt7921_mcu_peer_cap {
381 	struct mt7921_mcu_ant_id_config ant_id_config;
382 
383 	u8 power_offset;
384 	u8 bw_selector;
385 	u8 change_bw_rate_n;
386 	u8 bw;
387 	u8 spe_idx;
388 
389 	u8 g2;
390 	u8 g4;
391 	u8 g8;
392 	u8 g16;
393 
394 	u8 mmss;
395 	u8 ampdu_factor;
396 	u8 rsv[1];
397 } __packed;
398 
399 struct mt7921_mcu_rx_cnt {
400 	u8 rx_rcpi[4];
401 	u8 rx_cc[4];
402 	u8 rx_cc_sel;
403 	u8 ce_rmsd;
404 	u8 rsv[2];
405 } __packed;
406 
407 struct mt7921_mcu_tx_cnt {
408 	__le16 rate1_cnt;
409 	__le16 rate1_fail_cnt;
410 	__le16 rate2_cnt;
411 	__le16 rate3_cnt;
412 	__le16 cur_bw_tx_cnt;
413 	__le16 cur_bw_tx_fail_cnt;
414 	__le16 other_bw_tx_cnt;
415 	__le16 other_bw_tx_fail_cnt;
416 } __packed;
417 
418 struct mt7921_mcu_wlan_info_event {
419 	struct mt7921_mcu_tx_config tx_config;
420 	struct mt7921_mcu_sec_config sec_config;
421 	struct mt7921_mcu_key_config key_config;
422 	struct mt7921_mcu_rate_info rate_info;
423 	struct mt7921_mcu_ba_config ba_config;
424 	struct mt7921_mcu_peer_cap peer_cap;
425 	struct mt7921_mcu_rx_cnt rx_cnt;
426 	struct mt7921_mcu_tx_cnt tx_cnt;
427 } __packed;
428 
429 struct mt7921_mcu_wlan_info {
430 	__le32 wlan_idx;
431 	struct mt7921_mcu_wlan_info_event event;
432 } __packed;
433 #endif
434