xref: /linux/drivers/net/wireless/mediatek/mt76/mt7921/mac.c (revision 4b99990cdf9560e8a071640baf19f312e6ae02f4)
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #include <linux/devcoredump.h>
5 #include <linux/etherdevice.h>
6 #include <linux/timekeeping.h>
7 #include "mt7921.h"
8 #include "../dma.h"
9 #include "../mt76_connac2_mac.h"
10 #include "regd.h"
11 #include "mcu.h"
12 
13 #define MT_WTBL_TXRX_CAP_RATE_OFFSET	7
14 #define MT_WTBL_TXRX_RATE_G2_HE		24
15 #define MT_WTBL_TXRX_RATE_G2		12
16 
17 #define MT_WTBL_AC0_CTT_OFFSET		20
18 
19 bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask)
20 {
21 	mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
22 		 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);
23 
24 	return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY,
25 			 0, 5000);
26 }
27 
28 static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset)
29 {
30 	return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4;
31 }
32 
33 static void mt7921_mac_sta_poll(struct mt792x_dev *dev)
34 {
35 	static const u8 ac_to_tid[] = {
36 		[IEEE80211_AC_BE] = 0,
37 		[IEEE80211_AC_BK] = 1,
38 		[IEEE80211_AC_VI] = 4,
39 		[IEEE80211_AC_VO] = 6
40 	};
41 	struct ieee80211_sta *sta;
42 	struct mt792x_sta *msta;
43 	struct mt792x_link_sta *mlink;
44 	u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS];
45 	LIST_HEAD(sta_poll_list);
46 	struct rate_info *rate;
47 	s8 rssi[4];
48 	int i;
49 
50 	spin_lock_bh(&dev->mt76.sta_poll_lock);
51 	list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list);
52 	spin_unlock_bh(&dev->mt76.sta_poll_lock);
53 
54 	while (true) {
55 		bool clear = false;
56 		u32 addr, val;
57 		u16 idx;
58 		u8 bw;
59 
60 		spin_lock_bh(&dev->mt76.sta_poll_lock);
61 		if (list_empty(&sta_poll_list)) {
62 			spin_unlock_bh(&dev->mt76.sta_poll_lock);
63 			break;
64 		}
65 		mlink = list_first_entry(&sta_poll_list,
66 					 struct mt792x_link_sta,
67 					 wcid.poll_list);
68 		msta = container_of(mlink, struct mt792x_sta, deflink);
69 		list_del_init(&mlink->wcid.poll_list);
70 		spin_unlock_bh(&dev->mt76.sta_poll_lock);
71 
72 		idx = mlink->wcid.idx;
73 		addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET);
74 
75 		for (i = 0; i < IEEE80211_NUM_ACS; i++) {
76 			u32 tx_last = mlink->airtime_ac[i];
77 			u32 rx_last = mlink->airtime_ac[i + 4];
78 
79 			mlink->airtime_ac[i] = mt76_rr(dev, addr);
80 			mlink->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);
81 
82 			tx_time[i] = mlink->airtime_ac[i] - tx_last;
83 			rx_time[i] = mlink->airtime_ac[i + 4] - rx_last;
84 
85 			if ((tx_last | rx_last) & BIT(30))
86 				clear = true;
87 
88 			addr += 8;
89 		}
90 
91 		if (clear) {
92 			mt7921_mac_wtbl_update(dev, idx,
93 					       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
94 			memset(mlink->airtime_ac, 0, sizeof(mlink->airtime_ac));
95 		}
96 
97 		if (!mlink->wcid.sta)
98 			continue;
99 
100 		sta = container_of((void *)msta, struct ieee80211_sta,
101 				   drv_priv);
102 		for (i = 0; i < IEEE80211_NUM_ACS; i++) {
103 			u8 q = mt76_connac_lmac_mapping(i);
104 			u32 tx_cur = tx_time[q];
105 			u32 rx_cur = rx_time[q];
106 			u8 tid = ac_to_tid[i];
107 
108 			if (!tx_cur && !rx_cur)
109 				continue;
110 
111 			ieee80211_sta_register_airtime(sta, tid, tx_cur,
112 						       rx_cur);
113 		}
114 
115 		/* We don't support reading GI info from txs packets.
116 		 * For accurate tx status reporting and AQL improvement,
117 		 * we need to make sure that flags match so polling GI
118 		 * from per-sta counters directly.
119 		 */
120 		rate = &mlink->wcid.rate;
121 		addr = mt7921_mac_wtbl_lmac_addr(idx,
122 						 MT_WTBL_TXRX_CAP_RATE_OFFSET);
123 		val = mt76_rr(dev, addr);
124 
125 		switch (rate->bw) {
126 		case RATE_INFO_BW_160:
127 			bw = IEEE80211_STA_RX_BW_160;
128 			break;
129 		case RATE_INFO_BW_80:
130 			bw = IEEE80211_STA_RX_BW_80;
131 			break;
132 		case RATE_INFO_BW_40:
133 			bw = IEEE80211_STA_RX_BW_40;
134 			break;
135 		default:
136 			bw = IEEE80211_STA_RX_BW_20;
137 			break;
138 		}
139 
140 		if (rate->flags & RATE_INFO_FLAGS_HE_MCS) {
141 			u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw;
142 
143 			rate->he_gi = (val & (0x3 << offs)) >> offs;
144 		} else if (rate->flags &
145 			   (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) {
146 			if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw))
147 				rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
148 			else
149 				rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
150 		}
151 
152 		/* get signal strength of resp frames (CTS/BA/ACK) */
153 		addr = mt7921_mac_wtbl_lmac_addr(idx, 30);
154 		val = mt76_rr(dev, addr);
155 
156 		rssi[0] = to_rssi(GENMASK(7, 0), val);
157 		rssi[1] = to_rssi(GENMASK(15, 8), val);
158 		rssi[2] = to_rssi(GENMASK(23, 16), val);
159 		rssi[3] = to_rssi(GENMASK(31, 14), val);
160 
161 		mlink->ack_signal =
162 			mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi);
163 
164 		ewma_avg_signal_add(&mlink->avg_ack_signal, -mlink->ack_signal);
165 	}
166 }
167 
168 static int
169 mt7921_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb)
170 {
171 	u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;
172 	struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
173 	bool hdr_trans, unicast, insert_ccmp_hdr = false;
174 	u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info;
175 	u16 hdr_gap;
176 	__le32 *rxv = NULL, *rxd = (__le32 *)skb->data;
177 	struct mt76_phy *mphy = &dev->mt76.phy;
178 	struct mt792x_phy *phy = &dev->phy;
179 	struct ieee80211_supported_band *sband;
180 	u32 csum_status = *(u32 *)skb->cb;
181 	u32 rxd0 = le32_to_cpu(rxd[0]);
182 	u32 rxd1 = le32_to_cpu(rxd[1]);
183 	u32 rxd2 = le32_to_cpu(rxd[2]);
184 	u32 rxd3 = le32_to_cpu(rxd[3]);
185 	u32 rxd4 = le32_to_cpu(rxd[4]);
186 	struct mt792x_sta *msta = NULL;
187 	struct mt792x_link_sta *mlink;
188 	u16 seq_ctrl = 0;
189 	__le16 fc = 0;
190 	u8 mode = 0;
191 	int i, idx;
192 
193 	memset(status, 0, sizeof(*status));
194 
195 	if (rxd1 & MT_RXD1_NORMAL_BAND_IDX)
196 		return -EINVAL;
197 
198 	if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
199 		return -EINVAL;
200 
201 	if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR)
202 		return -EINVAL;
203 
204 	hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS;
205 	if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM))
206 		return -EINVAL;
207 
208 	/* ICV error or CCMP/BIP/WPI MIC error */
209 	if (rxd1 & MT_RXD1_NORMAL_ICV_ERR)
210 		status->flag |= RX_FLAG_ONLY_MONITOR;
211 
212 	chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);
213 	unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;
214 	idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);
215 	status->wcid = mt792x_rx_get_wcid(dev, idx, unicast);
216 
217 	if (status->wcid) {
218 		mlink = container_of(status->wcid, struct mt792x_link_sta, wcid);
219 		msta = container_of(mlink, struct mt792x_sta, deflink);
220 		mt76_wcid_add_poll(&dev->mt76, &mlink->wcid);
221 	}
222 
223 	mt792x_get_status_freq_info(status, chfreq);
224 
225 	switch (status->band) {
226 	case NL80211_BAND_5GHZ:
227 		sband = &mphy->sband_5g.sband;
228 		break;
229 	case NL80211_BAND_6GHZ:
230 		sband = &mphy->sband_6g.sband;
231 		break;
232 	default:
233 		sband = &mphy->sband_2g.sband;
234 		break;
235 	}
236 
237 	if (!sband->channels)
238 		return -EINVAL;
239 
240 	if (mt76_is_mmio(&dev->mt76) && (rxd0 & csum_mask) == csum_mask &&
241 	    !(csum_status & (BIT(0) | BIT(2) | BIT(3))))
242 		skb->ip_summed = CHECKSUM_UNNECESSARY;
243 
244 	if (rxd1 & MT_RXD1_NORMAL_FCS_ERR)
245 		status->flag |= RX_FLAG_FAILED_FCS_CRC;
246 
247 	if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR)
248 		status->flag |= RX_FLAG_MMIC_ERROR;
249 
250 	if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 &&
251 	    !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) {
252 		status->flag |= RX_FLAG_DECRYPTED;
253 		status->flag |= RX_FLAG_IV_STRIPPED;
254 		status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
255 	}
256 
257 	remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2);
258 
259 	if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
260 		return -EINVAL;
261 
262 	rxd += 6;
263 	if (rxd1 & MT_RXD1_NORMAL_GROUP_4) {
264 		u32 v0 = le32_to_cpu(rxd[0]);
265 		u32 v2 = le32_to_cpu(rxd[2]);
266 
267 		fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0));
268 		seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2);
269 		qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2);
270 
271 		rxd += 4;
272 		if ((u8 *)rxd - skb->data >= skb->len)
273 			return -EINVAL;
274 	}
275 
276 	if (rxd1 & MT_RXD1_NORMAL_GROUP_1) {
277 		u8 *data = (u8 *)rxd;
278 
279 		if (status->flag & RX_FLAG_DECRYPTED) {
280 			switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) {
281 			case MT_CIPHER_AES_CCMP:
282 			case MT_CIPHER_CCMP_CCX:
283 			case MT_CIPHER_CCMP_256:
284 				insert_ccmp_hdr =
285 					FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
286 				fallthrough;
287 			case MT_CIPHER_TKIP:
288 			case MT_CIPHER_TKIP_NO_MIC:
289 			case MT_CIPHER_GCMP:
290 			case MT_CIPHER_GCMP_256:
291 				status->iv[0] = data[5];
292 				status->iv[1] = data[4];
293 				status->iv[2] = data[3];
294 				status->iv[3] = data[2];
295 				status->iv[4] = data[1];
296 				status->iv[5] = data[0];
297 				break;
298 			default:
299 				break;
300 			}
301 		}
302 		rxd += 4;
303 		if ((u8 *)rxd - skb->data >= skb->len)
304 			return -EINVAL;
305 	}
306 
307 	if (rxd1 & MT_RXD1_NORMAL_GROUP_2) {
308 		status->timestamp = le32_to_cpu(rxd[0]);
309 		status->flag |= RX_FLAG_MACTIME_START;
310 
311 		if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) {
312 			status->flag |= RX_FLAG_AMPDU_DETAILS;
313 
314 			/* all subframes of an A-MPDU have the same timestamp */
315 			if (phy->rx_ampdu_ts != status->timestamp) {
316 				if (!++phy->ampdu_ref)
317 					phy->ampdu_ref++;
318 			}
319 			phy->rx_ampdu_ts = status->timestamp;
320 
321 			status->ampdu_ref = phy->ampdu_ref;
322 		}
323 
324 		rxd += 2;
325 		if ((u8 *)rxd - skb->data >= skb->len)
326 			return -EINVAL;
327 	}
328 
329 	/* RXD Group 3 - P-RXV */
330 	if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {
331 		u32 v0, v1;
332 		int ret;
333 
334 		rxv = rxd;
335 		rxd += 2;
336 		if ((u8 *)rxd - skb->data >= skb->len)
337 			return -EINVAL;
338 
339 		v0 = le32_to_cpu(rxv[0]);
340 		v1 = le32_to_cpu(rxv[1]);
341 
342 		if (v0 & MT_PRXV_HT_AD_CODE)
343 			status->enc_flags |= RX_ENC_FLAG_LDPC;
344 
345 		ret = mt76_connac2_mac_fill_rx_rate(&dev->mt76, status, sband,
346 						    rxv, &mode);
347 		if (ret < 0)
348 			return ret;
349 
350 		if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
351 			rxd += 6;
352 			if ((u8 *)rxd - skb->data >= skb->len)
353 				return -EINVAL;
354 
355 			rxv = rxd;
356 			/* Monitor mode would use RCPI described in GROUP 5
357 			 * instead.
358 			 */
359 			v1 = le32_to_cpu(rxv[0]);
360 
361 			rxd += 12;
362 			if ((u8 *)rxd - skb->data >= skb->len)
363 				return -EINVAL;
364 		}
365 
366 		status->chains = mphy->antenna_mask;
367 		status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1);
368 		status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1);
369 		status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1);
370 		status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1);
371 		status->signal = -128;
372 		for (i = 0; i < hweight8(mphy->antenna_mask); i++) {
373 			if (!(status->chains & BIT(i)) ||
374 			    status->chain_signal[i] >= 0)
375 				continue;
376 
377 			status->signal = max(status->signal,
378 					     status->chain_signal[i]);
379 		}
380 	}
381 
382 	amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4);
383 	status->amsdu = !!amsdu_info;
384 	if (status->amsdu) {
385 		status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME;
386 		status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME;
387 	}
388 
389 	hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad;
390 	if (hdr_trans && ieee80211_has_morefrags(fc)) {
391 		struct ieee80211_vif *vif;
392 		int err;
393 
394 		if (!msta || !msta->vif)
395 			return -EINVAL;
396 
397 		vif = container_of((void *)msta->vif, struct ieee80211_vif,
398 				   drv_priv);
399 		err = mt76_connac2_reverse_frag0_hdr_trans(vif, skb, hdr_gap);
400 		if (err)
401 			return err;
402 
403 		hdr_trans = false;
404 	} else {
405 		skb_pull(skb, hdr_gap);
406 		if (!hdr_trans && status->amsdu) {
407 			memmove(skb->data + 2, skb->data,
408 				ieee80211_get_hdrlen_from_skb(skb));
409 			skb_pull(skb, 2);
410 		}
411 	}
412 
413 	if (!hdr_trans) {
414 		struct ieee80211_hdr *hdr;
415 
416 		if (insert_ccmp_hdr) {
417 			u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
418 
419 			mt76_insert_ccmp_hdr(skb, key_id);
420 		}
421 
422 		hdr = mt76_skb_get_hdr(skb);
423 		fc = hdr->frame_control;
424 		if (ieee80211_is_data_qos(fc)) {
425 			seq_ctrl = le16_to_cpu(hdr->seq_ctrl);
426 			qos_ctl = *ieee80211_get_qos_ctl(hdr);
427 		}
428 	} else {
429 		status->flag |= RX_FLAG_8023;
430 	}
431 
432 	mt792x_mac_assoc_rssi(dev, skb);
433 
434 	if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023))
435 		mt76_connac2_mac_decode_he_radiotap(&dev->mt76, skb, rxv, mode);
436 
437 	if (!status->wcid || !ieee80211_is_data_qos(fc))
438 		return 0;
439 
440 	status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc);
441 	status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl);
442 	status->qos_ctl = qos_ctl;
443 
444 	return 0;
445 }
446 
447 void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data)
448 {
449 	struct mt792x_link_sta *mlink;
450 	struct mt76_wcid *wcid;
451 	__le32 *txs_data = data;
452 	u16 wcidx;
453 	u8 pid;
454 
455 	if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1)
456 		return;
457 
458 	wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID);
459 	pid = le32_get_bits(txs_data[3], MT_TXS3_PID);
460 
461 	if (pid < MT_PACKET_ID_FIRST)
462 		return;
463 
464 	if (wcidx >= MT792x_WTBL_SIZE)
465 		return;
466 
467 	rcu_read_lock();
468 
469 	wcid = mt76_wcid_ptr(dev, wcidx);
470 	if (!wcid)
471 		goto out;
472 
473 	mlink = container_of(wcid, struct mt792x_link_sta, wcid);
474 
475 	mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data);
476 	if (!wcid->sta)
477 		goto out;
478 
479 	mt76_wcid_add_poll(&dev->mt76, &mlink->wcid);
480 
481 out:
482 	rcu_read_unlock();
483 }
484 
485 static void mt7921_mac_tx_free(struct mt792x_dev *dev, void *data, int len)
486 {
487 	struct mt76_connac_tx_free *free = data;
488 	__le32 *tx_info = (__le32 *)(data + sizeof(*free));
489 	struct mt76_dev *mdev = &dev->mt76;
490 	struct mt76_txwi_cache *txwi;
491 	struct ieee80211_sta *sta = NULL;
492 	struct mt76_wcid *wcid = NULL;
493 	struct sk_buff *skb, *tmp;
494 	void *end = data + len;
495 	LIST_HEAD(free_list);
496 	bool wake = false;
497 	u8 i, count;
498 
499 	/* clean DMA queues and unmap buffers first */
500 	mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false);
501 	mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false);
502 
503 	count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_CNT);
504 	if (WARN_ON_ONCE((void *)&tx_info[count] > end))
505 		return;
506 
507 	for (i = 0; i < count; i++) {
508 		u32 msdu, info = le32_to_cpu(tx_info[i]);
509 		u8 stat;
510 
511 		/* 1'b1: new wcid pair.
512 		 * 1'b0: msdu_id with the same 'wcid pair' as above.
513 		 */
514 		if (info & MT_TX_FREE_PAIR) {
515 			struct mt792x_link_sta *mlink;
516 			u16 idx;
517 
518 			count++;
519 			idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info);
520 			wcid = mt76_wcid_ptr(dev, idx);
521 			sta = wcid_to_sta(wcid);
522 			if (!sta)
523 				continue;
524 
525 			mlink = container_of(wcid, struct mt792x_link_sta, wcid);
526 			mt76_wcid_add_poll(&dev->mt76, &mlink->wcid);
527 			continue;
528 		}
529 
530 		msdu = FIELD_GET(MT_TX_FREE_MSDU_ID, info);
531 		stat = FIELD_GET(MT_TX_FREE_STATUS, info);
532 
533 		if (wcid) {
534 			u32 count = FIELD_GET(MT_TX_FREE_COUNT, info);
535 
536 			wcid->stats.tx_retries += count ? count - 1 : 0;
537 			wcid->stats.tx_failed += !!stat;
538 		}
539 
540 		txwi = mt76_token_release(mdev, msdu, &wake);
541 		if (!txwi)
542 			continue;
543 
544 		mt76_connac2_txwi_free(mdev, txwi, sta, &free_list);
545 	}
546 
547 	if (wake)
548 		mt76_set_tx_blocked(&dev->mt76, false);
549 
550 	list_for_each_entry_safe(skb, tmp, &free_list, list) {
551 		skb_list_del_init(skb);
552 		napi_consume_skb(skb, 1);
553 	}
554 
555 	rcu_read_lock();
556 	mt7921_mac_sta_poll(dev);
557 	rcu_read_unlock();
558 
559 	mt76_worker_schedule(&dev->mt76.tx_worker);
560 }
561 
562 bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len)
563 {
564 	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
565 	__le32 *rxd = (__le32 *)data;
566 	__le32 *end = (__le32 *)&rxd[len / 4];
567 	enum rx_pkt_type type;
568 
569 	type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
570 
571 	switch (type) {
572 	case PKT_TYPE_TXRX_NOTIFY:
573 		/* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */
574 		mt7921_mac_tx_free(dev, data, len); /* mmio */
575 		return false;
576 	case PKT_TYPE_TXS:
577 		for (rxd += 2; rxd + 8 <= end; rxd += 8)
578 			mt7921_mac_add_txs(dev, rxd);
579 		return false;
580 	default:
581 		return true;
582 	}
583 }
584 EXPORT_SYMBOL_GPL(mt7921_rx_check);
585 
586 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
587 			 struct sk_buff *skb, u32 *info)
588 {
589 	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
590 	__le32 *rxd = (__le32 *)skb->data;
591 	__le32 *end = (__le32 *)&skb->data[skb->len];
592 	enum rx_pkt_type type;
593 	u16 flag;
594 
595 	type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
596 	flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG);
597 
598 	if (type == PKT_TYPE_RX_EVENT && flag == 0x1)
599 		type = PKT_TYPE_NORMAL_MCU;
600 
601 	switch (type) {
602 	case PKT_TYPE_TXRX_NOTIFY:
603 		/* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */
604 		mt7921_mac_tx_free(dev, skb->data, skb->len);
605 		napi_consume_skb(skb, 1);
606 		break;
607 	case PKT_TYPE_RX_EVENT:
608 		mt7921_mcu_rx_event(dev, skb);
609 		break;
610 	case PKT_TYPE_TXS:
611 		for (rxd += 2; rxd + 8 <= end; rxd += 8)
612 			mt7921_mac_add_txs(dev, rxd);
613 		dev_kfree_skb(skb);
614 		break;
615 	case PKT_TYPE_NORMAL_MCU:
616 	case PKT_TYPE_NORMAL:
617 		if (!mt7921_mac_fill_rx(dev, skb)) {
618 			mt76_rx(&dev->mt76, q, skb);
619 			return;
620 		}
621 		fallthrough;
622 	default:
623 		dev_kfree_skb(skb);
624 		break;
625 	}
626 }
627 EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb);
628 
629 static void
630 mt7921_vif_connect_iter(void *priv, u8 *mac,
631 			struct ieee80211_vif *vif)
632 {
633 	struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
634 	struct mt792x_dev *dev = mvif->phy->dev;
635 	struct ieee80211_hw *hw = mt76_hw(dev);
636 
637 	if (vif->type == NL80211_IFTYPE_STATION)
638 		ieee80211_disconnect(vif, true);
639 
640 	mt76_connac_mcu_uni_add_dev(&dev->mphy, &vif->bss_conf,
641 				    &mvif->bss_conf.mt76,
642 				    &mvif->sta.deflink.wcid, true);
643 	mt7921_mcu_set_tx(dev, vif);
644 
645 	if (vif->type == NL80211_IFTYPE_AP) {
646 		mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.deflink.wcid,
647 					    true, NULL);
648 		mt7921_mcu_sta_update(dev, NULL, vif, true,
649 				      MT76_STA_INFO_STATE_NONE);
650 		mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true);
651 	}
652 }
653 
654 /* system error recovery */
655 void mt7921_mac_reset_work(struct work_struct *work)
656 {
657 	struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
658 					      reset_work);
659 	struct ieee80211_hw *hw = mt76_hw(dev);
660 	struct mt76_connac_pm *pm = &dev->pm;
661 	int i, ret;
662 
663 	dev_dbg(dev->mt76.dev, "chip reset\n");
664 	set_bit(MT76_RESET, &dev->mphy.state);
665 	dev->hw_full_reset = true;
666 	ieee80211_stop_queues(hw);
667 
668 	cancel_delayed_work_sync(&dev->mphy.mac_work);
669 	cancel_delayed_work_sync(&pm->ps_work);
670 	cancel_work_sync(&pm->wake_work);
671 
672 	for (i = 0; i < 10; i++) {
673 		mutex_lock(&dev->mt76.mutex);
674 		ret = mt792x_dev_reset(dev);
675 		mutex_unlock(&dev->mt76.mutex);
676 
677 		if (!ret)
678 			break;
679 	}
680 
681 	if ((mt76_is_sdio(&dev->mt76) || mt76_is_usb(&dev->mt76)) &&
682 	    atomic_read(&dev->mt76.bus_hung))
683 		return;
684 
685 	if (i == 10)
686 		dev_err(dev->mt76.dev, "chip reset failed\n");
687 
688 	if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) {
689 		struct cfg80211_scan_info info = {
690 			.aborted = true,
691 		};
692 
693 		ieee80211_scan_completed(dev->mphy.hw, &info);
694 	}
695 
696 	dev->hw_full_reset = false;
697 	clear_bit(MT76_RESET, &dev->mphy.state);
698 	pm->suspended = false;
699 	ieee80211_wake_queues(hw);
700 	ieee80211_iterate_active_interfaces(hw,
701 					    IEEE80211_IFACE_ITER_RESUME_ALL,
702 					    mt7921_vif_connect_iter, NULL);
703 	mt76_connac_power_save_sched(&dev->mt76.phy, pm);
704 
705 	mt7921_regd_change(&dev->phy, "00");
706 }
707 
708 void mt7921_coredump_work(struct work_struct *work)
709 {
710 	struct mt792x_dev *dev;
711 	char *dump, *data;
712 
713 	dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev,
714 						coredump.work.work);
715 
716 	if (time_is_after_jiffies(dev->coredump.last_activity +
717 				  4 * MT76_CONNAC_COREDUMP_TIMEOUT)) {
718 		queue_delayed_work(dev->mt76.wq, &dev->coredump.work,
719 				   MT76_CONNAC_COREDUMP_TIMEOUT);
720 		return;
721 	}
722 
723 	dump = vzalloc(MT76_CONNAC_COREDUMP_SZ);
724 	data = dump;
725 
726 	while (true) {
727 		struct sk_buff *skb;
728 
729 		spin_lock_bh(&dev->mt76.lock);
730 		skb = __skb_dequeue(&dev->coredump.msg_list);
731 		spin_unlock_bh(&dev->mt76.lock);
732 
733 		if (!skb)
734 			break;
735 
736 		skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
737 		if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) {
738 			dev_kfree_skb(skb);
739 			continue;
740 		}
741 
742 		memcpy(data, skb->data, skb->len);
743 		data += skb->len;
744 
745 		dev_kfree_skb(skb);
746 	}
747 
748 	if (dump)
749 		dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,
750 			      GFP_KERNEL);
751 
752 	mt792x_reset(&dev->mt76);
753 }
754 
755 /* usb_sdio */
756 static void
757 mt7921_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid,
758 			   enum mt76_txq_id qid, struct ieee80211_sta *sta,
759 			   struct ieee80211_key_conf *key, int pid,
760 			   struct sk_buff *skb)
761 {
762 	__le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE);
763 
764 	memset(txwi, 0, MT_SDIO_TXD_SIZE);
765 	mt76_connac2_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0);
766 	skb_push(skb, MT_SDIO_TXD_SIZE);
767 }
768 
769 int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
770 				   enum mt76_txq_id qid, struct mt76_wcid *wcid,
771 				   struct ieee80211_sta *sta,
772 				   struct mt76_tx_info *tx_info)
773 {
774 	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
775 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
776 	struct ieee80211_key_conf *key = info->control.hw_key;
777 	struct sk_buff *skb = tx_info->skb;
778 	int err, pad, pktid, type;
779 
780 	if (unlikely(tx_info->skb->len <= ETH_HLEN))
781 		return -EINVAL;
782 
783 	err = skb_cow_head(skb, MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE);
784 	if (err)
785 		return err;
786 
787 	if (!wcid)
788 		wcid = &dev->mt76.global_wcid;
789 
790 	if (sta) {
791 		struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
792 
793 		if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) {
794 			info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
795 			msta->deflink.last_txs = jiffies;
796 		}
797 	}
798 
799 	pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
800 	mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);
801 
802 	type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0;
803 	mt792x_skb_add_usb_sdio_hdr(dev, skb, type);
804 	pad = round_up(skb->len, 4) - skb->len;
805 	if (mt76_is_usb(mdev))
806 		pad += 4;
807 
808 	err = mt76_skb_adjust_pad(skb, pad);
809 	if (err)
810 		/* Release pktid in case of error. */
811 		idr_remove(&wcid->pktid, pktid);
812 
813 	return err;
814 }
815 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb);
816 
817 void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
818 				     struct mt76_queue_entry *e)
819 {
820 	__le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE);
821 	unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE;
822 	struct ieee80211_sta *sta;
823 	struct mt76_wcid *wcid;
824 	u16 idx;
825 
826 	idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);
827 	wcid = __mt76_wcid_ptr(mdev, idx);
828 	sta = wcid_to_sta(wcid);
829 
830 	if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE)))
831 		mt76_connac2_tx_check_aggr(sta, txwi);
832 
833 	skb_pull(e->skb, headroom);
834 	mt76_tx_complete_skb(mdev, e->wcid, e->skb);
835 }
836 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb);
837 
838 bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
839 {
840 	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
841 
842 	mt792x_mutex_acquire(dev);
843 	mt7921_mac_sta_poll(dev);
844 	mt792x_mutex_release(dev);
845 
846 	return false;
847 }
848 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data);
849 
850 #if IS_ENABLED(CONFIG_IPV6)
851 void mt7921_set_ipv6_ns_work(struct work_struct *work)
852 {
853 	struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
854 					      ipv6_ns_work);
855 	struct sk_buff *skb;
856 	int ret = 0;
857 
858 	do {
859 		skb = skb_dequeue(&dev->ipv6_ns_list);
860 
861 		if (!skb)
862 			break;
863 
864 		mt792x_mutex_acquire(dev);
865 		ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
866 					    MCU_UNI_CMD(OFFLOAD), true);
867 		mt792x_mutex_release(dev);
868 
869 	} while (!ret);
870 
871 	if (ret)
872 		skb_queue_purge(&dev->ipv6_ns_list);
873 }
874 #endif
875