1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include "mt7921.h" 5 #include "eeprom.h" 6 7 static int 8 mt7921_reg_set(void *data, u64 val) 9 { 10 struct mt7921_dev *dev = data; 11 12 mt7921_mutex_acquire(dev); 13 mt76_wr(dev, dev->mt76.debugfs_reg, val); 14 mt7921_mutex_release(dev); 15 16 return 0; 17 } 18 19 static int 20 mt7921_reg_get(void *data, u64 *val) 21 { 22 struct mt7921_dev *dev = data; 23 24 mt7921_mutex_acquire(dev); 25 *val = mt76_rr(dev, dev->mt76.debugfs_reg); 26 mt7921_mutex_release(dev); 27 28 return 0; 29 } 30 31 DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mt7921_reg_get, mt7921_reg_set, 32 "0x%08llx\n"); 33 static int 34 mt7921_fw_debug_set(void *data, u64 val) 35 { 36 struct mt7921_dev *dev = data; 37 38 mt7921_mutex_acquire(dev); 39 40 dev->fw_debug = (u8)val; 41 mt7921_mcu_fw_log_2_host(dev, dev->fw_debug); 42 43 mt7921_mutex_release(dev); 44 45 return 0; 46 } 47 48 static int 49 mt7921_fw_debug_get(void *data, u64 *val) 50 { 51 struct mt7921_dev *dev = data; 52 53 *val = dev->fw_debug; 54 55 return 0; 56 } 57 58 DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug, mt7921_fw_debug_get, 59 mt7921_fw_debug_set, "%lld\n"); 60 61 static void 62 mt7921_ampdu_stat_read_phy(struct mt7921_phy *phy, 63 struct seq_file *file) 64 { 65 struct mt7921_dev *dev = file->private; 66 int bound[15], range[4], i; 67 68 if (!phy) 69 return; 70 71 mt7921_mac_update_mib_stats(phy); 72 73 /* Tx ampdu stat */ 74 for (i = 0; i < ARRAY_SIZE(range); i++) 75 range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i)); 76 77 for (i = 0; i < ARRAY_SIZE(bound); i++) 78 bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1; 79 80 seq_printf(file, "\nPhy0\n"); 81 82 seq_printf(file, "Length: %8d | ", bound[0]); 83 for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) 84 seq_printf(file, "%3d %3d | ", bound[i] + 1, bound[i + 1]); 85 86 seq_puts(file, "\nCount: "); 87 for (i = 0; i < ARRAY_SIZE(bound); i++) 88 seq_printf(file, "%8d | ", dev->mt76.aggr_stats[i]); 89 seq_puts(file, "\n"); 90 91 seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); 92 } 93 94 static int 95 mt7921_tx_stats_show(struct seq_file *file, void *data) 96 { 97 struct mt7921_dev *dev = file->private; 98 struct mt7921_phy *phy = &dev->phy; 99 struct mib_stats *mib = &phy->mib; 100 int i; 101 102 mt7921_mutex_acquire(dev); 103 104 mt7921_ampdu_stat_read_phy(phy, file); 105 106 seq_puts(file, "Tx MSDU stat:\n"); 107 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { 108 seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ", 109 i + 1, mib->tx_amsdu[i]); 110 if (mib->tx_amsdu_cnt) 111 seq_printf(file, "(%3d%%)\n", 112 mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt); 113 else 114 seq_puts(file, "\n"); 115 } 116 117 mt7921_mutex_release(dev); 118 119 return 0; 120 } 121 122 DEFINE_SHOW_ATTRIBUTE(mt7921_tx_stats); 123 124 static int 125 mt7921_queues_acq(struct seq_file *s, void *data) 126 { 127 struct mt7921_dev *dev = dev_get_drvdata(s->private); 128 int i; 129 130 mt7921_mutex_acquire(dev); 131 132 for (i = 0; i < 16; i++) { 133 int j, acs = i / 4, index = i % 4; 134 u32 ctrl, val, qlen = 0; 135 136 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, index)); 137 ctrl = BIT(31) | BIT(15) | (acs << 8); 138 139 for (j = 0; j < 32; j++) { 140 if (val & BIT(j)) 141 continue; 142 143 mt76_wr(dev, MT_PLE_FL_Q0_CTRL, 144 ctrl | (j + (index << 5))); 145 qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL, 146 GENMASK(11, 0)); 147 } 148 seq_printf(s, "AC%d%d: queued=%d\n", acs, index, qlen); 149 } 150 151 mt7921_mutex_release(dev); 152 153 return 0; 154 } 155 156 static int 157 mt7921_queues_read(struct seq_file *s, void *data) 158 { 159 struct mt7921_dev *dev = dev_get_drvdata(s->private); 160 struct { 161 struct mt76_queue *q; 162 char *queue; 163 } queue_map[] = { 164 { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" }, 165 { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" }, 166 { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" }, 167 }; 168 int i; 169 170 for (i = 0; i < ARRAY_SIZE(queue_map); i++) { 171 struct mt76_queue *q = queue_map[i].q; 172 173 if (!q) 174 continue; 175 176 seq_printf(s, 177 "%s: queued=%d head=%d tail=%d\n", 178 queue_map[i].queue, q->queued, q->head, 179 q->tail); 180 } 181 182 return 0; 183 } 184 185 static void 186 mt7921_seq_puts_array(struct seq_file *file, const char *str, 187 s8 *val, int len) 188 { 189 int i; 190 191 seq_printf(file, "%-16s:", str); 192 for (i = 0; i < len; i++) 193 if (val[i] == 127) 194 seq_printf(file, " %6s", "N.A"); 195 else 196 seq_printf(file, " %6d", val[i]); 197 seq_puts(file, "\n"); 198 } 199 200 #define mt7921_print_txpwr_entry(prefix, rate) \ 201 ({ \ 202 mt7921_seq_puts_array(s, #prefix " (user)", \ 203 txpwr.data[TXPWR_USER].rate, \ 204 ARRAY_SIZE(txpwr.data[TXPWR_USER].rate)); \ 205 mt7921_seq_puts_array(s, #prefix " (eeprom)", \ 206 txpwr.data[TXPWR_EEPROM].rate, \ 207 ARRAY_SIZE(txpwr.data[TXPWR_EEPROM].rate)); \ 208 mt7921_seq_puts_array(s, #prefix " (tmac)", \ 209 txpwr.data[TXPWR_MAC].rate, \ 210 ARRAY_SIZE(txpwr.data[TXPWR_MAC].rate)); \ 211 }) 212 213 static int 214 mt7921_txpwr(struct seq_file *s, void *data) 215 { 216 struct mt7921_dev *dev = dev_get_drvdata(s->private); 217 struct mt7921_txpwr txpwr; 218 int ret; 219 220 mt7921_mutex_acquire(dev); 221 ret = mt7921_get_txpwr_info(dev, &txpwr); 222 mt7921_mutex_release(dev); 223 224 if (ret) 225 return ret; 226 227 seq_printf(s, "Tx power table (channel %d)\n", txpwr.ch); 228 seq_printf(s, "%-16s %6s %6s %6s %6s\n", 229 " ", "1m", "2m", "5m", "11m"); 230 mt7921_print_txpwr_entry(CCK, cck); 231 232 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s\n", 233 " ", "6m", "9m", "12m", "18m", "24m", "36m", 234 "48m", "54m"); 235 mt7921_print_txpwr_entry(OFDM, ofdm); 236 237 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s\n", 238 " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5", 239 "mcs6", "mcs7"); 240 mt7921_print_txpwr_entry(HT20, ht20); 241 242 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n", 243 " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5", 244 "mcs6", "mcs7", "mcs32"); 245 mt7921_print_txpwr_entry(HT40, ht40); 246 247 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n", 248 " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5", 249 "mcs6", "mcs7", "mcs8", "mcs9", "mcs10", "mcs11"); 250 mt7921_print_txpwr_entry(VHT20, vht20); 251 mt7921_print_txpwr_entry(VHT40, vht40); 252 mt7921_print_txpwr_entry(VHT80, vht80); 253 mt7921_print_txpwr_entry(VHT160, vht160); 254 mt7921_print_txpwr_entry(HE26, he26); 255 mt7921_print_txpwr_entry(HE52, he52); 256 mt7921_print_txpwr_entry(HE106, he106); 257 mt7921_print_txpwr_entry(HE242, he242); 258 mt7921_print_txpwr_entry(HE484, he484); 259 mt7921_print_txpwr_entry(HE996, he996); 260 mt7921_print_txpwr_entry(HE996x2, he996x2); 261 262 return 0; 263 } 264 265 static void 266 mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) 267 { 268 struct mt7921_dev *dev = priv; 269 270 mt7921_mcu_set_beacon_filter(dev, vif, dev->pm.enable); 271 } 272 273 static int 274 mt7921_pm_set(void *data, u64 val) 275 { 276 struct mt7921_dev *dev = data; 277 struct mt76_connac_pm *pm = &dev->pm; 278 279 mutex_lock(&dev->mt76.mutex); 280 281 if (val == pm->enable) 282 goto out; 283 284 if (!pm->enable) { 285 pm->stats.last_wake_event = jiffies; 286 pm->stats.last_doze_event = jiffies; 287 } 288 /* make sure the chip is awake here and ps_work is scheduled 289 * just at end of the this routine. 290 */ 291 pm->enable = false; 292 mt76_connac_pm_wake(&dev->mphy, pm); 293 294 ieee80211_iterate_active_interfaces(mt76_hw(dev), 295 IEEE80211_IFACE_ITER_RESUME_ALL, 296 mt7921_pm_interface_iter, dev); 297 298 mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable); 299 300 pm->enable = val; 301 mt76_connac_power_save_sched(&dev->mphy, pm); 302 out: 303 mutex_unlock(&dev->mt76.mutex); 304 305 return 0; 306 } 307 308 static int 309 mt7921_pm_get(void *data, u64 *val) 310 { 311 struct mt7921_dev *dev = data; 312 313 *val = dev->pm.enable; 314 315 return 0; 316 } 317 318 DEFINE_DEBUGFS_ATTRIBUTE(fops_pm, mt7921_pm_get, mt7921_pm_set, "%lld\n"); 319 320 static int 321 mt7921_deep_sleep_set(void *data, u64 val) 322 { 323 struct mt7921_dev *dev = data; 324 struct mt76_connac_pm *pm = &dev->pm; 325 bool enable = !!val; 326 327 mt7921_mutex_acquire(dev); 328 if (pm->ds_enable != enable) { 329 mt76_connac_mcu_set_deep_sleep(&dev->mt76, enable); 330 pm->ds_enable = enable; 331 } 332 mt7921_mutex_release(dev); 333 334 return 0; 335 } 336 337 static int 338 mt7921_deep_sleep_get(void *data, u64 *val) 339 { 340 struct mt7921_dev *dev = data; 341 342 *val = dev->pm.ds_enable; 343 344 return 0; 345 } 346 347 DEFINE_DEBUGFS_ATTRIBUTE(fops_ds, mt7921_deep_sleep_get, 348 mt7921_deep_sleep_set, "%lld\n"); 349 350 static int 351 mt7921_pm_stats(struct seq_file *s, void *data) 352 { 353 struct mt7921_dev *dev = dev_get_drvdata(s->private); 354 struct mt76_connac_pm *pm = &dev->pm; 355 356 unsigned long awake_time = pm->stats.awake_time; 357 unsigned long doze_time = pm->stats.doze_time; 358 359 if (!test_bit(MT76_STATE_PM, &dev->mphy.state)) 360 awake_time += jiffies - pm->stats.last_wake_event; 361 else 362 doze_time += jiffies - pm->stats.last_doze_event; 363 364 seq_printf(s, "awake time: %14u\ndoze time: %15u\n", 365 jiffies_to_msecs(awake_time), 366 jiffies_to_msecs(doze_time)); 367 368 seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake); 369 370 return 0; 371 } 372 373 static int 374 mt7921_pm_idle_timeout_set(void *data, u64 val) 375 { 376 struct mt7921_dev *dev = data; 377 378 dev->pm.idle_timeout = msecs_to_jiffies(val); 379 380 return 0; 381 } 382 383 static int 384 mt7921_pm_idle_timeout_get(void *data, u64 *val) 385 { 386 struct mt7921_dev *dev = data; 387 388 *val = jiffies_to_msecs(dev->pm.idle_timeout); 389 390 return 0; 391 } 392 393 DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt7921_pm_idle_timeout_get, 394 mt7921_pm_idle_timeout_set, "%lld\n"); 395 396 static int mt7921_chip_reset(void *data, u64 val) 397 { 398 struct mt7921_dev *dev = data; 399 int ret = 0; 400 401 switch (val) { 402 case 1: 403 /* Reset wifisys directly. */ 404 mt7921_reset(&dev->mt76); 405 break; 406 default: 407 /* Collect the core dump before reset wifisys. */ 408 mt7921_mutex_acquire(dev); 409 ret = mt76_connac_mcu_chip_config(&dev->mt76); 410 mt7921_mutex_release(dev); 411 break; 412 } 413 414 return ret; 415 } 416 417 DEFINE_DEBUGFS_ATTRIBUTE(fops_reset, NULL, mt7921_chip_reset, "%lld\n"); 418 419 static int 420 mt7921s_sched_quota_read(struct seq_file *s, void *data) 421 { 422 struct mt7921_dev *dev = dev_get_drvdata(s->private); 423 struct mt76_sdio *sdio = &dev->mt76.sdio; 424 425 seq_printf(s, "pse_data_quota\t%d\n", sdio->sched.pse_data_quota); 426 seq_printf(s, "ple_data_quota\t%d\n", sdio->sched.ple_data_quota); 427 seq_printf(s, "pse_mcu_quota\t%d\n", sdio->sched.pse_mcu_quota); 428 seq_printf(s, "sched_deficit\t%d\n", sdio->sched.deficit); 429 430 return 0; 431 } 432 433 int mt7921_init_debugfs(struct mt7921_dev *dev) 434 { 435 struct dentry *dir; 436 437 dir = mt76_register_debugfs_fops(&dev->mphy, &fops_regval); 438 if (!dir) 439 return -ENOMEM; 440 441 debugfs_create_devm_seqfile(dev->mt76.dev, "queues", dir, 442 mt7921_queues_read); 443 debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir, 444 mt7921_queues_acq); 445 debugfs_create_devm_seqfile(dev->mt76.dev, "txpower_sku", dir, 446 mt7921_txpwr); 447 debugfs_create_file("tx_stats", 0400, dir, dev, &mt7921_tx_stats_fops); 448 debugfs_create_file("fw_debug", 0600, dir, dev, &fops_fw_debug); 449 debugfs_create_file("runtime-pm", 0600, dir, dev, &fops_pm); 450 debugfs_create_file("idle-timeout", 0600, dir, dev, 451 &fops_pm_idle_timeout); 452 debugfs_create_file("chip_reset", 0600, dir, dev, &fops_reset); 453 debugfs_create_devm_seqfile(dev->mt76.dev, "runtime_pm_stats", dir, 454 mt7921_pm_stats); 455 debugfs_create_file("deep-sleep", 0600, dir, dev, &fops_ds); 456 if (mt76_is_sdio(&dev->mt76)) 457 debugfs_create_devm_seqfile(dev->mt76.dev, "sched-quota", dir, 458 mt7921s_sched_quota_read); 459 return 0; 460 } 461