1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #ifndef __MT7915_H 5 #define __MT7915_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include "../mt76_connac.h" 10 #include "regs.h" 11 12 #define MT7915_MAX_INTERFACES 19 13 #define MT7915_WTBL_SIZE 288 14 #define MT7916_WTBL_SIZE 544 15 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1) 16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \ 17 MT7915_MAX_INTERFACES) 18 19 #define MT7915_WATCHDOG_TIME (HZ / 10) 20 #define MT7915_RESET_TIMEOUT (30 * HZ) 21 22 #define MT7915_TX_RING_SIZE 2048 23 #define MT7915_TX_MCU_RING_SIZE 256 24 #define MT7915_TX_FWDL_RING_SIZE 128 25 26 #define MT7915_RX_RING_SIZE 1536 27 #define MT7915_RX_MCU_RING_SIZE 512 28 29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin" 30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin" 31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin" 32 33 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin" 34 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin" 35 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin" 36 37 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin" 38 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin" 39 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin" 40 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin" 41 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin" 42 43 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin" 44 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin" 45 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin" 46 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin" 47 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin" 48 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin" 49 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin" 50 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin" 51 52 #define MT7915_EEPROM_SIZE 3584 53 #define MT7916_EEPROM_SIZE 4096 54 55 #define MT7915_EEPROM_BLOCK_SIZE 16 56 #define MT7915_TOKEN_SIZE 8192 57 58 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 59 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 60 61 #define MT7915_THERMAL_THROTTLE_MAX 100 62 #define MT7915_CDEV_THROTTLE_MAX 99 63 64 #define MT7915_SKU_RATE_NUM 161 65 66 #define MT7915_MAX_TWT_AGRT 16 67 #define MT7915_MAX_STA_TWT_AGRT 8 68 #define MT7915_MIN_TWT_DUR 64 69 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2) 70 71 struct mt7915_vif; 72 struct mt7915_sta; 73 struct mt7915_dfs_pulse; 74 struct mt7915_dfs_pattern; 75 76 enum mt7915_txq_id { 77 MT7915_TXQ_FWDL = 16, 78 MT7915_TXQ_MCU_WM, 79 MT7915_TXQ_BAND0, 80 MT7915_TXQ_BAND1, 81 MT7915_TXQ_MCU_WA, 82 }; 83 84 enum mt7915_rxq_id { 85 MT7915_RXQ_BAND0 = 0, 86 MT7915_RXQ_BAND1, 87 MT7915_RXQ_MCU_WM = 0, 88 MT7915_RXQ_MCU_WA, 89 MT7915_RXQ_MCU_WA_EXT, 90 }; 91 92 enum mt7916_rxq_id { 93 MT7916_RXQ_MCU_WM = 0, 94 MT7916_RXQ_MCU_WA, 95 MT7916_RXQ_MCU_WA_MAIN, 96 MT7916_RXQ_MCU_WA_EXT, 97 MT7916_RXQ_BAND0, 98 MT7916_RXQ_BAND1, 99 }; 100 101 struct mt7915_twt_flow { 102 struct list_head list; 103 u64 start_tsf; 104 u64 tsf; 105 u32 duration; 106 u16 wcid; 107 __le16 mantissa; 108 u8 exp; 109 u8 table_id; 110 u8 id; 111 u8 protection:1; 112 u8 flowtype:1; 113 u8 trigger:1; 114 u8 sched:1; 115 }; 116 117 DECLARE_EWMA(avg_signal, 10, 8) 118 119 struct mt7915_sta { 120 struct mt76_wcid wcid; /* must be first */ 121 122 struct mt7915_vif *vif; 123 124 struct list_head poll_list; 125 struct list_head rc_list; 126 u32 airtime_ac[8]; 127 128 int ack_signal; 129 struct ewma_avg_signal avg_ack_signal; 130 131 unsigned long changed; 132 unsigned long jiffies; 133 unsigned long ampdu_state; 134 struct mt76_connac_sta_key_conf bip; 135 136 struct { 137 u8 flowid_mask; 138 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT]; 139 } twt; 140 }; 141 142 struct mt7915_vif_cap { 143 bool ht_ldpc:1; 144 bool vht_ldpc:1; 145 bool he_ldpc:1; 146 bool vht_su_ebfer:1; 147 bool vht_su_ebfee:1; 148 bool vht_mu_ebfer:1; 149 bool vht_mu_ebfee:1; 150 bool he_su_ebfer:1; 151 bool he_su_ebfee:1; 152 bool he_mu_ebfer:1; 153 }; 154 155 struct mt7915_vif { 156 struct mt76_vif mt76; /* must be first */ 157 158 struct mt7915_vif_cap cap; 159 struct mt7915_sta sta; 160 struct mt7915_phy *phy; 161 162 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 163 struct cfg80211_bitrate_mask bitrate_mask; 164 }; 165 166 /* per-phy stats. */ 167 struct mib_stats { 168 u32 ack_fail_cnt; 169 u32 fcs_err_cnt; 170 u32 rts_cnt; 171 u32 rts_retries_cnt; 172 u32 ba_miss_cnt; 173 u32 tx_bf_cnt; 174 u32 tx_mu_mpdu_cnt; 175 u32 tx_mu_acked_mpdu_cnt; 176 u32 tx_su_acked_mpdu_cnt; 177 u32 tx_bf_ibf_ppdu_cnt; 178 u32 tx_bf_ebf_ppdu_cnt; 179 180 u32 tx_bf_rx_fb_all_cnt; 181 u32 tx_bf_rx_fb_he_cnt; 182 u32 tx_bf_rx_fb_vht_cnt; 183 u32 tx_bf_rx_fb_ht_cnt; 184 185 u32 tx_bf_rx_fb_bw; /* value of last sample, not cumulative */ 186 u32 tx_bf_rx_fb_nc_cnt; 187 u32 tx_bf_rx_fb_nr_cnt; 188 u32 tx_bf_fb_cpl_cnt; 189 u32 tx_bf_fb_trig_cnt; 190 191 u32 tx_ampdu_cnt; 192 u32 tx_stop_q_empty_cnt; 193 u32 tx_mpdu_attempts_cnt; 194 u32 tx_mpdu_success_cnt; 195 u32 tx_pkt_ebf_cnt; 196 u32 tx_pkt_ibf_cnt; 197 198 u32 tx_rwp_fail_cnt; 199 u32 tx_rwp_need_cnt; 200 201 /* rx stats */ 202 u32 rx_fifo_full_cnt; 203 u32 channel_idle_cnt; 204 u32 primary_cca_busy_time; 205 u32 secondary_cca_busy_time; 206 u32 primary_energy_detect_time; 207 u32 cck_mdrdy_time; 208 u32 ofdm_mdrdy_time; 209 u32 green_mdrdy_time; 210 u32 rx_vector_mismatch_cnt; 211 u32 rx_delimiter_fail_cnt; 212 u32 rx_mrdy_cnt; 213 u32 rx_len_mismatch_cnt; 214 u32 rx_mpdu_cnt; 215 u32 rx_ampdu_cnt; 216 u32 rx_ampdu_bytes_cnt; 217 u32 rx_ampdu_valid_subframe_cnt; 218 u32 rx_ampdu_valid_subframe_bytes_cnt; 219 u32 rx_pfdrop_cnt; 220 u32 rx_vec_queue_overflow_drop_cnt; 221 u32 rx_ba_cnt; 222 223 u32 tx_amsdu[8]; 224 u32 tx_amsdu_cnt; 225 }; 226 227 /* crash-dump */ 228 struct mt7915_crash_data { 229 guid_t guid; 230 struct timespec64 timestamp; 231 232 u8 *memdump_buf; 233 size_t memdump_buf_len; 234 }; 235 236 struct mt7915_hif { 237 struct list_head list; 238 239 struct device *dev; 240 void __iomem *regs; 241 int irq; 242 }; 243 244 struct mt7915_phy { 245 struct mt76_phy *mt76; 246 struct mt7915_dev *dev; 247 248 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 249 250 struct ieee80211_vif *monitor_vif; 251 252 struct thermal_cooling_device *cdev; 253 u8 cdev_state; 254 u8 throttle_state; 255 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */ 256 257 u32 rxfilter; 258 u64 omac_mask; 259 u8 band_idx; 260 261 u16 noise; 262 263 s16 coverage_class; 264 u8 slottime; 265 266 u8 rdd_state; 267 268 u32 trb_ts; 269 270 u32 rx_ampdu_ts; 271 u32 ampdu_ref; 272 273 struct mib_stats mib; 274 struct mt76_channel_state state_ts; 275 276 #ifdef CONFIG_NL80211_TESTMODE 277 struct { 278 u32 *reg_backup; 279 280 s32 last_freq_offset; 281 u8 last_rcpi[4]; 282 s8 last_ib_rssi[4]; 283 s8 last_wb_rssi[4]; 284 u8 last_snr; 285 286 u8 spe_idx; 287 } test; 288 #endif 289 }; 290 291 struct mt7915_dev { 292 union { /* must be first */ 293 struct mt76_dev mt76; 294 struct mt76_phy mphy; 295 }; 296 297 struct mt7915_hif *hif2; 298 struct mt7915_reg_desc reg; 299 u8 q_id[MT7915_MAX_QUEUE]; 300 u32 q_int_mask[MT7915_MAX_QUEUE]; 301 u32 wfdma_mask; 302 303 const struct mt76_bus_ops *bus_ops; 304 struct tasklet_struct irq_tasklet; 305 struct mt7915_phy phy; 306 307 /* monitor rx chain configured channel */ 308 struct cfg80211_chan_def rdd2_chandef; 309 struct mt7915_phy *rdd2_phy; 310 311 u16 chainmask; 312 u16 chainshift; 313 u32 hif_idx; 314 315 struct work_struct init_work; 316 struct work_struct rc_work; 317 struct work_struct dump_work; 318 struct work_struct reset_work; 319 wait_queue_head_t reset_wait; 320 321 struct { 322 u32 state; 323 u32 wa_reset_count; 324 u32 wm_reset_count; 325 bool hw_full_reset:1; 326 bool hw_init_done:1; 327 bool restart:1; 328 } recovery; 329 330 /* protects coredump data */ 331 struct mutex dump_mutex; 332 #ifdef CONFIG_DEV_COREDUMP 333 struct { 334 struct mt7915_crash_data *crash_data; 335 } coredump; 336 #endif 337 338 struct list_head sta_rc_list; 339 struct list_head sta_poll_list; 340 struct list_head twt_list; 341 spinlock_t sta_poll_lock; 342 343 u32 hw_pattern; 344 345 bool dbdc_support; 346 bool flash_mode; 347 bool muru_debug; 348 bool ibf; 349 350 struct dentry *debugfs_dir; 351 struct rchan *relay_fwlog; 352 353 void *cal; 354 355 struct { 356 u8 debug_wm; 357 u8 debug_wa; 358 u8 debug_bin; 359 } fw; 360 361 struct { 362 u16 table_mask; 363 u8 n_agrt; 364 } twt; 365 366 struct reset_control *rstc; 367 void __iomem *dcm; 368 void __iomem *sku; 369 }; 370 371 enum { 372 WFDMA0 = 0x0, 373 WFDMA1, 374 WFDMA_EXT, 375 __MT_WFDMA_MAX, 376 }; 377 378 enum { 379 MT_RX_SEL0, 380 MT_RX_SEL1, 381 MT_RX_SEL2, /* monitor chain */ 382 }; 383 384 enum mt7915_rdd_cmd { 385 RDD_STOP, 386 RDD_START, 387 RDD_DET_MODE, 388 RDD_RADAR_EMULATE, 389 RDD_START_TXQ = 20, 390 RDD_SET_WF_ANT = 30, 391 RDD_CAC_START = 50, 392 RDD_CAC_END, 393 RDD_NORMAL_START, 394 RDD_DISABLE_DFS_CAL, 395 RDD_PULSE_DBG, 396 RDD_READ_PULSE, 397 RDD_RESUME_BF, 398 RDD_IRQ_OFF, 399 }; 400 401 static inline struct mt7915_phy * 402 mt7915_hw_phy(struct ieee80211_hw *hw) 403 { 404 struct mt76_phy *phy = hw->priv; 405 406 return phy->priv; 407 } 408 409 static inline struct mt7915_dev * 410 mt7915_hw_dev(struct ieee80211_hw *hw) 411 { 412 struct mt76_phy *phy = hw->priv; 413 414 return container_of(phy->dev, struct mt7915_dev, mt76); 415 } 416 417 static inline struct mt7915_phy * 418 mt7915_ext_phy(struct mt7915_dev *dev) 419 { 420 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1]; 421 422 if (!phy) 423 return NULL; 424 425 return phy->priv; 426 } 427 428 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku) 429 { 430 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK; 431 432 if (!is_mt7986(&dev->mt76)) 433 return 0; 434 435 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask; 436 } 437 438 extern const struct ieee80211_ops mt7915_ops; 439 extern const struct mt76_testmode_ops mt7915_testmode_ops; 440 extern struct pci_driver mt7915_pci_driver; 441 extern struct pci_driver mt7915_hif_driver; 442 extern struct platform_driver mt7986_wmac_driver; 443 444 #ifdef CONFIG_MT7986_WMAC 445 int mt7986_wmac_enable(struct mt7915_dev *dev); 446 void mt7986_wmac_disable(struct mt7915_dev *dev); 447 #else 448 static inline int mt7986_wmac_enable(struct mt7915_dev *dev) 449 { 450 return 0; 451 } 452 453 static inline void mt7986_wmac_disable(struct mt7915_dev *dev) 454 { 455 } 456 #endif 457 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, 458 void __iomem *mem_base, u32 device_id); 459 void mt7915_wfsys_reset(struct mt7915_dev *dev); 460 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance); 461 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif); 462 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id); 463 464 int mt7915_register_device(struct mt7915_dev *dev); 465 void mt7915_unregister_device(struct mt7915_dev *dev); 466 int mt7915_eeprom_init(struct mt7915_dev *dev); 467 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, 468 struct mt7915_phy *phy); 469 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, 470 struct ieee80211_channel *chan, 471 u8 chain_idx); 472 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band); 473 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2); 474 void mt7915_dma_prefetch(struct mt7915_dev *dev); 475 void mt7915_dma_cleanup(struct mt7915_dev *dev); 476 int mt7915_dma_reset(struct mt7915_dev *dev, bool force); 477 int mt7915_txbf_init(struct mt7915_dev *dev); 478 void mt7915_init_txpower(struct mt7915_dev *dev, 479 struct ieee80211_supported_band *sband); 480 void mt7915_reset(struct mt7915_dev *dev); 481 int mt7915_run(struct ieee80211_hw *hw); 482 int mt7915_mcu_init(struct mt7915_dev *dev); 483 int mt7915_mcu_init_firmware(struct mt7915_dev *dev); 484 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, 485 struct mt7915_vif *mvif, 486 struct mt7915_twt_flow *flow, 487 int cmd); 488 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy, 489 struct ieee80211_vif *vif, bool enable); 490 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 491 struct ieee80211_vif *vif, int enable); 492 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 493 struct ieee80211_sta *sta, bool enable); 494 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 495 struct ieee80211_ampdu_params *params, 496 bool add); 497 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 498 struct ieee80211_ampdu_params *params, 499 bool add); 500 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, 501 struct cfg80211_he_bss_color *he_bss_color); 502 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 503 int enable, u32 changed); 504 int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif, 505 bool enable); 506 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 507 struct ieee80211_sta *sta, bool changed); 508 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 509 struct ieee80211_sta *sta); 510 int mt7915_set_channel(struct mt7915_phy *phy); 511 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd); 512 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif); 513 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req); 514 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, 515 struct ieee80211_vif *vif, 516 struct ieee80211_sta *sta, 517 void *data, u32 field); 518 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev); 519 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset); 520 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num); 521 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, 522 bool hdr_trans); 523 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, 524 u8 en); 525 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); 526 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); 527 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy); 528 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len); 529 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action); 530 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val); 531 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 532 const struct mt7915_dfs_pulse *pulse); 533 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 534 const struct mt7915_dfs_pattern *pattern); 535 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val); 536 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev); 537 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy); 538 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch); 539 int mt7915_mcu_get_temperature(struct mt7915_phy *phy); 540 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state); 541 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, 542 struct ieee80211_sta *sta, struct rate_info *rate); 543 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, 544 struct cfg80211_chan_def *chandef); 545 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set); 546 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); 547 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); 548 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); 549 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); 550 void mt7915_mcu_exit(struct mt7915_dev *dev); 551 552 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) 553 { 554 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE; 555 } 556 557 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev) 558 { 559 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE; 560 } 561 562 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg, 563 u32 clear, u32 set); 564 565 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask) 566 { 567 if (dev->hif2) 568 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask); 569 else 570 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 571 572 tasklet_schedule(&dev->irq_tasklet); 573 } 574 575 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask) 576 { 577 if (dev->hif2) 578 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0); 579 else 580 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 581 } 582 583 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset, 584 size_t len); 585 586 void mt7915_mac_init(struct mt7915_dev *dev); 587 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw); 588 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); 589 void mt7915_mac_reset_counters(struct mt7915_phy *phy); 590 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); 591 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy); 592 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev, 593 struct ieee80211_vif *vif, bool enable); 594 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 595 struct sk_buff *skb, struct mt76_wcid *wcid, int pid, 596 struct ieee80211_key_conf *key, 597 enum mt76_txq_id qid, u32 changed); 598 void mt7915_mac_set_timing(struct mt7915_phy *phy); 599 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 600 struct ieee80211_sta *sta); 601 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 602 struct ieee80211_sta *sta); 603 void mt7915_mac_work(struct work_struct *work); 604 void mt7915_mac_reset_work(struct work_struct *work); 605 void mt7915_mac_dump_work(struct work_struct *work); 606 void mt7915_mac_sta_rc_work(struct work_struct *work); 607 void mt7915_mac_update_stats(struct mt7915_phy *phy); 608 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev, 609 struct mt7915_sta *msta, 610 u8 flowid); 611 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw, 612 struct ieee80211_sta *sta, 613 struct ieee80211_twt_setup *twt); 614 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 615 enum mt76_txq_id qid, struct mt76_wcid *wcid, 616 struct ieee80211_sta *sta, 617 struct mt76_tx_info *tx_info); 618 void mt7915_tx_token_put(struct mt7915_dev *dev); 619 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 620 struct sk_buff *skb); 621 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len); 622 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 623 void mt7915_stats_work(struct work_struct *work); 624 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force); 625 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy); 626 void mt7915_set_stream_he_caps(struct mt7915_phy *phy); 627 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy); 628 void mt7915_update_channel(struct mt76_phy *mphy); 629 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable); 630 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy, void *ms); 631 int mt7915_init_debugfs(struct mt7915_phy *phy); 632 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len); 633 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len); 634 #ifdef CONFIG_MAC80211_DEBUGFS 635 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 636 struct ieee80211_sta *sta, struct dentry *dir); 637 #endif 638 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, 639 bool pci, int *irq); 640 641 #endif 642