1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/fs.h> 5 #include "mt7915.h" 6 #include "mcu.h" 7 #include "mac.h" 8 #include "eeprom.h" 9 10 #define fw_name(_dev, name, ...) ({ \ 11 char *_fw; \ 12 switch (mt76_chip(&(_dev)->mt76)) { \ 13 case 0x7915: \ 14 _fw = MT7915_##name; \ 15 break; \ 16 case 0x7981: \ 17 _fw = MT7981_##name; \ 18 break; \ 19 case 0x7986: \ 20 _fw = MT7986_##name##__VA_ARGS__; \ 21 break; \ 22 default: \ 23 _fw = MT7916_##name; \ 24 break; \ 25 } \ 26 _fw; \ 27 }) 28 29 #define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \ 30 fw_name(_dev, name) : \ 31 fw_name(_dev, name, _MT7975)) 32 33 #define MCU_PATCH_ADDRESS 0x200000 34 35 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 36 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 37 38 static bool sr_scene_detect = true; 39 module_param(sr_scene_detect, bool, 0644); 40 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 41 42 static u8 43 mt7915_mcu_get_sta_nss(u16 mcs_map) 44 { 45 u8 nss; 46 47 for (nss = 8; nss > 0; nss--) { 48 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 49 50 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 51 break; 52 } 53 54 return nss - 1; 55 } 56 57 static void 58 mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 59 u16 mcs_map) 60 { 61 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 62 struct mt7915_dev *dev = msta->vif->phy->dev; 63 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; 64 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; 65 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 66 67 for (nss = 0; nss < max_nss; nss++) { 68 int mcs; 69 70 switch ((mcs_map >> (2 * nss)) & 0x3) { 71 case IEEE80211_HE_MCS_SUPPORT_0_11: 72 mcs = GENMASK(11, 0); 73 break; 74 case IEEE80211_HE_MCS_SUPPORT_0_9: 75 mcs = GENMASK(9, 0); 76 break; 77 case IEEE80211_HE_MCS_SUPPORT_0_7: 78 mcs = GENMASK(7, 0); 79 break; 80 default: 81 mcs = 0; 82 } 83 84 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 85 86 switch (mcs) { 87 case 0 ... 7: 88 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 89 break; 90 case 8 ... 9: 91 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 92 break; 93 case 10 ... 11: 94 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 95 break; 96 default: 97 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 98 break; 99 } 100 mcs_map &= ~(0x3 << (nss * 2)); 101 mcs_map |= mcs << (nss * 2); 102 103 /* only support 2ss on 160MHz for mt7915 */ 104 if (is_mt7915(&dev->mt76) && nss > 1 && 105 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 106 break; 107 } 108 109 *he_mcs = cpu_to_le16(mcs_map); 110 } 111 112 static void 113 mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 114 const u16 *mask) 115 { 116 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 117 struct mt7915_dev *dev = msta->vif->phy->dev; 118 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 119 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 120 u16 mcs; 121 122 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 123 switch (mcs_map & 0x3) { 124 case IEEE80211_VHT_MCS_SUPPORT_0_9: 125 mcs = GENMASK(9, 0); 126 break; 127 case IEEE80211_VHT_MCS_SUPPORT_0_8: 128 mcs = GENMASK(8, 0); 129 break; 130 case IEEE80211_VHT_MCS_SUPPORT_0_7: 131 mcs = GENMASK(7, 0); 132 break; 133 default: 134 mcs = 0; 135 } 136 137 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 138 139 /* only support 2ss on 160MHz for mt7915 */ 140 if (is_mt7915(&dev->mt76) && nss > 1 && 141 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 142 break; 143 } 144 } 145 146 static void 147 mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 148 const u8 *mask) 149 { 150 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 151 152 for (nss = 0; nss < max_nss; nss++) 153 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 154 } 155 156 static int 157 mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd, 158 struct sk_buff *skb, int seq) 159 { 160 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 161 struct mt76_connac2_mcu_rxd *rxd; 162 int ret = 0; 163 164 if (!skb) { 165 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 166 cmd, seq); 167 168 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) { 169 dev->recovery.restart = true; 170 wake_up(&dev->mt76.mcu.wait); 171 queue_work(dev->mt76.wq, &dev->reset_work); 172 wake_up(&dev->reset_wait); 173 } 174 175 return -ETIMEDOUT; 176 } 177 178 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 179 if (seq != rxd->seq && 180 !(rxd->eid == MCU_CMD_EXT_CID && 181 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT)) 182 return -EAGAIN; 183 184 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 185 skb_pull(skb, sizeof(*rxd) - 4); 186 ret = *skb->data; 187 } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) { 188 skb_pull(skb, sizeof(*rxd) + 4); 189 ret = le32_to_cpu(*(__le32 *)skb->data); 190 } else { 191 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); 192 } 193 194 return ret; 195 } 196 197 static void 198 mt7915_mcu_set_timeout(struct mt76_dev *mdev, int cmd) 199 { 200 if ((cmd & __MCU_CMD_FIELD_ID) != MCU_CMD_EXT_CID) 201 return; 202 203 switch (FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd)) { 204 case MCU_EXT_CMD_THERMAL_CTRL: 205 case MCU_EXT_CMD_GET_MIB_INFO: 206 case MCU_EXT_CMD_PHY_STAT_INFO: 207 case MCU_EXT_CMD_STA_REC_UPDATE: 208 case MCU_EXT_CMD_BSS_INFO_UPDATE: 209 mdev->mcu.timeout = 2 * HZ; 210 return; 211 default: 212 break; 213 } 214 } 215 216 static int 217 mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 218 int cmd, int *wait_seq) 219 { 220 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 221 enum mt76_mcuq_id qid; 222 223 if (cmd == MCU_CMD(FW_SCATTER)) 224 qid = MT_MCUQ_FWDL; 225 else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 226 qid = MT_MCUQ_WA; 227 else 228 qid = MT_MCUQ_WM; 229 230 mt7915_mcu_set_timeout(mdev, cmd); 231 232 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 233 } 234 235 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 236 { 237 struct { 238 __le32 args[3]; 239 } req = { 240 .args = { 241 cpu_to_le32(a1), 242 cpu_to_le32(a2), 243 cpu_to_le32(a3), 244 }, 245 }; 246 247 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 248 } 249 250 static void 251 mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 252 { 253 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 254 return; 255 256 ieee80211_csa_finish(vif, 0); 257 } 258 259 static void 260 mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb) 261 { 262 struct mt76_phy *mphy = &dev->mt76.phy; 263 struct mt7915_mcu_csa_notify *c; 264 265 c = (struct mt7915_mcu_csa_notify *)skb->data; 266 267 if (c->band_idx > MT_BAND1) 268 return; 269 270 if ((c->band_idx && !dev->phy.mt76->band_idx) && 271 dev->mt76.phys[MT_BAND1]) 272 mphy = dev->mt76.phys[MT_BAND1]; 273 274 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 275 IEEE80211_IFACE_ITER_RESUME_ALL, 276 mt7915_mcu_csa_finish, mphy->hw); 277 } 278 279 static void 280 mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb) 281 { 282 struct mt76_phy *mphy = &dev->mt76.phy; 283 struct mt7915_mcu_thermal_notify *t; 284 struct mt7915_phy *phy; 285 286 t = (struct mt7915_mcu_thermal_notify *)skb->data; 287 if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE) 288 return; 289 290 if (t->ctrl.band_idx > MT_BAND1) 291 return; 292 293 if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) && 294 dev->mt76.phys[MT_BAND1]) 295 mphy = dev->mt76.phys[MT_BAND1]; 296 297 phy = mphy->priv; 298 phy->throttle_state = t->ctrl.duty.duty_cycle; 299 } 300 301 static void 302 mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb) 303 { 304 struct mt76_phy *mphy = &dev->mt76.phy; 305 struct mt7915_mcu_rdd_report *r; 306 u32 sku; 307 308 r = (struct mt7915_mcu_rdd_report *)skb->data; 309 310 switch (r->rdd_idx) { 311 case MT_RDD_IDX_BAND0: 312 break; 313 case MT_RDD_IDX_BAND1: 314 sku = mt7915_check_adie(dev, true); 315 /* the main phy is bound to band 1 for this sku */ 316 if (is_mt7986(&dev->mt76) && 317 (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE)) 318 break; 319 mphy = dev->mt76.phys[MT_BAND1]; 320 break; 321 case MT_RDD_IDX_BACKGROUND: 322 if (!dev->rdd2_phy) 323 return; 324 mphy = dev->rdd2_phy->mt76; 325 break; 326 default: 327 dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx); 328 return; 329 } 330 331 if (!mphy) 332 return; 333 334 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND) 335 cfg80211_background_radar_event(mphy->hw->wiphy, 336 &dev->rdd2_chandef, 337 GFP_ATOMIC); 338 else 339 ieee80211_radar_detected(mphy->hw, NULL); 340 dev->hw_pattern++; 341 } 342 343 static void 344 mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb) 345 { 346 struct mt76_connac2_mcu_rxd *rxd; 347 int len = skb->len - sizeof(*rxd); 348 const char *data, *type; 349 350 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 351 data = (char *)&rxd[1]; 352 353 switch (rxd->s2d_index) { 354 case 0: 355 if (mt7915_debugfs_rx_log(dev, data, len)) 356 return; 357 358 type = "WM"; 359 break; 360 case 2: 361 type = "WA"; 362 break; 363 default: 364 type = "unknown"; 365 break; 366 } 367 368 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 369 } 370 371 static void 372 mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 373 { 374 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 375 return; 376 377 ieee80211_color_change_finish(vif, 0); 378 } 379 380 static void 381 mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb) 382 { 383 struct mt76_phy *mphy = &dev->mt76.phy; 384 struct mt7915_mcu_bcc_notify *b; 385 386 b = (struct mt7915_mcu_bcc_notify *)skb->data; 387 388 if (b->band_idx > MT_BAND1) 389 return; 390 391 if ((b->band_idx && !dev->phy.mt76->band_idx) && 392 dev->mt76.phys[MT_BAND1]) 393 mphy = dev->mt76.phys[MT_BAND1]; 394 395 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 396 IEEE80211_IFACE_ITER_RESUME_ALL, 397 mt7915_mcu_cca_finish, mphy->hw); 398 } 399 400 static void 401 mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) 402 { 403 struct mt76_connac2_mcu_rxd *rxd; 404 405 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 406 switch (rxd->ext_eid) { 407 case MCU_EXT_EVENT_THERMAL_PROTECT: 408 mt7915_mcu_rx_thermal_notify(dev, skb); 409 break; 410 case MCU_EXT_EVENT_RDD_REPORT: 411 mt7915_mcu_rx_radar_detected(dev, skb); 412 break; 413 case MCU_EXT_EVENT_CSA_NOTIFY: 414 mt7915_mcu_rx_csa_notify(dev, skb); 415 break; 416 case MCU_EXT_EVENT_FW_LOG_2_HOST: 417 mt7915_mcu_rx_log_message(dev, skb); 418 break; 419 case MCU_EXT_EVENT_BCC_NOTIFY: 420 mt7915_mcu_rx_bcc_notify(dev, skb); 421 break; 422 default: 423 break; 424 } 425 } 426 427 static void 428 mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb) 429 { 430 struct mt76_connac2_mcu_rxd *rxd; 431 432 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 433 switch (rxd->eid) { 434 case MCU_EVENT_EXT: 435 mt7915_mcu_rx_ext_event(dev, skb); 436 break; 437 default: 438 break; 439 } 440 dev_kfree_skb(skb); 441 } 442 443 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb) 444 { 445 struct mt76_connac2_mcu_rxd *rxd; 446 447 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 448 if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT || 449 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 450 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP || 451 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || 452 rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY || 453 !rxd->seq) && 454 !(rxd->eid == MCU_CMD_EXT_CID && 455 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT)) 456 mt7915_mcu_rx_unsolicited_event(dev, skb); 457 else 458 mt76_mcu_rx_event(&dev->mt76, skb); 459 } 460 461 static struct tlv * 462 mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len, 463 __le16 *sub_ntlv, __le16 *len) 464 { 465 struct tlv *ptlv, tlv = { 466 .tag = cpu_to_le16(sub_tag), 467 .len = cpu_to_le16(sub_len), 468 }; 469 470 ptlv = skb_put_zero(skb, sub_len); 471 memcpy(ptlv, &tlv, sizeof(tlv)); 472 473 le16_add_cpu(sub_ntlv, 1); 474 le16_add_cpu(len, sub_len); 475 476 return ptlv; 477 } 478 479 /** bss info **/ 480 struct mt7915_he_obss_narrow_bw_ru_data { 481 bool tolerated; 482 }; 483 484 static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy, 485 struct cfg80211_bss *bss, 486 void *_data) 487 { 488 struct mt7915_he_obss_narrow_bw_ru_data *data = _data; 489 const struct element *elem; 490 491 rcu_read_lock(); 492 elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY); 493 494 if (!elem || elem->datalen <= 10 || 495 !(elem->data[10] & 496 WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT)) 497 data->tolerated = false; 498 499 rcu_read_unlock(); 500 } 501 502 static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw, 503 struct ieee80211_vif *vif) 504 { 505 struct mt7915_he_obss_narrow_bw_ru_data iter_data = { 506 .tolerated = true, 507 }; 508 509 if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR)) 510 return false; 511 512 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper, 513 mt7915_check_he_obss_narrow_bw_ru_iter, 514 &iter_data); 515 516 /* 517 * If there is at least one AP on radar channel that cannot 518 * tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU. 519 */ 520 return !iter_data.tolerated; 521 } 522 523 static void 524 mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 525 struct mt7915_phy *phy) 526 { 527 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 528 struct bss_info_rf_ch *ch; 529 struct tlv *tlv; 530 int freq1 = chandef->center_freq1; 531 532 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch)); 533 534 ch = (struct bss_info_rf_ch *)tlv; 535 ch->pri_ch = chandef->chan->hw_value; 536 ch->center_ch0 = ieee80211_frequency_to_channel(freq1); 537 ch->bw = mt76_connac_chan_bw(chandef); 538 539 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 540 int freq2 = chandef->center_freq2; 541 542 ch->center_ch1 = ieee80211_frequency_to_channel(freq2); 543 } 544 545 if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) { 546 struct mt76_phy *mphy = phy->mt76; 547 548 ch->he_ru26_block = 549 mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif); 550 ch->he_all_disable = false; 551 } else { 552 ch->he_all_disable = true; 553 } 554 } 555 556 static void 557 mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 558 struct mt7915_phy *phy) 559 { 560 int max_nss = hweight8(phy->mt76->antenna_mask); 561 struct bss_info_ra *ra; 562 struct tlv *tlv; 563 564 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra)); 565 566 ra = (struct bss_info_ra *)tlv; 567 ra->op_mode = vif->type == NL80211_IFTYPE_AP; 568 ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC; 569 ra->short_preamble = true; 570 ra->tx_streams = max_nss; 571 ra->rx_streams = max_nss; 572 ra->algo = 4; 573 ra->train_up_rule = 2; 574 ra->train_up_high_thres = 110; 575 ra->train_up_rule_rssi = -70; 576 ra->low_traffic_thres = 2; 577 ra->phy_cap = cpu_to_le32(0xfdf); 578 ra->interval = cpu_to_le32(500); 579 ra->fast_interval = cpu_to_le32(100); 580 } 581 582 static void 583 mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 584 struct mt7915_phy *phy) 585 { 586 #define DEFAULT_HE_PE_DURATION 4 587 #define DEFAULT_HE_DURATION_RTS_THRES 1023 588 const struct ieee80211_sta_he_cap *cap; 589 struct bss_info_he *he; 590 struct tlv *tlv; 591 592 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 593 594 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he)); 595 596 he = (struct bss_info_he *)tlv; 597 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 598 if (!he->he_pe_duration) 599 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 600 601 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 602 if (!he->he_rts_thres) 603 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 604 605 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 606 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 607 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 608 } 609 610 static void 611 mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb) 612 { 613 #define TXD_CMP_MAP1 GENMASK(15, 0) 614 #define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23)) 615 struct bss_info_hw_amsdu *amsdu; 616 struct tlv *tlv; 617 618 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu)); 619 620 amsdu = (struct bss_info_hw_amsdu *)tlv; 621 amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1); 622 amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2); 623 amsdu->trig_thres = cpu_to_le16(2); 624 amsdu->enable = true; 625 } 626 627 static void 628 mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy) 629 { 630 struct bss_info_bmc_rate *bmc; 631 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 632 enum nl80211_band band = chandef->chan->band; 633 struct tlv *tlv; 634 635 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc)); 636 637 bmc = (struct bss_info_bmc_rate *)tlv; 638 if (band == NL80211_BAND_2GHZ) { 639 bmc->short_preamble = true; 640 } else { 641 bmc->bc_trans = cpu_to_le16(0x2000); 642 bmc->mc_trans = cpu_to_le16(0x2080); 643 } 644 } 645 646 static int 647 mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif, 648 bool bssid, bool enable) 649 { 650 struct mt7915_dev *dev = phy->dev; 651 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 652 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START; 653 u32 mask = phy->omac_mask >> 32 & ~BIT(idx); 654 const u8 *addr = vif->addr; 655 struct { 656 u8 mode; 657 u8 force_clear; 658 u8 clear_bitmap[8]; 659 u8 entry_count; 660 u8 write; 661 u8 band; 662 663 u8 index; 664 u8 bssid; 665 u8 addr[ETH_ALEN]; 666 } __packed req = { 667 .mode = !!mask || enable, 668 .entry_count = 1, 669 .write = 1, 670 .band = phy->mt76->band_idx, 671 .index = idx * 2 + bssid, 672 }; 673 674 if (bssid) 675 addr = vif->bss_conf.bssid; 676 677 if (enable) 678 ether_addr_copy(req.addr, addr); 679 680 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req, 681 sizeof(req), true); 682 } 683 684 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 685 struct ieee80211_vif *vif, int enable) 686 { 687 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 688 struct mt7915_dev *dev = phy->dev; 689 struct sk_buff *skb; 690 691 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { 692 mt7915_mcu_muar_config(phy, vif, false, enable); 693 mt7915_mcu_muar_config(phy, vif, true, enable); 694 } 695 696 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL, 697 MT7915_BSS_UPDATE_MAX_SIZE); 698 if (IS_ERR(skb)) 699 return PTR_ERR(skb); 700 701 /* bss_omac must be first */ 702 if (enable) 703 mt76_connac_mcu_bss_omac_tlv(skb, vif); 704 705 mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, 706 mvif->sta.wcid.idx, enable); 707 708 if (vif->type == NL80211_IFTYPE_MONITOR) 709 goto out; 710 711 if (enable) { 712 mt7915_mcu_bss_rfch_tlv(skb, vif, phy); 713 mt7915_mcu_bss_bmc_tlv(skb, phy); 714 mt7915_mcu_bss_ra_tlv(skb, vif, phy); 715 mt7915_mcu_bss_hw_amsdu_tlv(skb); 716 717 if (vif->bss_conf.he_support) 718 mt7915_mcu_bss_he_tlv(skb, vif, phy); 719 720 if (mvif->mt76.omac_idx >= EXT_BSSID_START && 721 mvif->mt76.omac_idx < REPEATER_BSSID_START) 722 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76); 723 } 724 out: 725 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 726 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 727 } 728 729 /** starec & wtbl **/ 730 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 731 struct ieee80211_ampdu_params *params, 732 bool enable) 733 { 734 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv; 735 struct mt7915_vif *mvif = msta->vif; 736 int ret; 737 738 mt76_worker_disable(&dev->mt76.tx_worker); 739 if (enable && !params->amsdu) 740 msta->wcid.amsdu = false; 741 ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 742 MCU_EXT_CMD(STA_REC_UPDATE), 743 enable, true); 744 mt76_worker_enable(&dev->mt76.tx_worker); 745 746 return ret; 747 } 748 749 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 750 struct ieee80211_ampdu_params *params, 751 bool enable) 752 { 753 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv; 754 struct mt7915_vif *mvif = msta->vif; 755 756 return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 757 MCU_EXT_CMD(STA_REC_UPDATE), 758 enable, false); 759 } 760 761 static void 762 mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, 763 struct ieee80211_vif *vif) 764 { 765 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 766 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 767 struct ieee80211_he_mcs_nss_supp mcs_map; 768 struct sta_rec_he *he; 769 struct tlv *tlv; 770 u32 cap = 0; 771 772 if (!sta->deflink.he_cap.has_he) 773 return; 774 775 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); 776 777 he = (struct sta_rec_he *)tlv; 778 779 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE) 780 cap |= STA_REC_HE_CAP_HTC; 781 782 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR) 783 cap |= STA_REC_HE_CAP_BSR; 784 785 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL) 786 cap |= STA_REC_HE_CAP_OM; 787 788 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU) 789 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU; 790 791 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR) 792 cap |= STA_REC_HE_CAP_BQR; 793 794 if (elem->phy_cap_info[0] & 795 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G | 796 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G)) 797 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT; 798 799 if (mvif->cap.he_ldpc && 800 (elem->phy_cap_info[1] & 801 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)) 802 cap |= STA_REC_HE_CAP_LDPC; 803 804 if (elem->phy_cap_info[1] & 805 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US) 806 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI; 807 808 if (elem->phy_cap_info[2] & 809 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US) 810 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI; 811 812 if (elem->phy_cap_info[2] & 813 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ) 814 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC; 815 816 if (elem->phy_cap_info[2] & 817 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) 818 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC; 819 820 if (elem->phy_cap_info[6] & 821 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB) 822 cap |= STA_REC_HE_CAP_TRIG_CQI_FK; 823 824 if (elem->phy_cap_info[6] & 825 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE) 826 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE; 827 828 if (elem->phy_cap_info[7] & 829 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI) 830 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI; 831 832 if (elem->phy_cap_info[7] & 833 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ) 834 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC; 835 836 if (elem->phy_cap_info[7] & 837 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ) 838 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC; 839 840 if (elem->phy_cap_info[8] & 841 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI) 842 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI; 843 844 if (elem->phy_cap_info[8] & 845 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI) 846 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI; 847 848 if (elem->phy_cap_info[9] & 849 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU) 850 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242; 851 852 if (elem->phy_cap_info[9] & 853 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU) 854 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242; 855 856 he->he_cap = cpu_to_le32(cap); 857 858 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 859 switch (sta->deflink.bandwidth) { 860 case IEEE80211_STA_RX_BW_160: 861 if (elem->phy_cap_info[0] & 862 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 863 mt7915_mcu_set_sta_he_mcs(sta, 864 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 865 le16_to_cpu(mcs_map.rx_mcs_80p80)); 866 867 mt7915_mcu_set_sta_he_mcs(sta, 868 &he->max_nss_mcs[CMD_HE_MCS_BW160], 869 le16_to_cpu(mcs_map.rx_mcs_160)); 870 fallthrough; 871 default: 872 mt7915_mcu_set_sta_he_mcs(sta, 873 &he->max_nss_mcs[CMD_HE_MCS_BW80], 874 le16_to_cpu(mcs_map.rx_mcs_80)); 875 break; 876 } 877 878 he->t_frame_dur = 879 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 880 he->max_ampdu_exp = 881 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]); 882 883 he->bw_set = 884 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]); 885 he->device_class = 886 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]); 887 he->punc_pream_rx = 888 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 889 890 he->dcm_tx_mode = 891 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]); 892 he->dcm_tx_max_nss = 893 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]); 894 he->dcm_rx_mode = 895 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]); 896 he->dcm_rx_max_nss = 897 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]); 898 he->dcm_rx_max_nss = 899 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]); 900 901 he->pkt_ext = 2; 902 } 903 904 static void 905 mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 906 struct ieee80211_sta *sta, struct ieee80211_vif *vif) 907 { 908 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 909 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 910 struct sta_rec_muru *muru; 911 struct tlv *tlv; 912 913 if (vif->type != NL80211_IFTYPE_STATION && 914 vif->type != NL80211_IFTYPE_AP) 915 return; 916 917 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 918 919 muru = (struct sta_rec_muru *)tlv; 920 921 muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || 922 mvif->cap.vht_mu_ebfer || 923 mvif->cap.vht_mu_ebfee; 924 if (!is_mt7915(&dev->mt76)) 925 muru->cfg.mimo_ul_en = true; 926 muru->cfg.ofdma_dl_en = true; 927 928 if (sta->deflink.vht_cap.vht_supported) 929 muru->mimo_dl.vht_mu_bfee = 930 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 931 932 if (!sta->deflink.he_cap.has_he) 933 return; 934 935 muru->mimo_dl.partial_bw_dl_mimo = 936 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 937 938 muru->mimo_ul.full_ul_mimo = 939 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 940 muru->mimo_ul.partial_ul_mimo = 941 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 942 943 muru->ofdma_dl.punc_pream_rx = 944 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 945 muru->ofdma_dl.he_20m_in_40m_2g = 946 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 947 muru->ofdma_dl.he_20m_in_160m = 948 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 949 muru->ofdma_dl.he_80m_in_160m = 950 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 951 952 muru->ofdma_ul.t_frame_dur = 953 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 954 muru->ofdma_ul.mu_cascading = 955 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 956 muru->ofdma_ul.uo_ra = 957 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 958 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 959 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 960 } 961 962 static void 963 mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 964 { 965 struct sta_rec_ht *ht; 966 struct tlv *tlv; 967 968 if (!sta->deflink.ht_cap.ht_supported) 969 return; 970 971 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 972 973 ht = (struct sta_rec_ht *)tlv; 974 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 975 } 976 977 static void 978 mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 979 { 980 struct sta_rec_vht *vht; 981 struct tlv *tlv; 982 983 if (!sta->deflink.vht_cap.vht_supported) 984 return; 985 986 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 987 988 vht = (struct sta_rec_vht *)tlv; 989 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 990 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 991 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 992 } 993 994 static void 995 mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 996 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 997 { 998 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 999 struct sta_rec_amsdu *amsdu; 1000 struct tlv *tlv; 1001 1002 if (vif->type != NL80211_IFTYPE_STATION && 1003 vif->type != NL80211_IFTYPE_AP) 1004 return; 1005 1006 if (!sta->deflink.agg.max_amsdu_len) 1007 return; 1008 1009 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1010 amsdu = (struct sta_rec_amsdu *)tlv; 1011 amsdu->max_amsdu_num = 8; 1012 amsdu->amsdu_en = true; 1013 msta->wcid.amsdu = true; 1014 1015 switch (sta->deflink.agg.max_amsdu_len) { 1016 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1017 if (!is_mt7915(&dev->mt76)) { 1018 amsdu->max_mpdu_size = 1019 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1020 return; 1021 } 1022 fallthrough; 1023 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1024 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1025 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1026 return; 1027 default: 1028 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1029 return; 1030 } 1031 } 1032 1033 static int 1034 mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1035 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1036 { 1037 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1038 struct mt7915_sta *msta; 1039 struct wtbl_req_hdr *wtbl_hdr; 1040 struct mt76_wcid *wcid; 1041 struct tlv *tlv; 1042 1043 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; 1044 wcid = sta ? &msta->wcid : NULL; 1045 1046 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); 1047 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, 1048 WTBL_RESET_AND_SET, tlv, 1049 &skb); 1050 if (IS_ERR(wtbl_hdr)) 1051 return PTR_ERR(wtbl_hdr); 1052 1053 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv, 1054 wtbl_hdr); 1055 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr); 1056 if (sta) 1057 mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv, 1058 wtbl_hdr, mvif->cap.ht_ldpc, 1059 mvif->cap.vht_ldpc); 1060 1061 return 0; 1062 } 1063 1064 static inline bool 1065 mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif, 1066 struct ieee80211_sta *sta, bool bfee) 1067 { 1068 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1069 int sts = hweight16(phy->mt76->chainmask); 1070 1071 if (vif->type != NL80211_IFTYPE_STATION && 1072 vif->type != NL80211_IFTYPE_AP) 1073 return false; 1074 1075 if (!bfee && sts < 2) 1076 return false; 1077 1078 if (sta->deflink.he_cap.has_he) { 1079 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1080 1081 if (bfee) 1082 return mvif->cap.he_su_ebfee && 1083 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1084 else 1085 return mvif->cap.he_su_ebfer && 1086 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1087 } 1088 1089 if (sta->deflink.vht_cap.vht_supported) { 1090 u32 cap = sta->deflink.vht_cap.cap; 1091 1092 if (bfee) 1093 return mvif->cap.vht_su_ebfee && 1094 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1095 else 1096 return mvif->cap.vht_su_ebfer && 1097 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1098 } 1099 1100 return false; 1101 } 1102 1103 static void 1104 mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf) 1105 { 1106 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1107 bf->ndp_rate = 0; /* mcs0 */ 1108 bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1109 bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1110 } 1111 1112 static void 1113 mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy, 1114 struct sta_rec_bf *bf) 1115 { 1116 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1117 u8 n = 0; 1118 1119 bf->tx_mode = MT_PHY_TYPE_HT; 1120 1121 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1122 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1123 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1124 mcs->tx_params); 1125 else if (mcs->rx_mask[3]) 1126 n = 3; 1127 else if (mcs->rx_mask[2]) 1128 n = 2; 1129 else if (mcs->rx_mask[1]) 1130 n = 1; 1131 1132 bf->nrow = hweight8(phy->mt76->chainmask) - 1; 1133 bf->ncol = min_t(u8, bf->nrow, n); 1134 bf->ibf_ncol = n; 1135 } 1136 1137 static void 1138 mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy, 1139 struct sta_rec_bf *bf, bool explicit) 1140 { 1141 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1142 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1143 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1144 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1145 u8 tx_ant = hweight8(phy->mt76->chainmask) - 1; 1146 1147 bf->tx_mode = MT_PHY_TYPE_VHT; 1148 1149 if (explicit) { 1150 u8 sts, snd_dim; 1151 1152 mt7915_mcu_sta_sounding_rate(bf); 1153 1154 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1155 pc->cap); 1156 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1157 vc->cap); 1158 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1159 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1160 bf->ibf_ncol = bf->ncol; 1161 1162 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1163 bf->nrow = 1; 1164 } else { 1165 bf->nrow = tx_ant; 1166 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1167 bf->ibf_ncol = nss_mcs; 1168 1169 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1170 bf->ibf_nrow = 1; 1171 } 1172 } 1173 1174 static void 1175 mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1176 struct mt7915_phy *phy, struct sta_rec_bf *bf) 1177 { 1178 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1179 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1180 const struct ieee80211_sta_he_cap *vc = 1181 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1182 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1183 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1184 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1185 u8 snd_dim, sts; 1186 1187 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1188 1189 mt7915_mcu_sta_sounding_rate(bf); 1190 1191 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1192 pe->phy_cap_info[6]); 1193 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1194 pe->phy_cap_info[6]); 1195 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1196 ve->phy_cap_info[5]); 1197 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1198 pe->phy_cap_info[4]); 1199 bf->nrow = min_t(u8, snd_dim, sts); 1200 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1201 bf->ibf_ncol = bf->ncol; 1202 1203 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1204 return; 1205 1206 /* go over for 160MHz and 80p80 */ 1207 if (pe->phy_cap_info[0] & 1208 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1209 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1210 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1211 1212 bf->ncol_gt_bw80 = nss_mcs; 1213 } 1214 1215 if (pe->phy_cap_info[0] & 1216 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1217 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1218 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1219 1220 if (bf->ncol_gt_bw80) 1221 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1222 else 1223 bf->ncol_gt_bw80 = nss_mcs; 1224 } 1225 1226 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1227 ve->phy_cap_info[5]); 1228 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1229 pe->phy_cap_info[4]); 1230 1231 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1232 } 1233 1234 static void 1235 mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1236 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1237 { 1238 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1239 struct mt7915_phy *phy = mvif->phy; 1240 int tx_ant = hweight8(phy->mt76->chainmask) - 1; 1241 struct sta_rec_bf *bf; 1242 struct tlv *tlv; 1243 static const u8 matrix[4][4] = { 1244 {0, 0, 0, 0}, 1245 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1246 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1247 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1248 }; 1249 bool ebf; 1250 1251 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1252 return; 1253 1254 ebf = mt7915_is_ebf_supported(phy, vif, sta, false); 1255 if (!ebf && !dev->ibf) 1256 return; 1257 1258 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1259 bf = (struct sta_rec_bf *)tlv; 1260 1261 /* he: eBF only, in accordance with spec 1262 * vht: support eBF and iBF 1263 * ht: iBF only, since mac80211 lacks of eBF support 1264 */ 1265 if (sta->deflink.he_cap.has_he && ebf) 1266 mt7915_mcu_sta_bfer_he(sta, vif, phy, bf); 1267 else if (sta->deflink.vht_cap.vht_supported) 1268 mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1269 else if (sta->deflink.ht_cap.ht_supported) 1270 mt7915_mcu_sta_bfer_ht(sta, phy, bf); 1271 else 1272 return; 1273 1274 bf->bf_cap = ebf ? ebf : dev->ibf << 1; 1275 bf->bw = sta->deflink.bandwidth; 1276 bf->ibf_dbw = sta->deflink.bandwidth; 1277 bf->ibf_nrow = tx_ant; 1278 1279 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1280 bf->ibf_timeout = 0x48; 1281 else 1282 bf->ibf_timeout = 0x18; 1283 1284 if (ebf && bf->nrow != tx_ant) 1285 bf->mem_20m = matrix[tx_ant][bf->ncol]; 1286 else 1287 bf->mem_20m = matrix[bf->nrow][bf->ncol]; 1288 1289 switch (sta->deflink.bandwidth) { 1290 case IEEE80211_STA_RX_BW_160: 1291 case IEEE80211_STA_RX_BW_80: 1292 bf->mem_total = bf->mem_20m * 2; 1293 break; 1294 case IEEE80211_STA_RX_BW_40: 1295 bf->mem_total = bf->mem_20m; 1296 break; 1297 case IEEE80211_STA_RX_BW_20: 1298 default: 1299 break; 1300 } 1301 } 1302 1303 static void 1304 mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1305 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1306 { 1307 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1308 struct mt7915_phy *phy = mvif->phy; 1309 int tx_ant = hweight8(phy->mt76->chainmask) - 1; 1310 struct sta_rec_bfee *bfee; 1311 struct tlv *tlv; 1312 u8 nrow = 0; 1313 1314 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1315 return; 1316 1317 if (!mt7915_is_ebf_supported(phy, vif, sta, true)) 1318 return; 1319 1320 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1321 bfee = (struct sta_rec_bfee *)tlv; 1322 1323 if (sta->deflink.he_cap.has_he) { 1324 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1325 1326 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1327 pe->phy_cap_info[5]); 1328 } else if (sta->deflink.vht_cap.vht_supported) { 1329 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1330 1331 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1332 pc->cap); 1333 } 1334 1335 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1336 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1337 } 1338 1339 static enum mcu_mmps_mode 1340 mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1341 { 1342 switch (smps) { 1343 case IEEE80211_SMPS_OFF: 1344 return MCU_MMPS_DISABLE; 1345 case IEEE80211_SMPS_STATIC: 1346 return MCU_MMPS_STATIC; 1347 case IEEE80211_SMPS_DYNAMIC: 1348 return MCU_MMPS_DYNAMIC; 1349 default: 1350 return MCU_MMPS_DISABLE; 1351 } 1352 } 1353 1354 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, 1355 struct ieee80211_vif *vif, 1356 struct ieee80211_sta *sta, 1357 void *data, u32 field) 1358 { 1359 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1360 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1361 struct sta_phy *phy = data; 1362 struct sta_rec_ra_fixed *ra; 1363 struct sk_buff *skb; 1364 struct tlv *tlv; 1365 1366 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1367 &msta->wcid); 1368 if (IS_ERR(skb)) 1369 return PTR_ERR(skb); 1370 1371 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1372 ra = (struct sta_rec_ra_fixed *)tlv; 1373 1374 switch (field) { 1375 case RATE_PARAM_AUTO: 1376 break; 1377 case RATE_PARAM_FIXED: 1378 case RATE_PARAM_FIXED_MCS: 1379 case RATE_PARAM_FIXED_GI: 1380 case RATE_PARAM_FIXED_HE_LTF: 1381 if (phy) 1382 ra->phy = *phy; 1383 break; 1384 case RATE_PARAM_MMPS_UPDATE: 1385 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode); 1386 break; 1387 case RATE_PARAM_SPE_UPDATE: 1388 ra->spe_idx = *(u8 *)data; 1389 break; 1390 default: 1391 break; 1392 } 1393 ra->field = cpu_to_le32(field); 1394 1395 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1396 MCU_EXT_CMD(STA_REC_UPDATE), true); 1397 } 1398 1399 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1400 struct ieee80211_sta *sta) 1401 { 1402 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1403 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1404 struct wtbl_req_hdr *wtbl_hdr; 1405 struct tlv *sta_wtbl; 1406 struct sk_buff *skb; 1407 int ret; 1408 1409 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1410 &msta->wcid); 1411 if (IS_ERR(skb)) 1412 return PTR_ERR(skb); 1413 1414 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1415 sizeof(struct tlv)); 1416 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, 1417 WTBL_SET, sta_wtbl, &skb); 1418 if (IS_ERR(wtbl_hdr)) 1419 return PTR_ERR(wtbl_hdr); 1420 1421 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr); 1422 1423 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1424 MCU_EXT_CMD(STA_REC_UPDATE), true); 1425 if (ret) 1426 return ret; 1427 1428 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL, 1429 RATE_PARAM_MMPS_UPDATE); 1430 } 1431 1432 static int 1433 mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1434 struct ieee80211_sta *sta) 1435 { 1436 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1437 struct mt76_phy *mphy = mvif->phy->mt76; 1438 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask); 1439 1440 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx, 1441 RATE_PARAM_SPE_UPDATE); 1442 } 1443 1444 static int 1445 mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev, 1446 struct ieee80211_vif *vif, 1447 struct ieee80211_sta *sta) 1448 { 1449 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1450 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1451 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1452 enum nl80211_band band = chandef->chan->band; 1453 struct sta_phy phy = {}; 1454 int ret, nrates = 0; 1455 1456 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1457 do { \ 1458 u8 i, gi = mask->control[band]._gi; \ 1459 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1460 for (i = 0; i <= sta->deflink.bandwidth; i++) { \ 1461 phy.sgi |= gi << (i << (_he)); \ 1462 phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\ 1463 } \ 1464 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1465 if (!mask->control[band]._mcs[i]) \ 1466 continue; \ 1467 nrates += hweight16(mask->control[band]._mcs[i]); \ 1468 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1469 if (_ht) \ 1470 phy.mcs += 8 * i; \ 1471 } \ 1472 } while (0) 1473 1474 if (sta->deflink.he_cap.has_he) { 1475 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1476 } else if (sta->deflink.vht_cap.vht_supported) { 1477 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1478 } else if (sta->deflink.ht_cap.ht_supported) { 1479 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1480 } else { 1481 nrates = hweight32(mask->control[band].legacy); 1482 phy.mcs = ffs(mask->control[band].legacy) - 1; 1483 } 1484 #undef __sta_phy_bitrate_mask_check 1485 1486 /* fall back to auto rate control */ 1487 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1488 mask->control[band].he_gi == GENMASK(7, 0) && 1489 mask->control[band].he_ltf == GENMASK(7, 0) && 1490 nrates != 1) 1491 return 0; 1492 1493 /* fixed single rate */ 1494 if (nrates == 1) { 1495 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, 1496 RATE_PARAM_FIXED_MCS); 1497 if (ret) 1498 return ret; 1499 } 1500 1501 /* fixed GI */ 1502 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 1503 mask->control[band].he_gi != GENMASK(7, 0)) { 1504 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1505 u32 addr; 1506 1507 /* firmware updates only TXCMD but doesn't take WTBL into 1508 * account, so driver should update here to reflect the 1509 * actual txrate hardware sends out. 1510 */ 1511 addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); 1512 if (sta->deflink.he_cap.has_he) 1513 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 1514 else 1515 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 1516 1517 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, 1518 RATE_PARAM_FIXED_GI); 1519 if (ret) 1520 return ret; 1521 } 1522 1523 /* fixed HE_LTF */ 1524 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 1525 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, 1526 RATE_PARAM_FIXED_HE_LTF); 1527 if (ret) 1528 return ret; 1529 } 1530 1531 return mt7915_mcu_set_spe_idx(dev, vif, sta); 1532 } 1533 1534 static void 1535 mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, 1536 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1537 { 1538 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1539 struct mt76_phy *mphy = mvif->phy->mt76; 1540 struct cfg80211_chan_def *chandef = &mphy->chandef; 1541 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1542 enum nl80211_band band = chandef->chan->band; 1543 struct sta_rec_ra *ra; 1544 struct tlv *tlv; 1545 u32 supp_rate = sta->deflink.supp_rates[band]; 1546 u32 cap = sta->wme ? STA_CAP_WMM : 0; 1547 1548 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 1549 ra = (struct sta_rec_ra *)tlv; 1550 1551 ra->valid = true; 1552 ra->auto_rate = true; 1553 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink); 1554 ra->channel = chandef->chan->hw_value; 1555 ra->bw = sta->deflink.bandwidth; 1556 ra->phy.bw = sta->deflink.bandwidth; 1557 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode); 1558 1559 if (supp_rate) { 1560 supp_rate &= mask->control[band].legacy; 1561 ra->rate_len = hweight32(supp_rate); 1562 1563 if (band == NL80211_BAND_2GHZ) { 1564 ra->supp_mode = MODE_CCK; 1565 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 1566 1567 if (ra->rate_len > 4) { 1568 ra->supp_mode |= MODE_OFDM; 1569 ra->supp_ofdm_rate = supp_rate >> 4; 1570 } 1571 } else { 1572 ra->supp_mode = MODE_OFDM; 1573 ra->supp_ofdm_rate = supp_rate; 1574 } 1575 } 1576 1577 if (sta->deflink.ht_cap.ht_supported) { 1578 ra->supp_mode |= MODE_HT; 1579 ra->af = sta->deflink.ht_cap.ampdu_factor; 1580 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 1581 1582 cap |= STA_CAP_HT; 1583 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1584 cap |= STA_CAP_SGI_20; 1585 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1586 cap |= STA_CAP_SGI_40; 1587 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 1588 cap |= STA_CAP_TX_STBC; 1589 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1590 cap |= STA_CAP_RX_STBC; 1591 if (mvif->cap.ht_ldpc && 1592 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 1593 cap |= STA_CAP_LDPC; 1594 1595 mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 1596 mask->control[band].ht_mcs); 1597 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 1598 } 1599 1600 if (sta->deflink.vht_cap.vht_supported) { 1601 u8 af; 1602 1603 ra->supp_mode |= MODE_VHT; 1604 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1605 sta->deflink.vht_cap.cap); 1606 ra->af = max_t(u8, ra->af, af); 1607 1608 cap |= STA_CAP_VHT; 1609 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1610 cap |= STA_CAP_VHT_SGI_80; 1611 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1612 cap |= STA_CAP_VHT_SGI_160; 1613 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 1614 cap |= STA_CAP_VHT_TX_STBC; 1615 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 1616 cap |= STA_CAP_VHT_RX_STBC; 1617 if (mvif->cap.vht_ldpc && 1618 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 1619 cap |= STA_CAP_VHT_LDPC; 1620 1621 mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 1622 mask->control[band].vht_mcs); 1623 } 1624 1625 if (sta->deflink.he_cap.has_he) { 1626 ra->supp_mode |= MODE_HE; 1627 cap |= STA_CAP_HE; 1628 1629 if (sta->deflink.he_6ghz_capa.capa) 1630 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1631 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1632 } 1633 1634 ra->sta_cap = cpu_to_le32(cap); 1635 } 1636 1637 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1638 struct ieee80211_sta *sta, bool changed) 1639 { 1640 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1641 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1642 struct sk_buff *skb; 1643 int ret; 1644 1645 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1646 &msta->wcid); 1647 if (IS_ERR(skb)) 1648 return PTR_ERR(skb); 1649 1650 /* firmware rc algorithm refers to sta_rec_he for HE control. 1651 * once dev->rc_work changes the settings driver should also 1652 * update sta_rec_he here. 1653 */ 1654 if (changed) 1655 mt7915_mcu_sta_he_tlv(skb, sta, vif); 1656 1657 /* sta_rec_ra accommodates BW, NSS and only MCS range format 1658 * i.e 0-{7,8,9} for VHT. 1659 */ 1660 mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 1661 1662 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1663 MCU_EXT_CMD(STA_REC_UPDATE), true); 1664 if (ret) 1665 return ret; 1666 1667 /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE, 1668 * and updates as peer fixed rate parameters, which overrides 1669 * sta_rec_ra and firmware rate control algorithm. 1670 */ 1671 return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta); 1672 } 1673 1674 static int 1675 mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1676 struct ieee80211_sta *sta) 1677 { 1678 #define MT_STA_BSS_GROUP 1 1679 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1680 struct mt7915_sta *msta; 1681 struct { 1682 __le32 action; 1683 u8 wlan_idx_lo; 1684 u8 status; 1685 u8 wlan_idx_hi; 1686 u8 rsv0[5]; 1687 __le32 val; 1688 u8 rsv1[8]; 1689 } __packed req = { 1690 .action = cpu_to_le32(MT_STA_BSS_GROUP), 1691 .val = cpu_to_le32(mvif->mt76.idx % 16), 1692 }; 1693 1694 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; 1695 req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx); 1696 req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx); 1697 1698 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req, 1699 sizeof(req), true); 1700 } 1701 1702 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1703 struct ieee80211_sta *sta, int conn_state, bool newly) 1704 { 1705 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1706 struct ieee80211_link_sta *link_sta; 1707 struct mt7915_sta *msta; 1708 struct sk_buff *skb; 1709 int ret; 1710 1711 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; 1712 link_sta = sta ? &sta->deflink : NULL; 1713 1714 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1715 &msta->wcid); 1716 if (IS_ERR(skb)) 1717 return PTR_ERR(skb); 1718 1719 /* starec basic */ 1720 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta, 1721 conn_state, newly); 1722 /* tag order is in accordance with firmware dependency. */ 1723 if (sta && conn_state != CONN_STATE_DISCONNECT) { 1724 /* starec bfer */ 1725 mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta); 1726 /* starec ht */ 1727 mt7915_mcu_sta_ht_tlv(skb, sta); 1728 /* starec vht */ 1729 mt7915_mcu_sta_vht_tlv(skb, sta); 1730 /* starec uapsd */ 1731 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 1732 } 1733 1734 if (newly || conn_state != CONN_STATE_DISCONNECT) { 1735 ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta); 1736 if (ret) { 1737 dev_kfree_skb(skb); 1738 return ret; 1739 } 1740 } 1741 1742 if (conn_state == CONN_STATE_DISCONNECT) 1743 goto out; 1744 1745 if (sta) { 1746 /* starec amsdu */ 1747 mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 1748 /* starec he */ 1749 mt7915_mcu_sta_he_tlv(skb, sta, vif); 1750 /* starec muru */ 1751 mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif); 1752 /* starec bfee */ 1753 mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta); 1754 } 1755 1756 ret = mt7915_mcu_add_group(dev, vif, sta); 1757 if (ret) { 1758 dev_kfree_skb(skb); 1759 return ret; 1760 } 1761 out: 1762 ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb); 1763 if (ret) 1764 return ret; 1765 1766 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1767 MCU_EXT_CMD(STA_REC_UPDATE), true); 1768 } 1769 1770 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev) 1771 { 1772 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1773 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; 1774 struct { 1775 __le32 args[2]; 1776 } req = { 1777 .args[0] = cpu_to_le32(1), 1778 .args[1] = cpu_to_le32(6), 1779 }; 1780 1781 return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL, 1782 &req, sizeof(req)); 1783 #else 1784 return 0; 1785 #endif 1786 } 1787 1788 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy, 1789 struct ieee80211_vif *vif, bool enable) 1790 { 1791 struct mt7915_dev *dev = phy->dev; 1792 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1793 struct { 1794 struct req_hdr { 1795 u8 omac_idx; 1796 u8 band_idx; 1797 __le16 tlv_num; 1798 u8 is_tlv_append; 1799 u8 rsv[3]; 1800 } __packed hdr; 1801 struct req_tlv { 1802 __le16 tag; 1803 __le16 len; 1804 u8 active; 1805 u8 band_idx; 1806 u8 omac_addr[ETH_ALEN]; 1807 } __packed tlv; 1808 } data = { 1809 .hdr = { 1810 .omac_idx = mvif->mt76.omac_idx, 1811 .band_idx = mvif->mt76.band_idx, 1812 .tlv_num = cpu_to_le16(1), 1813 .is_tlv_append = 1, 1814 }, 1815 .tlv = { 1816 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1817 .len = cpu_to_le16(sizeof(struct req_tlv)), 1818 .active = enable, 1819 .band_idx = mvif->mt76.band_idx, 1820 }, 1821 }; 1822 1823 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) 1824 return mt7915_mcu_muar_config(phy, vif, false, enable); 1825 1826 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 1827 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE), 1828 &data, sizeof(data), true); 1829 } 1830 1831 static void 1832 mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, 1833 struct sk_buff *skb, struct bss_info_bcn *bcn, 1834 struct ieee80211_mutable_offsets *offs) 1835 { 1836 struct bss_info_bcn_cntdwn *info; 1837 struct tlv *tlv; 1838 int sub_tag; 1839 1840 if (!offs->cntdwn_counter_offs[0]) 1841 return; 1842 1843 sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC; 1844 tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info), 1845 &bcn->sub_ntlv, &bcn->len); 1846 info = (struct bss_info_bcn_cntdwn *)tlv; 1847 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 1848 } 1849 1850 static void 1851 mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 1852 struct ieee80211_vif *vif, struct bss_info_bcn *bcn, 1853 struct ieee80211_mutable_offsets *offs) 1854 { 1855 struct bss_info_bcn_mbss *mbss; 1856 const struct element *elem; 1857 struct tlv *tlv; 1858 1859 if (!vif->bss_conf.bssid_indicator) 1860 return; 1861 1862 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID, 1863 sizeof(*mbss), &bcn->sub_ntlv, 1864 &bcn->len); 1865 1866 mbss = (struct bss_info_bcn_mbss *)tlv; 1867 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 1868 mbss->bitmap = cpu_to_le32(1); 1869 1870 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 1871 &skb->data[offs->mbssid_off], 1872 skb->len - offs->mbssid_off) { 1873 const struct element *sub_elem; 1874 1875 if (elem->datalen < 2) 1876 continue; 1877 1878 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 1879 const struct ieee80211_bssid_index *idx; 1880 const u8 *idx_ie; 1881 1882 if (sub_elem->id || sub_elem->datalen < 4) 1883 continue; /* not a valid BSS profile */ 1884 1885 /* Find WLAN_EID_MULTI_BSSID_IDX 1886 * in the merged nontransmitted profile 1887 */ 1888 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 1889 sub_elem->data, 1890 sub_elem->datalen); 1891 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 1892 continue; 1893 1894 idx = (void *)(idx_ie + 2); 1895 if (!idx->bssid_index || idx->bssid_index > 31) 1896 continue; 1897 1898 mbss->offset[idx->bssid_index] = 1899 cpu_to_le16(idx_ie - skb->data); 1900 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 1901 } 1902 } 1903 } 1904 1905 static void 1906 mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1907 struct sk_buff *rskb, struct sk_buff *skb, 1908 struct bss_info_bcn *bcn, 1909 struct ieee80211_mutable_offsets *offs) 1910 { 1911 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1912 struct bss_info_bcn_cont *cont; 1913 struct tlv *tlv; 1914 u8 *buf; 1915 int len = sizeof(*cont) + MT_TXD_SIZE + skb->len; 1916 1917 len = (len & 0x3) ? ((len | 0x3) + 1) : len; 1918 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT, 1919 len, &bcn->sub_ntlv, &bcn->len); 1920 1921 cont = (struct bss_info_bcn_cont *)tlv; 1922 cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 1923 cont->tim_ofs = cpu_to_le16(offs->tim_offset); 1924 1925 if (offs->cntdwn_counter_offs[0]) { 1926 u16 offset = offs->cntdwn_counter_offs[0]; 1927 1928 if (vif->bss_conf.csa_active) 1929 cont->csa_ofs = cpu_to_le16(offset - 4); 1930 if (vif->bss_conf.color_change_active) 1931 cont->bcc_ofs = cpu_to_le16(offset - 3); 1932 } 1933 1934 buf = (u8 *)tlv + sizeof(*cont); 1935 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL, 1936 0, BSS_CHANGED_BEACON); 1937 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 1938 } 1939 1940 int 1941 mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1942 u32 changed) 1943 { 1944 #define OFFLOAD_TX_MODE_SU BIT(0) 1945 #define OFFLOAD_TX_MODE_MU BIT(1) 1946 struct ieee80211_hw *hw = mt76_hw(dev); 1947 struct mt7915_phy *phy = mt7915_hw_phy(hw); 1948 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1949 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1950 enum nl80211_band band = chandef->chan->band; 1951 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1952 struct bss_info_bcn *bcn; 1953 struct bss_info_inband_discovery *discov; 1954 struct ieee80211_tx_info *info; 1955 struct sk_buff *rskb, *skb = NULL; 1956 struct tlv *tlv, *sub_tlv; 1957 bool ext_phy = phy != &dev->phy; 1958 u8 *buf, interval; 1959 int len; 1960 1961 if (vif->bss_conf.nontransmitted) 1962 return 0; 1963 1964 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL, 1965 MT7915_MAX_BSS_OFFLOAD_SIZE); 1966 if (IS_ERR(rskb)) 1967 return PTR_ERR(rskb); 1968 1969 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn)); 1970 bcn = (struct bss_info_bcn *)tlv; 1971 bcn->enable = true; 1972 1973 if (changed & BSS_CHANGED_FILS_DISCOVERY) { 1974 interval = vif->bss_conf.fils_discovery.max_interval; 1975 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 1976 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 1977 vif->bss_conf.unsol_bcast_probe_resp_interval) { 1978 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 1979 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 1980 } 1981 1982 if (!skb) { 1983 dev_kfree_skb(rskb); 1984 return -EINVAL; 1985 } 1986 1987 info = IEEE80211_SKB_CB(skb); 1988 info->control.vif = vif; 1989 info->band = band; 1990 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy); 1991 1992 len = sizeof(*discov) + MT_TXD_SIZE + skb->len; 1993 len = (len & 0x3) ? ((len | 0x3) + 1) : len; 1994 1995 if (skb->len > MT7915_MAX_BEACON_SIZE) { 1996 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 1997 dev_kfree_skb(rskb); 1998 dev_kfree_skb(skb); 1999 return -EINVAL; 2000 } 2001 2002 sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV, 2003 len, &bcn->sub_ntlv, &bcn->len); 2004 discov = (struct bss_info_inband_discovery *)sub_tlv; 2005 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2006 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2007 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2008 discov->tx_interval = interval; 2009 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2010 discov->enable = !!interval; 2011 2012 buf = (u8 *)sub_tlv + sizeof(*discov); 2013 2014 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL, 2015 0, changed); 2016 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2017 2018 dev_kfree_skb(skb); 2019 2020 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 2021 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 2022 } 2023 2024 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2025 int en, u32 changed) 2026 { 2027 struct mt7915_dev *dev = mt7915_hw_dev(hw); 2028 struct mt7915_phy *phy = mt7915_hw_phy(hw); 2029 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 2030 struct ieee80211_mutable_offsets offs; 2031 struct ieee80211_tx_info *info; 2032 struct sk_buff *skb, *rskb; 2033 struct tlv *tlv; 2034 struct bss_info_bcn *bcn; 2035 int len = MT7915_MAX_BSS_OFFLOAD_SIZE; 2036 bool ext_phy = phy != &dev->phy; 2037 2038 if (vif->bss_conf.nontransmitted) 2039 return 0; 2040 2041 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 2042 NULL, len); 2043 if (IS_ERR(rskb)) 2044 return PTR_ERR(rskb); 2045 2046 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn)); 2047 bcn = (struct bss_info_bcn *)tlv; 2048 bcn->enable = en; 2049 2050 if (!en) 2051 goto out; 2052 2053 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0); 2054 if (!skb) { 2055 dev_kfree_skb(rskb); 2056 return -EINVAL; 2057 } 2058 2059 if (skb->len > MT7915_MAX_BEACON_SIZE) { 2060 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2061 dev_kfree_skb(rskb); 2062 dev_kfree_skb(skb); 2063 return -EINVAL; 2064 } 2065 2066 info = IEEE80211_SKB_CB(skb); 2067 info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy); 2068 2069 mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs); 2070 mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs); 2071 mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); 2072 dev_kfree_skb(skb); 2073 2074 out: 2075 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 2076 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 2077 } 2078 2079 static int mt7915_driver_own(struct mt7915_dev *dev, u8 band) 2080 { 2081 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2082 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2083 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2084 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2085 return -EIO; 2086 } 2087 2088 /* clear irq when the driver own success */ 2089 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2090 MT_TOP_LPCR_HOST_BAND_STAT); 2091 2092 return 0; 2093 } 2094 2095 static int 2096 mt7915_firmware_state(struct mt7915_dev *dev, bool wa) 2097 { 2098 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2099 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2100 2101 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2102 state, 1000)) { 2103 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2104 return -EIO; 2105 } 2106 return 0; 2107 } 2108 2109 static int mt7915_load_firmware(struct mt7915_dev *dev) 2110 { 2111 int ret; 2112 2113 /* make sure fw is download state */ 2114 if (mt7915_firmware_state(dev, false)) { 2115 /* restart firmware once */ 2116 mt76_connac_mcu_restart(&dev->mt76); 2117 ret = mt7915_firmware_state(dev, false); 2118 if (ret) { 2119 dev_err(dev->mt76.dev, 2120 "Firmware is not ready for download\n"); 2121 return ret; 2122 } 2123 } 2124 2125 ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH)); 2126 if (ret) 2127 return ret; 2128 2129 ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM), 2130 fw_name(dev, FIRMWARE_WA)); 2131 if (ret) 2132 return ret; 2133 2134 ret = mt7915_firmware_state(dev, true); 2135 if (ret) 2136 return ret; 2137 2138 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2139 2140 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2141 2142 return 0; 2143 } 2144 2145 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl) 2146 { 2147 struct { 2148 u8 ctrl_val; 2149 u8 pad[3]; 2150 } data = { 2151 .ctrl_val = ctrl 2152 }; 2153 2154 if (type == MCU_FW_LOG_WA) 2155 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST), 2156 &data, sizeof(data), true); 2157 2158 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data, 2159 sizeof(data), true); 2160 } 2161 2162 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level) 2163 { 2164 struct { 2165 u8 ver; 2166 u8 pad; 2167 __le16 len; 2168 u8 level; 2169 u8 rsv[3]; 2170 __le32 module_idx; 2171 } data = { 2172 .module_idx = cpu_to_le32(module), 2173 .level = level, 2174 }; 2175 2176 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data, 2177 sizeof(data), false); 2178 } 2179 2180 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled) 2181 { 2182 struct { 2183 __le32 cmd; 2184 u8 enable; 2185 } data = { 2186 .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN), 2187 .enable = enabled, 2188 }; 2189 2190 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data, 2191 sizeof(data), false); 2192 } 2193 2194 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy) 2195 { 2196 struct mt7915_dev *dev = phy->dev; 2197 struct sk_buff *skb; 2198 struct mt7915_mcu_muru_stats *mu_stats; 2199 int ret; 2200 2201 struct { 2202 __le32 cmd; 2203 u8 band_idx; 2204 } req = { 2205 .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS), 2206 .band_idx = phy->mt76->band_idx, 2207 }; 2208 2209 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), 2210 &req, sizeof(req), true, &skb); 2211 if (ret) 2212 return ret; 2213 2214 mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data); 2215 2216 /* accumulate stats, these are clear-on-read */ 2217 #define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s) 2218 #define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s) 2219 __dl_u32(cck_cnt); 2220 __dl_u32(ofdm_cnt); 2221 __dl_u32(htmix_cnt); 2222 __dl_u32(htgf_cnt); 2223 __dl_u32(vht_su_cnt); 2224 __dl_u32(vht_2mu_cnt); 2225 __dl_u32(vht_3mu_cnt); 2226 __dl_u32(vht_4mu_cnt); 2227 __dl_u32(he_su_cnt); 2228 __dl_u32(he_2ru_cnt); 2229 __dl_u32(he_2mu_cnt); 2230 __dl_u32(he_3ru_cnt); 2231 __dl_u32(he_3mu_cnt); 2232 __dl_u32(he_4ru_cnt); 2233 __dl_u32(he_4mu_cnt); 2234 __dl_u32(he_5to8ru_cnt); 2235 __dl_u32(he_9to16ru_cnt); 2236 __dl_u32(he_gtr16ru_cnt); 2237 2238 __ul_u32(hetrig_su_cnt); 2239 __ul_u32(hetrig_2ru_cnt); 2240 __ul_u32(hetrig_3ru_cnt); 2241 __ul_u32(hetrig_4ru_cnt); 2242 __ul_u32(hetrig_5to8ru_cnt); 2243 __ul_u32(hetrig_9to16ru_cnt); 2244 __ul_u32(hetrig_gtr16ru_cnt); 2245 __ul_u32(hetrig_2mu_cnt); 2246 __ul_u32(hetrig_3mu_cnt); 2247 __ul_u32(hetrig_4mu_cnt); 2248 #undef __dl_u32 2249 #undef __ul_u32 2250 2251 dev_kfree_skb(skb); 2252 2253 return 0; 2254 } 2255 2256 static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled) 2257 { 2258 struct { 2259 u8 enable; 2260 u8 _rsv[3]; 2261 } __packed req = { 2262 .enable = enabled 2263 }; 2264 2265 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 2266 sizeof(req), false); 2267 } 2268 2269 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val) 2270 { 2271 struct { 2272 __le32 cmd; 2273 u8 val[4]; 2274 } __packed req = { 2275 .cmd = cpu_to_le32(cmd), 2276 }; 2277 2278 put_unaligned_le32(val, req.val); 2279 2280 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, 2281 sizeof(req), false); 2282 } 2283 2284 static int 2285 mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev) 2286 { 2287 #define RX_AIRTIME_FEATURE_CTRL 1 2288 #define RX_AIRTIME_BITWISE_CTRL 2 2289 #define RX_AIRTIME_CLEAR_EN 1 2290 struct { 2291 __le16 field; 2292 __le16 sub_field; 2293 __le32 set_status; 2294 __le32 get_status; 2295 u8 _rsv[12]; 2296 2297 bool airtime_en; 2298 bool mibtime_en; 2299 bool earlyend_en; 2300 u8 _rsv1[9]; 2301 2302 bool airtime_clear; 2303 bool mibtime_clear; 2304 u8 _rsv2[98]; 2305 } __packed req = { 2306 .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL), 2307 .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN), 2308 .airtime_clear = true, 2309 }; 2310 int ret; 2311 2312 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req, 2313 sizeof(req), true); 2314 if (ret) 2315 return ret; 2316 2317 req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL); 2318 req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN); 2319 req.airtime_en = true; 2320 2321 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req, 2322 sizeof(req), true); 2323 } 2324 2325 static int mt7915_red_set_watermark(struct mt7915_dev *dev) 2326 { 2327 #define RED_GLOBAL_TOKEN_WATERMARK 2 2328 struct { 2329 __le32 args[3]; 2330 u8 cmd; 2331 u8 version; 2332 u8 __rsv1[4]; 2333 __le16 len; 2334 __le16 high_mark; 2335 __le16 low_mark; 2336 u8 __rsv2[12]; 2337 } __packed req = { 2338 .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING), 2339 .cmd = RED_GLOBAL_TOKEN_WATERMARK, 2340 .len = cpu_to_le16(sizeof(req) - sizeof(req.args)), 2341 .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256), 2342 .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536), 2343 }; 2344 2345 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req, 2346 sizeof(req), false); 2347 } 2348 2349 static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled) 2350 { 2351 #define RED_DISABLE 0 2352 #define RED_BY_WA_ENABLE 2 2353 int ret; 2354 u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE; 2355 __le32 req = cpu_to_le32(red_type); 2356 2357 if (enabled) { 2358 ret = mt7915_red_set_watermark(dev); 2359 if (ret < 0) 2360 return ret; 2361 } 2362 2363 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req, 2364 sizeof(req), false); 2365 if (ret < 0) 2366 return ret; 2367 2368 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 2369 MCU_WA_PARAM_RED, enabled, 0); 2370 } 2371 2372 int mt7915_mcu_init_firmware(struct mt7915_dev *dev) 2373 { 2374 int ret; 2375 2376 /* force firmware operation mode into normal state, 2377 * which should be set before firmware download stage. 2378 */ 2379 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 2380 2381 ret = mt7915_driver_own(dev, 0); 2382 if (ret) 2383 return ret; 2384 /* set driver own for band1 when two hif exist */ 2385 if (dev->hif2) { 2386 ret = mt7915_driver_own(dev, 1); 2387 if (ret) 2388 return ret; 2389 } 2390 2391 ret = mt7915_load_firmware(dev); 2392 if (ret) 2393 return ret; 2394 2395 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 2396 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 2397 if (ret) 2398 return ret; 2399 2400 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 2401 if (ret) 2402 return ret; 2403 2404 mt76_connac_mcu_del_wtbl_all(&dev->mt76); 2405 2406 if ((mtk_wed_device_active(&dev->mt76.mmio.wed) && 2407 is_mt7915(&dev->mt76)) || 2408 !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) 2409 mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0); 2410 2411 ret = mt7915_mcu_set_mwds(dev, 1); 2412 if (ret) 2413 return ret; 2414 2415 ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE, 2416 MURU_PLATFORM_TYPE_PERF_LEVEL_2); 2417 if (ret) 2418 return ret; 2419 2420 ret = mt7915_mcu_init_rx_airtime(dev); 2421 if (ret) 2422 return ret; 2423 2424 return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed)); 2425 } 2426 2427 int mt7915_mcu_init(struct mt7915_dev *dev) 2428 { 2429 static const struct mt76_mcu_ops mt7915_mcu_ops = { 2430 .max_retry = 1, 2431 .headroom = sizeof(struct mt76_connac2_mcu_txd), 2432 .mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message, 2433 .mcu_skb_send_msg = mt7915_mcu_send_message, 2434 .mcu_parse_response = mt7915_mcu_parse_response, 2435 }; 2436 2437 dev->mt76.mcu_ops = &mt7915_mcu_ops; 2438 2439 return mt7915_mcu_init_firmware(dev); 2440 } 2441 2442 void mt7915_mcu_exit(struct mt7915_dev *dev) 2443 { 2444 mt76_connac_mcu_restart(&dev->mt76); 2445 if (mt7915_firmware_state(dev, false)) { 2446 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 2447 goto out; 2448 } 2449 2450 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 2451 if (dev->hif2) 2452 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 2453 MT_TOP_LPCR_HOST_FW_OWN); 2454 out: 2455 skb_queue_purge(&dev->mt76.mcu.res_q); 2456 } 2457 2458 static int 2459 mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band) 2460 { 2461 struct { 2462 u8 operation; 2463 u8 count; 2464 u8 _rsv[2]; 2465 u8 index; 2466 u8 enable; 2467 __le16 etype; 2468 } req = { 2469 .operation = 1, 2470 .count = 1, 2471 .enable = 1, 2472 .etype = cpu_to_le16(ETH_P_PAE), 2473 }; 2474 2475 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS), 2476 &req, sizeof(req), false); 2477 } 2478 2479 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, 2480 bool enable, bool hdr_trans) 2481 { 2482 struct { 2483 u8 operation; 2484 u8 enable; 2485 u8 check_bssid; 2486 u8 insert_vlan; 2487 u8 remove_vlan; 2488 u8 tid; 2489 u8 mode; 2490 u8 rsv; 2491 } __packed req_trans = { 2492 .enable = hdr_trans, 2493 }; 2494 struct { 2495 u8 enable; 2496 u8 band; 2497 u8 rsv[2]; 2498 } __packed req_mac = { 2499 .enable = enable, 2500 .band = band, 2501 }; 2502 int ret; 2503 2504 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS), 2505 &req_trans, sizeof(req_trans), false); 2506 if (ret) 2507 return ret; 2508 2509 if (hdr_trans) 2510 mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band); 2511 2512 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL), 2513 &req_mac, sizeof(req_mac), true); 2514 } 2515 2516 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param) 2517 { 2518 struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param; 2519 u8 num = req->total; 2520 size_t len = sizeof(*req) - 2521 (IEEE80211_NUM_ACS - num) * sizeof(struct edca); 2522 2523 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req, 2524 len, true); 2525 } 2526 2527 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif) 2528 { 2529 #define TX_CMD_MODE 1 2530 struct mt7915_mcu_tx req = { 2531 .valid = true, 2532 .mode = TX_CMD_MODE, 2533 .total = IEEE80211_NUM_ACS, 2534 }; 2535 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 2536 int ac; 2537 2538 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 2539 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; 2540 struct edca *e = &req.edca[ac]; 2541 2542 e->set = WMM_PARAM_SET; 2543 e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS; 2544 e->aifs = q->aifs; 2545 e->txop = cpu_to_le16(q->txop); 2546 2547 if (q->cw_min) 2548 e->cw_min = fls(q->cw_min); 2549 else 2550 e->cw_min = 5; 2551 2552 if (q->cw_max) 2553 e->cw_max = cpu_to_le16(fls(q->cw_max)); 2554 else 2555 e->cw_max = cpu_to_le16(10); 2556 } 2557 2558 return mt7915_mcu_update_edca(dev, &req); 2559 } 2560 2561 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val) 2562 { 2563 struct { 2564 __le32 tag; 2565 __le16 min_lpn; 2566 u8 rsv[2]; 2567 } __packed req = { 2568 .tag = cpu_to_le32(0x1), 2569 .min_lpn = cpu_to_le16(val), 2570 }; 2571 2572 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, 2573 sizeof(req), true); 2574 } 2575 2576 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 2577 const struct mt7915_dfs_pulse *pulse) 2578 { 2579 struct { 2580 __le32 tag; 2581 2582 __le32 max_width; /* us */ 2583 __le32 max_pwr; /* dbm */ 2584 __le32 min_pwr; /* dbm */ 2585 __le32 min_stgr_pri; /* us */ 2586 __le32 max_stgr_pri; /* us */ 2587 __le32 min_cr_pri; /* us */ 2588 __le32 max_cr_pri; /* us */ 2589 } __packed req = { 2590 .tag = cpu_to_le32(0x3), 2591 2592 #define __req_field(field) .field = cpu_to_le32(pulse->field) 2593 __req_field(max_width), 2594 __req_field(max_pwr), 2595 __req_field(min_pwr), 2596 __req_field(min_stgr_pri), 2597 __req_field(max_stgr_pri), 2598 __req_field(min_cr_pri), 2599 __req_field(max_cr_pri), 2600 #undef __req_field 2601 }; 2602 2603 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, 2604 sizeof(req), true); 2605 } 2606 2607 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 2608 const struct mt7915_dfs_pattern *pattern) 2609 { 2610 struct { 2611 __le32 tag; 2612 __le16 radar_type; 2613 2614 u8 enb; 2615 u8 stgr; 2616 u8 min_crpn; 2617 u8 max_crpn; 2618 u8 min_crpr; 2619 u8 min_pw; 2620 __le32 min_pri; 2621 __le32 max_pri; 2622 u8 max_pw; 2623 u8 min_crbn; 2624 u8 max_crbn; 2625 u8 min_stgpn; 2626 u8 max_stgpn; 2627 u8 min_stgpr; 2628 u8 rsv[2]; 2629 __le32 min_stgpr_diff; 2630 } __packed req = { 2631 .tag = cpu_to_le32(0x2), 2632 .radar_type = cpu_to_le16(index), 2633 2634 #define __req_field_u8(field) .field = pattern->field 2635 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 2636 __req_field_u8(enb), 2637 __req_field_u8(stgr), 2638 __req_field_u8(min_crpn), 2639 __req_field_u8(max_crpn), 2640 __req_field_u8(min_crpr), 2641 __req_field_u8(min_pw), 2642 __req_field_u32(min_pri), 2643 __req_field_u32(max_pri), 2644 __req_field_u8(max_pw), 2645 __req_field_u8(min_crbn), 2646 __req_field_u8(max_crbn), 2647 __req_field_u8(min_stgpn), 2648 __req_field_u8(max_stgpn), 2649 __req_field_u8(min_stgpr), 2650 __req_field_u32(min_stgpr_diff), 2651 #undef __req_field_u8 2652 #undef __req_field_u32 2653 }; 2654 2655 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, 2656 sizeof(req), true); 2657 } 2658 2659 static int 2660 mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy, 2661 struct cfg80211_chan_def *chandef, 2662 int cmd) 2663 { 2664 struct mt7915_dev *dev = phy->dev; 2665 struct mt76_phy *mphy = phy->mt76; 2666 struct ieee80211_channel *chan = mphy->chandef.chan; 2667 int freq = mphy->chandef.center_freq1; 2668 struct mt7915_mcu_background_chain_ctrl req = { 2669 .monitor_scan_type = 2, /* simple rx */ 2670 }; 2671 2672 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 2673 return -EINVAL; 2674 2675 if (!cfg80211_chandef_valid(&mphy->chandef)) 2676 return -EINVAL; 2677 2678 switch (cmd) { 2679 case CH_SWITCH_BACKGROUND_SCAN_START: { 2680 req.chan = chan->hw_value; 2681 req.central_chan = ieee80211_frequency_to_channel(freq); 2682 req.bw = mt76_connac_chan_bw(&mphy->chandef); 2683 req.monitor_chan = chandef->chan->hw_value; 2684 req.monitor_central_chan = 2685 ieee80211_frequency_to_channel(chandef->center_freq1); 2686 req.monitor_bw = mt76_connac_chan_bw(chandef); 2687 req.band_idx = phy->mt76->band_idx; 2688 req.scan_mode = 1; 2689 break; 2690 } 2691 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 2692 req.monitor_chan = chandef->chan->hw_value; 2693 req.monitor_central_chan = 2694 ieee80211_frequency_to_channel(chandef->center_freq1); 2695 req.band_idx = phy->mt76->band_idx; 2696 req.scan_mode = 2; 2697 break; 2698 case CH_SWITCH_BACKGROUND_SCAN_STOP: 2699 req.chan = chan->hw_value; 2700 req.central_chan = ieee80211_frequency_to_channel(freq); 2701 req.bw = mt76_connac_chan_bw(&mphy->chandef); 2702 req.tx_stream = hweight8(mphy->antenna_mask); 2703 req.rx_stream = mphy->antenna_mask; 2704 break; 2705 default: 2706 return -EINVAL; 2707 } 2708 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 2709 2710 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL), 2711 &req, sizeof(req), false); 2712 } 2713 2714 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, 2715 struct cfg80211_chan_def *chandef) 2716 { 2717 struct mt7915_dev *dev = phy->dev; 2718 int err, region, rdd_idx; 2719 2720 rdd_idx = mt7915_get_rdd_idx(phy, true); 2721 if (rdd_idx < 0) 2722 return -EINVAL; 2723 2724 if (!chandef) { /* disable offchain */ 2725 err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, rdd_idx, 0, 0); 2726 if (err) 2727 return err; 2728 2729 return mt7915_mcu_background_chain_ctrl(phy, NULL, 2730 CH_SWITCH_BACKGROUND_SCAN_STOP); 2731 } 2732 2733 err = mt7915_mcu_background_chain_ctrl(phy, chandef, 2734 CH_SWITCH_BACKGROUND_SCAN_START); 2735 if (err) 2736 return err; 2737 2738 switch (dev->mt76.region) { 2739 case NL80211_DFS_ETSI: 2740 region = 0; 2741 break; 2742 case NL80211_DFS_JP: 2743 region = 2; 2744 break; 2745 case NL80211_DFS_FCC: 2746 default: 2747 region = 1; 2748 break; 2749 } 2750 2751 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, rdd_idx, 0, region); 2752 } 2753 2754 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd) 2755 { 2756 static const u8 ch_band[] = { 2757 [NL80211_BAND_2GHZ] = 0, 2758 [NL80211_BAND_5GHZ] = 1, 2759 [NL80211_BAND_6GHZ] = 2, 2760 }; 2761 struct mt7915_dev *dev = phy->dev; 2762 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 2763 int freq1 = chandef->center_freq1; 2764 u8 band = phy->mt76->band_idx; 2765 struct { 2766 u8 control_ch; 2767 u8 center_ch; 2768 u8 bw; 2769 u8 tx_path_num; 2770 u8 rx_path; /* mask or num */ 2771 u8 switch_reason; 2772 u8 band_idx; 2773 u8 center_ch2; /* for 80+80 only */ 2774 __le16 cac_case; 2775 u8 channel_band; 2776 u8 rsv0; 2777 __le32 outband_freq; 2778 u8 txpower_drop; 2779 u8 ap_bw; 2780 u8 ap_center_ch; 2781 u8 rsv1[57]; 2782 } __packed req = { 2783 .control_ch = chandef->chan->hw_value, 2784 .center_ch = ieee80211_frequency_to_channel(freq1), 2785 .bw = mt76_connac_chan_bw(chandef), 2786 .tx_path_num = hweight16(phy->mt76->chainmask), 2787 .rx_path = phy->mt76->chainmask >> (dev->chainshift * band), 2788 .band_idx = band, 2789 .channel_band = ch_band[chandef->chan->band], 2790 }; 2791 2792 #ifdef CONFIG_NL80211_TESTMODE 2793 if (phy->mt76->test.tx_antenna_mask && 2794 mt76_testmode_enabled(phy->mt76)) { 2795 req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask); 2796 req.rx_path = phy->mt76->test.tx_antenna_mask; 2797 } 2798 #endif 2799 2800 if (mt76_connac_spe_idx(phy->mt76->antenna_mask)) 2801 req.tx_path_num = fls(phy->mt76->antenna_mask); 2802 2803 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 2804 req.switch_reason = CH_SWITCH_NORMAL; 2805 else if (phy->mt76->offchannel || 2806 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 2807 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 2808 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 2809 NL80211_IFTYPE_AP)) 2810 req.switch_reason = CH_SWITCH_DFS; 2811 else 2812 req.switch_reason = CH_SWITCH_NORMAL; 2813 2814 if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH)) 2815 req.rx_path = hweight8(req.rx_path); 2816 2817 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 2818 int freq2 = chandef->center_freq2; 2819 2820 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 2821 } 2822 2823 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true); 2824 } 2825 2826 static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev) 2827 { 2828 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 2829 #define PAGE_IDX_MASK GENMASK(4, 2) 2830 #define PER_PAGE_SIZE 0x400 2831 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER }; 2832 u16 eeprom_size = mt7915_eeprom_size(dev); 2833 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 2834 u8 *eep = (u8 *)dev->mt76.eeprom.data; 2835 int eep_len; 2836 int i; 2837 2838 for (i = 0; i < total; i++, eep += eep_len) { 2839 struct sk_buff *skb; 2840 int ret; 2841 2842 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 2843 eep_len = eeprom_size % PER_PAGE_SIZE; 2844 else 2845 eep_len = PER_PAGE_SIZE; 2846 2847 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 2848 sizeof(req) + eep_len); 2849 if (!skb) 2850 return -ENOMEM; 2851 2852 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 2853 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 2854 req.len = cpu_to_le16(eep_len); 2855 2856 skb_put_data(skb, &req, sizeof(req)); 2857 skb_put_data(skb, eep, eep_len); 2858 2859 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2860 MCU_EXT_CMD(EFUSE_BUFFER_MODE), true); 2861 if (ret) 2862 return ret; 2863 } 2864 2865 return 0; 2866 } 2867 2868 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev) 2869 { 2870 struct mt7915_mcu_eeprom req = { 2871 .buffer_mode = EE_MODE_EFUSE, 2872 .format = EE_FORMAT_WHOLE, 2873 }; 2874 2875 if (dev->flash_mode) 2876 return mt7915_mcu_set_eeprom_flash(dev); 2877 2878 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE), 2879 &req, sizeof(req), true); 2880 } 2881 2882 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf) 2883 { 2884 struct mt7915_mcu_eeprom_info req = { 2885 .addr = cpu_to_le32(round_down(offset, 2886 MT7915_EEPROM_BLOCK_SIZE)), 2887 }; 2888 struct mt7915_mcu_eeprom_info *res; 2889 struct sk_buff *skb; 2890 u8 *buf = read_buf; 2891 int ret; 2892 2893 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 2894 MCU_EXT_QUERY(EFUSE_ACCESS), 2895 &req, sizeof(req), true, &skb); 2896 if (ret) 2897 return ret; 2898 2899 res = (struct mt7915_mcu_eeprom_info *)skb->data; 2900 if (!buf) 2901 buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); 2902 memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE); 2903 2904 dev_kfree_skb(skb); 2905 2906 return 0; 2907 } 2908 2909 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num) 2910 { 2911 struct { 2912 u8 _rsv; 2913 u8 version; 2914 u8 die_idx; 2915 u8 _rsv2; 2916 } __packed req = { 2917 .version = 1, 2918 }; 2919 struct sk_buff *skb; 2920 int ret; 2921 2922 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 2923 MCU_EXT_QUERY(EFUSE_FREE_BLOCK), 2924 &req, sizeof(req), true, &skb); 2925 if (ret) 2926 return ret; 2927 2928 *block_num = *(u8 *)skb->data; 2929 dev_kfree_skb(skb); 2930 2931 return 0; 2932 } 2933 2934 static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx, 2935 u8 *data, u32 len, int cmd) 2936 { 2937 struct { 2938 u8 dir; 2939 u8 valid; 2940 __le16 bitmap; 2941 s8 precal; 2942 u8 action; 2943 u8 band; 2944 u8 idx; 2945 u8 rsv[4]; 2946 __le32 len; 2947 } req = {}; 2948 struct sk_buff *skb; 2949 2950 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len); 2951 if (!skb) 2952 return -ENOMEM; 2953 2954 req.idx = idx; 2955 req.len = cpu_to_le32(len); 2956 skb_put_data(skb, &req, sizeof(req)); 2957 skb_put_data(skb, data, len); 2958 2959 return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false); 2960 } 2961 2962 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev) 2963 { 2964 u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data; 2965 u32 total = mt7915_get_cal_group_size(dev); 2966 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; 2967 2968 if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP)) 2969 return 0; 2970 2971 /* 2972 * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG 2973 * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC 2974 */ 2975 while (total > 0) { 2976 int ret, len; 2977 2978 len = min_t(u32, total, MT_EE_CAL_UNIT); 2979 2980 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len, 2981 MCU_EXT_CMD(GROUP_PRE_CAL_INFO)); 2982 if (ret) 2983 return ret; 2984 2985 total -= len; 2986 cal += len; 2987 idx++; 2988 } 2989 2990 return 0; 2991 } 2992 2993 static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur) 2994 { 2995 int i; 2996 2997 for (i = 0; i < n_freqs; i++) 2998 if (cur == freqs[i]) 2999 return i; 3000 3001 return -1; 3002 } 3003 3004 static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw) 3005 { 3006 static const u16 freq_list_v1[] = { 3007 5180, 5200, 5220, 5240, 3008 5260, 5280, 5300, 5320, 3009 5500, 5520, 5540, 5560, 3010 5580, 5600, 5620, 5640, 3011 5660, 5680, 5700, 5745, 3012 5765, 5785, 5805, 5825 3013 }; 3014 static const u16 freq_list_v2[] = { 3015 /* 6G BW20*/ 3016 5955, 5975, 5995, 6015, 3017 6035, 6055, 6075, 6095, 3018 6115, 6135, 6155, 6175, 3019 6195, 6215, 6235, 6255, 3020 6275, 6295, 6315, 6335, 3021 6355, 6375, 6395, 6415, 3022 6435, 6455, 6475, 6495, 3023 6515, 6535, 6555, 6575, 3024 6595, 6615, 6635, 6655, 3025 6675, 6695, 6715, 6735, 3026 6755, 6775, 6795, 6815, 3027 6835, 6855, 6875, 6895, 3028 6915, 6935, 6955, 6975, 3029 6995, 7015, 7035, 7055, 3030 7075, 7095, 7115, 3031 /* 6G BW160 */ 3032 6025, 6185, 6345, 6505, 3033 6665, 6825, 6985, 3034 /* 5G BW20 */ 3035 5180, 5200, 5220, 5240, 3036 5260, 5280, 5300, 5320, 3037 5500, 5520, 5540, 5560, 3038 5580, 5600, 5620, 5640, 3039 5660, 5680, 5700, 5720, 3040 5745, 5765, 5785, 5805, 3041 5825, 5845, 5865, 5885, 3042 /* 5G BW160 */ 3043 5250, 5570, 5815 3044 }; 3045 static const u16 freq_list_v2_7981[] = { 3046 /* 5G BW20 */ 3047 5180, 5200, 5220, 5240, 3048 5260, 5280, 5300, 5320, 3049 5500, 5520, 5540, 5560, 3050 5580, 5600, 5620, 5640, 3051 5660, 5680, 5700, 5720, 3052 5745, 5765, 5785, 5805, 3053 5825, 5845, 5865, 5885, 3054 /* 5G BW160 */ 3055 5250, 5570, 5815 3056 }; 3057 const u16 *freq_list = freq_list_v1; 3058 int n_freqs = ARRAY_SIZE(freq_list_v1); 3059 int idx; 3060 3061 if (!is_mt7915(&dev->mt76)) { 3062 if (is_mt7981(&dev->mt76)) { 3063 freq_list = freq_list_v2_7981; 3064 n_freqs = ARRAY_SIZE(freq_list_v2_7981); 3065 } else { 3066 freq_list = freq_list_v2; 3067 n_freqs = ARRAY_SIZE(freq_list_v2); 3068 } 3069 } 3070 3071 if (freq < 4000) { 3072 if (freq < 2432) 3073 return n_freqs; 3074 if (freq < 2457) 3075 return n_freqs + 1; 3076 3077 return n_freqs + 2; 3078 } 3079 3080 if (bw == NL80211_CHAN_WIDTH_80P80) 3081 return -1; 3082 3083 if (bw != NL80211_CHAN_WIDTH_20) { 3084 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10); 3085 if (idx >= 0) 3086 return idx; 3087 3088 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10); 3089 if (idx >= 0) 3090 return idx; 3091 } 3092 3093 return mt7915_find_freq_idx(freq_list, n_freqs, freq); 3094 } 3095 3096 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy) 3097 { 3098 struct mt7915_dev *dev = phy->dev; 3099 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3100 enum nl80211_band band = chandef->chan->band; 3101 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; 3102 u16 center_freq = chandef->center_freq1; 3103 u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data; 3104 u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3; 3105 int idx; 3106 3107 switch (band) { 3108 case NL80211_BAND_2GHZ: 3109 dpd_mask = MT_EE_WIFI_CAL_DPD_2G; 3110 break; 3111 case NL80211_BAND_5GHZ: 3112 dpd_mask = MT_EE_WIFI_CAL_DPD_5G; 3113 break; 3114 case NL80211_BAND_6GHZ: 3115 dpd_mask = MT_EE_WIFI_CAL_DPD_6G; 3116 break; 3117 default: 3118 dpd_mask = 0; 3119 break; 3120 } 3121 3122 if (!(eep[offs] & dpd_mask)) 3123 return 0; 3124 3125 idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width); 3126 if (idx < 0) 3127 return -EINVAL; 3128 3129 /* Items: Tx DPD, Tx Flatness */ 3130 idx = idx * cal_num; 3131 cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT); 3132 3133 while (cal_num--) { 3134 int ret; 3135 3136 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT, 3137 MCU_EXT_CMD(DPD_PRE_CAL_INFO)); 3138 if (ret) 3139 return ret; 3140 3141 idx++; 3142 cal += MT_EE_CAL_UNIT; 3143 } 3144 3145 return 0; 3146 } 3147 3148 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch) 3149 { 3150 struct mt76_channel_state *state = phy->mt76->chan_state; 3151 struct mt76_channel_state *state_ts = &phy->state_ts; 3152 struct mt7915_dev *dev = phy->dev; 3153 struct mt7915_mcu_mib *res, req[5]; 3154 struct sk_buff *skb; 3155 static const u32 *offs; 3156 int i, ret, len, offs_cc; 3157 u64 cc_tx; 3158 3159 /* strict order */ 3160 if (is_mt7915(&dev->mt76)) { 3161 static const u32 chip_offs[] = { 3162 MIB_NON_WIFI_TIME, 3163 MIB_TX_TIME, 3164 MIB_RX_TIME, 3165 MIB_OBSS_AIRTIME, 3166 MIB_TXOP_INIT_COUNT, 3167 }; 3168 len = ARRAY_SIZE(chip_offs); 3169 offs = chip_offs; 3170 offs_cc = 20; 3171 } else { 3172 static const u32 chip_offs[] = { 3173 MIB_NON_WIFI_TIME_V2, 3174 MIB_TX_TIME_V2, 3175 MIB_RX_TIME_V2, 3176 MIB_OBSS_AIRTIME_V2 3177 }; 3178 len = ARRAY_SIZE(chip_offs); 3179 offs = chip_offs; 3180 offs_cc = 0; 3181 } 3182 3183 for (i = 0; i < len; i++) { 3184 req[i].band = cpu_to_le32(phy->mt76->band_idx); 3185 req[i].offs = cpu_to_le32(offs[i]); 3186 } 3187 3188 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO), 3189 req, len * sizeof(req[0]), true, &skb); 3190 if (ret) 3191 return ret; 3192 3193 res = (struct mt7915_mcu_mib *)(skb->data + offs_cc); 3194 3195 #define __res_u64(s) le64_to_cpu(res[s].data) 3196 /* subtract Tx backoff time from Tx duration for MT7915 */ 3197 if (is_mt7915(&dev->mt76)) { 3198 u64 backoff = (__res_u64(4) & 0xffff) * 79; /* 16us + 9us * 7 */ 3199 cc_tx = __res_u64(1) - backoff; 3200 } else { 3201 cc_tx = __res_u64(1); 3202 } 3203 3204 if (chan_switch) 3205 goto out; 3206 3207 state->cc_tx += cc_tx - state_ts->cc_tx; 3208 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx; 3209 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx; 3210 state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) - 3211 state_ts->cc_busy; 3212 3213 out: 3214 state_ts->cc_tx = cc_tx; 3215 state_ts->cc_bss_rx = __res_u64(2); 3216 state_ts->cc_rx = __res_u64(2) + __res_u64(3); 3217 state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3); 3218 #undef __res_u64 3219 3220 dev_kfree_skb(skb); 3221 3222 return 0; 3223 } 3224 3225 int mt7915_mcu_get_temperature(struct mt7915_phy *phy) 3226 { 3227 struct mt7915_dev *dev = phy->dev; 3228 struct { 3229 u8 ctrl_id; 3230 u8 action; 3231 u8 band_idx; 3232 u8 rsv[5]; 3233 } req = { 3234 .ctrl_id = THERMAL_SENSOR_TEMP_QUERY, 3235 .band_idx = phy->mt76->band_idx, 3236 }; 3237 3238 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req, 3239 sizeof(req), true); 3240 } 3241 3242 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state) 3243 { 3244 struct mt7915_dev *dev = phy->dev; 3245 struct mt7915_mcu_thermal_ctrl req = { 3246 .band_idx = phy->mt76->band_idx, 3247 .ctrl_id = THERMAL_PROTECT_DUTY_CONFIG, 3248 }; 3249 int level, ret; 3250 3251 /* set duty cycle and level */ 3252 for (level = 0; level < 4; level++) { 3253 req.duty.duty_level = level; 3254 req.duty.duty_cycle = state; 3255 state /= 2; 3256 3257 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), 3258 &req, sizeof(req), false); 3259 if (ret) 3260 return ret; 3261 } 3262 return 0; 3263 } 3264 3265 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy) 3266 { 3267 struct mt7915_dev *dev = phy->dev; 3268 struct { 3269 struct mt7915_mcu_thermal_ctrl ctrl; 3270 3271 __le32 trigger_temp; 3272 __le32 restore_temp; 3273 __le16 sustain_time; 3274 u8 rsv[2]; 3275 } __packed req = { 3276 .ctrl = { 3277 .band_idx = phy->mt76->band_idx, 3278 .type.protect_type = 1, 3279 .type.trigger_type = 1, 3280 }, 3281 }; 3282 int ret; 3283 3284 req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE; 3285 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), 3286 &req, sizeof(req.ctrl), false); 3287 3288 if (ret) 3289 return ret; 3290 3291 /* set high-temperature trigger threshold */ 3292 req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE; 3293 /* add a safety margin ~10 */ 3294 req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10); 3295 req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 3296 req.sustain_time = cpu_to_le16(10); 3297 3298 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), 3299 &req, sizeof(req), false); 3300 } 3301 3302 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower) 3303 { 3304 struct mt7915_dev *dev = phy->dev; 3305 struct { 3306 u8 format_id; 3307 u8 rsv; 3308 u8 band_idx; 3309 s8 txpower_min; 3310 } __packed req = { 3311 .format_id = TX_POWER_LIMIT_FRAME_MIN, 3312 .band_idx = phy->mt76->band_idx, 3313 .txpower_min = txpower * 2, /* 0.5db */ 3314 }; 3315 3316 return mt76_mcu_send_msg(&dev->mt76, 3317 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3318 sizeof(req), true); 3319 } 3320 3321 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy, 3322 struct ieee80211_vif *vif, 3323 struct ieee80211_sta *sta, s8 txpower) 3324 { 3325 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 3326 struct mt7915_dev *dev = phy->dev; 3327 struct mt76_phy *mphy = phy->mt76; 3328 struct { 3329 u8 format_id; 3330 u8 rsv[3]; 3331 u8 band_idx; 3332 s8 txpower_max; 3333 __le16 wcid; 3334 s8 txpower_offs[48]; 3335 } __packed req = { 3336 .format_id = TX_POWER_LIMIT_FRAME, 3337 .band_idx = phy->mt76->band_idx, 3338 .txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2), 3339 .wcid = cpu_to_le16(msta->wcid.idx), 3340 }; 3341 int ret; 3342 s8 txpower_sku[MT7915_SKU_RATE_NUM]; 3343 3344 ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku)); 3345 if (ret) 3346 return ret; 3347 3348 txpower = mt76_get_power_bound(mphy, txpower); 3349 if (txpower > mphy->txpower_cur || txpower < 0) 3350 return -EINVAL; 3351 3352 if (txpower) { 3353 u32 offs, len, i; 3354 3355 if (sta->deflink.ht_cap.ht_supported) { 3356 const u8 *sku_len = mt7915_sku_group_len; 3357 3358 offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM]; 3359 len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40]; 3360 3361 if (sta->deflink.vht_cap.vht_supported) { 3362 offs += len; 3363 len = sku_len[SKU_VHT_BW20] * 4; 3364 3365 if (sta->deflink.he_cap.has_he) { 3366 offs += len + sku_len[SKU_HE_RU26] * 3; 3367 len = sku_len[SKU_HE_RU242] * 4; 3368 } 3369 } 3370 } else { 3371 return -EINVAL; 3372 } 3373 3374 for (i = 0; i < len; i++, offs++) 3375 req.txpower_offs[i] = 3376 DIV_ROUND_UP(txpower - txpower_sku[offs], 2); 3377 } 3378 3379 return mt76_mcu_send_msg(&dev->mt76, 3380 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3381 sizeof(req), true); 3382 } 3383 3384 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy) 3385 { 3386 struct mt7915_dev *dev = phy->dev; 3387 struct mt76_phy *mphy = phy->mt76; 3388 struct ieee80211_hw *hw = mphy->hw; 3389 struct mt7915_mcu_txpower_sku req = { 3390 .format_id = TX_POWER_LIMIT_TABLE, 3391 .band_idx = phy->mt76->band_idx, 3392 }; 3393 struct mt76_power_limits limits_array; 3394 s8 *la = (s8 *)&limits_array; 3395 int i, idx; 3396 int tx_power; 3397 3398 tx_power = mt76_get_power_bound(mphy, hw->conf.power_level); 3399 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 3400 &limits_array, tx_power); 3401 mphy->txpower_cur = tx_power; 3402 3403 for (i = 0, idx = 0; i < ARRAY_SIZE(mt7915_sku_group_len); i++) { 3404 u8 mcs_num, len = mt7915_sku_group_len[i]; 3405 int j; 3406 3407 if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) { 3408 mcs_num = 10; 3409 3410 if (i == SKU_HT_BW20 || i == SKU_VHT_BW20) 3411 la = (s8 *)&limits_array + 12; 3412 } else { 3413 mcs_num = len; 3414 } 3415 3416 for (j = 0; j < min_t(u8, mcs_num, len); j++) 3417 req.txpower_sku[idx + j] = la[j]; 3418 3419 la += mcs_num; 3420 idx += len; 3421 } 3422 3423 return mt76_mcu_send_msg(&dev->mt76, 3424 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3425 sizeof(req), true); 3426 } 3427 3428 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len) 3429 { 3430 #define RATE_POWER_INFO 2 3431 struct mt7915_dev *dev = phy->dev; 3432 struct { 3433 u8 format_id; 3434 u8 category; 3435 u8 band_idx; 3436 u8 _rsv; 3437 } __packed req = { 3438 .format_id = TX_POWER_LIMIT_INFO, 3439 .category = RATE_POWER_INFO, 3440 .band_idx = phy->mt76->band_idx, 3441 }; 3442 s8 txpower_sku[MT7915_SKU_RATE_NUM][2]; 3443 struct sk_buff *skb; 3444 int ret, i; 3445 3446 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3447 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), 3448 &req, sizeof(req), true, &skb); 3449 if (ret) 3450 return ret; 3451 3452 memcpy(txpower_sku, skb->data + 4, sizeof(txpower_sku)); 3453 for (i = 0; i < len; i++) 3454 txpower[i] = txpower_sku[i][req.band_idx]; 3455 3456 dev_kfree_skb(skb); 3457 3458 return 0; 3459 } 3460 3461 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, 3462 u8 en) 3463 { 3464 struct { 3465 u8 test_mode_en; 3466 u8 param_idx; 3467 u8 _rsv[2]; 3468 3469 u8 enable; 3470 u8 _rsv2[3]; 3471 3472 u8 pad[8]; 3473 } __packed req = { 3474 .test_mode_en = test_mode, 3475 .param_idx = param, 3476 .enable = en, 3477 }; 3478 3479 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, 3480 sizeof(req), false); 3481 } 3482 3483 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable) 3484 { 3485 struct mt7915_dev *dev = phy->dev; 3486 struct mt7915_sku { 3487 u8 format_id; 3488 u8 sku_enable; 3489 u8 band_idx; 3490 u8 rsv; 3491 } __packed req = { 3492 .format_id = TX_POWER_LIMIT_ENABLE, 3493 .band_idx = phy->mt76->band_idx, 3494 .sku_enable = enable, 3495 }; 3496 3497 return mt76_mcu_send_msg(&dev->mt76, 3498 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3499 sizeof(req), true); 3500 } 3501 3502 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band) 3503 { 3504 struct { 3505 u8 action; 3506 u8 set; 3507 u8 band; 3508 u8 rsv; 3509 } req = { 3510 .action = action, 3511 .set = set, 3512 .band = band, 3513 }; 3514 3515 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER), 3516 &req, sizeof(req), false); 3517 } 3518 3519 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action) 3520 { 3521 struct { 3522 u8 action; 3523 union { 3524 struct { 3525 u8 snd_mode; 3526 u8 sta_num; 3527 u8 rsv; 3528 u8 wlan_idx[4]; 3529 __le32 snd_period; /* ms */ 3530 } __packed snd; 3531 struct { 3532 bool ebf; 3533 bool ibf; 3534 u8 rsv; 3535 } __packed type; 3536 struct { 3537 u8 bf_num; 3538 u8 bf_bitmap; 3539 u8 bf_sel[8]; 3540 u8 rsv[5]; 3541 } __packed mod; 3542 }; 3543 } __packed req = { 3544 .action = action, 3545 }; 3546 3547 #define MT_BF_PROCESSING 4 3548 switch (action) { 3549 case MT_BF_SOUNDING_ON: 3550 req.snd.snd_mode = MT_BF_PROCESSING; 3551 break; 3552 case MT_BF_TYPE_UPDATE: 3553 req.type.ebf = true; 3554 req.type.ibf = dev->ibf; 3555 break; 3556 case MT_BF_MODULE_UPDATE: 3557 req.mod.bf_num = 2; 3558 req.mod.bf_bitmap = GENMASK(1, 0); 3559 break; 3560 default: 3561 return -EINVAL; 3562 } 3563 3564 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, 3565 sizeof(req), true); 3566 } 3567 3568 static int 3569 mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val) 3570 { 3571 struct mt7915_dev *dev = phy->dev; 3572 struct mt7915_mcu_sr_ctrl req = { 3573 .action = action, 3574 .argnum = 1, 3575 .band_idx = phy->mt76->band_idx, 3576 .val = cpu_to_le32(val), 3577 }; 3578 3579 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3580 sizeof(req), true); 3581 } 3582 3583 static int 3584 mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy, 3585 struct ieee80211_he_obss_pd *he_obss_pd) 3586 { 3587 struct mt7915_dev *dev = phy->dev; 3588 struct { 3589 struct mt7915_mcu_sr_ctrl ctrl; 3590 struct { 3591 u8 pd_th_non_srg; 3592 u8 pd_th_srg; 3593 u8 period_offs; 3594 u8 rcpi_src; 3595 __le16 obss_pd_min; 3596 __le16 obss_pd_min_srg; 3597 u8 resp_txpwr_mode; 3598 u8 txpwr_restrict_mode; 3599 u8 txpwr_ref; 3600 u8 rsv[3]; 3601 } __packed param; 3602 } __packed req = { 3603 .ctrl = { 3604 .action = SPR_SET_PARAM, 3605 .argnum = 9, 3606 .band_idx = phy->mt76->band_idx, 3607 }, 3608 }; 3609 int ret; 3610 u8 max_th = 82, non_srg_max_th = 62; 3611 3612 /* disable firmware dynamical PD asjustment */ 3613 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false); 3614 if (ret) 3615 return ret; 3616 3617 if (he_obss_pd->sr_ctrl & 3618 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 3619 req.param.pd_th_non_srg = max_th; 3620 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 3621 req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 3622 else 3623 req.param.pd_th_non_srg = non_srg_max_th; 3624 3625 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 3626 req.param.pd_th_srg = max_th - he_obss_pd->max_offset; 3627 3628 req.param.obss_pd_min = cpu_to_le16(82); 3629 req.param.obss_pd_min_srg = cpu_to_le16(82); 3630 req.param.txpwr_restrict_mode = 2; 3631 req.param.txpwr_ref = 21; 3632 3633 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3634 sizeof(req), true); 3635 } 3636 3637 static int 3638 mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif, 3639 struct ieee80211_he_obss_pd *he_obss_pd) 3640 { 3641 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 3642 struct mt7915_dev *dev = phy->dev; 3643 u8 omac = mvif->mt76.omac_idx; 3644 struct { 3645 struct mt7915_mcu_sr_ctrl ctrl; 3646 struct { 3647 u8 omac; 3648 u8 rsv[3]; 3649 u8 flag[20]; 3650 } __packed siga; 3651 } __packed req = { 3652 .ctrl = { 3653 .action = SPR_SET_SIGA, 3654 .argnum = 1, 3655 .band_idx = phy->mt76->band_idx, 3656 }, 3657 .siga = { 3658 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 3659 }, 3660 }; 3661 int ret; 3662 3663 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 3664 req.siga.flag[req.siga.omac] = 0xf; 3665 else 3666 return 0; 3667 3668 /* switch to normal AP mode */ 3669 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0); 3670 if (ret) 3671 return ret; 3672 3673 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3674 sizeof(req), true); 3675 } 3676 3677 static int 3678 mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy, 3679 struct ieee80211_he_obss_pd *he_obss_pd) 3680 { 3681 struct mt7915_dev *dev = phy->dev; 3682 struct { 3683 struct mt7915_mcu_sr_ctrl ctrl; 3684 struct { 3685 __le32 color_l[2]; 3686 __le32 color_h[2]; 3687 __le32 bssid_l[2]; 3688 __le32 bssid_h[2]; 3689 } __packed bitmap; 3690 } __packed req = { 3691 .ctrl = { 3692 .action = SPR_SET_SRG_BITMAP, 3693 .argnum = 4, 3694 .band_idx = phy->mt76->band_idx, 3695 }, 3696 }; 3697 u32 bitmap; 3698 3699 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 3700 req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3701 3702 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 3703 req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3704 3705 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 3706 req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3707 3708 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 3709 req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3710 3711 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3712 sizeof(req), true); 3713 } 3714 3715 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif, 3716 struct ieee80211_he_obss_pd *he_obss_pd) 3717 { 3718 int ret; 3719 3720 /* enable firmware scene detection algorithms */ 3721 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect); 3722 if (ret) 3723 return ret; 3724 3725 /* firmware dynamically adjusts PD threshold so skip manual control */ 3726 if (sr_scene_detect && !he_obss_pd->enable) 3727 return 0; 3728 3729 /* enable spatial reuse */ 3730 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable); 3731 if (ret) 3732 return ret; 3733 3734 if (sr_scene_detect || !he_obss_pd->enable) 3735 return 0; 3736 3737 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true); 3738 if (ret) 3739 return ret; 3740 3741 /* set SRG/non-SRG OBSS PD threshold */ 3742 ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd); 3743 if (ret) 3744 return ret; 3745 3746 /* Set SR prohibit */ 3747 ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 3748 if (ret) 3749 return ret; 3750 3751 /* set SRG BSS color/BSSID bitmap */ 3752 return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 3753 } 3754 3755 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, 3756 struct ieee80211_sta *sta, struct rate_info *rate) 3757 { 3758 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 3759 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 3760 struct mt7915_dev *dev = phy->dev; 3761 struct mt76_phy *mphy = phy->mt76; 3762 struct { 3763 u8 category; 3764 u8 band; 3765 __le16 wcid; 3766 } __packed req = { 3767 .category = MCU_PHY_STATE_CONTENTION_RX_RATE, 3768 .band = mvif->mt76.band_idx, 3769 .wcid = cpu_to_le16(msta->wcid.idx), 3770 }; 3771 struct ieee80211_supported_band *sband; 3772 struct mt7915_mcu_phy_rx_info *res; 3773 struct sk_buff *skb; 3774 int ret; 3775 bool cck = false; 3776 3777 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO), 3778 &req, sizeof(req), true, &skb); 3779 if (ret) 3780 return ret; 3781 3782 res = (struct mt7915_mcu_phy_rx_info *)skb->data; 3783 3784 rate->mcs = res->rate; 3785 rate->nss = res->nsts + 1; 3786 3787 switch (res->mode) { 3788 case MT_PHY_TYPE_CCK: 3789 cck = true; 3790 fallthrough; 3791 case MT_PHY_TYPE_OFDM: 3792 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 3793 sband = &mphy->sband_5g.sband; 3794 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 3795 sband = &mphy->sband_6g.sband; 3796 else 3797 sband = &mphy->sband_2g.sband; 3798 3799 rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck); 3800 rate->legacy = sband->bitrates[rate->mcs].bitrate; 3801 break; 3802 case MT_PHY_TYPE_HT: 3803 case MT_PHY_TYPE_HT_GF: 3804 if (rate->mcs > 31) { 3805 ret = -EINVAL; 3806 goto out; 3807 } 3808 3809 rate->flags = RATE_INFO_FLAGS_MCS; 3810 if (res->gi) 3811 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 3812 break; 3813 case MT_PHY_TYPE_VHT: 3814 if (rate->mcs > 9) { 3815 ret = -EINVAL; 3816 goto out; 3817 } 3818 3819 rate->flags = RATE_INFO_FLAGS_VHT_MCS; 3820 if (res->gi) 3821 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 3822 break; 3823 case MT_PHY_TYPE_HE_SU: 3824 case MT_PHY_TYPE_HE_EXT_SU: 3825 case MT_PHY_TYPE_HE_TB: 3826 case MT_PHY_TYPE_HE_MU: 3827 if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) { 3828 ret = -EINVAL; 3829 goto out; 3830 } 3831 rate->he_gi = res->gi; 3832 rate->flags = RATE_INFO_FLAGS_HE_MCS; 3833 break; 3834 default: 3835 ret = -EINVAL; 3836 goto out; 3837 } 3838 3839 switch (res->bw) { 3840 case IEEE80211_STA_RX_BW_160: 3841 rate->bw = RATE_INFO_BW_160; 3842 break; 3843 case IEEE80211_STA_RX_BW_80: 3844 rate->bw = RATE_INFO_BW_80; 3845 break; 3846 case IEEE80211_STA_RX_BW_40: 3847 rate->bw = RATE_INFO_BW_40; 3848 break; 3849 default: 3850 rate->bw = RATE_INFO_BW_20; 3851 break; 3852 } 3853 3854 out: 3855 dev_kfree_skb(skb); 3856 3857 return ret; 3858 } 3859 3860 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, 3861 struct cfg80211_he_bss_color *he_bss_color) 3862 { 3863 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color); 3864 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 3865 struct bss_info_color *bss_color; 3866 struct sk_buff *skb; 3867 struct tlv *tlv; 3868 3869 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 3870 NULL, len); 3871 if (IS_ERR(skb)) 3872 return PTR_ERR(skb); 3873 3874 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR, 3875 sizeof(*bss_color)); 3876 bss_color = (struct bss_info_color *)tlv; 3877 bss_color->disable = !he_bss_color->enabled; 3878 bss_color->color = he_bss_color->color; 3879 3880 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3881 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 3882 } 3883 3884 #define TWT_AGRT_TRIGGER BIT(0) 3885 #define TWT_AGRT_ANNOUNCE BIT(1) 3886 #define TWT_AGRT_PROTECT BIT(2) 3887 3888 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, 3889 struct mt7915_vif *mvif, 3890 struct mt7915_twt_flow *flow, 3891 int cmd) 3892 { 3893 struct { 3894 u8 tbl_idx; 3895 u8 cmd; 3896 u8 own_mac_idx; 3897 u8 flowid; /* 0xff for group id */ 3898 __le16 peer_id; /* specify the peer_id (msb=0) 3899 * or group_id (msb=1) 3900 */ 3901 u8 duration; /* 256 us */ 3902 u8 bss_idx; 3903 __le64 start_tsf; 3904 __le16 mantissa; 3905 u8 exponent; 3906 u8 is_ap; 3907 u8 agrt_params; 3908 u8 rsv[23]; 3909 } __packed req = { 3910 .tbl_idx = flow->table_id, 3911 .cmd = cmd, 3912 .own_mac_idx = mvif->mt76.omac_idx, 3913 .flowid = flow->id, 3914 .peer_id = cpu_to_le16(flow->wcid), 3915 .duration = flow->duration, 3916 .bss_idx = mvif->mt76.idx, 3917 .start_tsf = cpu_to_le64(flow->tsf), 3918 .mantissa = flow->mantissa, 3919 .exponent = flow->exp, 3920 .is_ap = true, 3921 }; 3922 3923 if (flow->protection) 3924 req.agrt_params |= TWT_AGRT_PROTECT; 3925 if (!flow->flowtype) 3926 req.agrt_params |= TWT_AGRT_ANNOUNCE; 3927 if (flow->trigger) 3928 req.agrt_params |= TWT_AGRT_TRIGGER; 3929 3930 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE), 3931 &req, sizeof(req), true); 3932 } 3933 3934 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx) 3935 { 3936 struct { 3937 __le32 cmd; 3938 __le32 arg0; 3939 __le32 arg1; 3940 __le16 arg2; 3941 } __packed req = { 3942 .cmd = cpu_to_le32(0x15), 3943 }; 3944 struct mt7915_mcu_wa_tx_stat { 3945 __le16 wcid; 3946 u8 __rsv2[2]; 3947 3948 /* tx_bytes is deprecated since WA byte counter uses u32, 3949 * which easily leads to overflow. 3950 */ 3951 __le32 tx_bytes; 3952 __le32 tx_packets; 3953 } __packed *res; 3954 struct mt76_wcid *wcid; 3955 struct sk_buff *skb; 3956 int ret, len; 3957 u16 ret_wcid; 3958 3959 if (is_mt7915(&dev->mt76)) { 3960 req.arg0 = cpu_to_le32(wlan_idx); 3961 len = sizeof(req) - sizeof(req.arg2); 3962 } else { 3963 req.arg0 = cpu_to_le32(1); 3964 req.arg2 = cpu_to_le16(wlan_idx); 3965 len = sizeof(req); 3966 } 3967 3968 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY), 3969 &req, len, true, &skb); 3970 if (ret) 3971 return ret; 3972 3973 if (!is_mt7915(&dev->mt76)) 3974 skb_pull(skb, 4); 3975 3976 res = (struct mt7915_mcu_wa_tx_stat *)skb->data; 3977 3978 ret_wcid = le16_to_cpu(res->wcid); 3979 if (is_mt7915(&dev->mt76)) 3980 ret_wcid &= 0xff; 3981 3982 if (ret_wcid != wlan_idx) { 3983 ret = -EINVAL; 3984 goto out; 3985 } 3986 3987 rcu_read_lock(); 3988 3989 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 3990 if (wcid) 3991 wcid->stats.tx_packets += le32_to_cpu(res->tx_packets); 3992 else 3993 ret = -EINVAL; 3994 3995 rcu_read_unlock(); 3996 out: 3997 dev_kfree_skb(skb); 3998 3999 return ret; 4000 } 4001 4002 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set) 4003 { 4004 struct { 4005 __le32 idx; 4006 __le32 ofs; 4007 __le32 data; 4008 } __packed req = { 4009 .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))), 4010 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4011 .data = set ? cpu_to_le32(*val) : 0, 4012 }; 4013 struct sk_buff *skb; 4014 int ret; 4015 4016 if (set) 4017 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS), 4018 &req, sizeof(req), false); 4019 4020 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS), 4021 &req, sizeof(req), true, &skb); 4022 if (ret) 4023 return ret; 4024 4025 *val = le32_to_cpu(*(__le32 *)(skb->data + 8)); 4026 dev_kfree_skb(skb); 4027 4028 return 0; 4029 } 4030