xref: /linux/drivers/net/wireless/mediatek/mt76/mt7915/init.c (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #include <linux/etherdevice.h>
5 #include <linux/hwmon.h>
6 #include <linux/hwmon-sysfs.h>
7 #include <linux/thermal.h>
8 #include "mt7915.h"
9 #include "mac.h"
10 #include "mcu.h"
11 #include "eeprom.h"
12 
13 static const struct ieee80211_iface_limit if_limits[] = {
14 	{
15 		.max = 1,
16 		.types = BIT(NL80211_IFTYPE_ADHOC)
17 	}, {
18 		.max = 16,
19 		.types = BIT(NL80211_IFTYPE_AP)
20 #ifdef CONFIG_MAC80211_MESH
21 			 | BIT(NL80211_IFTYPE_MESH_POINT)
22 #endif
23 	}, {
24 		.max = MT7915_MAX_INTERFACES,
25 		.types = BIT(NL80211_IFTYPE_STATION)
26 	}
27 };
28 
29 static const struct ieee80211_iface_combination if_comb[] = {
30 	{
31 		.limits = if_limits,
32 		.n_limits = ARRAY_SIZE(if_limits),
33 		.max_interfaces = MT7915_MAX_INTERFACES,
34 		.num_different_channels = 1,
35 		.beacon_int_infra_match = true,
36 		.radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
37 				       BIT(NL80211_CHAN_WIDTH_20) |
38 				       BIT(NL80211_CHAN_WIDTH_40) |
39 				       BIT(NL80211_CHAN_WIDTH_80) |
40 				       BIT(NL80211_CHAN_WIDTH_160) |
41 				       BIT(NL80211_CHAN_WIDTH_80P80),
42 	}
43 };
44 
45 static ssize_t mt7915_thermal_temp_show(struct device *dev,
46 					struct device_attribute *attr,
47 					char *buf)
48 {
49 	struct mt7915_phy *phy = dev_get_drvdata(dev);
50 	int i = to_sensor_dev_attr(attr)->index;
51 	int temperature;
52 
53 	if (i)
54 		return sprintf(buf, "%u\n", phy->throttle_temp[i - 1] * 1000);
55 
56 	temperature = mt7915_mcu_get_temperature(phy);
57 	if (temperature < 0)
58 		return temperature;
59 
60 	/* display in millidegree celcius */
61 	return sprintf(buf, "%u\n", temperature * 1000);
62 }
63 
64 static ssize_t mt7915_thermal_temp_store(struct device *dev,
65 					 struct device_attribute *attr,
66 					 const char *buf, size_t count)
67 {
68 	struct mt7915_phy *phy = dev_get_drvdata(dev);
69 	int ret, i = to_sensor_dev_attr(attr)->index;
70 	long val;
71 
72 	ret = kstrtol(buf, 10, &val);
73 	if (ret < 0)
74 		return ret;
75 
76 	mutex_lock(&phy->dev->mt76.mutex);
77 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130);
78 	phy->throttle_temp[i - 1] = val;
79 	mutex_unlock(&phy->dev->mt76.mutex);
80 
81 	return count;
82 }
83 
84 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
85 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
86 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
87 
88 static struct attribute *mt7915_hwmon_attrs[] = {
89 	&sensor_dev_attr_temp1_input.dev_attr.attr,
90 	&sensor_dev_attr_temp1_crit.dev_attr.attr,
91 	&sensor_dev_attr_temp1_max.dev_attr.attr,
92 	NULL,
93 };
94 ATTRIBUTE_GROUPS(mt7915_hwmon);
95 
96 static int
97 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
98 				      unsigned long *state)
99 {
100 	*state = MT7915_THERMAL_THROTTLE_MAX;
101 
102 	return 0;
103 }
104 
105 static int
106 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
107 				      unsigned long *state)
108 {
109 	struct mt7915_phy *phy = cdev->devdata;
110 
111 	*state = phy->throttle_state;
112 
113 	return 0;
114 }
115 
116 static int
117 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
118 				      unsigned long state)
119 {
120 	struct mt7915_phy *phy = cdev->devdata;
121 	int ret;
122 
123 	if (state > MT7915_THERMAL_THROTTLE_MAX)
124 		return -EINVAL;
125 
126 	if (phy->throttle_temp[0] > phy->throttle_temp[1])
127 		return 0;
128 
129 	if (state == phy->throttle_state)
130 		return 0;
131 
132 	ret = mt7915_mcu_set_thermal_throttling(phy, state);
133 	if (ret)
134 		return ret;
135 
136 	phy->throttle_state = state;
137 
138 	return 0;
139 }
140 
141 static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
142 	.get_max_state = mt7915_thermal_get_max_throttle_state,
143 	.get_cur_state = mt7915_thermal_get_cur_throttle_state,
144 	.set_cur_state = mt7915_thermal_set_cur_throttle_state,
145 };
146 
147 static void mt7915_unregister_thermal(struct mt7915_phy *phy)
148 {
149 	struct wiphy *wiphy = phy->mt76->hw->wiphy;
150 
151 	if (!phy->cdev)
152 	    return;
153 
154 	sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
155 	thermal_cooling_device_unregister(phy->cdev);
156 }
157 
158 static int mt7915_thermal_init(struct mt7915_phy *phy)
159 {
160 	struct wiphy *wiphy = phy->mt76->hw->wiphy;
161 	struct thermal_cooling_device *cdev;
162 	struct device *hwmon;
163 	const char *name;
164 
165 	name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
166 			      wiphy_name(wiphy));
167 
168 	cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
169 	if (!IS_ERR(cdev)) {
170 		if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
171 				      "cooling_device") < 0)
172 			thermal_cooling_device_unregister(cdev);
173 		else
174 			phy->cdev = cdev;
175 	}
176 
177 	if (!IS_REACHABLE(CONFIG_HWMON))
178 		return 0;
179 
180 	hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
181 						       mt7915_hwmon_groups);
182 	if (IS_ERR(hwmon))
183 		return PTR_ERR(hwmon);
184 
185 	/* initialize critical/maximum high temperature */
186 	phy->throttle_temp[0] = 110;
187 	phy->throttle_temp[1] = 120;
188 
189 	return 0;
190 }
191 
192 static void mt7915_led_set_config(struct led_classdev *led_cdev,
193 				  u8 delay_on, u8 delay_off)
194 {
195 	struct mt7915_dev *dev;
196 	struct mt76_dev *mt76;
197 	u32 val;
198 
199 	mt76 = container_of(led_cdev, struct mt76_dev, led_cdev);
200 	dev = container_of(mt76, struct mt7915_dev, mt76);
201 
202 	/* select TX blink mode, 2: only data frames */
203 	mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
204 
205 	/* enable LED */
206 	mt76_wr(dev, MT_LED_EN(0), 1);
207 
208 	/* set LED Tx blink on/off time */
209 	val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
210 	      FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
211 	mt76_wr(dev, MT_LED_TX_BLINK(0), val);
212 
213 	/* control LED */
214 	val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
215 	if (dev->mt76.led_al)
216 		val |= MT_LED_CTRL_POLARITY;
217 
218 	mt76_wr(dev, MT_LED_CTRL(0), val);
219 	mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
220 }
221 
222 static int mt7915_led_set_blink(struct led_classdev *led_cdev,
223 				unsigned long *delay_on,
224 				unsigned long *delay_off)
225 {
226 	u16 delta_on = 0, delta_off = 0;
227 
228 #define HW_TICK		10
229 #define TO_HW_TICK(_t)	(((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
230 
231 	if (*delay_on)
232 		delta_on = TO_HW_TICK(*delay_on);
233 	if (*delay_off)
234 		delta_off = TO_HW_TICK(*delay_off);
235 
236 	mt7915_led_set_config(led_cdev, delta_on, delta_off);
237 
238 	return 0;
239 }
240 
241 static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
242 				      enum led_brightness brightness)
243 {
244 	if (!brightness)
245 		mt7915_led_set_config(led_cdev, 0, 0xff);
246 	else
247 		mt7915_led_set_config(led_cdev, 0xff, 0);
248 }
249 
250 static void
251 mt7915_init_txpower(struct mt7915_dev *dev,
252 		    struct ieee80211_supported_band *sband)
253 {
254 	int i, n_chains = hweight8(dev->mphy.antenna_mask);
255 	int nss_delta = mt76_tx_power_nss_delta(n_chains);
256 	int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
257 	struct mt76_power_limits limits;
258 
259 	for (i = 0; i < sband->n_channels; i++) {
260 		struct ieee80211_channel *chan = &sband->channels[i];
261 		u32 target_power = 0;
262 		int j;
263 
264 		for (j = 0; j < n_chains; j++) {
265 			u32 val;
266 
267 			val = mt7915_eeprom_get_target_power(dev, chan, j);
268 			target_power = max(target_power, val);
269 		}
270 
271 		target_power += pwr_delta;
272 		target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
273 							  &limits,
274 							  target_power);
275 		target_power += nss_delta;
276 		target_power = DIV_ROUND_UP(target_power, 2);
277 		chan->max_power = min_t(int, chan->max_reg_power,
278 					target_power);
279 		chan->orig_mpwr = target_power;
280 	}
281 }
282 
283 static void
284 mt7915_regd_notifier(struct wiphy *wiphy,
285 		     struct regulatory_request *request)
286 {
287 	struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
288 	struct mt7915_dev *dev = mt7915_hw_dev(hw);
289 	struct mt76_phy *mphy = hw->priv;
290 	struct mt7915_phy *phy = mphy->priv;
291 	struct cfg80211_chan_def *chandef = &mphy->chandef;
292 
293 	memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
294 	dev->mt76.region = request->dfs_region;
295 
296 	mt7915_init_txpower(dev, &mphy->sband_2g.sband);
297 	mt7915_init_txpower(dev, &mphy->sband_5g.sband);
298 
299 	if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR))
300 		return;
301 
302 	mt7915_dfs_init_radar_detector(phy);
303 }
304 
305 static void
306 mt7915_init_wiphy(struct ieee80211_hw *hw)
307 {
308 	struct mt7915_phy *phy = mt7915_hw_phy(hw);
309 	struct wiphy *wiphy = hw->wiphy;
310 
311 	hw->queues = 4;
312 	hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF;
313 	hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF;
314 	hw->netdev_features = NETIF_F_RXCSUM;
315 
316 	hw->radiotap_timestamp.units_pos =
317 		IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
318 
319 	phy->slottime = 9;
320 
321 	hw->sta_data_size = sizeof(struct mt7915_sta);
322 	hw->vif_data_size = sizeof(struct mt7915_vif);
323 
324 	wiphy->iface_combinations = if_comb;
325 	wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
326 	wiphy->reg_notifier = mt7915_regd_notifier;
327 	wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
328 
329 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
330 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
331 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
332 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
333 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
334 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
335 
336 	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
337 	ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
338 	ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
339 	ieee80211_hw_set(hw, WANT_MONITOR_VIF);
340 
341 	hw->max_tx_fragments = 4;
342 
343 	if (phy->mt76->cap.has_2ghz)
344 		phy->mt76->sband_2g.sband.ht_cap.cap |=
345 			IEEE80211_HT_CAP_LDPC_CODING |
346 			IEEE80211_HT_CAP_MAX_AMSDU;
347 
348 	if (phy->mt76->cap.has_5ghz) {
349 		phy->mt76->sband_5g.sband.ht_cap.cap |=
350 			IEEE80211_HT_CAP_LDPC_CODING |
351 			IEEE80211_HT_CAP_MAX_AMSDU;
352 		phy->mt76->sband_5g.sband.vht_cap.cap |=
353 			IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
354 			IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
355 	}
356 
357 	mt76_set_stream_caps(phy->mt76, true);
358 	mt7915_set_stream_vht_txbf_caps(phy);
359 	mt7915_set_stream_he_caps(phy);
360 }
361 
362 static void
363 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
364 {
365 	u32 mask, set;
366 
367 	mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
368 		       MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
369 	mt76_set(dev, MT_TMAC_CTCR0(band),
370 		 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
371 		 MT_TMAC_CTCR0_INS_DDLMT_EN);
372 
373 	mask = MT_MDP_RCFR0_MCU_RX_MGMT |
374 	       MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
375 	       MT_MDP_RCFR0_MCU_RX_CTL_BAR;
376 	set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
377 	      FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
378 	      FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
379 	mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
380 
381 	mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
382 	       MT_MDP_RCFR1_RX_DROPPED_UCAST |
383 	       MT_MDP_RCFR1_RX_DROPPED_MCAST;
384 	set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
385 	      FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
386 	      FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
387 	mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
388 
389 	mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
390 	/* disable rx rate report by default due to hw issues */
391 	mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
392 }
393 
394 static void mt7915_mac_init(struct mt7915_dev *dev)
395 {
396 	int i;
397 
398 	mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, 0x400);
399 	/* enable hardware de-agg */
400 	mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
401 
402 	for (i = 0; i < MT7915_WTBL_SIZE; i++)
403 		mt7915_mac_wtbl_update(dev, i,
404 				       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
405 	for (i = 0; i < 2; i++)
406 		mt7915_mac_init_band(dev, i);
407 
408 	if (IS_ENABLED(CONFIG_MT76_LEDS)) {
409 		i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
410 		mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
411 	}
412 }
413 
414 static int mt7915_txbf_init(struct mt7915_dev *dev)
415 {
416 	int ret;
417 
418 	if (dev->dbdc_support) {
419 		ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
420 		if (ret)
421 			return ret;
422 	}
423 
424 	/* trigger sounding packets */
425 	ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
426 	if (ret)
427 		return ret;
428 
429 	/* enable eBF */
430 	return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
431 }
432 
433 static int mt7915_register_ext_phy(struct mt7915_dev *dev)
434 {
435 	struct mt7915_phy *phy = mt7915_ext_phy(dev);
436 	struct mt76_phy *mphy;
437 	int ret;
438 
439 	if (!dev->dbdc_support)
440 		return 0;
441 
442 	if (phy)
443 		return 0;
444 
445 	mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops);
446 	if (!mphy)
447 		return -ENOMEM;
448 
449 	phy = mphy->priv;
450 	phy->dev = dev;
451 	phy->mt76 = mphy;
452 	mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
453 	mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
454 
455 	INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
456 
457 	mt7915_eeprom_parse_band_config(phy);
458 	mt7915_init_wiphy(mphy->hw);
459 
460 	memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
461 	       ETH_ALEN);
462 	mt76_eeprom_override(mphy);
463 
464 	ret = mt7915_init_tx_queues(phy, MT7915_TXQ_BAND1,
465 				    MT7915_TX_RING_SIZE);
466 	if (ret)
467 		goto error;
468 
469 	ret = mt76_register_phy(mphy, true, mt76_rates,
470 				ARRAY_SIZE(mt76_rates));
471 	if (ret)
472 		goto error;
473 
474 	ret = mt7915_thermal_init(phy);
475 	if (ret)
476 		goto error;
477 
478 	ret = mt7915_init_debugfs(phy);
479 	if (ret)
480 		goto error;
481 
482 	return 0;
483 
484 error:
485 	ieee80211_free_hw(mphy->hw);
486 	return ret;
487 }
488 
489 static void mt7915_init_work(struct work_struct *work)
490 {
491 	struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
492 				 init_work);
493 
494 	mt7915_mcu_set_eeprom(dev);
495 	mt7915_mac_init(dev);
496 	mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
497 	mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
498 	mt7915_txbf_init(dev);
499 }
500 
501 static void mt7915_wfsys_reset(struct mt7915_dev *dev)
502 {
503 	u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
504 
505 #define MT_MCU_DUMMY_RANDOM	GENMASK(15, 0)
506 #define MT_MCU_DUMMY_DEFAULT	GENMASK(31, 16)
507 
508 	mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
509 
510 	/* change to software control */
511 	val |= MT_TOP_PWR_SW_RST;
512 	mt76_wr(dev, MT_TOP_PWR_CTRL, val);
513 
514 	/* reset wfsys */
515 	val &= ~MT_TOP_PWR_SW_RST;
516 	mt76_wr(dev, MT_TOP_PWR_CTRL, val);
517 
518 	/* release wfsys then mcu re-excutes romcode */
519 	val |= MT_TOP_PWR_SW_RST;
520 	mt76_wr(dev, MT_TOP_PWR_CTRL, val);
521 
522 	/* switch to hw control */
523 	val &= ~MT_TOP_PWR_SW_RST;
524 	val |= MT_TOP_PWR_HW_CTRL;
525 	mt76_wr(dev, MT_TOP_PWR_CTRL, val);
526 
527 	/* check whether mcu resets to default */
528 	if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_DEFAULT,
529 			    MT_MCU_DUMMY_DEFAULT, 1000)) {
530 		dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
531 		return;
532 	}
533 
534 	/* wfsys reset won't clear host registers */
535 	mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
536 
537 	msleep(100);
538 }
539 
540 static int mt7915_init_hardware(struct mt7915_dev *dev)
541 {
542 	int ret, idx;
543 
544 	mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
545 
546 	INIT_WORK(&dev->init_work, mt7915_init_work);
547 	dev->dbdc_support = !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5));
548 
549 	/* If MCU was already running, it is likely in a bad state */
550 	if (mt76_get_field(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE) >
551 	    FW_STATE_FW_DOWNLOAD)
552 		mt7915_wfsys_reset(dev);
553 
554 	ret = mt7915_dma_init(dev);
555 	if (ret)
556 		return ret;
557 
558 	set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
559 
560 	/*
561 	 * force firmware operation mode into normal state,
562 	 * which should be set before firmware download stage.
563 	 */
564 	mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
565 
566 	ret = mt7915_mcu_init(dev);
567 	if (ret) {
568 		/* Reset and try again */
569 		mt7915_wfsys_reset(dev);
570 
571 		ret = mt7915_mcu_init(dev);
572 		if (ret)
573 			return ret;
574 	}
575 
576 	ret = mt7915_eeprom_init(dev);
577 	if (ret < 0)
578 		return ret;
579 
580 
581 	if (dev->flash_mode) {
582 		ret = mt7915_mcu_apply_group_cal(dev);
583 		if (ret)
584 			return ret;
585 	}
586 
587 	/* Beacon and mgmt frames should occupy wcid 0 */
588 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
589 	if (idx)
590 		return -ENOSPC;
591 
592 	dev->mt76.global_wcid.idx = idx;
593 	dev->mt76.global_wcid.hw_key_idx = -1;
594 	dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
595 	rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
596 
597 	return 0;
598 }
599 
600 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
601 {
602 	int nss;
603 	u32 *cap;
604 
605 	if (!phy->mt76->cap.has_5ghz)
606 		return;
607 
608 	nss = hweight8(phy->mt76->chainmask);
609 	cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
610 
611 	*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
612 		IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
613 		(3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
614 
615 	*cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
616 		  IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
617 		  IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
618 
619 	if (nss < 2)
620 		return;
621 
622 	*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
623 		IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
624 		FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
625 			   nss - 1);
626 }
627 
628 static void
629 mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap,
630 			       int vif, int nss)
631 {
632 	struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
633 	u8 c;
634 
635 #ifdef CONFIG_MAC80211_MESH
636 	if (vif == NL80211_IFTYPE_MESH_POINT)
637 		return;
638 #endif
639 
640 	elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
641 	elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
642 
643 	c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
644 	    IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
645 	elem->phy_cap_info[5] &= ~c;
646 
647 	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
648 	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
649 	elem->phy_cap_info[6] &= ~c;
650 
651 	elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
652 
653 	c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
654 	    IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
655 	    IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
656 	elem->phy_cap_info[2] |= c;
657 
658 	c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
659 	    IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
660 	    IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
661 	elem->phy_cap_info[4] |= c;
662 
663 	/* do not support NG16 due to spec D4.0 changes subcarrier idx */
664 	c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
665 	    IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
666 
667 	if (vif == NL80211_IFTYPE_STATION)
668 		c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
669 
670 	elem->phy_cap_info[6] |= c;
671 
672 	if (nss < 2)
673 		return;
674 
675 	/* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
676 	elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3;
677 
678 	if (vif != NL80211_IFTYPE_AP)
679 		return;
680 
681 	elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
682 	elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
683 
684 	/* num_snd_dim
685 	 * for mt7915, max supported nss is 2 for bw > 80MHz
686 	 */
687 	c = (nss - 1) |
688 	    IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2;
689 	elem->phy_cap_info[5] |= c;
690 
691 	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
692 	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
693 	elem->phy_cap_info[6] |= c;
694 }
695 
696 static void
697 mt7915_gen_ppe_thresh(u8 *he_ppet, int nss)
698 {
699 	u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */
700 	u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71};
701 
702 	he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |
703 		     FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,
704 				ru_bit_mask);
705 
706 	ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *
707 		    nss * hweight8(ru_bit_mask) * 2;
708 	ppet_size = DIV_ROUND_UP(ppet_bits, 8);
709 
710 	for (i = 0; i < ppet_size - 1; i++)
711 		he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];
712 
713 	he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &
714 			 (0xff >> (8 - (ppet_bits - 1) % 8));
715 }
716 
717 static int
718 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
719 		    struct ieee80211_sband_iftype_data *data)
720 {
721 	int i, idx = 0, nss = hweight8(phy->mt76->chainmask);
722 	u16 mcs_map = 0;
723 	u16 mcs_map_160 = 0;
724 
725 	for (i = 0; i < 8; i++) {
726 		if (i < nss)
727 			mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
728 		else
729 			mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
730 
731 		/* Can do 1/2 of NSS streams in 160Mhz mode. */
732 		if (i < nss / 2)
733 			mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
734 		else
735 			mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
736 	}
737 
738 	for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
739 		struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
740 		struct ieee80211_he_cap_elem *he_cap_elem =
741 				&he_cap->he_cap_elem;
742 		struct ieee80211_he_mcs_nss_supp *he_mcs =
743 				&he_cap->he_mcs_nss_supp;
744 
745 		switch (i) {
746 		case NL80211_IFTYPE_STATION:
747 		case NL80211_IFTYPE_AP:
748 #ifdef CONFIG_MAC80211_MESH
749 		case NL80211_IFTYPE_MESH_POINT:
750 #endif
751 			break;
752 		default:
753 			continue;
754 		}
755 
756 		data[idx].types_mask = BIT(i);
757 		he_cap->has_he = true;
758 
759 		he_cap_elem->mac_cap_info[0] =
760 			IEEE80211_HE_MAC_CAP0_HTC_HE;
761 		he_cap_elem->mac_cap_info[3] =
762 			IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
763 			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
764 		he_cap_elem->mac_cap_info[4] =
765 			IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
766 
767 		if (band == NL80211_BAND_2GHZ)
768 			he_cap_elem->phy_cap_info[0] =
769 				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
770 		else if (band == NL80211_BAND_5GHZ)
771 			he_cap_elem->phy_cap_info[0] =
772 				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
773 				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
774 				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
775 
776 		he_cap_elem->phy_cap_info[1] =
777 			IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
778 		he_cap_elem->phy_cap_info[2] =
779 			IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
780 			IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
781 
782 		switch (i) {
783 		case NL80211_IFTYPE_AP:
784 			he_cap_elem->mac_cap_info[0] |=
785 				IEEE80211_HE_MAC_CAP0_TWT_RES;
786 			he_cap_elem->mac_cap_info[2] |=
787 				IEEE80211_HE_MAC_CAP2_BSR;
788 			he_cap_elem->mac_cap_info[4] |=
789 				IEEE80211_HE_MAC_CAP4_BQR;
790 			he_cap_elem->mac_cap_info[5] |=
791 				IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
792 			he_cap_elem->phy_cap_info[3] |=
793 				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
794 				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
795 			he_cap_elem->phy_cap_info[6] |=
796 				IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
797 				IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
798 			he_cap_elem->phy_cap_info[9] |=
799 				IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
800 				IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
801 			break;
802 		case NL80211_IFTYPE_STATION:
803 			he_cap_elem->mac_cap_info[1] |=
804 				IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
805 
806 			if (band == NL80211_BAND_2GHZ)
807 				he_cap_elem->phy_cap_info[0] |=
808 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
809 			else if (band == NL80211_BAND_5GHZ)
810 				he_cap_elem->phy_cap_info[0] |=
811 					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
812 
813 			he_cap_elem->phy_cap_info[1] |=
814 				IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
815 				IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
816 			he_cap_elem->phy_cap_info[3] |=
817 				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
818 				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
819 			he_cap_elem->phy_cap_info[6] |=
820 				IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
821 				IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
822 				IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
823 			he_cap_elem->phy_cap_info[7] |=
824 				IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
825 				IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
826 			he_cap_elem->phy_cap_info[8] |=
827 				IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
828 				IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
829 				IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
830 				IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
831 			he_cap_elem->phy_cap_info[9] |=
832 				IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
833 				IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
834 				IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
835 				IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
836 				IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
837 				IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
838 			break;
839 		}
840 
841 		he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
842 		he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
843 		he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
844 		he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
845 		he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160);
846 		he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160);
847 
848 		mt7915_set_stream_he_txbf_caps(he_cap, i, nss);
849 
850 		memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
851 		if (he_cap_elem->phy_cap_info[6] &
852 		    IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
853 			mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss);
854 		} else {
855 			he_cap_elem->phy_cap_info[9] |=
856 				u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
857 					       IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
858 		}
859 		idx++;
860 	}
861 
862 	return idx;
863 }
864 
865 void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
866 {
867 	struct ieee80211_sband_iftype_data *data;
868 	struct ieee80211_supported_band *band;
869 	int n;
870 
871 	if (phy->mt76->cap.has_2ghz) {
872 		data = phy->iftype[NL80211_BAND_2GHZ];
873 		n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
874 
875 		band = &phy->mt76->sband_2g.sband;
876 		band->iftype_data = data;
877 		band->n_iftype_data = n;
878 	}
879 
880 	if (phy->mt76->cap.has_5ghz) {
881 		data = phy->iftype[NL80211_BAND_5GHZ];
882 		n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
883 
884 		band = &phy->mt76->sband_5g.sband;
885 		band->iftype_data = data;
886 		band->n_iftype_data = n;
887 	}
888 }
889 
890 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
891 {
892 	struct mt7915_phy *phy = mt7915_ext_phy(dev);
893 	struct mt76_phy *mphy = dev->mt76.phy2;
894 
895 	if (!phy)
896 		return;
897 
898 	mt7915_unregister_thermal(phy);
899 	mt76_unregister_phy(mphy);
900 	ieee80211_free_hw(mphy->hw);
901 }
902 
903 int mt7915_register_device(struct mt7915_dev *dev)
904 {
905 	struct ieee80211_hw *hw = mt76_hw(dev);
906 	int ret;
907 
908 	dev->phy.dev = dev;
909 	dev->phy.mt76 = &dev->mt76.phy;
910 	dev->mt76.phy.priv = &dev->phy;
911 	INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
912 	INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
913 	INIT_LIST_HEAD(&dev->sta_rc_list);
914 	INIT_LIST_HEAD(&dev->sta_poll_list);
915 	INIT_LIST_HEAD(&dev->twt_list);
916 	spin_lock_init(&dev->sta_poll_lock);
917 
918 	init_waitqueue_head(&dev->reset_wait);
919 	INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
920 
921 	ret = mt7915_init_hardware(dev);
922 	if (ret)
923 		return ret;
924 
925 	mt7915_init_wiphy(hw);
926 
927 	if (!dev->dbdc_support)
928 		dev->mphy.sband_5g.sband.vht_cap.cap |=
929 			IEEE80211_VHT_CAP_SHORT_GI_160 |
930 			IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
931 
932 	dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
933 	dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
934 	dev->phy.dfs_state = -1;
935 
936 #ifdef CONFIG_NL80211_TESTMODE
937 	dev->mt76.test_ops = &mt7915_testmode_ops;
938 #endif
939 
940 	/* init led callbacks */
941 	if (IS_ENABLED(CONFIG_MT76_LEDS)) {
942 		dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness;
943 		dev->mt76.led_cdev.blink_set = mt7915_led_set_blink;
944 	}
945 
946 	ret = mt76_register_device(&dev->mt76, true, mt76_rates,
947 				   ARRAY_SIZE(mt76_rates));
948 	if (ret)
949 		return ret;
950 
951 	ret = mt7915_thermal_init(&dev->phy);
952 	if (ret)
953 		return ret;
954 
955 	ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
956 
957 	ret = mt7915_register_ext_phy(dev);
958 	if (ret)
959 		return ret;
960 
961 	return mt7915_init_debugfs(&dev->phy);
962 }
963 
964 void mt7915_unregister_device(struct mt7915_dev *dev)
965 {
966 	mt7915_unregister_ext_phy(dev);
967 	mt7915_unregister_thermal(&dev->phy);
968 	mt76_unregister_device(&dev->mt76);
969 	mt7915_mcu_exit(dev);
970 	mt7915_tx_token_put(dev);
971 	mt7915_dma_cleanup(dev);
972 	tasklet_disable(&dev->irq_tasklet);
973 
974 	mt76_free_device(&dev->mt76);
975 }
976