1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/etherdevice.h> 5 #include <linux/hwmon.h> 6 #include <linux/hwmon-sysfs.h> 7 #include <linux/thermal.h> 8 #include "mt7915.h" 9 #include "mac.h" 10 #include "mcu.h" 11 #include "eeprom.h" 12 13 static const struct ieee80211_iface_limit if_limits[] = { 14 { 15 .max = 1, 16 .types = BIT(NL80211_IFTYPE_ADHOC) 17 }, { 18 .max = 16, 19 .types = BIT(NL80211_IFTYPE_AP) 20 #ifdef CONFIG_MAC80211_MESH 21 | BIT(NL80211_IFTYPE_MESH_POINT) 22 #endif 23 }, { 24 .max = MT7915_MAX_INTERFACES, 25 .types = BIT(NL80211_IFTYPE_STATION) 26 } 27 }; 28 29 static const struct ieee80211_iface_combination if_comb[] = { 30 { 31 .limits = if_limits, 32 .n_limits = ARRAY_SIZE(if_limits), 33 .max_interfaces = MT7915_MAX_INTERFACES, 34 .num_different_channels = 1, 35 .beacon_int_infra_match = true, 36 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 37 BIT(NL80211_CHAN_WIDTH_20) | 38 BIT(NL80211_CHAN_WIDTH_40) | 39 BIT(NL80211_CHAN_WIDTH_80) | 40 BIT(NL80211_CHAN_WIDTH_160) | 41 BIT(NL80211_CHAN_WIDTH_80P80), 42 } 43 }; 44 45 static ssize_t mt7915_thermal_temp_show(struct device *dev, 46 struct device_attribute *attr, 47 char *buf) 48 { 49 struct mt7915_phy *phy = dev_get_drvdata(dev); 50 int i = to_sensor_dev_attr(attr)->index; 51 int temperature; 52 53 if (i) 54 return sprintf(buf, "%u\n", phy->throttle_temp[i - 1] * 1000); 55 56 temperature = mt7915_mcu_get_temperature(phy); 57 if (temperature < 0) 58 return temperature; 59 60 /* display in millidegree celcius */ 61 return sprintf(buf, "%u\n", temperature * 1000); 62 } 63 64 static ssize_t mt7915_thermal_temp_store(struct device *dev, 65 struct device_attribute *attr, 66 const char *buf, size_t count) 67 { 68 struct mt7915_phy *phy = dev_get_drvdata(dev); 69 int ret, i = to_sensor_dev_attr(attr)->index; 70 long val; 71 72 ret = kstrtol(buf, 10, &val); 73 if (ret < 0) 74 return ret; 75 76 mutex_lock(&phy->dev->mt76.mutex); 77 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130); 78 phy->throttle_temp[i - 1] = val; 79 mutex_unlock(&phy->dev->mt76.mutex); 80 81 return count; 82 } 83 84 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0); 85 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1); 86 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2); 87 88 static struct attribute *mt7915_hwmon_attrs[] = { 89 &sensor_dev_attr_temp1_input.dev_attr.attr, 90 &sensor_dev_attr_temp1_crit.dev_attr.attr, 91 &sensor_dev_attr_temp1_max.dev_attr.attr, 92 NULL, 93 }; 94 ATTRIBUTE_GROUPS(mt7915_hwmon); 95 96 static int 97 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev, 98 unsigned long *state) 99 { 100 *state = MT7915_THERMAL_THROTTLE_MAX; 101 102 return 0; 103 } 104 105 static int 106 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev, 107 unsigned long *state) 108 { 109 struct mt7915_phy *phy = cdev->devdata; 110 111 *state = phy->throttle_state; 112 113 return 0; 114 } 115 116 static int 117 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev, 118 unsigned long state) 119 { 120 struct mt7915_phy *phy = cdev->devdata; 121 int ret; 122 123 if (state > MT7915_THERMAL_THROTTLE_MAX) 124 return -EINVAL; 125 126 if (phy->throttle_temp[0] > phy->throttle_temp[1]) 127 return 0; 128 129 if (state == phy->throttle_state) 130 return 0; 131 132 ret = mt7915_mcu_set_thermal_throttling(phy, state); 133 if (ret) 134 return ret; 135 136 phy->throttle_state = state; 137 138 return 0; 139 } 140 141 static const struct thermal_cooling_device_ops mt7915_thermal_ops = { 142 .get_max_state = mt7915_thermal_get_max_throttle_state, 143 .get_cur_state = mt7915_thermal_get_cur_throttle_state, 144 .set_cur_state = mt7915_thermal_set_cur_throttle_state, 145 }; 146 147 static void mt7915_unregister_thermal(struct mt7915_phy *phy) 148 { 149 struct wiphy *wiphy = phy->mt76->hw->wiphy; 150 151 if (!phy->cdev) 152 return; 153 154 sysfs_remove_link(&wiphy->dev.kobj, "cooling_device"); 155 thermal_cooling_device_unregister(phy->cdev); 156 } 157 158 static int mt7915_thermal_init(struct mt7915_phy *phy) 159 { 160 struct wiphy *wiphy = phy->mt76->hw->wiphy; 161 struct thermal_cooling_device *cdev; 162 struct device *hwmon; 163 const char *name; 164 165 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s", 166 wiphy_name(wiphy)); 167 168 cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops); 169 if (!IS_ERR(cdev)) { 170 if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj, 171 "cooling_device") < 0) 172 thermal_cooling_device_unregister(cdev); 173 else 174 phy->cdev = cdev; 175 } 176 177 if (!IS_REACHABLE(CONFIG_HWMON)) 178 return 0; 179 180 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy, 181 mt7915_hwmon_groups); 182 if (IS_ERR(hwmon)) 183 return PTR_ERR(hwmon); 184 185 /* initialize critical/maximum high temperature */ 186 phy->throttle_temp[0] = 110; 187 phy->throttle_temp[1] = 120; 188 189 return 0; 190 } 191 192 static void mt7915_led_set_config(struct led_classdev *led_cdev, 193 u8 delay_on, u8 delay_off) 194 { 195 struct mt7915_dev *dev; 196 struct mt76_dev *mt76; 197 u32 val; 198 199 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev); 200 dev = container_of(mt76, struct mt7915_dev, mt76); 201 202 /* select TX blink mode, 2: only data frames */ 203 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2); 204 205 /* enable LED */ 206 mt76_wr(dev, MT_LED_EN(0), 1); 207 208 /* set LED Tx blink on/off time */ 209 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) | 210 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off); 211 mt76_wr(dev, MT_LED_TX_BLINK(0), val); 212 213 /* control LED */ 214 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK; 215 if (dev->mt76.led_al) 216 val |= MT_LED_CTRL_POLARITY; 217 218 mt76_wr(dev, MT_LED_CTRL(0), val); 219 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK); 220 } 221 222 static int mt7915_led_set_blink(struct led_classdev *led_cdev, 223 unsigned long *delay_on, 224 unsigned long *delay_off) 225 { 226 u16 delta_on = 0, delta_off = 0; 227 228 #define HW_TICK 10 229 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK) 230 231 if (*delay_on) 232 delta_on = TO_HW_TICK(*delay_on); 233 if (*delay_off) 234 delta_off = TO_HW_TICK(*delay_off); 235 236 mt7915_led_set_config(led_cdev, delta_on, delta_off); 237 238 return 0; 239 } 240 241 static void mt7915_led_set_brightness(struct led_classdev *led_cdev, 242 enum led_brightness brightness) 243 { 244 if (!brightness) 245 mt7915_led_set_config(led_cdev, 0, 0xff); 246 else 247 mt7915_led_set_config(led_cdev, 0xff, 0); 248 } 249 250 static void 251 mt7915_init_txpower(struct mt7915_dev *dev, 252 struct ieee80211_supported_band *sband) 253 { 254 int i, n_chains = hweight8(dev->mphy.antenna_mask); 255 int nss_delta = mt76_tx_power_nss_delta(n_chains); 256 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band); 257 struct mt76_power_limits limits; 258 259 for (i = 0; i < sband->n_channels; i++) { 260 struct ieee80211_channel *chan = &sband->channels[i]; 261 u32 target_power = 0; 262 int j; 263 264 for (j = 0; j < n_chains; j++) { 265 u32 val; 266 267 val = mt7915_eeprom_get_target_power(dev, chan, j); 268 target_power = max(target_power, val); 269 } 270 271 target_power += pwr_delta; 272 target_power = mt76_get_rate_power_limits(&dev->mphy, chan, 273 &limits, 274 target_power); 275 target_power += nss_delta; 276 target_power = DIV_ROUND_UP(target_power, 2); 277 chan->max_power = min_t(int, chan->max_reg_power, 278 target_power); 279 chan->orig_mpwr = target_power; 280 } 281 } 282 283 static void 284 mt7915_regd_notifier(struct wiphy *wiphy, 285 struct regulatory_request *request) 286 { 287 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 288 struct mt7915_dev *dev = mt7915_hw_dev(hw); 289 struct mt76_phy *mphy = hw->priv; 290 struct mt7915_phy *phy = mphy->priv; 291 292 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); 293 dev->mt76.region = request->dfs_region; 294 295 if (dev->mt76.region == NL80211_DFS_UNSET) 296 mt7915_mcu_rdd_background_enable(phy, NULL); 297 298 mt7915_init_txpower(dev, &mphy->sband_2g.sband); 299 mt7915_init_txpower(dev, &mphy->sband_5g.sband); 300 301 mphy->dfs_state = MT_DFS_STATE_UNKNOWN; 302 mt7915_dfs_init_radar_detector(phy); 303 } 304 305 static void 306 mt7915_init_wiphy(struct ieee80211_hw *hw) 307 { 308 struct mt7915_phy *phy = mt7915_hw_phy(hw); 309 struct mt76_dev *mdev = &phy->dev->mt76; 310 struct wiphy *wiphy = hw->wiphy; 311 struct mt7915_dev *dev = phy->dev; 312 313 hw->queues = 4; 314 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; 315 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; 316 hw->netdev_features = NETIF_F_RXCSUM; 317 318 hw->radiotap_timestamp.units_pos = 319 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; 320 321 phy->slottime = 9; 322 323 hw->sta_data_size = sizeof(struct mt7915_sta); 324 hw->vif_data_size = sizeof(struct mt7915_vif); 325 326 wiphy->iface_combinations = if_comb; 327 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 328 wiphy->reg_notifier = mt7915_regd_notifier; 329 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; 330 331 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR); 332 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 333 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); 334 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); 335 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); 336 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); 337 338 if (!mdev->dev->of_node || 339 !of_property_read_bool(mdev->dev->of_node, 340 "mediatek,disable-radar-background")) 341 wiphy_ext_feature_set(wiphy, 342 NL80211_EXT_FEATURE_RADAR_BACKGROUND); 343 344 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 345 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); 346 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); 347 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 348 349 hw->max_tx_fragments = 4; 350 351 if (phy->mt76->cap.has_2ghz) 352 phy->mt76->sband_2g.sband.ht_cap.cap |= 353 IEEE80211_HT_CAP_LDPC_CODING | 354 IEEE80211_HT_CAP_MAX_AMSDU; 355 356 if (phy->mt76->cap.has_5ghz) { 357 phy->mt76->sband_5g.sband.ht_cap.cap |= 358 IEEE80211_HT_CAP_LDPC_CODING | 359 IEEE80211_HT_CAP_MAX_AMSDU; 360 361 if (is_mt7915(&dev->mt76)) { 362 phy->mt76->sband_5g.sband.vht_cap.cap |= 363 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 | 364 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 365 366 if (!dev->dbdc_support) 367 phy->mt76->sband_5g.sband.vht_cap.cap |= 368 IEEE80211_VHT_CAP_SHORT_GI_160 | 369 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; 370 } else { 371 phy->mt76->sband_5g.sband.vht_cap.cap |= 372 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 373 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 374 375 /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */ 376 phy->mt76->sband_5g.sband.vht_cap.cap |= 377 IEEE80211_VHT_CAP_SHORT_GI_160 | 378 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; 379 } 380 } 381 382 mt76_set_stream_caps(phy->mt76, true); 383 mt7915_set_stream_vht_txbf_caps(phy); 384 mt7915_set_stream_he_caps(phy); 385 386 wiphy->available_antennas_rx = phy->mt76->antenna_mask; 387 wiphy->available_antennas_tx = phy->mt76->antenna_mask; 388 } 389 390 static void 391 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band) 392 { 393 u32 mask, set; 394 395 mt76_rmw_field(dev, MT_TMAC_CTCR0(band), 396 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); 397 mt76_set(dev, MT_TMAC_CTCR0(band), 398 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 399 MT_TMAC_CTCR0_INS_DDLMT_EN); 400 401 mask = MT_MDP_RCFR0_MCU_RX_MGMT | 402 MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR | 403 MT_MDP_RCFR0_MCU_RX_CTL_BAR; 404 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) | 405 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) | 406 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF); 407 mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set); 408 409 mask = MT_MDP_RCFR1_MCU_RX_BYPASS | 410 MT_MDP_RCFR1_RX_DROPPED_UCAST | 411 MT_MDP_RCFR1_RX_DROPPED_MCAST; 412 set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) | 413 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) | 414 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF); 415 mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set); 416 417 mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680); 418 419 /* mt7915: disable rx rate report by default due to hw issues */ 420 mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN); 421 } 422 423 static void mt7915_mac_init(struct mt7915_dev *dev) 424 { 425 int i; 426 u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680; 427 428 /* config pse qid6 wfdma port selection */ 429 if (!is_mt7915(&dev->mt76) && dev->hif2) 430 mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0, 431 MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK); 432 433 mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len); 434 435 /* enable hardware de-agg */ 436 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN); 437 438 for (i = 0; i < mt7915_wtbl_size(dev); i++) 439 mt7915_mac_wtbl_update(dev, i, 440 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 441 for (i = 0; i < 2; i++) 442 mt7915_mac_init_band(dev, i); 443 444 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 445 i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2; 446 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4); 447 } 448 } 449 450 static int mt7915_txbf_init(struct mt7915_dev *dev) 451 { 452 int ret; 453 454 if (dev->dbdc_support) { 455 ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE); 456 if (ret) 457 return ret; 458 } 459 460 /* trigger sounding packets */ 461 ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON); 462 if (ret) 463 return ret; 464 465 /* enable eBF */ 466 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE); 467 } 468 469 static int mt7915_register_ext_phy(struct mt7915_dev *dev) 470 { 471 struct mt7915_phy *phy = mt7915_ext_phy(dev); 472 struct mt76_phy *mphy; 473 int ret; 474 475 if (!dev->dbdc_support) 476 return 0; 477 478 if (phy) 479 return 0; 480 481 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops); 482 if (!mphy) 483 return -ENOMEM; 484 485 phy = mphy->priv; 486 phy->dev = dev; 487 phy->mt76 = mphy; 488 489 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work); 490 491 mt7915_eeprom_parse_hw_cap(dev, phy); 492 493 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2, 494 ETH_ALEN); 495 /* Make the secondary PHY MAC address local without overlapping with 496 * the usual MAC address allocation scheme on multiple virtual interfaces 497 */ 498 if (!is_valid_ether_addr(mphy->macaddr)) { 499 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 500 ETH_ALEN); 501 mphy->macaddr[0] |= 2; 502 mphy->macaddr[0] ^= BIT(7); 503 } 504 mt76_eeprom_override(mphy); 505 506 /* init wiphy according to mphy and phy */ 507 mt7915_init_wiphy(mphy->hw); 508 ret = mt7915_init_tx_queues(phy, MT_TXQ_ID(1), 509 MT7915_TX_RING_SIZE, 510 MT_TXQ_RING_BASE(1)); 511 if (ret) 512 goto error; 513 514 ret = mt76_register_phy(mphy, true, mt76_rates, 515 ARRAY_SIZE(mt76_rates)); 516 if (ret) 517 goto error; 518 519 ret = mt7915_thermal_init(phy); 520 if (ret) 521 goto error; 522 523 ret = mt7915_init_debugfs(phy); 524 if (ret) 525 goto error; 526 527 return 0; 528 529 error: 530 ieee80211_free_hw(mphy->hw); 531 return ret; 532 } 533 534 static void mt7915_init_work(struct work_struct *work) 535 { 536 struct mt7915_dev *dev = container_of(work, struct mt7915_dev, 537 init_work); 538 539 mt7915_mcu_set_eeprom(dev); 540 mt7915_mac_init(dev); 541 mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband); 542 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband); 543 mt7915_txbf_init(dev); 544 } 545 546 static void mt7915_wfsys_reset(struct mt7915_dev *dev) 547 { 548 #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0) 549 #define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16) 550 551 if (is_mt7915(&dev->mt76)) { 552 u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON; 553 554 mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM); 555 556 /* change to software control */ 557 val |= MT_TOP_PWR_SW_RST; 558 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 559 560 /* reset wfsys */ 561 val &= ~MT_TOP_PWR_SW_RST; 562 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 563 564 /* release wfsys then mcu re-excutes romcode */ 565 val |= MT_TOP_PWR_SW_RST; 566 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 567 568 /* switch to hw control */ 569 val &= ~MT_TOP_PWR_SW_RST; 570 val |= MT_TOP_PWR_HW_CTRL; 571 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 572 573 /* check whether mcu resets to default */ 574 if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR, 575 MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT, 576 1000)) { 577 dev_err(dev->mt76.dev, "wifi subsystem reset failure\n"); 578 return; 579 } 580 581 /* wfsys reset won't clear host registers */ 582 mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE); 583 584 msleep(100); 585 } else { 586 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1); 587 msleep(20); 588 589 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1); 590 msleep(20); 591 } 592 } 593 594 static int mt7915_init_hardware(struct mt7915_dev *dev) 595 { 596 int ret, idx; 597 598 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); 599 600 INIT_WORK(&dev->init_work, mt7915_init_work); 601 602 dev->dbdc_support = is_mt7915(&dev->mt76) ? 603 !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true; 604 605 /* If MCU was already running, it is likely in a bad state */ 606 if (mt76_get_field(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE) > 607 FW_STATE_FW_DOWNLOAD) 608 mt7915_wfsys_reset(dev); 609 610 ret = mt7915_dma_init(dev); 611 if (ret) 612 return ret; 613 614 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 615 616 ret = mt7915_mcu_init(dev); 617 if (ret) { 618 /* Reset and try again */ 619 mt7915_wfsys_reset(dev); 620 621 ret = mt7915_mcu_init(dev); 622 if (ret) 623 return ret; 624 } 625 626 ret = mt7915_eeprom_init(dev); 627 if (ret < 0) 628 return ret; 629 630 if (dev->flash_mode) { 631 ret = mt7915_mcu_apply_group_cal(dev); 632 if (ret) 633 return ret; 634 } 635 636 /* Beacon and mgmt frames should occupy wcid 0 */ 637 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA); 638 if (idx) 639 return -ENOSPC; 640 641 dev->mt76.global_wcid.idx = idx; 642 dev->mt76.global_wcid.hw_key_idx = -1; 643 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; 644 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 645 646 return 0; 647 } 648 649 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy) 650 { 651 int nss; 652 u32 *cap; 653 654 if (!phy->mt76->cap.has_5ghz) 655 return; 656 657 nss = hweight8(phy->mt76->chainmask); 658 cap = &phy->mt76->sband_5g.sband.vht_cap.cap; 659 660 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 661 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 662 (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 663 664 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK | 665 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 666 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE); 667 668 if (nss < 2) 669 return; 670 671 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 672 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE | 673 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 674 nss - 1); 675 } 676 677 static void 678 mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap, 679 int vif, int nss) 680 { 681 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 682 u8 c; 683 684 #ifdef CONFIG_MAC80211_MESH 685 if (vif == NL80211_IFTYPE_MESH_POINT) 686 return; 687 #endif 688 689 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 690 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 691 692 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK | 693 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK; 694 elem->phy_cap_info[5] &= ~c; 695 696 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 697 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 698 elem->phy_cap_info[6] &= ~c; 699 700 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK; 701 702 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 703 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO | 704 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO; 705 elem->phy_cap_info[2] |= c; 706 707 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 708 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 | 709 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4; 710 elem->phy_cap_info[4] |= c; 711 712 /* do not support NG16 due to spec D4.0 changes subcarrier idx */ 713 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 714 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU; 715 716 if (vif == NL80211_IFTYPE_STATION) 717 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO; 718 719 elem->phy_cap_info[6] |= c; 720 721 if (nss < 2) 722 return; 723 724 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ 725 elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3; 726 727 if (vif != NL80211_IFTYPE_AP) 728 return; 729 730 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 731 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 732 733 /* num_snd_dim 734 * for mt7915, max supported nss is 2 for bw > 80MHz 735 */ 736 c = (nss - 1) | 737 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2; 738 elem->phy_cap_info[5] |= c; 739 740 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 741 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 742 elem->phy_cap_info[6] |= c; 743 } 744 745 static void 746 mt7915_gen_ppe_thresh(u8 *he_ppet, int nss) 747 { 748 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */ 749 u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71}; 750 751 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) | 752 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, 753 ru_bit_mask); 754 755 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE * 756 nss * hweight8(ru_bit_mask) * 2; 757 ppet_size = DIV_ROUND_UP(ppet_bits, 8); 758 759 for (i = 0; i < ppet_size - 1; i++) 760 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3]; 761 762 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] & 763 (0xff >> (8 - (ppet_bits - 1) % 8)); 764 } 765 766 static int 767 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, 768 struct ieee80211_sband_iftype_data *data) 769 { 770 int i, idx = 0, nss = hweight8(phy->mt76->chainmask); 771 u16 mcs_map = 0; 772 u16 mcs_map_160 = 0; 773 774 for (i = 0; i < 8; i++) { 775 if (i < nss) 776 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 777 else 778 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 779 780 /* Can do 1/2 of NSS streams in 160Mhz mode. */ 781 if (i < nss / 2) 782 mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 783 else 784 mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 785 } 786 787 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 788 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap; 789 struct ieee80211_he_cap_elem *he_cap_elem = 790 &he_cap->he_cap_elem; 791 struct ieee80211_he_mcs_nss_supp *he_mcs = 792 &he_cap->he_mcs_nss_supp; 793 794 switch (i) { 795 case NL80211_IFTYPE_STATION: 796 case NL80211_IFTYPE_AP: 797 #ifdef CONFIG_MAC80211_MESH 798 case NL80211_IFTYPE_MESH_POINT: 799 #endif 800 break; 801 default: 802 continue; 803 } 804 805 data[idx].types_mask = BIT(i); 806 he_cap->has_he = true; 807 808 he_cap_elem->mac_cap_info[0] = 809 IEEE80211_HE_MAC_CAP0_HTC_HE; 810 he_cap_elem->mac_cap_info[3] = 811 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 812 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 813 he_cap_elem->mac_cap_info[4] = 814 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 815 816 if (band == NL80211_BAND_2GHZ) 817 he_cap_elem->phy_cap_info[0] = 818 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 819 else if (band == NL80211_BAND_5GHZ) 820 he_cap_elem->phy_cap_info[0] = 821 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 822 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 823 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G; 824 825 he_cap_elem->phy_cap_info[1] = 826 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD; 827 he_cap_elem->phy_cap_info[2] = 828 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 829 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 830 831 switch (i) { 832 case NL80211_IFTYPE_AP: 833 he_cap_elem->mac_cap_info[0] |= 834 IEEE80211_HE_MAC_CAP0_TWT_RES; 835 he_cap_elem->mac_cap_info[2] |= 836 IEEE80211_HE_MAC_CAP2_BSR; 837 he_cap_elem->mac_cap_info[4] |= 838 IEEE80211_HE_MAC_CAP4_BQR; 839 he_cap_elem->mac_cap_info[5] |= 840 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX; 841 he_cap_elem->phy_cap_info[3] |= 842 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 843 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 844 he_cap_elem->phy_cap_info[6] |= 845 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 846 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 847 he_cap_elem->phy_cap_info[9] |= 848 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 849 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 850 break; 851 case NL80211_IFTYPE_STATION: 852 he_cap_elem->mac_cap_info[1] |= 853 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 854 855 if (band == NL80211_BAND_2GHZ) 856 he_cap_elem->phy_cap_info[0] |= 857 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G; 858 else if (band == NL80211_BAND_5GHZ) 859 he_cap_elem->phy_cap_info[0] |= 860 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G; 861 862 he_cap_elem->phy_cap_info[1] |= 863 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 864 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 865 he_cap_elem->phy_cap_info[3] |= 866 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 867 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 868 he_cap_elem->phy_cap_info[6] |= 869 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB | 870 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 871 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 872 he_cap_elem->phy_cap_info[7] |= 873 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 874 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI; 875 he_cap_elem->phy_cap_info[8] |= 876 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 877 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 878 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 879 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484; 880 he_cap_elem->phy_cap_info[9] |= 881 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 882 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK | 883 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 884 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 885 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 886 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB; 887 break; 888 } 889 890 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map); 891 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map); 892 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160); 893 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160); 894 he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160); 895 he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160); 896 897 mt7915_set_stream_he_txbf_caps(he_cap, i, nss); 898 899 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres)); 900 if (he_cap_elem->phy_cap_info[6] & 901 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { 902 mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss); 903 } else { 904 he_cap_elem->phy_cap_info[9] |= 905 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, 906 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); 907 } 908 idx++; 909 } 910 911 return idx; 912 } 913 914 void mt7915_set_stream_he_caps(struct mt7915_phy *phy) 915 { 916 struct ieee80211_sband_iftype_data *data; 917 struct ieee80211_supported_band *band; 918 int n; 919 920 if (phy->mt76->cap.has_2ghz) { 921 data = phy->iftype[NL80211_BAND_2GHZ]; 922 n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data); 923 924 band = &phy->mt76->sband_2g.sband; 925 band->iftype_data = data; 926 band->n_iftype_data = n; 927 } 928 929 if (phy->mt76->cap.has_5ghz) { 930 data = phy->iftype[NL80211_BAND_5GHZ]; 931 n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data); 932 933 band = &phy->mt76->sband_5g.sband; 934 band->iftype_data = data; 935 band->n_iftype_data = n; 936 } 937 } 938 939 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) 940 { 941 struct mt7915_phy *phy = mt7915_ext_phy(dev); 942 struct mt76_phy *mphy = dev->mt76.phy2; 943 944 if (!phy) 945 return; 946 947 mt7915_unregister_thermal(phy); 948 mt76_unregister_phy(mphy); 949 ieee80211_free_hw(mphy->hw); 950 } 951 952 int mt7915_register_device(struct mt7915_dev *dev) 953 { 954 struct ieee80211_hw *hw = mt76_hw(dev); 955 int ret; 956 957 dev->phy.dev = dev; 958 dev->phy.mt76 = &dev->mt76.phy; 959 dev->mt76.phy.priv = &dev->phy; 960 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work); 961 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work); 962 INIT_LIST_HEAD(&dev->sta_rc_list); 963 INIT_LIST_HEAD(&dev->sta_poll_list); 964 INIT_LIST_HEAD(&dev->twt_list); 965 spin_lock_init(&dev->sta_poll_lock); 966 967 init_waitqueue_head(&dev->reset_wait); 968 INIT_WORK(&dev->reset_work, mt7915_mac_reset_work); 969 970 ret = mt7915_init_hardware(dev); 971 if (ret) 972 return ret; 973 974 mt7915_init_wiphy(hw); 975 976 #ifdef CONFIG_NL80211_TESTMODE 977 dev->mt76.test_ops = &mt7915_testmode_ops; 978 #endif 979 980 /* init led callbacks */ 981 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 982 dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness; 983 dev->mt76.led_cdev.blink_set = mt7915_led_set_blink; 984 } 985 986 ret = mt76_register_device(&dev->mt76, true, mt76_rates, 987 ARRAY_SIZE(mt76_rates)); 988 if (ret) 989 return ret; 990 991 ret = mt7915_thermal_init(&dev->phy); 992 if (ret) 993 return ret; 994 995 ieee80211_queue_work(mt76_hw(dev), &dev->init_work); 996 997 ret = mt7915_register_ext_phy(dev); 998 if (ret) 999 return ret; 1000 1001 return mt7915_init_debugfs(&dev->phy); 1002 } 1003 1004 void mt7915_unregister_device(struct mt7915_dev *dev) 1005 { 1006 mt7915_unregister_ext_phy(dev); 1007 mt7915_unregister_thermal(&dev->phy); 1008 mt76_unregister_device(&dev->mt76); 1009 mt7915_mcu_exit(dev); 1010 mt7915_tx_token_put(dev); 1011 mt7915_dma_cleanup(dev); 1012 tasklet_disable(&dev->irq_tasklet); 1013 1014 mt76_free_device(&dev->mt76); 1015 } 1016