1c378f247SStanislaw Gruszka /* 2c378f247SStanislaw Gruszka * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3c378f247SStanislaw Gruszka * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 4c378f247SStanislaw Gruszka * 5c378f247SStanislaw Gruszka * Permission to use, copy, modify, and/or distribute this software for any 6c378f247SStanislaw Gruszka * purpose with or without fee is hereby granted, provided that the above 7c378f247SStanislaw Gruszka * copyright notice and this permission notice appear in all copies. 8c378f247SStanislaw Gruszka * 9c378f247SStanislaw Gruszka * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10c378f247SStanislaw Gruszka * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11c378f247SStanislaw Gruszka * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12c378f247SStanislaw Gruszka * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13c378f247SStanislaw Gruszka * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14c378f247SStanislaw Gruszka * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15c378f247SStanislaw Gruszka * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16c378f247SStanislaw Gruszka */ 17c378f247SStanislaw Gruszka 187a07adcdSLorenzo Bianconi #include "mt76x02.h" 193e2342edSLorenzo Bianconi #include "mt76x02_trace.h" 20c378f247SStanislaw Gruszka 215567b373SFelix Fietkau static enum mt76x02_cipher_type 22c378f247SStanislaw Gruszka mt76x02_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data) 23c378f247SStanislaw Gruszka { 24c378f247SStanislaw Gruszka memset(key_data, 0, 32); 25c378f247SStanislaw Gruszka if (!key) 26c378f247SStanislaw Gruszka return MT_CIPHER_NONE; 27c378f247SStanislaw Gruszka 28c378f247SStanislaw Gruszka if (key->keylen > 32) 29c378f247SStanislaw Gruszka return MT_CIPHER_NONE; 30c378f247SStanislaw Gruszka 31c378f247SStanislaw Gruszka memcpy(key_data, key->key, key->keylen); 32c378f247SStanislaw Gruszka 33c378f247SStanislaw Gruszka switch (key->cipher) { 34c378f247SStanislaw Gruszka case WLAN_CIPHER_SUITE_WEP40: 35c378f247SStanislaw Gruszka return MT_CIPHER_WEP40; 36c378f247SStanislaw Gruszka case WLAN_CIPHER_SUITE_WEP104: 37c378f247SStanislaw Gruszka return MT_CIPHER_WEP104; 38c378f247SStanislaw Gruszka case WLAN_CIPHER_SUITE_TKIP: 39c378f247SStanislaw Gruszka return MT_CIPHER_TKIP; 40c378f247SStanislaw Gruszka case WLAN_CIPHER_SUITE_CCMP: 41c378f247SStanislaw Gruszka return MT_CIPHER_AES_CCMP; 42c378f247SStanislaw Gruszka default: 43c378f247SStanislaw Gruszka return MT_CIPHER_NONE; 44c378f247SStanislaw Gruszka } 45c378f247SStanislaw Gruszka } 46047aed1cSStanislaw Gruszka 478d66af49SLorenzo Bianconi int mt76x02_mac_shared_key_setup(struct mt76x02_dev *dev, u8 vif_idx, 488d66af49SLorenzo Bianconi u8 key_idx, struct ieee80211_key_conf *key) 49047aed1cSStanislaw Gruszka { 50047aed1cSStanislaw Gruszka enum mt76x02_cipher_type cipher; 51047aed1cSStanislaw Gruszka u8 key_data[32]; 52047aed1cSStanislaw Gruszka u32 val; 53047aed1cSStanislaw Gruszka 54047aed1cSStanislaw Gruszka cipher = mt76x02_mac_get_key_info(key, key_data); 55047aed1cSStanislaw Gruszka if (cipher == MT_CIPHER_NONE && key) 56047aed1cSStanislaw Gruszka return -EOPNOTSUPP; 57047aed1cSStanislaw Gruszka 588d66af49SLorenzo Bianconi val = mt76_rr(dev, MT_SKEY_MODE(vif_idx)); 59047aed1cSStanislaw Gruszka val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx)); 60047aed1cSStanislaw Gruszka val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx); 618d66af49SLorenzo Bianconi mt76_wr(dev, MT_SKEY_MODE(vif_idx), val); 62047aed1cSStanislaw Gruszka 638d66af49SLorenzo Bianconi mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx), key_data, 64047aed1cSStanislaw Gruszka sizeof(key_data)); 65047aed1cSStanislaw Gruszka 66047aed1cSStanislaw Gruszka return 0; 67047aed1cSStanislaw Gruszka } 68047aed1cSStanislaw Gruszka EXPORT_SYMBOL_GPL(mt76x02_mac_shared_key_setup); 6946436b5eSStanislaw Gruszka 708d66af49SLorenzo Bianconi int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, 7146436b5eSStanislaw Gruszka struct ieee80211_key_conf *key) 7246436b5eSStanislaw Gruszka { 7346436b5eSStanislaw Gruszka enum mt76x02_cipher_type cipher; 7446436b5eSStanislaw Gruszka u8 key_data[32]; 7546436b5eSStanislaw Gruszka u8 iv_data[8]; 7646436b5eSStanislaw Gruszka 7746436b5eSStanislaw Gruszka cipher = mt76x02_mac_get_key_info(key, key_data); 7846436b5eSStanislaw Gruszka if (cipher == MT_CIPHER_NONE && key) 7946436b5eSStanislaw Gruszka return -EOPNOTSUPP; 8046436b5eSStanislaw Gruszka 818d66af49SLorenzo Bianconi mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data)); 828d66af49SLorenzo Bianconi mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PKEY_MODE, cipher); 8346436b5eSStanislaw Gruszka 8446436b5eSStanislaw Gruszka memset(iv_data, 0, sizeof(iv_data)); 8546436b5eSStanislaw Gruszka if (key) { 868d66af49SLorenzo Bianconi mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PAIRWISE, 8746436b5eSStanislaw Gruszka !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)); 8846436b5eSStanislaw Gruszka iv_data[3] = key->keyidx << 6; 8946436b5eSStanislaw Gruszka if (cipher >= MT_CIPHER_TKIP) 9046436b5eSStanislaw Gruszka iv_data[3] |= 0x20; 9146436b5eSStanislaw Gruszka } 9246436b5eSStanislaw Gruszka 938d66af49SLorenzo Bianconi mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data)); 9446436b5eSStanislaw Gruszka 9546436b5eSStanislaw Gruszka return 0; 9646436b5eSStanislaw Gruszka } 9732bb405fSStanislaw Gruszka 988d66af49SLorenzo Bianconi void mt76x02_mac_wcid_setup(struct mt76x02_dev *dev, u8 idx, 998d66af49SLorenzo Bianconi u8 vif_idx, u8 *mac) 10032bb405fSStanislaw Gruszka { 10132bb405fSStanislaw Gruszka struct mt76_wcid_addr addr = {}; 10232bb405fSStanislaw Gruszka u32 attr; 10332bb405fSStanislaw Gruszka 10432bb405fSStanislaw Gruszka attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) | 10532bb405fSStanislaw Gruszka FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8)); 10632bb405fSStanislaw Gruszka 1078d66af49SLorenzo Bianconi mt76_wr(dev, MT_WCID_ATTR(idx), attr); 10832bb405fSStanislaw Gruszka 1098d66af49SLorenzo Bianconi mt76_wr(dev, MT_WCID_TX_RATE(idx), 0); 1108d66af49SLorenzo Bianconi mt76_wr(dev, MT_WCID_TX_RATE(idx) + 4, 0); 11132bb405fSStanislaw Gruszka 11232bb405fSStanislaw Gruszka if (idx >= 128) 11332bb405fSStanislaw Gruszka return; 11432bb405fSStanislaw Gruszka 11532bb405fSStanislaw Gruszka if (mac) 11632bb405fSStanislaw Gruszka memcpy(addr.macaddr, mac, ETH_ALEN); 11732bb405fSStanislaw Gruszka 1188d66af49SLorenzo Bianconi mt76_wr_copy(dev, MT_WCID_ADDR(idx), &addr, sizeof(addr)); 11932bb405fSStanislaw Gruszka } 12032bb405fSStanislaw Gruszka EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_setup); 121516ea2a2SStanislaw Gruszka 1228d66af49SLorenzo Bianconi void mt76x02_mac_wcid_set_drop(struct mt76x02_dev *dev, u8 idx, bool drop) 123516ea2a2SStanislaw Gruszka { 1248d66af49SLorenzo Bianconi u32 val = mt76_rr(dev, MT_WCID_DROP(idx)); 125516ea2a2SStanislaw Gruszka u32 bit = MT_WCID_DROP_MASK(idx); 126516ea2a2SStanislaw Gruszka 127516ea2a2SStanislaw Gruszka /* prevent unnecessary writes */ 128516ea2a2SStanislaw Gruszka if ((val & bit) != (bit * drop)) 1298d66af49SLorenzo Bianconi mt76_wr(dev, MT_WCID_DROP(idx), (val & ~bit) | (bit * drop)); 130516ea2a2SStanislaw Gruszka } 131f5a7f126SStanislaw Gruszka 1328d66af49SLorenzo Bianconi void mt76x02_txq_init(struct mt76x02_dev *dev, struct ieee80211_txq *txq) 133f5a7f126SStanislaw Gruszka { 134f5a7f126SStanislaw Gruszka struct mt76_txq *mtxq; 135f5a7f126SStanislaw Gruszka 136f5a7f126SStanislaw Gruszka if (!txq) 137f5a7f126SStanislaw Gruszka return; 138f5a7f126SStanislaw Gruszka 139f5a7f126SStanislaw Gruszka mtxq = (struct mt76_txq *) txq->drv_priv; 140f5a7f126SStanislaw Gruszka if (txq->sta) { 141f5a7f126SStanislaw Gruszka struct mt76x02_sta *sta; 142f5a7f126SStanislaw Gruszka 143f5a7f126SStanislaw Gruszka sta = (struct mt76x02_sta *) txq->sta->drv_priv; 144f5a7f126SStanislaw Gruszka mtxq->wcid = &sta->wcid; 145f5a7f126SStanislaw Gruszka } else { 146f5a7f126SStanislaw Gruszka struct mt76x02_vif *mvif; 147f5a7f126SStanislaw Gruszka 148f5a7f126SStanislaw Gruszka mvif = (struct mt76x02_vif *) txq->vif->drv_priv; 149f5a7f126SStanislaw Gruszka mtxq->wcid = &mvif->group_wcid; 150f5a7f126SStanislaw Gruszka } 151f5a7f126SStanislaw Gruszka 1528d66af49SLorenzo Bianconi mt76_txq_init(&dev->mt76, txq); 153f5a7f126SStanislaw Gruszka } 1545327b5eaSStanislaw Gruszka 155c4ed5088SLorenzo Bianconi static __le16 1568d66af49SLorenzo Bianconi mt76x02_mac_tx_rate_val(struct mt76x02_dev *dev, 1575327b5eaSStanislaw Gruszka const struct ieee80211_tx_rate *rate, u8 *nss_val) 1585327b5eaSStanislaw Gruszka { 1595327b5eaSStanislaw Gruszka u16 rateval; 1605327b5eaSStanislaw Gruszka u8 phy, rate_idx; 1615327b5eaSStanislaw Gruszka u8 nss = 1; 1625327b5eaSStanislaw Gruszka u8 bw = 0; 1635327b5eaSStanislaw Gruszka 1645327b5eaSStanislaw Gruszka if (rate->flags & IEEE80211_TX_RC_VHT_MCS) { 1655327b5eaSStanislaw Gruszka rate_idx = rate->idx; 1665327b5eaSStanislaw Gruszka nss = 1 + (rate->idx >> 4); 1675327b5eaSStanislaw Gruszka phy = MT_PHY_TYPE_VHT; 1685327b5eaSStanislaw Gruszka if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH) 1695327b5eaSStanislaw Gruszka bw = 2; 1705327b5eaSStanislaw Gruszka else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) 1715327b5eaSStanislaw Gruszka bw = 1; 1725327b5eaSStanislaw Gruszka } else if (rate->flags & IEEE80211_TX_RC_MCS) { 1735327b5eaSStanislaw Gruszka rate_idx = rate->idx; 1745327b5eaSStanislaw Gruszka nss = 1 + (rate->idx >> 3); 1755327b5eaSStanislaw Gruszka phy = MT_PHY_TYPE_HT; 1765327b5eaSStanislaw Gruszka if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD) 1775327b5eaSStanislaw Gruszka phy = MT_PHY_TYPE_HT_GF; 1785327b5eaSStanislaw Gruszka if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) 1795327b5eaSStanislaw Gruszka bw = 1; 1805327b5eaSStanislaw Gruszka } else { 1815327b5eaSStanislaw Gruszka const struct ieee80211_rate *r; 1828d66af49SLorenzo Bianconi int band = dev->mt76.chandef.chan->band; 1835327b5eaSStanislaw Gruszka u16 val; 1845327b5eaSStanislaw Gruszka 1858d66af49SLorenzo Bianconi r = &dev->mt76.hw->wiphy->bands[band]->bitrates[rate->idx]; 1865327b5eaSStanislaw Gruszka if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 1875327b5eaSStanislaw Gruszka val = r->hw_value_short; 1885327b5eaSStanislaw Gruszka else 1895327b5eaSStanislaw Gruszka val = r->hw_value; 1905327b5eaSStanislaw Gruszka 1915327b5eaSStanislaw Gruszka phy = val >> 8; 1925327b5eaSStanislaw Gruszka rate_idx = val & 0xff; 1935327b5eaSStanislaw Gruszka bw = 0; 1945327b5eaSStanislaw Gruszka } 1955327b5eaSStanislaw Gruszka 1965327b5eaSStanislaw Gruszka rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx); 1975327b5eaSStanislaw Gruszka rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy); 1985327b5eaSStanislaw Gruszka rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw); 1995327b5eaSStanislaw Gruszka if (rate->flags & IEEE80211_TX_RC_SHORT_GI) 2005327b5eaSStanislaw Gruszka rateval |= MT_RXWI_RATE_SGI; 2015327b5eaSStanislaw Gruszka 2025327b5eaSStanislaw Gruszka *nss_val = nss; 2035327b5eaSStanislaw Gruszka return cpu_to_le16(rateval); 2045327b5eaSStanislaw Gruszka } 2055327b5eaSStanislaw Gruszka 2068d66af49SLorenzo Bianconi void mt76x02_mac_wcid_set_rate(struct mt76x02_dev *dev, struct mt76_wcid *wcid, 2075327b5eaSStanislaw Gruszka const struct ieee80211_tx_rate *rate) 2085327b5eaSStanislaw Gruszka { 2098d66af49SLorenzo Bianconi spin_lock_bh(&dev->mt76.lock); 2105327b5eaSStanislaw Gruszka wcid->tx_rate = mt76x02_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss); 2115327b5eaSStanislaw Gruszka wcid->tx_rate_set = true; 2128d66af49SLorenzo Bianconi spin_unlock_bh(&dev->mt76.lock); 2135327b5eaSStanislaw Gruszka } 214b490b1dfSStanislaw Gruszka 215dd61100dSLorenzo Bianconi void mt76x02_mac_set_short_preamble(struct mt76x02_dev *dev, bool enable) 216dd61100dSLorenzo Bianconi { 217dd61100dSLorenzo Bianconi if (enable) 218dd61100dSLorenzo Bianconi mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT); 219dd61100dSLorenzo Bianconi else 220dd61100dSLorenzo Bianconi mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT); 221dd61100dSLorenzo Bianconi } 222dd61100dSLorenzo Bianconi 2238d66af49SLorenzo Bianconi bool mt76x02_mac_load_tx_status(struct mt76x02_dev *dev, 224b490b1dfSStanislaw Gruszka struct mt76x02_tx_status *stat) 225b490b1dfSStanislaw Gruszka { 226b490b1dfSStanislaw Gruszka u32 stat1, stat2; 227b490b1dfSStanislaw Gruszka 2288d66af49SLorenzo Bianconi stat2 = mt76_rr(dev, MT_TX_STAT_FIFO_EXT); 2298d66af49SLorenzo Bianconi stat1 = mt76_rr(dev, MT_TX_STAT_FIFO); 230b490b1dfSStanislaw Gruszka 231b490b1dfSStanislaw Gruszka stat->valid = !!(stat1 & MT_TX_STAT_FIFO_VALID); 232b490b1dfSStanislaw Gruszka if (!stat->valid) 233b490b1dfSStanislaw Gruszka return false; 234b490b1dfSStanislaw Gruszka 235b490b1dfSStanislaw Gruszka stat->success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS); 236b490b1dfSStanislaw Gruszka stat->aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR); 237b490b1dfSStanislaw Gruszka stat->ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ); 238b490b1dfSStanislaw Gruszka stat->wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1); 239b490b1dfSStanislaw Gruszka stat->rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1); 240b490b1dfSStanislaw Gruszka 241b490b1dfSStanislaw Gruszka stat->retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2); 242b490b1dfSStanislaw Gruszka stat->pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2); 243b490b1dfSStanislaw Gruszka 244e0168dc6SLorenzo Bianconi trace_mac_txstat_fetch(dev, stat); 245e0168dc6SLorenzo Bianconi 246b490b1dfSStanislaw Gruszka return true; 247b490b1dfSStanislaw Gruszka } 2487c1f8881SStanislaw Gruszka 2497c1f8881SStanislaw Gruszka static int 2507c1f8881SStanislaw Gruszka mt76x02_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate, 2517c1f8881SStanislaw Gruszka enum nl80211_band band) 2527c1f8881SStanislaw Gruszka { 2537c1f8881SStanislaw Gruszka u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate); 2547c1f8881SStanislaw Gruszka 2557c1f8881SStanislaw Gruszka txrate->idx = 0; 2567c1f8881SStanislaw Gruszka txrate->flags = 0; 2577c1f8881SStanislaw Gruszka txrate->count = 1; 2587c1f8881SStanislaw Gruszka 2597c1f8881SStanislaw Gruszka switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) { 2607c1f8881SStanislaw Gruszka case MT_PHY_TYPE_OFDM: 2617c1f8881SStanislaw Gruszka if (band == NL80211_BAND_2GHZ) 2627c1f8881SStanislaw Gruszka idx += 4; 2637c1f8881SStanislaw Gruszka 2647c1f8881SStanislaw Gruszka txrate->idx = idx; 2657c1f8881SStanislaw Gruszka return 0; 2667c1f8881SStanislaw Gruszka case MT_PHY_TYPE_CCK: 2677c1f8881SStanislaw Gruszka if (idx >= 8) 2687c1f8881SStanislaw Gruszka idx -= 8; 2697c1f8881SStanislaw Gruszka 2707c1f8881SStanislaw Gruszka txrate->idx = idx; 2717c1f8881SStanislaw Gruszka return 0; 2727c1f8881SStanislaw Gruszka case MT_PHY_TYPE_HT_GF: 2737c1f8881SStanislaw Gruszka txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD; 2747c1f8881SStanislaw Gruszka /* fall through */ 2757c1f8881SStanislaw Gruszka case MT_PHY_TYPE_HT: 2767c1f8881SStanislaw Gruszka txrate->flags |= IEEE80211_TX_RC_MCS; 2777c1f8881SStanislaw Gruszka txrate->idx = idx; 2787c1f8881SStanislaw Gruszka break; 2797c1f8881SStanislaw Gruszka case MT_PHY_TYPE_VHT: 2807c1f8881SStanislaw Gruszka txrate->flags |= IEEE80211_TX_RC_VHT_MCS; 2817c1f8881SStanislaw Gruszka txrate->idx = idx; 2827c1f8881SStanislaw Gruszka break; 2837c1f8881SStanislaw Gruszka default: 2847c1f8881SStanislaw Gruszka return -EINVAL; 2857c1f8881SStanislaw Gruszka } 2867c1f8881SStanislaw Gruszka 2877c1f8881SStanislaw Gruszka switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) { 2887c1f8881SStanislaw Gruszka case MT_PHY_BW_20: 2897c1f8881SStanislaw Gruszka break; 2907c1f8881SStanislaw Gruszka case MT_PHY_BW_40: 2917c1f8881SStanislaw Gruszka txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; 2927c1f8881SStanislaw Gruszka break; 2937c1f8881SStanislaw Gruszka case MT_PHY_BW_80: 2947c1f8881SStanislaw Gruszka txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH; 2957c1f8881SStanislaw Gruszka break; 2967c1f8881SStanislaw Gruszka default: 2977c1f8881SStanislaw Gruszka return -EINVAL; 2987c1f8881SStanislaw Gruszka } 2997c1f8881SStanislaw Gruszka 3007c1f8881SStanislaw Gruszka if (rate & MT_RXWI_RATE_SGI) 3017c1f8881SStanislaw Gruszka txrate->flags |= IEEE80211_TX_RC_SHORT_GI; 3027c1f8881SStanislaw Gruszka 3037c1f8881SStanislaw Gruszka return 0; 3047c1f8881SStanislaw Gruszka } 3057c1f8881SStanislaw Gruszka 3068d66af49SLorenzo Bianconi void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi, 307427f9ebeSLorenzo Bianconi struct sk_buff *skb, struct mt76_wcid *wcid, 308427f9ebeSLorenzo Bianconi struct ieee80211_sta *sta, int len) 309427f9ebeSLorenzo Bianconi { 310320c85e6SLorenzo Bianconi struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 311427f9ebeSLorenzo Bianconi struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 312427f9ebeSLorenzo Bianconi struct ieee80211_tx_rate *rate = &info->control.rates[0]; 313427f9ebeSLorenzo Bianconi struct ieee80211_key_conf *key = info->control.hw_key; 314427f9ebeSLorenzo Bianconi u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2)); 315320c85e6SLorenzo Bianconi u16 txwi_flags = 0; 316427f9ebeSLorenzo Bianconi u8 nss; 317427f9ebeSLorenzo Bianconi s8 txpwr_adj, max_txpwr_adj; 3188d66af49SLorenzo Bianconi u8 ccmp_pn[8], nstreams = dev->mt76.chainmask & 0xf; 319427f9ebeSLorenzo Bianconi 320427f9ebeSLorenzo Bianconi memset(txwi, 0, sizeof(*txwi)); 321427f9ebeSLorenzo Bianconi 322427f9ebeSLorenzo Bianconi if (wcid) 323427f9ebeSLorenzo Bianconi txwi->wcid = wcid->idx; 324427f9ebeSLorenzo Bianconi else 325427f9ebeSLorenzo Bianconi txwi->wcid = 0xff; 326427f9ebeSLorenzo Bianconi 327427f9ebeSLorenzo Bianconi if (wcid && wcid->sw_iv && key) { 328427f9ebeSLorenzo Bianconi u64 pn = atomic64_inc_return(&key->tx_pn); 329427f9ebeSLorenzo Bianconi ccmp_pn[0] = pn; 330427f9ebeSLorenzo Bianconi ccmp_pn[1] = pn >> 8; 331427f9ebeSLorenzo Bianconi ccmp_pn[2] = 0; 332427f9ebeSLorenzo Bianconi ccmp_pn[3] = 0x20 | (key->keyidx << 6); 333427f9ebeSLorenzo Bianconi ccmp_pn[4] = pn >> 16; 334427f9ebeSLorenzo Bianconi ccmp_pn[5] = pn >> 24; 335427f9ebeSLorenzo Bianconi ccmp_pn[6] = pn >> 32; 336427f9ebeSLorenzo Bianconi ccmp_pn[7] = pn >> 40; 337427f9ebeSLorenzo Bianconi txwi->iv = *((__le32 *)&ccmp_pn[0]); 338427f9ebeSLorenzo Bianconi txwi->eiv = *((__le32 *)&ccmp_pn[1]); 339427f9ebeSLorenzo Bianconi } 340427f9ebeSLorenzo Bianconi 3418d66af49SLorenzo Bianconi spin_lock_bh(&dev->mt76.lock); 342427f9ebeSLorenzo Bianconi if (wcid && (rate->idx < 0 || !rate->count)) { 343427f9ebeSLorenzo Bianconi txwi->rate = wcid->tx_rate; 344427f9ebeSLorenzo Bianconi max_txpwr_adj = wcid->max_txpwr_adj; 345427f9ebeSLorenzo Bianconi nss = wcid->tx_rate_nss; 346427f9ebeSLorenzo Bianconi } else { 347427f9ebeSLorenzo Bianconi txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss); 34891be8e8aSLorenzo Bianconi max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate); 349427f9ebeSLorenzo Bianconi } 3508d66af49SLorenzo Bianconi spin_unlock_bh(&dev->mt76.lock); 351427f9ebeSLorenzo Bianconi 35291be8e8aSLorenzo Bianconi txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, dev->mt76.txpower_conf, 353427f9ebeSLorenzo Bianconi max_txpwr_adj); 354427f9ebeSLorenzo Bianconi txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj); 355427f9ebeSLorenzo Bianconi 3568d66af49SLorenzo Bianconi if (nstreams > 1 && mt76_rev(&dev->mt76) >= MT76XX_REV_E4) 357427f9ebeSLorenzo Bianconi txwi->txstream = 0x13; 3588d66af49SLorenzo Bianconi else if (nstreams > 1 && mt76_rev(&dev->mt76) >= MT76XX_REV_E3 && 359427f9ebeSLorenzo Bianconi !(txwi->rate & cpu_to_le16(rate_ht_mask))) 360427f9ebeSLorenzo Bianconi txwi->txstream = 0x93; 361427f9ebeSLorenzo Bianconi 362320c85e6SLorenzo Bianconi if (is_mt76x2(dev) && (info->flags & IEEE80211_TX_CTL_LDPC)) 363320c85e6SLorenzo Bianconi txwi->rate |= cpu_to_le16(MT_RXWI_RATE_LDPC); 364320c85e6SLorenzo Bianconi if ((info->flags & IEEE80211_TX_CTL_STBC) && nss == 1) 365320c85e6SLorenzo Bianconi txwi->rate |= cpu_to_le16(MT_RXWI_RATE_STBC); 366320c85e6SLorenzo Bianconi if (nss > 1 && sta && sta->smps_mode == IEEE80211_SMPS_DYNAMIC) 367320c85e6SLorenzo Bianconi txwi_flags |= MT_TXWI_FLAGS_MMPS; 368320c85e6SLorenzo Bianconi if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) 369320c85e6SLorenzo Bianconi txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ; 370320c85e6SLorenzo Bianconi if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) 371320c85e6SLorenzo Bianconi txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ; 372320c85e6SLorenzo Bianconi if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) { 373320c85e6SLorenzo Bianconi u8 ba_size = IEEE80211_MIN_AMPDU_BUF; 374320c85e6SLorenzo Bianconi 375320c85e6SLorenzo Bianconi ba_size <<= sta->ht_cap.ampdu_factor; 376320c85e6SLorenzo Bianconi ba_size = min_t(int, 63, ba_size - 1); 377320c85e6SLorenzo Bianconi if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) 378320c85e6SLorenzo Bianconi ba_size = 0; 379320c85e6SLorenzo Bianconi txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size); 380320c85e6SLorenzo Bianconi 381320c85e6SLorenzo Bianconi txwi_flags |= MT_TXWI_FLAGS_AMPDU | 382320c85e6SLorenzo Bianconi FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY, 383320c85e6SLorenzo Bianconi sta->ht_cap.ampdu_density); 384320c85e6SLorenzo Bianconi } 385320c85e6SLorenzo Bianconi 386320c85e6SLorenzo Bianconi if (ieee80211_is_probe_resp(hdr->frame_control) || 387320c85e6SLorenzo Bianconi ieee80211_is_beacon(hdr->frame_control)) 388320c85e6SLorenzo Bianconi txwi_flags |= MT_TXWI_FLAGS_TS; 389320c85e6SLorenzo Bianconi 390320c85e6SLorenzo Bianconi txwi->flags |= cpu_to_le16(txwi_flags); 391320c85e6SLorenzo Bianconi txwi->len_ctl = cpu_to_le16(len); 392427f9ebeSLorenzo Bianconi } 393427f9ebeSLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_mac_write_txwi); 394427f9ebeSLorenzo Bianconi 3957c1f8881SStanislaw Gruszka static void 3968d66af49SLorenzo Bianconi mt76x02_mac_fill_tx_status(struct mt76x02_dev *dev, 3977c1f8881SStanislaw Gruszka struct ieee80211_tx_info *info, 3987c1f8881SStanislaw Gruszka struct mt76x02_tx_status *st, int n_frames) 3997c1f8881SStanislaw Gruszka { 4007c1f8881SStanislaw Gruszka struct ieee80211_tx_rate *rate = info->status.rates; 4017c1f8881SStanislaw Gruszka int cur_idx, last_rate; 4027c1f8881SStanislaw Gruszka int i; 4037c1f8881SStanislaw Gruszka 4047c1f8881SStanislaw Gruszka if (!n_frames) 4057c1f8881SStanislaw Gruszka return; 4067c1f8881SStanislaw Gruszka 4077c1f8881SStanislaw Gruszka last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1); 4087c1f8881SStanislaw Gruszka mt76x02_mac_process_tx_rate(&rate[last_rate], st->rate, 4098d66af49SLorenzo Bianconi dev->mt76.chandef.chan->band); 4107c1f8881SStanislaw Gruszka if (last_rate < IEEE80211_TX_MAX_RATES - 1) 4117c1f8881SStanislaw Gruszka rate[last_rate + 1].idx = -1; 4127c1f8881SStanislaw Gruszka 4137c1f8881SStanislaw Gruszka cur_idx = rate[last_rate].idx + last_rate; 4147c1f8881SStanislaw Gruszka for (i = 0; i <= last_rate; i++) { 4157c1f8881SStanislaw Gruszka rate[i].flags = rate[last_rate].flags; 4167c1f8881SStanislaw Gruszka rate[i].idx = max_t(int, 0, cur_idx - i); 4177c1f8881SStanislaw Gruszka rate[i].count = 1; 4187c1f8881SStanislaw Gruszka } 4197c1f8881SStanislaw Gruszka rate[last_rate].count = st->retry + 1 - last_rate; 4207c1f8881SStanislaw Gruszka 4217c1f8881SStanislaw Gruszka info->status.ampdu_len = n_frames; 4227c1f8881SStanislaw Gruszka info->status.ampdu_ack_len = st->success ? n_frames : 0; 4237c1f8881SStanislaw Gruszka 4247c1f8881SStanislaw Gruszka if (st->aggr) 4257c1f8881SStanislaw Gruszka info->flags |= IEEE80211_TX_CTL_AMPDU | 4267c1f8881SStanislaw Gruszka IEEE80211_TX_STAT_AMPDU; 4277c1f8881SStanislaw Gruszka 4287c1f8881SStanislaw Gruszka if (!st->ack_req) 4297c1f8881SStanislaw Gruszka info->flags |= IEEE80211_TX_CTL_NO_ACK; 4307c1f8881SStanislaw Gruszka else if (st->success) 4317c1f8881SStanislaw Gruszka info->flags |= IEEE80211_TX_STAT_ACK; 4327c1f8881SStanislaw Gruszka } 4337c1f8881SStanislaw Gruszka 4348d66af49SLorenzo Bianconi void mt76x02_send_tx_status(struct mt76x02_dev *dev, 4357c1f8881SStanislaw Gruszka struct mt76x02_tx_status *stat, u8 *update) 4367c1f8881SStanislaw Gruszka { 4377c1f8881SStanislaw Gruszka struct ieee80211_tx_info info = {}; 438*88046b2cSFelix Fietkau struct ieee80211_tx_status status = { 439*88046b2cSFelix Fietkau .info = &info 440*88046b2cSFelix Fietkau }; 4417c1f8881SStanislaw Gruszka struct mt76_wcid *wcid = NULL; 4427c1f8881SStanislaw Gruszka struct mt76x02_sta *msta = NULL; 443*88046b2cSFelix Fietkau struct mt76_dev *mdev = &dev->mt76; 444*88046b2cSFelix Fietkau 445*88046b2cSFelix Fietkau if (stat->pktid == MT_PACKET_ID_NO_ACK) 446*88046b2cSFelix Fietkau return; 4477c1f8881SStanislaw Gruszka 4487c1f8881SStanislaw Gruszka rcu_read_lock(); 449*88046b2cSFelix Fietkau spin_lock_bh(&mdev->status_list.lock); 450*88046b2cSFelix Fietkau 4518d66af49SLorenzo Bianconi if (stat->wcid < ARRAY_SIZE(dev->mt76.wcid)) 4528d66af49SLorenzo Bianconi wcid = rcu_dereference(dev->mt76.wcid[stat->wcid]); 4537c1f8881SStanislaw Gruszka 45465b526a1SFelix Fietkau if (wcid && wcid->sta) { 4557c1f8881SStanislaw Gruszka void *priv; 4567c1f8881SStanislaw Gruszka 4577c1f8881SStanislaw Gruszka priv = msta = container_of(wcid, struct mt76x02_sta, wcid); 458*88046b2cSFelix Fietkau status.sta = container_of(priv, struct ieee80211_sta, 4597c1f8881SStanislaw Gruszka drv_priv); 4607c1f8881SStanislaw Gruszka } 4617c1f8881SStanislaw Gruszka 462*88046b2cSFelix Fietkau if (wcid) { 463*88046b2cSFelix Fietkau if (stat->pktid) 464*88046b2cSFelix Fietkau status.skb = mt76_tx_status_skb_get(mdev, wcid, 465*88046b2cSFelix Fietkau stat->pktid); 466*88046b2cSFelix Fietkau if (status.skb) 467*88046b2cSFelix Fietkau status.info = IEEE80211_SKB_CB(status.skb); 468*88046b2cSFelix Fietkau } 469*88046b2cSFelix Fietkau 470*88046b2cSFelix Fietkau if (msta && stat->aggr && !status.skb) { 4717c1f8881SStanislaw Gruszka u32 stat_val, stat_cache; 4727c1f8881SStanislaw Gruszka 4737c1f8881SStanislaw Gruszka stat_val = stat->rate; 4747c1f8881SStanislaw Gruszka stat_val |= ((u32) stat->retry) << 16; 4757c1f8881SStanislaw Gruszka stat_cache = msta->status.rate; 4767c1f8881SStanislaw Gruszka stat_cache |= ((u32) msta->status.retry) << 16; 4777c1f8881SStanislaw Gruszka 4787c1f8881SStanislaw Gruszka if (*update == 0 && stat_val == stat_cache && 4797c1f8881SStanislaw Gruszka stat->wcid == msta->status.wcid && msta->n_frames < 32) { 4807c1f8881SStanislaw Gruszka msta->n_frames++; 4817c1f8881SStanislaw Gruszka goto out; 4827c1f8881SStanislaw Gruszka } 4837c1f8881SStanislaw Gruszka 484*88046b2cSFelix Fietkau mt76x02_mac_fill_tx_status(dev, status.info, &msta->status, 4857c1f8881SStanislaw Gruszka msta->n_frames); 4867c1f8881SStanislaw Gruszka 4877c1f8881SStanislaw Gruszka msta->status = *stat; 4887c1f8881SStanislaw Gruszka msta->n_frames = 1; 4897c1f8881SStanislaw Gruszka *update = 0; 4907c1f8881SStanislaw Gruszka } else { 491*88046b2cSFelix Fietkau mt76x02_mac_fill_tx_status(dev, status.info, stat, 1); 4927c1f8881SStanislaw Gruszka *update = 1; 4937c1f8881SStanislaw Gruszka } 4947c1f8881SStanislaw Gruszka 495*88046b2cSFelix Fietkau if (status.skb) 496*88046b2cSFelix Fietkau mt76_tx_status_skb_done(mdev, status.skb); 497*88046b2cSFelix Fietkau else 498*88046b2cSFelix Fietkau ieee80211_tx_status_ext(mt76_hw(dev), &status); 4997c1f8881SStanislaw Gruszka 5007c1f8881SStanislaw Gruszka out: 501*88046b2cSFelix Fietkau spin_unlock_bh(&mdev->status_list.lock); 5027c1f8881SStanislaw Gruszka rcu_read_unlock(); 5037c1f8881SStanislaw Gruszka } 50474ff4539SStanislaw Gruszka 5051a4846fcSFelix Fietkau static int 50674ff4539SStanislaw Gruszka mt76x02_mac_process_rate(struct mt76_rx_status *status, u16 rate) 50774ff4539SStanislaw Gruszka { 50874ff4539SStanislaw Gruszka u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate); 50974ff4539SStanislaw Gruszka 51074ff4539SStanislaw Gruszka switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) { 51174ff4539SStanislaw Gruszka case MT_PHY_TYPE_OFDM: 51274ff4539SStanislaw Gruszka if (idx >= 8) 51374ff4539SStanislaw Gruszka idx = 0; 51474ff4539SStanislaw Gruszka 51574ff4539SStanislaw Gruszka if (status->band == NL80211_BAND_2GHZ) 51674ff4539SStanislaw Gruszka idx += 4; 51774ff4539SStanislaw Gruszka 51874ff4539SStanislaw Gruszka status->rate_idx = idx; 51974ff4539SStanislaw Gruszka return 0; 52074ff4539SStanislaw Gruszka case MT_PHY_TYPE_CCK: 52174ff4539SStanislaw Gruszka if (idx >= 8) { 52274ff4539SStanislaw Gruszka idx -= 8; 52374ff4539SStanislaw Gruszka status->enc_flags |= RX_ENC_FLAG_SHORTPRE; 52474ff4539SStanislaw Gruszka } 52574ff4539SStanislaw Gruszka 52674ff4539SStanislaw Gruszka if (idx >= 4) 52774ff4539SStanislaw Gruszka idx = 0; 52874ff4539SStanislaw Gruszka 52974ff4539SStanislaw Gruszka status->rate_idx = idx; 53074ff4539SStanislaw Gruszka return 0; 53174ff4539SStanislaw Gruszka case MT_PHY_TYPE_HT_GF: 53274ff4539SStanislaw Gruszka status->enc_flags |= RX_ENC_FLAG_HT_GF; 53374ff4539SStanislaw Gruszka /* fall through */ 53474ff4539SStanislaw Gruszka case MT_PHY_TYPE_HT: 53574ff4539SStanislaw Gruszka status->encoding = RX_ENC_HT; 53674ff4539SStanislaw Gruszka status->rate_idx = idx; 53774ff4539SStanislaw Gruszka break; 53874ff4539SStanislaw Gruszka case MT_PHY_TYPE_VHT: 53974ff4539SStanislaw Gruszka status->encoding = RX_ENC_VHT; 54074ff4539SStanislaw Gruszka status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx); 54174ff4539SStanislaw Gruszka status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1; 54274ff4539SStanislaw Gruszka break; 54374ff4539SStanislaw Gruszka default: 54474ff4539SStanislaw Gruszka return -EINVAL; 54574ff4539SStanislaw Gruszka } 54674ff4539SStanislaw Gruszka 54774ff4539SStanislaw Gruszka if (rate & MT_RXWI_RATE_LDPC) 54874ff4539SStanislaw Gruszka status->enc_flags |= RX_ENC_FLAG_LDPC; 54974ff4539SStanislaw Gruszka 55074ff4539SStanislaw Gruszka if (rate & MT_RXWI_RATE_SGI) 55174ff4539SStanislaw Gruszka status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 55274ff4539SStanislaw Gruszka 55374ff4539SStanislaw Gruszka if (rate & MT_RXWI_RATE_STBC) 55474ff4539SStanislaw Gruszka status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT; 55574ff4539SStanislaw Gruszka 55674ff4539SStanislaw Gruszka switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) { 55774ff4539SStanislaw Gruszka case MT_PHY_BW_20: 55874ff4539SStanislaw Gruszka break; 55974ff4539SStanislaw Gruszka case MT_PHY_BW_40: 56074ff4539SStanislaw Gruszka status->bw = RATE_INFO_BW_40; 56174ff4539SStanislaw Gruszka break; 56274ff4539SStanislaw Gruszka case MT_PHY_BW_80: 56374ff4539SStanislaw Gruszka status->bw = RATE_INFO_BW_80; 56474ff4539SStanislaw Gruszka break; 56574ff4539SStanislaw Gruszka default: 56674ff4539SStanislaw Gruszka break; 56774ff4539SStanislaw Gruszka } 56874ff4539SStanislaw Gruszka 56974ff4539SStanislaw Gruszka return 0; 57074ff4539SStanislaw Gruszka } 57189a8607cSLorenzo Bianconi 5728d66af49SLorenzo Bianconi void mt76x02_mac_setaddr(struct mt76x02_dev *dev, u8 *addr) 57389a8607cSLorenzo Bianconi { 5748d66af49SLorenzo Bianconi ether_addr_copy(dev->mt76.macaddr, addr); 57589a8607cSLorenzo Bianconi 5768d66af49SLorenzo Bianconi if (!is_valid_ether_addr(dev->mt76.macaddr)) { 5778d66af49SLorenzo Bianconi eth_random_addr(dev->mt76.macaddr); 5788d66af49SLorenzo Bianconi dev_info(dev->mt76.dev, 57989a8607cSLorenzo Bianconi "Invalid MAC address, using random address %pM\n", 5808d66af49SLorenzo Bianconi dev->mt76.macaddr); 58189a8607cSLorenzo Bianconi } 58289a8607cSLorenzo Bianconi 5838d66af49SLorenzo Bianconi mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->mt76.macaddr)); 5848d66af49SLorenzo Bianconi mt76_wr(dev, MT_MAC_ADDR_DW1, 5858d66af49SLorenzo Bianconi get_unaligned_le16(dev->mt76.macaddr + 4) | 58689a8607cSLorenzo Bianconi FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff)); 58789a8607cSLorenzo Bianconi } 58889a8607cSLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_mac_setaddr); 589d9f8934eSLorenzo Bianconi 590d9f8934eSLorenzo Bianconi static int 591d9f8934eSLorenzo Bianconi mt76x02_mac_get_rssi(struct mt76x02_dev *dev, s8 rssi, int chain) 592d9f8934eSLorenzo Bianconi { 593d9f8934eSLorenzo Bianconi struct mt76x02_rx_freq_cal *cal = &dev->cal.rx; 594d9f8934eSLorenzo Bianconi 595d9f8934eSLorenzo Bianconi rssi += cal->rssi_offset[chain]; 596d9f8934eSLorenzo Bianconi rssi -= cal->lna_gain; 597d9f8934eSLorenzo Bianconi 598d9f8934eSLorenzo Bianconi return rssi; 599d9f8934eSLorenzo Bianconi } 600d9f8934eSLorenzo Bianconi 601d9f8934eSLorenzo Bianconi int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb, 602d9f8934eSLorenzo Bianconi void *rxi) 603d9f8934eSLorenzo Bianconi { 604d9f8934eSLorenzo Bianconi struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb; 605d9f8934eSLorenzo Bianconi struct mt76x02_rxwi *rxwi = rxi; 606d9f8934eSLorenzo Bianconi struct mt76x02_sta *sta; 607d9f8934eSLorenzo Bianconi u32 rxinfo = le32_to_cpu(rxwi->rxinfo); 608d9f8934eSLorenzo Bianconi u32 ctl = le32_to_cpu(rxwi->ctl); 609d9f8934eSLorenzo Bianconi u16 rate = le16_to_cpu(rxwi->rate); 610d9f8934eSLorenzo Bianconi u16 tid_sn = le16_to_cpu(rxwi->tid_sn); 611d9f8934eSLorenzo Bianconi bool unicast = rxwi->rxinfo & cpu_to_le32(MT_RXINFO_UNICAST); 612d9f8934eSLorenzo Bianconi int i, pad_len = 0, nstreams = dev->mt76.chainmask & 0xf; 613d9f8934eSLorenzo Bianconi s8 signal; 614d9f8934eSLorenzo Bianconi u8 pn_len; 615d9f8934eSLorenzo Bianconi u8 wcid; 616d9f8934eSLorenzo Bianconi int len; 617d9f8934eSLorenzo Bianconi 618d9f8934eSLorenzo Bianconi if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state)) 619d9f8934eSLorenzo Bianconi return -EINVAL; 620d9f8934eSLorenzo Bianconi 621d9f8934eSLorenzo Bianconi if (rxinfo & MT_RXINFO_L2PAD) 622d9f8934eSLorenzo Bianconi pad_len += 2; 623d9f8934eSLorenzo Bianconi 624d9f8934eSLorenzo Bianconi if (rxinfo & MT_RXINFO_DECRYPT) { 625d9f8934eSLorenzo Bianconi status->flag |= RX_FLAG_DECRYPTED; 626d9f8934eSLorenzo Bianconi status->flag |= RX_FLAG_MMIC_STRIPPED; 627d9f8934eSLorenzo Bianconi status->flag |= RX_FLAG_MIC_STRIPPED; 628d9f8934eSLorenzo Bianconi status->flag |= RX_FLAG_IV_STRIPPED; 629d9f8934eSLorenzo Bianconi } 630d9f8934eSLorenzo Bianconi 631d9f8934eSLorenzo Bianconi wcid = FIELD_GET(MT_RXWI_CTL_WCID, ctl); 632d9f8934eSLorenzo Bianconi sta = mt76x02_rx_get_sta(&dev->mt76, wcid); 633d9f8934eSLorenzo Bianconi status->wcid = mt76x02_rx_get_sta_wcid(sta, unicast); 634d9f8934eSLorenzo Bianconi 635d9f8934eSLorenzo Bianconi len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl); 636d9f8934eSLorenzo Bianconi pn_len = FIELD_GET(MT_RXINFO_PN_LEN, rxinfo); 637d9f8934eSLorenzo Bianconi if (pn_len) { 638d9f8934eSLorenzo Bianconi int offset = ieee80211_get_hdrlen_from_skb(skb) + pad_len; 639d9f8934eSLorenzo Bianconi u8 *data = skb->data + offset; 640d9f8934eSLorenzo Bianconi 641d9f8934eSLorenzo Bianconi status->iv[0] = data[7]; 642d9f8934eSLorenzo Bianconi status->iv[1] = data[6]; 643d9f8934eSLorenzo Bianconi status->iv[2] = data[5]; 644d9f8934eSLorenzo Bianconi status->iv[3] = data[4]; 645d9f8934eSLorenzo Bianconi status->iv[4] = data[1]; 646d9f8934eSLorenzo Bianconi status->iv[5] = data[0]; 647d9f8934eSLorenzo Bianconi 648d9f8934eSLorenzo Bianconi /* 649d9f8934eSLorenzo Bianconi * Driver CCMP validation can't deal with fragments. 650d9f8934eSLorenzo Bianconi * Let mac80211 take care of it. 651d9f8934eSLorenzo Bianconi */ 652d9f8934eSLorenzo Bianconi if (rxinfo & MT_RXINFO_FRAG) { 653d9f8934eSLorenzo Bianconi status->flag &= ~RX_FLAG_IV_STRIPPED; 654d9f8934eSLorenzo Bianconi } else { 655d9f8934eSLorenzo Bianconi pad_len += pn_len << 2; 656d9f8934eSLorenzo Bianconi len -= pn_len << 2; 657d9f8934eSLorenzo Bianconi } 658d9f8934eSLorenzo Bianconi } 659d9f8934eSLorenzo Bianconi 660d9f8934eSLorenzo Bianconi mt76x02_remove_hdr_pad(skb, pad_len); 661d9f8934eSLorenzo Bianconi 662d9f8934eSLorenzo Bianconi if ((rxinfo & MT_RXINFO_BA) && !(rxinfo & MT_RXINFO_NULL)) 663d9f8934eSLorenzo Bianconi status->aggr = true; 664d9f8934eSLorenzo Bianconi 665d9f8934eSLorenzo Bianconi if (WARN_ON_ONCE(len > skb->len)) 666d9f8934eSLorenzo Bianconi return -EINVAL; 667d9f8934eSLorenzo Bianconi 668d9f8934eSLorenzo Bianconi pskb_trim(skb, len); 669d9f8934eSLorenzo Bianconi 670d9f8934eSLorenzo Bianconi status->chains = BIT(0); 671d9f8934eSLorenzo Bianconi signal = mt76x02_mac_get_rssi(dev, rxwi->rssi[0], 0); 672d9f8934eSLorenzo Bianconi for (i = 1; i < nstreams; i++) { 673d9f8934eSLorenzo Bianconi status->chains |= BIT(i); 674d9f8934eSLorenzo Bianconi status->chain_signal[i] = mt76x02_mac_get_rssi(dev, 675d9f8934eSLorenzo Bianconi rxwi->rssi[i], 676d9f8934eSLorenzo Bianconi i); 677d9f8934eSLorenzo Bianconi signal = max_t(s8, signal, status->chain_signal[i]); 678d9f8934eSLorenzo Bianconi } 679d9f8934eSLorenzo Bianconi status->signal = signal; 680d9f8934eSLorenzo Bianconi status->freq = dev->mt76.chandef.chan->center_freq; 681d9f8934eSLorenzo Bianconi status->band = dev->mt76.chandef.chan->band; 682d9f8934eSLorenzo Bianconi 683d9f8934eSLorenzo Bianconi status->tid = FIELD_GET(MT_RXWI_TID, tid_sn); 684d9f8934eSLorenzo Bianconi status->seqno = FIELD_GET(MT_RXWI_SN, tid_sn); 685d9f8934eSLorenzo Bianconi 686d9f8934eSLorenzo Bianconi if (sta) { 687d9f8934eSLorenzo Bianconi ewma_signal_add(&sta->rssi, status->signal); 688d9f8934eSLorenzo Bianconi sta->inactive_count = 0; 689d9f8934eSLorenzo Bianconi } 690d9f8934eSLorenzo Bianconi 691d9f8934eSLorenzo Bianconi return mt76x02_mac_process_rate(status, rate); 692d9f8934eSLorenzo Bianconi } 6933e2342edSLorenzo Bianconi 6943e2342edSLorenzo Bianconi void mt76x02_mac_poll_tx_status(struct mt76x02_dev *dev, bool irq) 6953e2342edSLorenzo Bianconi { 6963e2342edSLorenzo Bianconi struct mt76x02_tx_status stat = {}; 6973e2342edSLorenzo Bianconi unsigned long flags; 6983e2342edSLorenzo Bianconi u8 update = 1; 6993e2342edSLorenzo Bianconi bool ret; 7003e2342edSLorenzo Bianconi 7013e2342edSLorenzo Bianconi if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state)) 7023e2342edSLorenzo Bianconi return; 7033e2342edSLorenzo Bianconi 7043e2342edSLorenzo Bianconi trace_mac_txstat_poll(dev); 7053e2342edSLorenzo Bianconi 7063e2342edSLorenzo Bianconi while (!irq || !kfifo_is_full(&dev->txstatus_fifo)) { 7073e2342edSLorenzo Bianconi spin_lock_irqsave(&dev->mt76.mmio.irq_lock, flags); 7088d66af49SLorenzo Bianconi ret = mt76x02_mac_load_tx_status(dev, &stat); 7093e2342edSLorenzo Bianconi spin_unlock_irqrestore(&dev->mt76.mmio.irq_lock, flags); 7103e2342edSLorenzo Bianconi 7113e2342edSLorenzo Bianconi if (!ret) 7123e2342edSLorenzo Bianconi break; 7133e2342edSLorenzo Bianconi 7143e2342edSLorenzo Bianconi if (!irq) { 7158d66af49SLorenzo Bianconi mt76x02_send_tx_status(dev, &stat, &update); 7163e2342edSLorenzo Bianconi continue; 7173e2342edSLorenzo Bianconi } 7183e2342edSLorenzo Bianconi 7193e2342edSLorenzo Bianconi kfifo_put(&dev->txstatus_fifo, stat); 7203e2342edSLorenzo Bianconi } 7213e2342edSLorenzo Bianconi } 722466495b1SLorenzo Bianconi 723466495b1SLorenzo Bianconi void mt76x02_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q, 724466495b1SLorenzo Bianconi struct mt76_queue_entry *e, bool flush) 725466495b1SLorenzo Bianconi { 726466495b1SLorenzo Bianconi struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 727*88046b2cSFelix Fietkau struct mt76x02_txwi *txwi; 728466495b1SLorenzo Bianconi 729*88046b2cSFelix Fietkau if (!e->txwi) { 730466495b1SLorenzo Bianconi dev_kfree_skb_any(e->skb); 731*88046b2cSFelix Fietkau return; 732*88046b2cSFelix Fietkau } 733*88046b2cSFelix Fietkau 734*88046b2cSFelix Fietkau mt76x02_mac_poll_tx_status(dev, false); 735*88046b2cSFelix Fietkau 736*88046b2cSFelix Fietkau txwi = (struct mt76x02_txwi *) &e->txwi->txwi; 737*88046b2cSFelix Fietkau trace_mac_txdone_add(dev, txwi->wcid, txwi->pktid); 738*88046b2cSFelix Fietkau 739*88046b2cSFelix Fietkau mt76_tx_complete_skb(mdev, e->skb); 740466495b1SLorenzo Bianconi } 741466495b1SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_tx_complete_skb); 74262503186SLorenzo Bianconi 743317ed42bSLorenzo Bianconi void mt76x02_mac_set_tx_protection(struct mt76x02_dev *dev, u32 val) 744317ed42bSLorenzo Bianconi { 745317ed42bSLorenzo Bianconi u32 data = 0; 746317ed42bSLorenzo Bianconi 747317ed42bSLorenzo Bianconi if (val != ~0) 748317ed42bSLorenzo Bianconi data = FIELD_PREP(MT_PROT_CFG_CTRL, 1) | 749317ed42bSLorenzo Bianconi MT_PROT_CFG_RTS_THRESH; 750317ed42bSLorenzo Bianconi 751317ed42bSLorenzo Bianconi mt76_rmw_field(dev, MT_TX_RTS_CFG, MT_TX_RTS_CFG_THRESH, val); 752317ed42bSLorenzo Bianconi 753317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_CCK_PROT_CFG, 754317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 755317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_OFDM_PROT_CFG, 756317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 757317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_MM20_PROT_CFG, 758317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 759317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_MM40_PROT_CFG, 760317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 761317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_GF20_PROT_CFG, 762317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 763317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_GF40_PROT_CFG, 764317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 765317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_TX_PROT_CFG6, 766317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 767317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_TX_PROT_CFG7, 768317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 769317ed42bSLorenzo Bianconi mt76_rmw(dev, MT_TX_PROT_CFG8, 770317ed42bSLorenzo Bianconi MT_PROT_CFG_CTRL | MT_PROT_CFG_RTS_THRESH, data); 771317ed42bSLorenzo Bianconi } 772317ed42bSLorenzo Bianconi 77362503186SLorenzo Bianconi void mt76x02_update_channel(struct mt76_dev *mdev) 77462503186SLorenzo Bianconi { 77562503186SLorenzo Bianconi struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 77662503186SLorenzo Bianconi struct mt76_channel_state *state; 77762503186SLorenzo Bianconi u32 active, busy; 77862503186SLorenzo Bianconi 77962503186SLorenzo Bianconi state = mt76_channel_state(&dev->mt76, dev->mt76.chandef.chan); 78062503186SLorenzo Bianconi 78162503186SLorenzo Bianconi busy = mt76_rr(dev, MT_CH_BUSY); 78262503186SLorenzo Bianconi active = busy + mt76_rr(dev, MT_CH_IDLE); 78362503186SLorenzo Bianconi 78462503186SLorenzo Bianconi spin_lock_bh(&dev->mt76.cc_lock); 78562503186SLorenzo Bianconi state->cc_busy += busy; 78662503186SLorenzo Bianconi state->cc_active += active; 78762503186SLorenzo Bianconi spin_unlock_bh(&dev->mt76.cc_lock); 78862503186SLorenzo Bianconi } 78962503186SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_update_channel); 7907dd73588SLorenzo Bianconi 79173556561SLorenzo Bianconi static void mt76x02_check_mac_err(struct mt76x02_dev *dev) 79273556561SLorenzo Bianconi { 79373556561SLorenzo Bianconi u32 val = mt76_rr(dev, 0x10f4); 79473556561SLorenzo Bianconi 79573556561SLorenzo Bianconi if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5)))) 79673556561SLorenzo Bianconi return; 79773556561SLorenzo Bianconi 79873556561SLorenzo Bianconi dev_err(dev->mt76.dev, "mac specific condition occurred\n"); 79973556561SLorenzo Bianconi 80073556561SLorenzo Bianconi mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); 80173556561SLorenzo Bianconi udelay(10); 80273556561SLorenzo Bianconi mt76_clear(dev, MT_MAC_SYS_CTRL, 80373556561SLorenzo Bianconi MT_MAC_SYS_CTRL_ENABLE_TX | MT_MAC_SYS_CTRL_ENABLE_RX); 80473556561SLorenzo Bianconi } 80573556561SLorenzo Bianconi 8067dd73588SLorenzo Bianconi void mt76x02_mac_work(struct work_struct *work) 8077dd73588SLorenzo Bianconi { 8087dd73588SLorenzo Bianconi struct mt76x02_dev *dev = container_of(work, struct mt76x02_dev, 8097dd73588SLorenzo Bianconi mac_work.work); 8107dd73588SLorenzo Bianconi int i, idx; 8117dd73588SLorenzo Bianconi 8127dd73588SLorenzo Bianconi mt76x02_update_channel(&dev->mt76); 8137dd73588SLorenzo Bianconi for (i = 0, idx = 0; i < 16; i++) { 8147dd73588SLorenzo Bianconi u32 val = mt76_rr(dev, MT_TX_AGG_CNT(i)); 8157dd73588SLorenzo Bianconi 8167dd73588SLorenzo Bianconi dev->aggr_stats[idx++] += val & 0xffff; 8177dd73588SLorenzo Bianconi dev->aggr_stats[idx++] += val >> 16; 8187dd73588SLorenzo Bianconi } 8197dd73588SLorenzo Bianconi 82073556561SLorenzo Bianconi /* XXX: check beacon stuck for ap mode */ 82173556561SLorenzo Bianconi if (!dev->beacon_mask) 82273556561SLorenzo Bianconi mt76x02_check_mac_err(dev); 82373556561SLorenzo Bianconi 824*88046b2cSFelix Fietkau mt76_tx_status_check(&dev->mt76); 825*88046b2cSFelix Fietkau 8267dd73588SLorenzo Bianconi ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mac_work, 8277dd73588SLorenzo Bianconi MT_CALIBRATE_INTERVAL); 8287dd73588SLorenzo Bianconi } 829dc33b251SLorenzo Bianconi 830dc33b251SLorenzo Bianconi void mt76x02_mac_set_bssid(struct mt76x02_dev *dev, u8 idx, const u8 *addr) 831dc33b251SLorenzo Bianconi { 832dc33b251SLorenzo Bianconi idx &= 7; 833dc33b251SLorenzo Bianconi mt76_wr(dev, MT_MAC_APC_BSSID_L(idx), get_unaligned_le32(addr)); 834dc33b251SLorenzo Bianconi mt76_rmw_field(dev, MT_MAC_APC_BSSID_H(idx), MT_MAC_APC_BSSID_H_ADDR, 835dc33b251SLorenzo Bianconi get_unaligned_le16(addr + 4)); 836dc33b251SLorenzo Bianconi } 837dc33b251SLorenzo Bianconi 838dc33b251SLorenzo Bianconi static int 839dc33b251SLorenzo Bianconi mt76x02_write_beacon(struct mt76x02_dev *dev, int offset, struct sk_buff *skb) 840dc33b251SLorenzo Bianconi { 841dc33b251SLorenzo Bianconi int beacon_len = mt76x02_beacon_offsets[1] - mt76x02_beacon_offsets[0]; 842dc33b251SLorenzo Bianconi struct mt76x02_txwi txwi; 843dc33b251SLorenzo Bianconi 844dc33b251SLorenzo Bianconi if (WARN_ON_ONCE(beacon_len < skb->len + sizeof(struct mt76x02_txwi))) 845dc33b251SLorenzo Bianconi return -ENOSPC; 846dc33b251SLorenzo Bianconi 847dc33b251SLorenzo Bianconi mt76x02_mac_write_txwi(dev, &txwi, skb, NULL, NULL, skb->len); 848dc33b251SLorenzo Bianconi 849dc33b251SLorenzo Bianconi mt76_wr_copy(dev, offset, &txwi, sizeof(txwi)); 850dc33b251SLorenzo Bianconi offset += sizeof(txwi); 851dc33b251SLorenzo Bianconi 852dc33b251SLorenzo Bianconi mt76_wr_copy(dev, offset, skb->data, skb->len); 853dc33b251SLorenzo Bianconi return 0; 854dc33b251SLorenzo Bianconi } 855dc33b251SLorenzo Bianconi 856dc33b251SLorenzo Bianconi static int 857dc33b251SLorenzo Bianconi __mt76x02_mac_set_beacon(struct mt76x02_dev *dev, u8 bcn_idx, 858dc33b251SLorenzo Bianconi struct sk_buff *skb) 859dc33b251SLorenzo Bianconi { 860dc33b251SLorenzo Bianconi int beacon_len = mt76x02_beacon_offsets[1] - mt76x02_beacon_offsets[0]; 861dc33b251SLorenzo Bianconi int beacon_addr = mt76x02_beacon_offsets[bcn_idx]; 862dc33b251SLorenzo Bianconi int ret = 0; 863dc33b251SLorenzo Bianconi int i; 864dc33b251SLorenzo Bianconi 865dc33b251SLorenzo Bianconi /* Prevent corrupt transmissions during update */ 866dc33b251SLorenzo Bianconi mt76_set(dev, MT_BCN_BYPASS_MASK, BIT(bcn_idx)); 867dc33b251SLorenzo Bianconi 868dc33b251SLorenzo Bianconi if (skb) { 869dc33b251SLorenzo Bianconi ret = mt76x02_write_beacon(dev, beacon_addr, skb); 870dc33b251SLorenzo Bianconi if (!ret) 871dc33b251SLorenzo Bianconi dev->beacon_data_mask |= BIT(bcn_idx); 872dc33b251SLorenzo Bianconi } else { 873dc33b251SLorenzo Bianconi dev->beacon_data_mask &= ~BIT(bcn_idx); 874dc33b251SLorenzo Bianconi for (i = 0; i < beacon_len; i += 4) 875dc33b251SLorenzo Bianconi mt76_wr(dev, beacon_addr + i, 0); 876dc33b251SLorenzo Bianconi } 877dc33b251SLorenzo Bianconi 878dc33b251SLorenzo Bianconi mt76_wr(dev, MT_BCN_BYPASS_MASK, 0xff00 | ~dev->beacon_data_mask); 879dc33b251SLorenzo Bianconi 880dc33b251SLorenzo Bianconi return ret; 881dc33b251SLorenzo Bianconi } 882dc33b251SLorenzo Bianconi 883dc33b251SLorenzo Bianconi int mt76x02_mac_set_beacon(struct mt76x02_dev *dev, u8 vif_idx, 884dc33b251SLorenzo Bianconi struct sk_buff *skb) 885dc33b251SLorenzo Bianconi { 886dc33b251SLorenzo Bianconi bool force_update = false; 887dc33b251SLorenzo Bianconi int bcn_idx = 0; 888dc33b251SLorenzo Bianconi int i; 889dc33b251SLorenzo Bianconi 890dc33b251SLorenzo Bianconi for (i = 0; i < ARRAY_SIZE(dev->beacons); i++) { 891dc33b251SLorenzo Bianconi if (vif_idx == i) { 892dc33b251SLorenzo Bianconi force_update = !!dev->beacons[i] ^ !!skb; 893dc33b251SLorenzo Bianconi 894dc33b251SLorenzo Bianconi if (dev->beacons[i]) 895dc33b251SLorenzo Bianconi dev_kfree_skb(dev->beacons[i]); 896dc33b251SLorenzo Bianconi 897dc33b251SLorenzo Bianconi dev->beacons[i] = skb; 898dc33b251SLorenzo Bianconi __mt76x02_mac_set_beacon(dev, bcn_idx, skb); 899dc33b251SLorenzo Bianconi } else if (force_update && dev->beacons[i]) { 900dc33b251SLorenzo Bianconi __mt76x02_mac_set_beacon(dev, bcn_idx, 901dc33b251SLorenzo Bianconi dev->beacons[i]); 902dc33b251SLorenzo Bianconi } 903dc33b251SLorenzo Bianconi 904dc33b251SLorenzo Bianconi bcn_idx += !!dev->beacons[i]; 905dc33b251SLorenzo Bianconi } 906dc33b251SLorenzo Bianconi 907dc33b251SLorenzo Bianconi for (i = bcn_idx; i < ARRAY_SIZE(dev->beacons); i++) { 908dc33b251SLorenzo Bianconi if (!(dev->beacon_data_mask & BIT(i))) 909dc33b251SLorenzo Bianconi break; 910dc33b251SLorenzo Bianconi 911dc33b251SLorenzo Bianconi __mt76x02_mac_set_beacon(dev, i, NULL); 912dc33b251SLorenzo Bianconi } 913dc33b251SLorenzo Bianconi 914dc33b251SLorenzo Bianconi mt76_rmw_field(dev, MT_MAC_BSSID_DW1, MT_MAC_BSSID_DW1_MBEACON_N, 915dc33b251SLorenzo Bianconi bcn_idx - 1); 916dc33b251SLorenzo Bianconi return 0; 917dc33b251SLorenzo Bianconi } 918dc33b251SLorenzo Bianconi 919dc33b251SLorenzo Bianconi void mt76x02_mac_set_beacon_enable(struct mt76x02_dev *dev, 920dc33b251SLorenzo Bianconi u8 vif_idx, bool val) 921dc33b251SLorenzo Bianconi { 922dc33b251SLorenzo Bianconi u8 old_mask = dev->beacon_mask; 923dc33b251SLorenzo Bianconi bool en; 924dc33b251SLorenzo Bianconi u32 reg; 925dc33b251SLorenzo Bianconi 926dc33b251SLorenzo Bianconi if (val) { 927dc33b251SLorenzo Bianconi dev->beacon_mask |= BIT(vif_idx); 928dc33b251SLorenzo Bianconi } else { 929dc33b251SLorenzo Bianconi dev->beacon_mask &= ~BIT(vif_idx); 930dc33b251SLorenzo Bianconi mt76x02_mac_set_beacon(dev, vif_idx, NULL); 931dc33b251SLorenzo Bianconi } 932dc33b251SLorenzo Bianconi 933dc33b251SLorenzo Bianconi if (!!old_mask == !!dev->beacon_mask) 934dc33b251SLorenzo Bianconi return; 935dc33b251SLorenzo Bianconi 936dc33b251SLorenzo Bianconi en = dev->beacon_mask; 937dc33b251SLorenzo Bianconi 938dc33b251SLorenzo Bianconi mt76_rmw_field(dev, MT_INT_TIMER_EN, MT_INT_TIMER_EN_PRE_TBTT_EN, en); 939dc33b251SLorenzo Bianconi reg = MT_BEACON_TIME_CFG_BEACON_TX | 940dc33b251SLorenzo Bianconi MT_BEACON_TIME_CFG_TBTT_EN | 941dc33b251SLorenzo Bianconi MT_BEACON_TIME_CFG_TIMER_EN; 942dc33b251SLorenzo Bianconi mt76_rmw(dev, MT_BEACON_TIME_CFG, reg, reg * en); 943dc33b251SLorenzo Bianconi 944dc33b251SLorenzo Bianconi if (en) 945dc33b251SLorenzo Bianconi mt76x02_irq_enable(dev, MT_INT_PRE_TBTT | MT_INT_TBTT); 946dc33b251SLorenzo Bianconi else 947dc33b251SLorenzo Bianconi mt76x02_irq_disable(dev, MT_INT_PRE_TBTT | MT_INT_TBTT); 948dc33b251SLorenzo Bianconi } 949