1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef __MT76x02_EEPROM_H 19 #define __MT76x02_EEPROM_H 20 21 enum mt76x02_eeprom_field { 22 MT_EE_CHIP_ID = 0x000, 23 MT_EE_VERSION = 0x002, 24 MT_EE_MAC_ADDR = 0x004, 25 MT_EE_PCI_ID = 0x00A, 26 MT_EE_NIC_CONF_0 = 0x034, 27 MT_EE_NIC_CONF_1 = 0x036, 28 MT_EE_COUNTRY_REGION_5GHZ = 0x038, 29 MT_EE_COUNTRY_REGION_2GHZ = 0x039, 30 MT_EE_FREQ_OFFSET = 0x03a, 31 MT_EE_NIC_CONF_2 = 0x042, 32 33 MT_EE_XTAL_TRIM_1 = 0x03a, 34 MT_EE_XTAL_TRIM_2 = 0x09e, 35 36 MT_EE_LNA_GAIN = 0x044, 37 MT_EE_RSSI_OFFSET_2G_0 = 0x046, 38 MT_EE_RSSI_OFFSET_2G_1 = 0x048, 39 MT_EE_LNA_GAIN_5GHZ_1 = 0x049, 40 MT_EE_RSSI_OFFSET_5G_0 = 0x04a, 41 MT_EE_RSSI_OFFSET_5G_1 = 0x04c, 42 MT_EE_LNA_GAIN_5GHZ_2 = 0x04d, 43 44 MT_EE_TX_POWER_DELTA_BW40 = 0x050, 45 MT_EE_TX_POWER_DELTA_BW80 = 0x052, 46 47 MT_EE_TX_POWER_EXT_PA_5G = 0x054, 48 49 MT_EE_TX_POWER_0_START_2G = 0x056, 50 MT_EE_TX_POWER_1_START_2G = 0x05c, 51 52 /* used as byte arrays */ 53 #define MT_TX_POWER_GROUP_SIZE_5G 5 54 #define MT_TX_POWER_GROUPS_5G 6 55 MT_EE_TX_POWER_0_START_5G = 0x062, 56 57 MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA = 0x074, 58 MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE = 0x076, 59 60 MT_EE_TX_POWER_1_START_5G = 0x080, 61 62 MT_EE_TX_POWER_CCK = 0x0a0, 63 MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2, 64 MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4, 65 MT_EE_TX_POWER_OFDM_5G_6M = 0x0b2, 66 MT_EE_TX_POWER_OFDM_5G_24M = 0x0b4, 67 MT_EE_TX_POWER_HT_MCS0 = 0x0a6, 68 MT_EE_TX_POWER_HT_MCS4 = 0x0a8, 69 MT_EE_TX_POWER_HT_MCS8 = 0x0aa, 70 MT_EE_TX_POWER_HT_MCS12 = 0x0ac, 71 MT_EE_TX_POWER_VHT_MCS0 = 0x0ba, 72 MT_EE_TX_POWER_VHT_MCS4 = 0x0bc, 73 MT_EE_TX_POWER_VHT_MCS8 = 0x0be, 74 75 MT_EE_2G_TARGET_POWER = 0x0d0, 76 MT_EE_TEMP_OFFSET = 0x0d1, 77 MT_EE_5G_TARGET_POWER = 0x0d2, 78 MT_EE_TSSI_BOUND1 = 0x0d4, 79 MT_EE_TSSI_BOUND2 = 0x0d6, 80 MT_EE_TSSI_BOUND3 = 0x0d8, 81 MT_EE_TSSI_BOUND4 = 0x0da, 82 MT_EE_FREQ_OFFSET_COMPENSATION = 0x0db, 83 MT_EE_TSSI_BOUND5 = 0x0dc, 84 MT_EE_TX_POWER_BYRATE_BASE = 0x0de, 85 86 MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2, 87 MT_EE_RF_TEMP_COMP_SLOPE_2G = 0x0f4, 88 89 MT_EE_RF_2G_TSSI_OFF_TXPOWER = 0x0f6, 90 MT_EE_RF_2G_RX_HIGH_GAIN = 0x0f8, 91 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN = 0x0fa, 92 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN = 0x0fc, 93 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN = 0x0fe, 94 95 MT_EE_BT_RCAL_RESULT = 0x138, 96 MT_EE_BT_VCDL_CALIBRATION = 0x13c, 97 MT_EE_BT_PMUCFG = 0x13e, 98 99 MT_EE_USAGE_MAP_START = 0x1e0, 100 MT_EE_USAGE_MAP_END = 0x1fc, 101 102 __MT_EE_MAX 103 }; 104 105 #define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0) 106 #define MT_EE_NIC_CONF_0_TX_PATH GENMASK(7, 4) 107 #define MT_EE_NIC_CONF_0_PA_TYPE GENMASK(9, 8) 108 #define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8) 109 #define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9) 110 #define MT_EE_NIC_CONF_0_PA_IO_CURRENT BIT(10) 111 #define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12) 112 113 #define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0) 114 #define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1) 115 #define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2) 116 #define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3) 117 #define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13) 118 119 #define MT_EE_NIC_CONF_2_RX_STREAM GENMASK(3, 0) 120 #define MT_EE_NIC_CONF_2_TX_STREAM GENMASK(7, 4) 121 #define MT_EE_NIC_CONF_2_HW_ANTDIV BIT(8) 122 #define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9) 123 #define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11) 124 #define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13) 125 126 #define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \ 127 MT_EE_USAGE_MAP_START + 1) 128 129 enum mt76x02_eeprom_modes { 130 MT_EE_READ, 131 MT_EE_PHYSICAL_READ, 132 }; 133 134 enum mt76x02_board_type { 135 BOARD_TYPE_2GHZ = 1, 136 BOARD_TYPE_5GHZ = 2, 137 }; 138 139 static inline bool mt76x02_field_valid(u8 val) 140 { 141 return val != 0 && val != 0xff; 142 } 143 144 static inline int 145 mt76x02_sign_extend(u32 val, unsigned int size) 146 { 147 bool sign = val & BIT(size - 1); 148 149 val &= BIT(size - 1) - 1; 150 151 return sign ? val : -val; 152 } 153 154 static inline int 155 mt76x02_sign_extend_optional(u32 val, unsigned int size) 156 { 157 bool enable = val & BIT(size); 158 159 return enable ? mt76x02_sign_extend(val, size) : 0; 160 } 161 162 static inline s8 mt76x02_rate_power_val(u8 val) 163 { 164 if (!mt76x02_field_valid(val)) 165 return 0; 166 167 return mt76x02_sign_extend_optional(val, 7); 168 } 169 170 static inline int 171 mt76x02_eeprom_get(struct mt76_dev *dev, 172 enum mt76x02_eeprom_field field) 173 { 174 if ((field & 1) || field >= __MT_EE_MAX) 175 return -1; 176 177 return get_unaligned_le16(dev->eeprom.data + field); 178 } 179 180 static inline bool 181 mt76x02_temp_tx_alc_enabled(struct mt76_dev *dev) 182 { 183 u16 val; 184 185 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G); 186 if (!(val & BIT(15))) 187 return false; 188 189 return mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1) & 190 MT_EE_NIC_CONF_1_TEMP_TX_ALC; 191 } 192 193 static inline bool 194 mt76x02_tssi_enabled(struct mt76_dev *dev) 195 { 196 return !mt76x02_temp_tx_alc_enabled(dev) && 197 (mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1) & 198 MT_EE_NIC_CONF_1_TX_ALC_EN); 199 } 200 201 bool mt76x02_ext_pa_enabled(struct mt76_dev *dev, enum nl80211_band band); 202 int mt76x02_get_efuse_data(struct mt76_dev *dev, u16 base, void *buf, 203 int len, enum mt76x02_eeprom_modes mode); 204 void mt76x02_get_rx_gain(struct mt76_dev *dev, enum nl80211_band band, 205 u16 *rssi_offset, s8 *lna_2g, s8 *lna_5g); 206 u8 mt76x02_get_lna_gain(struct mt76_dev *dev, 207 s8 *lna_2g, s8 *lna_5g, 208 struct ieee80211_channel *chan); 209 void mt76x02_eeprom_parse_hw_cap(struct mt76_dev *dev); 210 211 #endif /* __MT76x02_EEPROM_H */ 212