1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/pci.h> 20 21 #include "mt76x0.h" 22 #include "mcu.h" 23 24 static int mt76x0e_start(struct ieee80211_hw *hw) 25 { 26 struct mt76x02_dev *dev = hw->priv; 27 28 mt76x02_mac_start(dev); 29 mt76x0_phy_calibrate(dev, true); 30 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mt76.mac_work, 31 MT_MAC_WORK_INTERVAL); 32 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work, 33 MT_CALIBRATE_INTERVAL); 34 set_bit(MT76_STATE_RUNNING, &dev->mt76.state); 35 36 return 0; 37 } 38 39 static void mt76x0e_stop_hw(struct mt76x02_dev *dev) 40 { 41 cancel_delayed_work_sync(&dev->cal_work); 42 cancel_delayed_work_sync(&dev->mt76.mac_work); 43 44 if (!mt76_poll(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_DMA_BUSY, 45 0, 1000)) 46 dev_warn(dev->mt76.dev, "TX DMA did not stop\n"); 47 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_DMA_EN); 48 49 mt76x0_mac_stop(dev); 50 51 if (!mt76_poll(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 52 0, 1000)) 53 dev_warn(dev->mt76.dev, "TX DMA did not stop\n"); 54 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_EN); 55 } 56 57 static void mt76x0e_stop(struct ieee80211_hw *hw) 58 { 59 struct mt76x02_dev *dev = hw->priv; 60 61 clear_bit(MT76_STATE_RUNNING, &dev->mt76.state); 62 mt76x0e_stop_hw(dev); 63 } 64 65 static int 66 mt76x0e_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 67 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 68 struct ieee80211_key_conf *key) 69 { 70 struct mt76x02_dev *dev = hw->priv; 71 72 if (is_mt7630(dev)) 73 return -EOPNOTSUPP; 74 75 return mt76x02_set_key(hw, cmd, vif, sta, key); 76 } 77 78 static void 79 mt76x0e_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 80 u32 queues, bool drop) 81 { 82 } 83 84 static const struct ieee80211_ops mt76x0e_ops = { 85 .tx = mt76x02_tx, 86 .start = mt76x0e_start, 87 .stop = mt76x0e_stop, 88 .add_interface = mt76x02_add_interface, 89 .remove_interface = mt76x02_remove_interface, 90 .config = mt76x0_config, 91 .configure_filter = mt76x02_configure_filter, 92 .bss_info_changed = mt76x02_bss_info_changed, 93 .sta_state = mt76_sta_state, 94 .set_key = mt76x0e_set_key, 95 .conf_tx = mt76x02_conf_tx, 96 .sw_scan_start = mt76x02_sw_scan, 97 .sw_scan_complete = mt76x02_sw_scan_complete, 98 .ampdu_action = mt76x02_ampdu_action, 99 .sta_rate_tbl_update = mt76x02_sta_rate_tbl_update, 100 .wake_tx_queue = mt76_wake_tx_queue, 101 .get_survey = mt76_get_survey, 102 .get_txpower = mt76_get_txpower, 103 .flush = mt76x0e_flush, 104 .set_tim = mt76_set_tim, 105 .release_buffered_frames = mt76_release_buffered_frames, 106 .set_coverage_class = mt76x02_set_coverage_class, 107 .set_rts_threshold = mt76x02_set_rts_threshold, 108 }; 109 110 static int mt76x0e_register_device(struct mt76x02_dev *dev) 111 { 112 int err; 113 114 mt76x0_chip_onoff(dev, true, false); 115 if (!mt76x02_wait_for_mac(&dev->mt76)) 116 return -ETIMEDOUT; 117 118 mt76x02_dma_disable(dev); 119 err = mt76x0e_mcu_init(dev); 120 if (err < 0) 121 return err; 122 123 err = mt76x02_dma_init(dev); 124 if (err < 0) 125 return err; 126 127 err = mt76x0_init_hardware(dev); 128 if (err < 0) 129 return err; 130 131 mt76x02e_init_beacon_config(dev); 132 133 if (mt76_chip(&dev->mt76) == 0x7610) { 134 u16 val; 135 136 mt76_clear(dev, MT_COEXCFG0, BIT(0)); 137 138 val = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0); 139 if (!(val & MT_EE_NIC_CONF_0_PA_IO_CURRENT)) 140 mt76_set(dev, MT_XO_CTRL7, 0xc03); 141 } 142 143 mt76_clear(dev, 0x110, BIT(9)); 144 mt76_set(dev, MT_MAX_LEN_CFG, BIT(13)); 145 146 mt76_wr(dev, MT_CH_TIME_CFG, 147 MT_CH_TIME_CFG_TIMER_EN | 148 MT_CH_TIME_CFG_TX_AS_BUSY | 149 MT_CH_TIME_CFG_RX_AS_BUSY | 150 MT_CH_TIME_CFG_NAV_AS_BUSY | 151 MT_CH_TIME_CFG_EIFS_AS_BUSY | 152 MT_CH_CCA_RC_EN | 153 FIELD_PREP(MT_CH_TIME_CFG_CH_TIMER_CLR, 1)); 154 155 err = mt76x0_register_device(dev); 156 if (err < 0) 157 return err; 158 159 set_bit(MT76_STATE_INITIALIZED, &dev->mt76.state); 160 161 return 0; 162 } 163 164 static int 165 mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id) 166 { 167 static const struct mt76_driver_ops drv_ops = { 168 .txwi_size = sizeof(struct mt76x02_txwi), 169 .tx_aligned4_skbs = true, 170 .update_survey = mt76x02_update_channel, 171 .tx_prepare_skb = mt76x02_tx_prepare_skb, 172 .tx_complete_skb = mt76x02_tx_complete_skb, 173 .rx_skb = mt76x02_queue_rx_skb, 174 .rx_poll_complete = mt76x02_rx_poll_complete, 175 .sta_ps = mt76x02_sta_ps, 176 .sta_add = mt76x02_sta_add, 177 .sta_remove = mt76x02_sta_remove, 178 }; 179 struct mt76x02_dev *dev; 180 struct mt76_dev *mdev; 181 int ret; 182 183 ret = pcim_enable_device(pdev); 184 if (ret) 185 return ret; 186 187 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 188 if (ret) 189 return ret; 190 191 pci_set_master(pdev); 192 193 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 194 if (ret) 195 return ret; 196 197 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt76x0e_ops, 198 &drv_ops); 199 if (!mdev) 200 return -ENOMEM; 201 202 dev = container_of(mdev, struct mt76x02_dev, mt76); 203 mutex_init(&dev->phy_mutex); 204 205 mt76_mmio_init(mdev, pcim_iomap_table(pdev)[0]); 206 207 mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); 208 dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); 209 210 ret = devm_request_irq(mdev->dev, pdev->irq, mt76x02_irq_handler, 211 IRQF_SHARED, KBUILD_MODNAME, dev); 212 if (ret) 213 goto error; 214 215 ret = mt76x0e_register_device(dev); 216 if (ret < 0) 217 goto error; 218 219 return 0; 220 221 error: 222 ieee80211_free_hw(mt76_hw(dev)); 223 return ret; 224 } 225 226 static void mt76x0e_cleanup(struct mt76x02_dev *dev) 227 { 228 clear_bit(MT76_STATE_INITIALIZED, &dev->mt76.state); 229 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 230 mt76x0_chip_onoff(dev, false, false); 231 mt76x0e_stop_hw(dev); 232 mt76x02_dma_cleanup(dev); 233 mt76x02_mcu_cleanup(dev); 234 } 235 236 static void 237 mt76x0e_remove(struct pci_dev *pdev) 238 { 239 struct mt76_dev *mdev = pci_get_drvdata(pdev); 240 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 241 242 mt76_unregister_device(mdev); 243 mt76x0e_cleanup(dev); 244 mt76_free_device(mdev); 245 } 246 247 static const struct pci_device_id mt76x0e_device_table[] = { 248 { PCI_DEVICE(0x14c3, 0x7630) }, 249 { PCI_DEVICE(0x14c3, 0x7650) }, 250 { }, 251 }; 252 253 MODULE_DEVICE_TABLE(pci, mt76x0e_device_table); 254 MODULE_FIRMWARE(MT7610E_FIRMWARE); 255 MODULE_FIRMWARE(MT7650E_FIRMWARE); 256 MODULE_LICENSE("Dual BSD/GPL"); 257 258 static struct pci_driver mt76x0e_driver = { 259 .name = KBUILD_MODNAME, 260 .id_table = mt76x0e_device_table, 261 .probe = mt76x0e_probe, 262 .remove = mt76x0e_remove, 263 }; 264 265 module_pci_driver(mt76x0e_driver); 266