1 /* 2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> 3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> 4 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/mtd/mtd.h> 19 #include <linux/mtd/partitions.h> 20 #include <linux/etherdevice.h> 21 #include <asm/unaligned.h> 22 #include "mt76x0.h" 23 #include "eeprom.h" 24 #include "../mt76x02_phy.h" 25 26 #define MT_MAP_READS DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16) 27 static int 28 mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev) 29 { 30 u8 data[MT_MAP_READS * 16]; 31 int ret, i; 32 u32 start = 0, end = 0, cnt_free; 33 34 ret = mt76x02_get_efuse_data(&dev->mt76, MT_EE_USAGE_MAP_START, 35 data, sizeof(data), MT_EE_PHYSICAL_READ); 36 if (ret) 37 return ret; 38 39 for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++) 40 if (!data[i]) { 41 if (!start) 42 start = MT_EE_USAGE_MAP_START + i; 43 end = MT_EE_USAGE_MAP_START + i; 44 } 45 cnt_free = end - start + 1; 46 47 if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) { 48 dev_err(dev->mt76.dev, 49 "driver does not support default EEPROM\n"); 50 return -EINVAL; 51 } 52 53 return 0; 54 } 55 56 static void mt76x0_set_chip_cap(struct mt76x02_dev *dev) 57 { 58 u16 nic_conf0 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_0); 59 u16 nic_conf1 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_1); 60 61 mt76x02_eeprom_parse_hw_cap(&dev->mt76); 62 dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n", 63 dev->mt76.cap.has_2ghz, dev->mt76.cap.has_5ghz); 64 65 if (dev->no_2ghz) { 66 dev->mt76.cap.has_2ghz = false; 67 dev_dbg(dev->mt76.dev, "mask out 2GHz support\n"); 68 } 69 70 if (!mt76x02_field_valid(nic_conf1 & 0xff)) 71 nic_conf1 &= 0xff00; 72 73 if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL) 74 dev_err(dev->mt76.dev, 75 "driver does not support HW RF ctrl\n"); 76 77 if (!mt76x02_field_valid(nic_conf0 >> 8)) 78 return; 79 80 if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 || 81 FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1) 82 dev_err(dev->mt76.dev, "invalid tx-rx stream\n"); 83 } 84 85 static void mt76x0_set_temp_offset(struct mt76x02_dev *dev) 86 { 87 u8 val; 88 89 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_2G_TARGET_POWER) >> 8; 90 if (mt76x02_field_valid(val)) 91 dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8); 92 else 93 dev->cal.rx.temp_offset = -10; 94 } 95 96 static void mt76x0_set_freq_offset(struct mt76x02_dev *dev) 97 { 98 struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx; 99 u8 val; 100 101 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_FREQ_OFFSET); 102 if (!mt76x02_field_valid(val)) 103 val = 0; 104 caldata->freq_offset = val; 105 106 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TSSI_BOUND4) >> 8; 107 if (!mt76x02_field_valid(val)) 108 val = 0; 109 110 caldata->freq_offset -= mt76x02_sign_extend(val, 8); 111 } 112 113 void mt76x0_read_rx_gain(struct mt76x02_dev *dev) 114 { 115 struct ieee80211_channel *chan = dev->mt76.chandef.chan; 116 struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx; 117 s8 val, lna_5g[3], lna_2g; 118 u16 rssi_offset; 119 int i; 120 121 mt76x02_get_rx_gain(&dev->mt76, chan->band, &rssi_offset, 122 &lna_2g, lna_5g); 123 caldata->lna_gain = mt76x02_get_lna_gain(&dev->mt76, &lna_2g, 124 lna_5g, chan); 125 126 for (i = 0; i < ARRAY_SIZE(caldata->rssi_offset); i++) { 127 val = rssi_offset >> (8 * i); 128 if (val < -10 || val > 10) 129 val = 0; 130 131 caldata->rssi_offset[i] = val; 132 } 133 } 134 135 static s8 mt76x0_get_delta(struct mt76_dev *dev) 136 { 137 struct cfg80211_chan_def *chandef = &dev->chandef; 138 u8 val; 139 140 if (mt76x02_tssi_enabled(dev)) 141 return 0; 142 143 if (chandef->width == NL80211_CHAN_WIDTH_80) { 144 val = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER) >> 8; 145 } else if (chandef->width == NL80211_CHAN_WIDTH_40) { 146 u16 data; 147 148 data = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40); 149 if (chandef->chan->band == NL80211_BAND_5GHZ) 150 val = data >> 8; 151 else 152 val = data; 153 } else { 154 return 0; 155 } 156 157 return mt76x02_rate_power_val(val); 158 } 159 160 void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev) 161 { 162 struct ieee80211_channel *chan = dev->mt76.chandef.chan; 163 bool is_2ghz = chan->band == NL80211_BAND_2GHZ; 164 struct mt76_rate_power *t = &dev->mt76.rate_power; 165 s8 delta = mt76x0_get_delta(&dev->mt76); 166 u16 val, addr; 167 168 memset(t, 0, sizeof(*t)); 169 170 /* cck 1M, 2M, 5.5M, 11M */ 171 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_BYRATE_BASE); 172 t->cck[0] = t->cck[1] = s6_to_s8(val); 173 t->cck[2] = t->cck[3] = s6_to_s8(val >> 8); 174 175 /* ofdm 6M, 9M, 12M, 18M */ 176 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 2 : 0x120; 177 val = mt76x02_eeprom_get(&dev->mt76, addr); 178 t->ofdm[0] = t->ofdm[1] = s6_to_s8(val); 179 t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8); 180 181 /* ofdm 24M, 36M, 48M, 54M */ 182 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 4 : 0x122; 183 val = mt76x02_eeprom_get(&dev->mt76, addr); 184 t->ofdm[4] = t->ofdm[5] = s6_to_s8(val); 185 t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8); 186 187 /* ht-vht mcs 1ss 0, 1, 2, 3 */ 188 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 6 : 0x124; 189 val = mt76x02_eeprom_get(&dev->mt76, addr); 190 t->ht[0] = t->ht[1] = t->vht[0] = t->vht[1] = s6_to_s8(val); 191 t->ht[2] = t->ht[3] = t->vht[2] = t->vht[3] = s6_to_s8(val >> 8); 192 193 /* ht-vht mcs 1ss 4, 5, 6 */ 194 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 8 : 0x126; 195 val = mt76x02_eeprom_get(&dev->mt76, addr); 196 t->ht[4] = t->ht[5] = t->vht[4] = t->vht[5] = s6_to_s8(val); 197 t->ht[6] = t->vht[6] = s6_to_s8(val >> 8); 198 199 /* ht-vht mcs 1ss 0, 1, 2, 3 stbc */ 200 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 14 : 0xec; 201 val = mt76x02_eeprom_get(&dev->mt76, addr); 202 t->stbc[0] = t->stbc[1] = s6_to_s8(val); 203 t->stbc[2] = t->stbc[3] = s6_to_s8(val >> 8); 204 205 /* ht-vht mcs 1ss 4, 5, 6 stbc */ 206 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 16 : 0xee; 207 val = mt76x02_eeprom_get(&dev->mt76, addr); 208 t->stbc[4] = t->stbc[5] = s6_to_s8(val); 209 t->stbc[6] = t->stbc[7] = s6_to_s8(val >> 8); 210 211 /* vht mcs 8, 9 5GHz */ 212 val = mt76x02_eeprom_get(&dev->mt76, 0x132); 213 t->vht[7] = s6_to_s8(val); 214 t->vht[8] = s6_to_s8(val >> 8); 215 216 mt76x02_add_rate_power_offset(t, delta); 217 } 218 219 void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info) 220 { 221 struct mt76x0_chan_map { 222 u8 chan; 223 u8 offset; 224 } chan_map[] = { 225 { 2, 0 }, { 4, 1 }, { 6, 2 }, { 8, 3 }, 226 { 10, 4 }, { 12, 5 }, { 14, 6 }, { 38, 0 }, 227 { 44, 1 }, { 48, 2 }, { 54, 3 }, { 60, 4 }, 228 { 64, 5 }, { 102, 6 }, { 108, 7 }, { 112, 8 }, 229 { 118, 9 }, { 124, 10 }, { 128, 11 }, { 134, 12 }, 230 { 140, 13 }, { 151, 14 }, { 157, 15 }, { 161, 16 }, 231 { 167, 17 }, { 171, 18 }, { 173, 19 }, 232 }; 233 struct ieee80211_channel *chan = dev->mt76.chandef.chan; 234 u8 offset, addr; 235 u16 data; 236 int i; 237 238 for (i = 0; i < ARRAY_SIZE(chan_map); i++) { 239 if (chan_map[i].chan <= chan->hw_value) { 240 offset = chan_map[i].offset; 241 break; 242 } 243 } 244 if (i == ARRAY_SIZE(chan_map)) 245 offset = chan_map[0].offset; 246 247 if (chan->band == NL80211_BAND_2GHZ) { 248 addr = MT_EE_TX_POWER_DELTA_BW80 + offset; 249 } else { 250 switch (chan->hw_value) { 251 case 58: 252 offset = 8; 253 break; 254 case 106: 255 offset = 14; 256 break; 257 case 112: 258 offset = 20; 259 break; 260 case 155: 261 offset = 30; 262 break; 263 default: 264 break; 265 } 266 addr = MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE + 2 + offset; 267 } 268 269 data = mt76x02_eeprom_get(&dev->mt76, addr); 270 271 info[0] = data; 272 if (!info[0] || info[0] > 0x3f) 273 info[0] = 5; 274 275 info[1] = data >> 8; 276 if (!info[1] || info[1] > 0x3f) 277 info[1] = 5; 278 } 279 280 static int mt76x0_check_eeprom(struct mt76x02_dev *dev) 281 { 282 u16 val; 283 284 val = get_unaligned_le16(dev->mt76.eeprom.data); 285 if (!val) 286 val = get_unaligned_le16(dev->mt76.eeprom.data + 287 MT_EE_PCI_ID); 288 289 switch (val) { 290 case 0x7650: 291 case 0x7610: 292 return 0; 293 default: 294 dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", 295 val); 296 return -EINVAL; 297 } 298 } 299 300 static int mt76x0_load_eeprom(struct mt76x02_dev *dev) 301 { 302 int found; 303 304 found = mt76_eeprom_init(&dev->mt76, MT76X0_EEPROM_SIZE); 305 if (found < 0) 306 return found; 307 308 if (found && !mt76x0_check_eeprom(dev)) 309 return 0; 310 311 found = mt76x0_efuse_physical_size_check(dev); 312 if (found < 0) 313 return found; 314 315 return mt76x02_get_efuse_data(&dev->mt76, 0, dev->mt76.eeprom.data, 316 MT76X0_EEPROM_SIZE, MT_EE_READ); 317 } 318 319 int mt76x0_eeprom_init(struct mt76x02_dev *dev) 320 { 321 u8 version, fae; 322 u16 data; 323 int err; 324 325 err = mt76x0_load_eeprom(dev); 326 if (err < 0) 327 return err; 328 329 data = mt76x02_eeprom_get(&dev->mt76, MT_EE_VERSION); 330 version = data >> 8; 331 fae = data; 332 333 if (version > MT76X0U_EE_MAX_VER) 334 dev_warn(dev->mt76.dev, 335 "Warning: unsupported EEPROM version %02hhx\n", 336 version); 337 dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n", 338 version, fae); 339 340 mt76x02_mac_setaddr(&dev->mt76, 341 dev->mt76.eeprom.data + MT_EE_MAC_ADDR); 342 mt76x0_set_chip_cap(dev); 343 mt76x0_set_freq_offset(dev); 344 mt76x0_set_temp_offset(dev); 345 346 dev->mt76.chainmask = 0x0101; 347 348 return 0; 349 } 350 351 MODULE_LICENSE("Dual BSD/GPL"); 352