1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/firmware.h> 5 #include "mt76_connac2_mac.h" 6 #include "mt76_connac_mcu.h" 7 8 int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) 9 { 10 struct { 11 __le32 option; 12 __le32 addr; 13 } req = { 14 .option = cpu_to_le32(option), 15 .addr = cpu_to_le32(addr), 16 }; 17 18 return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req, 19 sizeof(req), true); 20 } 21 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware); 22 23 int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get) 24 { 25 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE; 26 struct { 27 __le32 op; 28 } req = { 29 .op = cpu_to_le32(op), 30 }; 31 32 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL), 33 &req, sizeof(req), true); 34 } 35 EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl); 36 37 int mt76_connac_mcu_start_patch(struct mt76_dev *dev) 38 { 39 struct { 40 u8 check_crc; 41 u8 reserved[3]; 42 } req = { 43 .check_crc = 0, 44 }; 45 46 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ), 47 &req, sizeof(req), true); 48 } 49 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch); 50 51 #define MCU_PATCH_ADDRESS 0x200000 52 53 int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 54 u32 mode) 55 { 56 struct { 57 __le32 addr; 58 __le32 len; 59 __le32 mode; 60 } req = { 61 .addr = cpu_to_le32(addr), 62 .len = cpu_to_le32(len), 63 .mode = cpu_to_le32(mode), 64 }; 65 int cmd; 66 67 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) || 68 (is_mt7921(dev) && addr == 0x900000) || 69 (is_mt7925(dev) && (addr == 0x900000 || addr == 0xe0002800)) || 70 (is_mt7996(dev) && addr == 0x900000) || 71 (is_mt7992(dev) && addr == 0x900000)) 72 cmd = MCU_CMD(PATCH_START_REQ); 73 else 74 cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ); 75 76 return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true); 77 } 78 EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download); 79 80 int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy) 81 { 82 int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0; 83 struct mt76_connac_mcu_channel_domain { 84 u8 alpha2[4]; /* regulatory_request.alpha2 */ 85 u8 bw_2g; /* BW_20_40M 0 86 * BW_20M 1 87 * BW_20_40_80M 2 88 * BW_20_40_80_160M 3 89 * BW_20_40_80_8080M 4 90 */ 91 u8 bw_5g; 92 u8 bw_6g; 93 u8 pad; 94 u8 n_2ch; 95 u8 n_5ch; 96 u8 n_6ch; 97 u8 pad2; 98 } __packed hdr = { 99 .bw_2g = 0, 100 .bw_5g = 3, /* BW_20_40_80_160M */ 101 .bw_6g = 3, 102 }; 103 struct mt76_connac_mcu_chan { 104 __le16 hw_value; 105 __le16 pad; 106 __le32 flags; 107 } __packed channel; 108 struct mt76_dev *dev = phy->dev; 109 struct ieee80211_channel *chan; 110 struct sk_buff *skb; 111 112 n_max_channels = phy->sband_2g.sband.n_channels + 113 phy->sband_5g.sband.n_channels + 114 phy->sband_6g.sband.n_channels; 115 len = sizeof(hdr) + n_max_channels * sizeof(channel); 116 117 skb = mt76_mcu_msg_alloc(dev, NULL, len); 118 if (!skb) 119 return -ENOMEM; 120 121 skb_reserve(skb, sizeof(hdr)); 122 123 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) { 124 chan = &phy->sband_2g.sband.channels[i]; 125 if (chan->flags & IEEE80211_CHAN_DISABLED) 126 continue; 127 128 channel.hw_value = cpu_to_le16(chan->hw_value); 129 channel.flags = cpu_to_le32(chan->flags); 130 channel.pad = 0; 131 132 skb_put_data(skb, &channel, sizeof(channel)); 133 n_2ch++; 134 } 135 for (i = 0; i < phy->sband_5g.sband.n_channels; i++) { 136 chan = &phy->sband_5g.sband.channels[i]; 137 if (chan->flags & IEEE80211_CHAN_DISABLED) 138 continue; 139 140 channel.hw_value = cpu_to_le16(chan->hw_value); 141 channel.flags = cpu_to_le32(chan->flags); 142 channel.pad = 0; 143 144 skb_put_data(skb, &channel, sizeof(channel)); 145 n_5ch++; 146 } 147 for (i = 0; i < phy->sband_6g.sband.n_channels; i++) { 148 chan = &phy->sband_6g.sband.channels[i]; 149 if (chan->flags & IEEE80211_CHAN_DISABLED) 150 continue; 151 152 channel.hw_value = cpu_to_le16(chan->hw_value); 153 channel.flags = cpu_to_le32(chan->flags); 154 channel.pad = 0; 155 156 skb_put_data(skb, &channel, sizeof(channel)); 157 n_6ch++; 158 } 159 160 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2)); 161 memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2)); 162 hdr.n_2ch = n_2ch; 163 hdr.n_5ch = n_5ch; 164 hdr.n_6ch = n_6ch; 165 166 memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 167 168 return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN), 169 false); 170 } 171 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain); 172 173 int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 174 bool hdr_trans) 175 { 176 struct { 177 u8 enable; 178 u8 band; 179 u8 rsv[2]; 180 } __packed req_mac = { 181 .enable = enable, 182 .band = band, 183 }; 184 185 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac, 186 sizeof(req_mac), true); 187 } 188 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable); 189 190 int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif) 191 { 192 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 193 struct { 194 u8 bss_idx; 195 u8 ps_state; /* 0: device awake 196 * 1: static power save 197 * 2: dynamic power saving 198 */ 199 } req = { 200 .bss_idx = mvif->idx, 201 .ps_state = vif->cfg.ps ? 2 : 0, 202 }; 203 204 if (vif->type != NL80211_IFTYPE_STATION) 205 return -EOPNOTSUPP; 206 207 return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE), 208 &req, sizeof(req), false); 209 } 210 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps); 211 212 int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band) 213 { 214 struct { 215 u8 prot_idx; 216 u8 band; 217 u8 rsv[2]; 218 __le32 len_thresh; 219 __le32 pkt_thresh; 220 } __packed req = { 221 .prot_idx = 1, 222 .band = band, 223 .len_thresh = cpu_to_le32(val), 224 .pkt_thresh = cpu_to_le32(0x2), 225 }; 226 227 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req, 228 sizeof(req), true); 229 } 230 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh); 231 232 void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 233 struct ieee80211_vif *vif) 234 { 235 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 236 struct mt76_connac_beacon_loss_event *event = priv; 237 238 if (mvif->idx != event->bss_idx) 239 return; 240 241 if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER)) 242 return; 243 244 ieee80211_beacon_loss(vif); 245 } 246 EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter); 247 248 struct tlv * 249 mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len, 250 void *sta_ntlv, void *sta_wtbl) 251 { 252 struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv; 253 struct tlv *sta_hdr = sta_wtbl; 254 struct tlv *ptlv, tlv = { 255 .tag = cpu_to_le16(tag), 256 .len = cpu_to_le16(len), 257 }; 258 u16 ntlv; 259 260 ptlv = skb_put_zero(skb, len); 261 memcpy(ptlv, &tlv, sizeof(tlv)); 262 263 ntlv = le16_to_cpu(ntlv_hdr->tlv_num); 264 ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1); 265 266 if (sta_hdr) { 267 len += le16_to_cpu(sta_hdr->len); 268 sta_hdr->len = cpu_to_le16(len); 269 } 270 271 return ptlv; 272 } 273 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv); 274 275 struct sk_buff * 276 __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 277 struct mt76_wcid *wcid, int len) 278 { 279 struct sta_req_hdr hdr = { 280 .bss_idx = mvif->idx, 281 .muar_idx = wcid ? mvif->omac_idx : 0, 282 .is_tlv_append = 1, 283 }; 284 struct sk_buff *skb; 285 286 if (wcid && !wcid->sta) 287 hdr.muar_idx = 0xe; 288 289 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 290 &hdr.wlan_idx_hi); 291 skb = mt76_mcu_msg_alloc(dev, NULL, len); 292 if (!skb) 293 return ERR_PTR(-ENOMEM); 294 295 skb_put_data(skb, &hdr, sizeof(hdr)); 296 297 return skb; 298 } 299 EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req); 300 301 struct wtbl_req_hdr * 302 mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 303 int cmd, void *sta_wtbl, struct sk_buff **skb) 304 { 305 struct tlv *sta_hdr = sta_wtbl; 306 struct wtbl_req_hdr hdr = { 307 .operation = cmd, 308 }; 309 struct sk_buff *nskb = *skb; 310 311 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 312 &hdr.wlan_idx_hi); 313 if (!nskb) { 314 nskb = mt76_mcu_msg_alloc(dev, NULL, 315 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE); 316 if (!nskb) 317 return ERR_PTR(-ENOMEM); 318 319 *skb = nskb; 320 } 321 322 if (sta_hdr) 323 le16_add_cpu(&sta_hdr->len, sizeof(hdr)); 324 325 return skb_put_data(nskb, &hdr, sizeof(hdr)); 326 } 327 EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req); 328 329 void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 330 struct ieee80211_vif *vif) 331 { 332 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 333 u8 omac_idx = mvif->omac_idx; 334 struct bss_info_omac *omac; 335 struct tlv *tlv; 336 u32 type = 0; 337 338 switch (vif->type) { 339 case NL80211_IFTYPE_MONITOR: 340 case NL80211_IFTYPE_MESH_POINT: 341 case NL80211_IFTYPE_AP: 342 if (vif->p2p) 343 type = CONNECTION_P2P_GO; 344 else 345 type = CONNECTION_INFRA_AP; 346 break; 347 case NL80211_IFTYPE_STATION: 348 if (vif->p2p) 349 type = CONNECTION_P2P_GC; 350 else 351 type = CONNECTION_INFRA_STA; 352 break; 353 case NL80211_IFTYPE_ADHOC: 354 type = CONNECTION_IBSS_ADHOC; 355 break; 356 default: 357 WARN_ON(1); 358 break; 359 } 360 361 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); 362 363 omac = (struct bss_info_omac *)tlv; 364 omac->conn_type = cpu_to_le32(type); 365 omac->omac_idx = mvif->omac_idx; 366 omac->band_idx = mvif->band_idx; 367 omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx; 368 } 369 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv); 370 371 void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 372 struct ieee80211_vif *vif, 373 struct ieee80211_link_sta *link_sta, 374 bool enable, bool newly) 375 { 376 struct sta_rec_basic *basic; 377 struct tlv *tlv; 378 int conn_type; 379 380 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic)); 381 382 basic = (struct sta_rec_basic *)tlv; 383 basic->extra_info = cpu_to_le16(EXTRA_INFO_VER); 384 385 if (enable) { 386 if (newly) 387 basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW); 388 basic->conn_state = CONN_STATE_PORT_SECURE; 389 } else { 390 basic->conn_state = CONN_STATE_DISCONNECT; 391 } 392 393 if (!link_sta) { 394 basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC); 395 396 if (vif->type == NL80211_IFTYPE_STATION && 397 !is_zero_ether_addr(vif->bss_conf.bssid)) { 398 memcpy(basic->peer_addr, vif->bss_conf.bssid, ETH_ALEN); 399 basic->aid = cpu_to_le16(vif->cfg.aid); 400 } else { 401 eth_broadcast_addr(basic->peer_addr); 402 } 403 return; 404 } 405 406 switch (vif->type) { 407 case NL80211_IFTYPE_MESH_POINT: 408 case NL80211_IFTYPE_AP: 409 if (vif->p2p && !is_mt7921(dev)) 410 conn_type = CONNECTION_P2P_GC; 411 else 412 conn_type = CONNECTION_INFRA_STA; 413 basic->conn_type = cpu_to_le32(conn_type); 414 basic->aid = cpu_to_le16(link_sta->sta->aid); 415 break; 416 case NL80211_IFTYPE_STATION: 417 if (vif->p2p && !is_mt7921(dev)) 418 conn_type = CONNECTION_P2P_GO; 419 else 420 conn_type = CONNECTION_INFRA_AP; 421 basic->conn_type = cpu_to_le32(conn_type); 422 basic->aid = cpu_to_le16(vif->cfg.aid); 423 break; 424 case NL80211_IFTYPE_ADHOC: 425 basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 426 basic->aid = cpu_to_le16(link_sta->sta->aid); 427 break; 428 default: 429 WARN_ON(1); 430 break; 431 } 432 433 memcpy(basic->peer_addr, link_sta->addr, ETH_ALEN); 434 basic->qos = link_sta->sta->wme; 435 } 436 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv); 437 438 void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 439 struct ieee80211_sta *sta) 440 { 441 struct sta_rec_uapsd *uapsd; 442 struct tlv *tlv; 443 444 if (vif->type != NL80211_IFTYPE_AP || !sta->wme) 445 return; 446 447 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd)); 448 uapsd = (struct sta_rec_uapsd *)tlv; 449 450 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) { 451 uapsd->dac_map |= BIT(3); 452 uapsd->tac_map |= BIT(3); 453 } 454 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) { 455 uapsd->dac_map |= BIT(2); 456 uapsd->tac_map |= BIT(2); 457 } 458 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) { 459 uapsd->dac_map |= BIT(1); 460 uapsd->tac_map |= BIT(1); 461 } 462 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) { 463 uapsd->dac_map |= BIT(0); 464 uapsd->tac_map |= BIT(0); 465 } 466 uapsd->max_sp = sta->max_sp; 467 } 468 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd); 469 470 void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 471 struct ieee80211_vif *vif, 472 struct mt76_wcid *wcid, 473 void *sta_wtbl, void *wtbl_tlv) 474 { 475 struct wtbl_hdr_trans *htr; 476 struct tlv *tlv; 477 478 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS, 479 sizeof(*htr), 480 wtbl_tlv, sta_wtbl); 481 htr = (struct wtbl_hdr_trans *)tlv; 482 htr->no_rx_trans = true; 483 484 if (vif->type == NL80211_IFTYPE_STATION) 485 htr->to_ds = true; 486 else 487 htr->from_ds = true; 488 489 if (!wcid) 490 return; 491 492 htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 493 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 494 htr->to_ds = true; 495 htr->from_ds = true; 496 } 497 } 498 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv); 499 500 int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 501 struct ieee80211_vif *vif, 502 struct mt76_wcid *wcid, int cmd) 503 { 504 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 505 struct wtbl_req_hdr *wtbl_hdr; 506 struct tlv *sta_wtbl; 507 struct sk_buff *skb; 508 509 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 510 if (IS_ERR(skb)) 511 return PTR_ERR(skb); 512 513 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 514 sizeof(struct tlv)); 515 516 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, 517 sta_wtbl, &skb); 518 if (IS_ERR(wtbl_hdr)) 519 return PTR_ERR(wtbl_hdr); 520 521 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr); 522 523 return mt76_mcu_skb_send_msg(dev, skb, cmd, true); 524 } 525 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans); 526 527 int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 528 struct ieee80211_vif *vif, 529 struct ieee80211_sta *sta) 530 { 531 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 532 struct wtbl_req_hdr *wtbl_hdr; 533 struct sk_buff *skb = NULL; 534 535 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL, 536 &skb); 537 if (IS_ERR(wtbl_hdr)) 538 return PTR_ERR(wtbl_hdr); 539 540 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr); 541 542 return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true); 543 } 544 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans); 545 546 void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, 547 struct sk_buff *skb, 548 struct ieee80211_vif *vif, 549 struct ieee80211_sta *sta, 550 void *sta_wtbl, void *wtbl_tlv) 551 { 552 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 553 struct wtbl_generic *generic; 554 struct wtbl_rx *rx; 555 struct wtbl_spe *spe; 556 struct tlv *tlv; 557 558 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC, 559 sizeof(*generic), 560 wtbl_tlv, sta_wtbl); 561 562 generic = (struct wtbl_generic *)tlv; 563 564 if (sta) { 565 if (vif->type == NL80211_IFTYPE_STATION) 566 generic->partial_aid = cpu_to_le16(vif->cfg.aid); 567 else 568 generic->partial_aid = cpu_to_le16(sta->aid); 569 memcpy(generic->peer_addr, sta->addr, ETH_ALEN); 570 generic->muar_idx = mvif->omac_idx; 571 generic->qos = sta->wme; 572 } else { 573 if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION) 574 memcpy(generic->peer_addr, vif->bss_conf.bssid, 575 ETH_ALEN); 576 else 577 eth_broadcast_addr(generic->peer_addr); 578 579 generic->muar_idx = 0xe; 580 } 581 582 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx), 583 wtbl_tlv, sta_wtbl); 584 585 rx = (struct wtbl_rx *)tlv; 586 rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1; 587 rx->rca2 = 1; 588 rx->rv = 1; 589 590 if (!is_connac_v1(dev)) 591 return; 592 593 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe), 594 wtbl_tlv, sta_wtbl); 595 spe = (struct wtbl_spe *)tlv; 596 spe->spe_idx = 24; 597 } 598 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv); 599 600 static void 601 mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, 602 struct ieee80211_vif *vif) 603 { 604 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 605 struct sta_rec_amsdu *amsdu; 606 struct tlv *tlv; 607 608 if (vif->type != NL80211_IFTYPE_AP && 609 vif->type != NL80211_IFTYPE_STATION) 610 return; 611 612 if (!sta->deflink.agg.max_amsdu_len) 613 return; 614 615 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 616 amsdu = (struct sta_rec_amsdu *)tlv; 617 amsdu->max_amsdu_num = 8; 618 amsdu->amsdu_en = true; 619 amsdu->max_mpdu_size = sta->deflink.agg.max_amsdu_len >= 620 IEEE80211_MAX_MPDU_LEN_VHT_7991; 621 622 wcid->amsdu = true; 623 } 624 625 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 626 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 627 static void 628 mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 629 { 630 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap; 631 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 632 struct sta_rec_he *he; 633 struct tlv *tlv; 634 u32 cap = 0; 635 636 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); 637 638 he = (struct sta_rec_he *)tlv; 639 640 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE) 641 cap |= STA_REC_HE_CAP_HTC; 642 643 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR) 644 cap |= STA_REC_HE_CAP_BSR; 645 646 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL) 647 cap |= STA_REC_HE_CAP_OM; 648 649 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU) 650 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU; 651 652 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR) 653 cap |= STA_REC_HE_CAP_BQR; 654 655 if (elem->phy_cap_info[0] & 656 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G | 657 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G)) 658 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT; 659 660 if (elem->phy_cap_info[1] & 661 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD) 662 cap |= STA_REC_HE_CAP_LDPC; 663 664 if (elem->phy_cap_info[1] & 665 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US) 666 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI; 667 668 if (elem->phy_cap_info[2] & 669 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US) 670 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI; 671 672 if (elem->phy_cap_info[2] & 673 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ) 674 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC; 675 676 if (elem->phy_cap_info[2] & 677 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) 678 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC; 679 680 if (elem->phy_cap_info[6] & 681 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE) 682 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE; 683 684 if (elem->phy_cap_info[7] & 685 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI) 686 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI; 687 688 if (elem->phy_cap_info[7] & 689 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ) 690 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC; 691 692 if (elem->phy_cap_info[7] & 693 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ) 694 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC; 695 696 if (elem->phy_cap_info[8] & 697 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI) 698 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI; 699 700 if (elem->phy_cap_info[8] & 701 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI) 702 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI; 703 704 if (elem->phy_cap_info[9] & 705 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK) 706 cap |= STA_REC_HE_CAP_TRIG_CQI_FK; 707 708 if (elem->phy_cap_info[9] & 709 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU) 710 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242; 711 712 if (elem->phy_cap_info[9] & 713 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU) 714 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242; 715 716 he->he_cap = cpu_to_le32(cap); 717 718 switch (sta->deflink.bandwidth) { 719 case IEEE80211_STA_RX_BW_160: 720 if (elem->phy_cap_info[0] & 721 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 722 he->max_nss_mcs[CMD_HE_MCS_BW8080] = 723 he_cap->he_mcs_nss_supp.rx_mcs_80p80; 724 725 he->max_nss_mcs[CMD_HE_MCS_BW160] = 726 he_cap->he_mcs_nss_supp.rx_mcs_160; 727 fallthrough; 728 default: 729 he->max_nss_mcs[CMD_HE_MCS_BW80] = 730 he_cap->he_mcs_nss_supp.rx_mcs_80; 731 break; 732 } 733 734 he->t_frame_dur = 735 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 736 he->max_ampdu_exp = 737 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]); 738 739 he->bw_set = 740 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]); 741 he->device_class = 742 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]); 743 he->punc_pream_rx = 744 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 745 746 he->dcm_tx_mode = 747 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]); 748 he->dcm_tx_max_nss = 749 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]); 750 he->dcm_rx_mode = 751 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]); 752 he->dcm_rx_max_nss = 753 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]); 754 he->dcm_rx_max_nss = 755 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]); 756 757 he->pkt_ext = 2; 758 } 759 760 void 761 mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta) 762 { 763 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap; 764 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 765 struct sta_rec_he_v2 *he; 766 struct tlv *tlv; 767 768 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 769 770 he = (struct sta_rec_he_v2 *)tlv; 771 memcpy(he->he_phy_cap, elem->phy_cap_info, sizeof(he->he_phy_cap)); 772 memcpy(he->he_mac_cap, elem->mac_cap_info, sizeof(he->he_mac_cap)); 773 774 switch (sta->deflink.bandwidth) { 775 case IEEE80211_STA_RX_BW_160: 776 if (elem->phy_cap_info[0] & 777 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 778 he->max_nss_mcs[CMD_HE_MCS_BW8080] = 779 he_cap->he_mcs_nss_supp.rx_mcs_80p80; 780 781 he->max_nss_mcs[CMD_HE_MCS_BW160] = 782 he_cap->he_mcs_nss_supp.rx_mcs_160; 783 fallthrough; 784 default: 785 he->max_nss_mcs[CMD_HE_MCS_BW80] = 786 he_cap->he_mcs_nss_supp.rx_mcs_80; 787 break; 788 } 789 790 he->pkt_ext = IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US; 791 } 792 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_he_tlv_v2); 793 794 u8 795 mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif, 796 enum nl80211_band band, 797 struct ieee80211_link_sta *link_sta) 798 { 799 struct ieee80211_sta_ht_cap *ht_cap; 800 struct ieee80211_sta_vht_cap *vht_cap; 801 const struct ieee80211_sta_he_cap *he_cap; 802 const struct ieee80211_sta_eht_cap *eht_cap; 803 u8 mode = 0; 804 805 if (link_sta) { 806 ht_cap = &link_sta->ht_cap; 807 vht_cap = &link_sta->vht_cap; 808 he_cap = &link_sta->he_cap; 809 eht_cap = &link_sta->eht_cap; 810 } else { 811 struct ieee80211_supported_band *sband; 812 813 sband = mphy->hw->wiphy->bands[band]; 814 ht_cap = &sband->ht_cap; 815 vht_cap = &sband->vht_cap; 816 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); 817 eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type); 818 } 819 820 if (band == NL80211_BAND_2GHZ) { 821 mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP; 822 823 if (ht_cap->ht_supported) 824 mode |= PHY_TYPE_BIT_HT; 825 826 if (he_cap && he_cap->has_he) 827 mode |= PHY_TYPE_BIT_HE; 828 829 if (eht_cap && eht_cap->has_eht) 830 mode |= PHY_TYPE_BIT_BE; 831 } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) { 832 mode |= PHY_TYPE_BIT_OFDM; 833 834 if (ht_cap->ht_supported) 835 mode |= PHY_TYPE_BIT_HT; 836 837 if (vht_cap->vht_supported) 838 mode |= PHY_TYPE_BIT_VHT; 839 840 if (he_cap && he_cap->has_he) 841 mode |= PHY_TYPE_BIT_HE; 842 843 if (eht_cap && eht_cap->has_eht) 844 mode |= PHY_TYPE_BIT_BE; 845 } 846 847 return mode; 848 } 849 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_v2); 850 851 void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 852 struct ieee80211_sta *sta, 853 struct ieee80211_vif *vif, 854 u8 rcpi, u8 sta_state) 855 { 856 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 857 struct cfg80211_chan_def *chandef = mvif->ctx ? 858 &mvif->ctx->def : &mphy->chandef; 859 enum nl80211_band band = chandef->chan->band; 860 struct mt76_dev *dev = mphy->dev; 861 struct sta_rec_ra_info *ra_info; 862 struct sta_rec_state *state; 863 struct sta_rec_phy *phy; 864 struct tlv *tlv; 865 u16 supp_rates; 866 867 /* starec ht */ 868 if (sta->deflink.ht_cap.ht_supported) { 869 struct sta_rec_ht *ht; 870 871 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 872 ht = (struct sta_rec_ht *)tlv; 873 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 874 } 875 876 /* starec vht */ 877 if (sta->deflink.vht_cap.vht_supported) { 878 struct sta_rec_vht *vht; 879 int len; 880 881 len = is_mt7921(dev) ? sizeof(*vht) : sizeof(*vht) - 4; 882 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len); 883 vht = (struct sta_rec_vht *)tlv; 884 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 885 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 886 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 887 } 888 889 /* starec uapsd */ 890 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 891 892 if (!is_mt7921(dev)) 893 return; 894 895 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he) 896 mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif); 897 898 /* starec he */ 899 if (sta->deflink.he_cap.has_he) { 900 mt76_connac_mcu_sta_he_tlv(skb, sta); 901 mt76_connac_mcu_sta_he_tlv_v2(skb, sta); 902 if (band == NL80211_BAND_6GHZ && 903 sta_state == MT76_STA_INFO_STATE_ASSOC) { 904 struct sta_rec_he_6g_capa *he_6g_capa; 905 906 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, 907 sizeof(*he_6g_capa)); 908 he_6g_capa = (struct sta_rec_he_6g_capa *)tlv; 909 he_6g_capa->capa = sta->deflink.he_6ghz_capa.capa; 910 } 911 } 912 913 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); 914 phy = (struct sta_rec_phy *)tlv; 915 phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, 916 &sta->deflink); 917 phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates); 918 phy->rcpi = rcpi; 919 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, 920 sta->deflink.ht_cap.ampdu_factor) | 921 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, 922 sta->deflink.ht_cap.ampdu_density); 923 924 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info)); 925 ra_info = (struct sta_rec_ra_info *)tlv; 926 927 supp_rates = sta->deflink.supp_rates[band]; 928 if (band == NL80211_BAND_2GHZ) 929 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) | 930 FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf); 931 else 932 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates); 933 934 ra_info->legacy = cpu_to_le16(supp_rates); 935 936 if (sta->deflink.ht_cap.ht_supported) 937 memcpy(ra_info->rx_mcs_bitmask, 938 sta->deflink.ht_cap.mcs.rx_mask, 939 HT_MCS_MASK_NUM); 940 941 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state)); 942 state = (struct sta_rec_state *)tlv; 943 state->state = sta_state; 944 945 if (sta->deflink.vht_cap.vht_supported) { 946 state->vht_opmode = sta->deflink.bandwidth; 947 state->vht_opmode |= (sta->deflink.rx_nss - 1) << 948 IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT; 949 } 950 } 951 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv); 952 953 void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 954 struct ieee80211_sta *sta, 955 void *sta_wtbl, void *wtbl_tlv) 956 { 957 struct wtbl_smps *smps; 958 struct tlv *tlv; 959 960 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps), 961 wtbl_tlv, sta_wtbl); 962 smps = (struct wtbl_smps *)tlv; 963 smps->smps = (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC); 964 } 965 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv); 966 967 void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 968 struct ieee80211_sta *sta, void *sta_wtbl, 969 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc) 970 { 971 struct wtbl_ht *ht = NULL; 972 struct tlv *tlv; 973 u32 flags = 0; 974 975 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_6ghz_capa.capa) { 976 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht), 977 wtbl_tlv, sta_wtbl); 978 ht = (struct wtbl_ht *)tlv; 979 ht->ldpc = ht_ldpc && 980 !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING); 981 982 if (sta->deflink.ht_cap.ht_supported) { 983 ht->af = sta->deflink.ht_cap.ampdu_factor; 984 ht->mm = sta->deflink.ht_cap.ampdu_density; 985 } else { 986 ht->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 987 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 988 ht->mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 989 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 990 } 991 992 ht->ht = true; 993 } 994 995 if (sta->deflink.vht_cap.vht_supported || sta->deflink.he_6ghz_capa.capa) { 996 struct wtbl_vht *vht; 997 u8 af; 998 999 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT, 1000 sizeof(*vht), wtbl_tlv, 1001 sta_wtbl); 1002 vht = (struct wtbl_vht *)tlv; 1003 vht->ldpc = vht_ldpc && 1004 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); 1005 vht->vht = true; 1006 1007 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1008 sta->deflink.vht_cap.cap); 1009 if (ht) 1010 ht->af = max(ht->af, af); 1011 } 1012 1013 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv); 1014 1015 if (is_connac_v1(dev) && sta->deflink.ht_cap.ht_supported) { 1016 /* sgi */ 1017 u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 1018 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 1019 struct wtbl_raw *raw; 1020 1021 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA, 1022 sizeof(*raw), wtbl_tlv, 1023 sta_wtbl); 1024 1025 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1026 flags |= MT_WTBL_W5_SHORT_GI_20; 1027 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1028 flags |= MT_WTBL_W5_SHORT_GI_40; 1029 1030 if (sta->deflink.vht_cap.vht_supported) { 1031 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1032 flags |= MT_WTBL_W5_SHORT_GI_80; 1033 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1034 flags |= MT_WTBL_W5_SHORT_GI_160; 1035 } 1036 raw = (struct wtbl_raw *)tlv; 1037 raw->val = cpu_to_le32(flags); 1038 raw->msk = cpu_to_le32(~msk); 1039 raw->wtbl_idx = 1; 1040 raw->dw = 5; 1041 } 1042 } 1043 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv); 1044 1045 int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 1046 struct mt76_sta_cmd_info *info) 1047 { 1048 struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv; 1049 struct ieee80211_link_sta *link_sta; 1050 struct mt76_dev *dev = phy->dev; 1051 struct wtbl_req_hdr *wtbl_hdr; 1052 struct tlv *sta_wtbl; 1053 struct sk_buff *skb; 1054 1055 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid); 1056 if (IS_ERR(skb)) 1057 return PTR_ERR(skb); 1058 1059 link_sta = info->sta ? &info->sta->deflink : NULL; 1060 if (info->sta || !info->offload_fw) 1061 mt76_connac_mcu_sta_basic_tlv(dev, skb, info->vif, 1062 link_sta, info->enable, 1063 info->newly); 1064 if (info->sta && info->enable) 1065 mt76_connac_mcu_sta_tlv(phy, skb, info->sta, 1066 info->vif, info->rcpi, 1067 info->state); 1068 1069 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1070 sizeof(struct tlv)); 1071 1072 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid, 1073 WTBL_RESET_AND_SET, 1074 sta_wtbl, &skb); 1075 if (IS_ERR(wtbl_hdr)) 1076 return PTR_ERR(wtbl_hdr); 1077 1078 if (info->enable) { 1079 mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif, 1080 info->sta, sta_wtbl, 1081 wtbl_hdr); 1082 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid, 1083 sta_wtbl, wtbl_hdr); 1084 if (info->sta) 1085 mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta, 1086 sta_wtbl, wtbl_hdr, 1087 true, true); 1088 } 1089 1090 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true); 1091 } 1092 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd); 1093 1094 void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1095 struct ieee80211_ampdu_params *params, 1096 bool enable, bool tx, void *sta_wtbl, 1097 void *wtbl_tlv) 1098 { 1099 struct wtbl_ba *ba; 1100 struct tlv *tlv; 1101 1102 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba), 1103 wtbl_tlv, sta_wtbl); 1104 1105 ba = (struct wtbl_ba *)tlv; 1106 ba->tid = params->tid; 1107 1108 if (tx) { 1109 ba->ba_type = MT_BA_TYPE_ORIGINATOR; 1110 ba->sn = enable ? cpu_to_le16(params->ssn) : 0; 1111 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; 1112 ba->ba_en = enable; 1113 } else { 1114 memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN); 1115 ba->ba_type = MT_BA_TYPE_RECIPIENT; 1116 ba->rst_ba_tid = params->tid; 1117 ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; 1118 ba->rst_ba_sb = 1; 1119 } 1120 1121 if (!is_connac_v1(dev)) { 1122 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; 1123 return; 1124 } 1125 1126 if (enable && tx) { 1127 static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 1128 int i; 1129 1130 for (i = 7; i > 0; i--) { 1131 if (params->buf_size >= ba_range[i]) 1132 break; 1133 } 1134 ba->ba_winsize_idx = i; 1135 } 1136 } 1137 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv); 1138 1139 int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1140 struct ieee80211_bss_conf *bss_conf, 1141 struct mt76_wcid *wcid, 1142 bool enable) 1143 { 1144 struct mt76_vif *mvif = (struct mt76_vif *)bss_conf->vif->drv_priv; 1145 struct mt76_dev *dev = phy->dev; 1146 struct { 1147 struct { 1148 u8 omac_idx; 1149 u8 band_idx; 1150 __le16 pad; 1151 } __packed hdr; 1152 struct req_tlv { 1153 __le16 tag; 1154 __le16 len; 1155 u8 active; 1156 u8 link_idx; /* not link_id */ 1157 u8 omac_addr[ETH_ALEN]; 1158 } __packed tlv; 1159 } dev_req = { 1160 .hdr = { 1161 .omac_idx = mvif->omac_idx, 1162 .band_idx = mvif->band_idx, 1163 }, 1164 .tlv = { 1165 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1166 .len = cpu_to_le16(sizeof(struct req_tlv)), 1167 .active = enable, 1168 .link_idx = mvif->idx, 1169 }, 1170 }; 1171 struct { 1172 struct { 1173 u8 bss_idx; 1174 u8 pad[3]; 1175 } __packed hdr; 1176 struct mt76_connac_bss_basic_tlv basic; 1177 } basic_req = { 1178 .hdr = { 1179 .bss_idx = mvif->idx, 1180 }, 1181 .basic = { 1182 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1183 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)), 1184 .omac_idx = mvif->omac_idx, 1185 .band_idx = mvif->band_idx, 1186 .wmm_idx = mvif->wmm_idx, 1187 .active = enable, 1188 .bmc_tx_wlan_idx = cpu_to_le16(wcid->idx), 1189 .sta_idx = cpu_to_le16(wcid->idx), 1190 .conn_state = 1, 1191 .link_idx = mvif->idx, 1192 }, 1193 }; 1194 int err, idx, cmd, len; 1195 void *data; 1196 1197 switch (bss_conf->vif->type) { 1198 case NL80211_IFTYPE_MESH_POINT: 1199 case NL80211_IFTYPE_MONITOR: 1200 case NL80211_IFTYPE_AP: 1201 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 1202 break; 1203 case NL80211_IFTYPE_STATION: 1204 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 1205 break; 1206 case NL80211_IFTYPE_ADHOC: 1207 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1208 break; 1209 default: 1210 WARN_ON(1); 1211 break; 1212 } 1213 1214 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1215 basic_req.basic.hw_bss_idx = idx; 1216 1217 memcpy(dev_req.tlv.omac_addr, bss_conf->addr, ETH_ALEN); 1218 1219 cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE); 1220 data = enable ? (void *)&dev_req : (void *)&basic_req; 1221 len = enable ? sizeof(dev_req) : sizeof(basic_req); 1222 1223 err = mt76_mcu_send_msg(dev, cmd, data, len, true); 1224 if (err < 0) 1225 return err; 1226 1227 cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE); 1228 data = enable ? (void *)&basic_req : (void *)&dev_req; 1229 len = enable ? sizeof(basic_req) : sizeof(dev_req); 1230 1231 return mt76_mcu_send_msg(dev, cmd, data, len, true); 1232 } 1233 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev); 1234 1235 void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1236 struct ieee80211_ampdu_params *params, 1237 bool enable, bool tx) 1238 { 1239 struct sta_rec_ba *ba; 1240 struct tlv *tlv; 1241 1242 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1243 1244 ba = (struct sta_rec_ba *)tlv; 1245 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1246 ba->winsize = cpu_to_le16(params->buf_size); 1247 ba->ssn = cpu_to_le16(params->ssn); 1248 ba->ba_en = enable << params->tid; 1249 ba->amsdu = params->amsdu; 1250 ba->tid = params->tid; 1251 } 1252 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv); 1253 1254 int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb) 1255 { 1256 if (!mt76_is_mmio(dev)) 1257 return 0; 1258 1259 if (!mtk_wed_device_active(&dev->mmio.wed)) 1260 return 0; 1261 1262 return mtk_wed_device_update_msg(&dev->mmio.wed, WED_WO_STA_REC, 1263 skb->data, skb->len); 1264 } 1265 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_wed_update); 1266 1267 int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1268 struct ieee80211_ampdu_params *params, 1269 int cmd, bool enable, bool tx) 1270 { 1271 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1272 struct wtbl_req_hdr *wtbl_hdr; 1273 struct tlv *sta_wtbl; 1274 struct sk_buff *skb; 1275 int ret; 1276 1277 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 1278 if (IS_ERR(skb)) 1279 return PTR_ERR(skb); 1280 1281 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1282 sizeof(struct tlv)); 1283 1284 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, 1285 sta_wtbl, &skb); 1286 if (IS_ERR(wtbl_hdr)) 1287 return PTR_ERR(wtbl_hdr); 1288 1289 mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl, 1290 wtbl_hdr); 1291 1292 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 1293 if (ret) 1294 return ret; 1295 1296 ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true); 1297 if (ret) 1298 return ret; 1299 1300 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 1301 if (IS_ERR(skb)) 1302 return PTR_ERR(skb); 1303 1304 mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx); 1305 1306 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 1307 if (ret) 1308 return ret; 1309 1310 return mt76_mcu_skb_send_msg(dev, skb, cmd, true); 1311 } 1312 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba); 1313 1314 u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1315 enum nl80211_band band, 1316 struct ieee80211_link_sta *link_sta) 1317 { 1318 struct mt76_dev *dev = phy->dev; 1319 const struct ieee80211_sta_he_cap *he_cap; 1320 struct ieee80211_sta_vht_cap *vht_cap; 1321 struct ieee80211_sta_ht_cap *ht_cap; 1322 u8 mode = 0; 1323 1324 if (is_connac_v1(dev)) 1325 return 0x38; 1326 1327 if (link_sta) { 1328 ht_cap = &link_sta->ht_cap; 1329 vht_cap = &link_sta->vht_cap; 1330 he_cap = &link_sta->he_cap; 1331 } else { 1332 struct ieee80211_supported_band *sband; 1333 1334 sband = phy->hw->wiphy->bands[band]; 1335 ht_cap = &sband->ht_cap; 1336 vht_cap = &sband->vht_cap; 1337 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); 1338 } 1339 1340 if (band == NL80211_BAND_2GHZ) { 1341 mode |= PHY_MODE_B | PHY_MODE_G; 1342 1343 if (ht_cap->ht_supported) 1344 mode |= PHY_MODE_GN; 1345 1346 if (he_cap && he_cap->has_he) 1347 mode |= PHY_MODE_AX_24G; 1348 } else if (band == NL80211_BAND_5GHZ) { 1349 mode |= PHY_MODE_A; 1350 1351 if (ht_cap->ht_supported) 1352 mode |= PHY_MODE_AN; 1353 1354 if (vht_cap->vht_supported) 1355 mode |= PHY_MODE_AC; 1356 1357 if (he_cap && he_cap->has_he) 1358 mode |= PHY_MODE_AX_5G; 1359 } else if (band == NL80211_BAND_6GHZ) { 1360 mode |= PHY_MODE_A | PHY_MODE_AN | 1361 PHY_MODE_AC | PHY_MODE_AX_5G; 1362 } 1363 1364 return mode; 1365 } 1366 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode); 1367 1368 u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, 1369 enum nl80211_band band) 1370 { 1371 const struct ieee80211_sta_eht_cap *eht_cap; 1372 struct ieee80211_supported_band *sband; 1373 u8 mode = 0; 1374 1375 if (band == NL80211_BAND_6GHZ) 1376 mode |= PHY_MODE_AX_6G; 1377 1378 sband = phy->hw->wiphy->bands[band]; 1379 eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type); 1380 1381 if (!eht_cap || !eht_cap->has_eht || !vif->bss_conf.eht_support) 1382 return mode; 1383 1384 switch (band) { 1385 case NL80211_BAND_6GHZ: 1386 mode |= PHY_MODE_BE_6G; 1387 break; 1388 case NL80211_BAND_5GHZ: 1389 mode |= PHY_MODE_BE_5G; 1390 break; 1391 case NL80211_BAND_2GHZ: 1392 mode |= PHY_MODE_BE_24G; 1393 break; 1394 default: 1395 break; 1396 } 1397 1398 return mode; 1399 } 1400 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext); 1401 1402 const struct ieee80211_sta_he_cap * 1403 mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) 1404 { 1405 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1406 struct cfg80211_chan_def *chandef = mvif->ctx ? 1407 &mvif->ctx->def : &phy->chandef; 1408 enum nl80211_band band = chandef->chan->band; 1409 struct ieee80211_supported_band *sband; 1410 1411 sband = phy->hw->wiphy->bands[band]; 1412 1413 return ieee80211_get_he_iftype_cap(sband, vif->type); 1414 } 1415 EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap); 1416 1417 const struct ieee80211_sta_eht_cap * 1418 mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) 1419 { 1420 enum nl80211_band band = phy->chandef.chan->band; 1421 struct ieee80211_supported_band *sband; 1422 1423 sband = phy->hw->wiphy->bands[band]; 1424 1425 return ieee80211_get_eht_iftype_cap(sband, vif->type); 1426 } 1427 EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap); 1428 1429 #define DEFAULT_HE_PE_DURATION 4 1430 #define DEFAULT_HE_DURATION_RTS_THRES 1023 1431 static void 1432 mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif, 1433 struct tlv *tlv) 1434 { 1435 const struct ieee80211_sta_he_cap *cap; 1436 struct bss_info_uni_he *he; 1437 1438 cap = mt76_connac_get_he_phy_cap(phy, vif); 1439 1440 he = (struct bss_info_uni_he *)tlv; 1441 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 1442 if (!he->he_pe_duration) 1443 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 1444 1445 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 1446 if (!he->he_rts_thres) 1447 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 1448 1449 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 1450 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 1451 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 1452 } 1453 1454 int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, struct mt76_vif *mvif, 1455 struct ieee80211_chanctx_conf *ctx) 1456 { 1457 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 1458 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2; 1459 enum nl80211_band band = chandef->chan->band; 1460 struct mt76_dev *mdev = phy->dev; 1461 struct { 1462 struct { 1463 u8 bss_idx; 1464 u8 pad[3]; 1465 } __packed hdr; 1466 struct rlm_tlv { 1467 __le16 tag; 1468 __le16 len; 1469 u8 control_channel; 1470 u8 center_chan; 1471 u8 center_chan2; 1472 u8 bw; 1473 u8 tx_streams; 1474 u8 rx_streams; 1475 u8 short_st; 1476 u8 ht_op_info; 1477 u8 sco; 1478 u8 band; 1479 u8 pad[2]; 1480 } __packed rlm; 1481 } __packed rlm_req = { 1482 .hdr = { 1483 .bss_idx = mvif->idx, 1484 }, 1485 .rlm = { 1486 .tag = cpu_to_le16(UNI_BSS_INFO_RLM), 1487 .len = cpu_to_le16(sizeof(struct rlm_tlv)), 1488 .control_channel = chandef->chan->hw_value, 1489 .center_chan = ieee80211_frequency_to_channel(freq1), 1490 .center_chan2 = ieee80211_frequency_to_channel(freq2), 1491 .tx_streams = hweight8(phy->antenna_mask), 1492 .ht_op_info = 4, /* set HT 40M allowed */ 1493 .rx_streams = phy->chainmask, 1494 .short_st = true, 1495 .band = band, 1496 }, 1497 }; 1498 1499 switch (chandef->width) { 1500 case NL80211_CHAN_WIDTH_40: 1501 rlm_req.rlm.bw = CMD_CBW_40MHZ; 1502 break; 1503 case NL80211_CHAN_WIDTH_80: 1504 rlm_req.rlm.bw = CMD_CBW_80MHZ; 1505 break; 1506 case NL80211_CHAN_WIDTH_80P80: 1507 rlm_req.rlm.bw = CMD_CBW_8080MHZ; 1508 break; 1509 case NL80211_CHAN_WIDTH_160: 1510 rlm_req.rlm.bw = CMD_CBW_160MHZ; 1511 break; 1512 case NL80211_CHAN_WIDTH_5: 1513 rlm_req.rlm.bw = CMD_CBW_5MHZ; 1514 break; 1515 case NL80211_CHAN_WIDTH_10: 1516 rlm_req.rlm.bw = CMD_CBW_10MHZ; 1517 break; 1518 case NL80211_CHAN_WIDTH_20_NOHT: 1519 case NL80211_CHAN_WIDTH_20: 1520 default: 1521 rlm_req.rlm.bw = CMD_CBW_20MHZ; 1522 rlm_req.rlm.ht_op_info = 0; 1523 break; 1524 } 1525 1526 if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan) 1527 rlm_req.rlm.sco = 1; /* SCA */ 1528 else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan) 1529 rlm_req.rlm.sco = 3; /* SCB */ 1530 1531 return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req, 1532 sizeof(rlm_req), true); 1533 } 1534 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_set_chctx); 1535 1536 int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1537 struct ieee80211_vif *vif, 1538 struct mt76_wcid *wcid, 1539 bool enable, 1540 struct ieee80211_chanctx_conf *ctx) 1541 { 1542 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1543 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 1544 enum nl80211_band band = chandef->chan->band; 1545 struct mt76_dev *mdev = phy->dev; 1546 struct { 1547 struct { 1548 u8 bss_idx; 1549 u8 pad[3]; 1550 } __packed hdr; 1551 struct mt76_connac_bss_basic_tlv basic; 1552 struct mt76_connac_bss_qos_tlv qos; 1553 } basic_req = { 1554 .hdr = { 1555 .bss_idx = mvif->idx, 1556 }, 1557 .basic = { 1558 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1559 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)), 1560 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int), 1561 .dtim_period = vif->bss_conf.dtim_period, 1562 .omac_idx = mvif->omac_idx, 1563 .band_idx = mvif->band_idx, 1564 .wmm_idx = mvif->wmm_idx, 1565 .active = true, /* keep bss deactivated */ 1566 .phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL), 1567 }, 1568 .qos = { 1569 .tag = cpu_to_le16(UNI_BSS_INFO_QBSS), 1570 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)), 1571 .qos = vif->bss_conf.qos, 1572 }, 1573 }; 1574 int err, conn_type; 1575 u8 idx, basic_phy; 1576 1577 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1578 basic_req.basic.hw_bss_idx = idx; 1579 if (band == NL80211_BAND_6GHZ) 1580 basic_req.basic.phymode_ext = PHY_MODE_AX_6G; 1581 1582 basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL); 1583 basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy); 1584 1585 switch (vif->type) { 1586 case NL80211_IFTYPE_MESH_POINT: 1587 case NL80211_IFTYPE_AP: 1588 if (vif->p2p) 1589 conn_type = CONNECTION_P2P_GO; 1590 else 1591 conn_type = CONNECTION_INFRA_AP; 1592 basic_req.basic.conn_type = cpu_to_le32(conn_type); 1593 /* Fully active/deactivate BSS network in AP mode only */ 1594 basic_req.basic.active = enable; 1595 break; 1596 case NL80211_IFTYPE_STATION: 1597 if (vif->p2p) 1598 conn_type = CONNECTION_P2P_GC; 1599 else 1600 conn_type = CONNECTION_INFRA_STA; 1601 basic_req.basic.conn_type = cpu_to_le32(conn_type); 1602 break; 1603 case NL80211_IFTYPE_ADHOC: 1604 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1605 break; 1606 default: 1607 WARN_ON(1); 1608 break; 1609 } 1610 1611 memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN); 1612 basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx); 1613 basic_req.basic.sta_idx = cpu_to_le16(wcid->idx); 1614 basic_req.basic.conn_state = !enable; 1615 1616 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req, 1617 sizeof(basic_req), true); 1618 if (err < 0) 1619 return err; 1620 1621 if (vif->bss_conf.he_support) { 1622 struct { 1623 struct { 1624 u8 bss_idx; 1625 u8 pad[3]; 1626 } __packed hdr; 1627 struct bss_info_uni_he he; 1628 struct bss_info_uni_bss_color bss_color; 1629 } he_req = { 1630 .hdr = { 1631 .bss_idx = mvif->idx, 1632 }, 1633 .he = { 1634 .tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC), 1635 .len = cpu_to_le16(sizeof(struct bss_info_uni_he)), 1636 }, 1637 .bss_color = { 1638 .tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR), 1639 .len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)), 1640 .enable = 0, 1641 .bss_color = 0, 1642 }, 1643 }; 1644 1645 if (enable) { 1646 he_req.bss_color.enable = 1647 vif->bss_conf.he_bss_color.enabled; 1648 he_req.bss_color.bss_color = 1649 vif->bss_conf.he_bss_color.color; 1650 } 1651 1652 mt76_connac_mcu_uni_bss_he_tlv(phy, vif, 1653 (struct tlv *)&he_req.he); 1654 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), 1655 &he_req, sizeof(he_req), true); 1656 if (err < 0) 1657 return err; 1658 } 1659 1660 return mt76_connac_mcu_uni_set_chctx(phy, mvif, ctx); 1661 } 1662 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss); 1663 1664 #define MT76_CONNAC_SCAN_CHANNEL_TIME 60 1665 int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1666 struct ieee80211_scan_request *scan_req) 1667 { 1668 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1669 struct cfg80211_scan_request *sreq = &scan_req->req; 1670 int n_ssids = 0, err, i, duration; 1671 int ext_channels_num = max_t(int, sreq->n_channels - 32, 0); 1672 struct ieee80211_channel **scan_list = sreq->channels; 1673 struct mt76_dev *mdev = phy->dev; 1674 struct mt76_connac_mcu_scan_channel *chan; 1675 struct mt76_connac_hw_scan_req *req; 1676 struct sk_buff *skb; 1677 1678 if (test_bit(MT76_HW_SCANNING, &phy->state)) 1679 return -EBUSY; 1680 1681 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req)); 1682 if (!skb) 1683 return -ENOMEM; 1684 1685 set_bit(MT76_HW_SCANNING, &phy->state); 1686 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f; 1687 1688 req = (struct mt76_connac_hw_scan_req *)skb_put_zero(skb, sizeof(*req)); 1689 1690 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; 1691 req->bss_idx = mvif->idx; 1692 req->scan_type = sreq->n_ssids ? 1 : 0; 1693 req->probe_req_num = sreq->n_ssids ? 2 : 0; 1694 req->version = 1; 1695 1696 for (i = 0; i < sreq->n_ssids; i++) { 1697 if (!sreq->ssids[i].ssid_len) 1698 continue; 1699 1700 req->ssids[i].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len); 1701 memcpy(req->ssids[i].ssid, sreq->ssids[i].ssid, 1702 sreq->ssids[i].ssid_len); 1703 n_ssids++; 1704 } 1705 req->ssid_type = n_ssids ? BIT(2) : BIT(0); 1706 req->ssid_type_ext = n_ssids ? BIT(0) : 0; 1707 req->ssids_num = n_ssids; 1708 1709 duration = is_mt7921(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME; 1710 /* increase channel time for passive scan */ 1711 if (!sreq->n_ssids) 1712 duration *= 2; 1713 req->timeout_value = cpu_to_le16(sreq->n_channels * duration); 1714 req->channel_min_dwell_time = cpu_to_le16(duration); 1715 req->channel_dwell_time = cpu_to_le16(duration); 1716 1717 if (sreq->n_channels == 0 || sreq->n_channels > 64) { 1718 req->channel_type = 0; 1719 req->channels_num = 0; 1720 req->ext_channels_num = 0; 1721 } else { 1722 req->channel_type = 4; 1723 req->channels_num = min_t(u8, sreq->n_channels, 32); 1724 req->ext_channels_num = min_t(u8, ext_channels_num, 32); 1725 } 1726 1727 for (i = 0; i < req->channels_num + req->ext_channels_num; i++) { 1728 if (i >= 32) 1729 chan = &req->ext_channels[i - 32]; 1730 else 1731 chan = &req->channels[i]; 1732 1733 switch (scan_list[i]->band) { 1734 case NL80211_BAND_2GHZ: 1735 chan->band = 1; 1736 break; 1737 case NL80211_BAND_6GHZ: 1738 chan->band = 3; 1739 break; 1740 default: 1741 chan->band = 2; 1742 break; 1743 } 1744 chan->channel_num = scan_list[i]->hw_value; 1745 } 1746 1747 if (sreq->ie_len > 0) { 1748 memcpy(req->ies, sreq->ie, sreq->ie_len); 1749 req->ies_len = cpu_to_le16(sreq->ie_len); 1750 } 1751 1752 if (is_mt7921(phy->dev)) 1753 req->scan_func |= SCAN_FUNC_SPLIT_SCAN; 1754 1755 memcpy(req->bssid, sreq->bssid, ETH_ALEN); 1756 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1757 get_random_mask_addr(req->random_mac, sreq->mac_addr, 1758 sreq->mac_addr_mask); 1759 req->scan_func |= SCAN_FUNC_RANDOM_MAC; 1760 } 1761 1762 err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN), 1763 false); 1764 if (err < 0) 1765 clear_bit(MT76_HW_SCANNING, &phy->state); 1766 1767 return err; 1768 } 1769 EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan); 1770 1771 int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1772 struct ieee80211_vif *vif) 1773 { 1774 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1775 struct { 1776 u8 seq_num; 1777 u8 is_ext_channel; 1778 u8 rsv[2]; 1779 } __packed req = { 1780 .seq_num = mvif->scan_seq_num, 1781 }; 1782 1783 if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) { 1784 struct cfg80211_scan_info info = { 1785 .aborted = true, 1786 }; 1787 1788 ieee80211_scan_completed(phy->hw, &info); 1789 } 1790 1791 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN), 1792 &req, sizeof(req), false); 1793 } 1794 EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan); 1795 1796 int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1797 struct ieee80211_vif *vif, 1798 struct cfg80211_sched_scan_request *sreq) 1799 { 1800 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1801 struct ieee80211_channel **scan_list = sreq->channels; 1802 struct mt76_connac_mcu_scan_channel *chan; 1803 struct mt76_connac_sched_scan_req *req; 1804 struct mt76_dev *mdev = phy->dev; 1805 struct cfg80211_match_set *match; 1806 struct cfg80211_ssid *ssid; 1807 struct sk_buff *skb; 1808 int i; 1809 1810 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len); 1811 if (!skb) 1812 return -ENOMEM; 1813 1814 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f; 1815 1816 req = (struct mt76_connac_sched_scan_req *)skb_put_zero(skb, sizeof(*req)); 1817 req->version = 1; 1818 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; 1819 1820 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1821 u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac 1822 : req->mt7921.random_mac; 1823 1824 req->scan_func = 1; 1825 get_random_mask_addr(addr, sreq->mac_addr, 1826 sreq->mac_addr_mask); 1827 } 1828 if (is_mt7921(phy->dev)) { 1829 req->mt7921.bss_idx = mvif->idx; 1830 req->mt7921.delay = cpu_to_le32(sreq->delay); 1831 } 1832 1833 req->ssids_num = sreq->n_ssids; 1834 for (i = 0; i < req->ssids_num; i++) { 1835 ssid = &sreq->ssids[i]; 1836 memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len); 1837 req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len); 1838 } 1839 1840 req->match_num = sreq->n_match_sets; 1841 for (i = 0; i < req->match_num; i++) { 1842 match = &sreq->match_sets[i]; 1843 memcpy(req->match[i].ssid, match->ssid.ssid, 1844 match->ssid.ssid_len); 1845 req->match[i].rssi_th = cpu_to_le32(match->rssi_thold); 1846 req->match[i].ssid_len = match->ssid.ssid_len; 1847 } 1848 1849 req->channel_type = sreq->n_channels ? 4 : 0; 1850 req->channels_num = min_t(u8, sreq->n_channels, 64); 1851 for (i = 0; i < req->channels_num; i++) { 1852 chan = &req->channels[i]; 1853 1854 switch (scan_list[i]->band) { 1855 case NL80211_BAND_2GHZ: 1856 chan->band = 1; 1857 break; 1858 case NL80211_BAND_6GHZ: 1859 chan->band = 3; 1860 break; 1861 default: 1862 chan->band = 2; 1863 break; 1864 } 1865 chan->channel_num = scan_list[i]->hw_value; 1866 } 1867 1868 req->intervals_num = sreq->n_scan_plans; 1869 for (i = 0; i < req->intervals_num; i++) 1870 req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval); 1871 1872 if (sreq->ie_len > 0) { 1873 req->ie_len = cpu_to_le16(sreq->ie_len); 1874 memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len); 1875 } 1876 1877 return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ), 1878 false); 1879 } 1880 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req); 1881 1882 int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1883 struct ieee80211_vif *vif, 1884 bool enable) 1885 { 1886 struct { 1887 u8 active; /* 0: enabled 1: disabled */ 1888 u8 rsv[3]; 1889 } __packed req = { 1890 .active = !enable, 1891 }; 1892 1893 if (enable) 1894 set_bit(MT76_HW_SCHED_SCANNING, &phy->state); 1895 else 1896 clear_bit(MT76_HW_SCHED_SCANNING, &phy->state); 1897 1898 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE), 1899 &req, sizeof(req), false); 1900 } 1901 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable); 1902 1903 int mt76_connac_mcu_chip_config(struct mt76_dev *dev) 1904 { 1905 struct mt76_connac_config req = { 1906 .resp_type = 0, 1907 }; 1908 1909 memcpy(req.data, "assert", 7); 1910 1911 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG), 1912 &req, sizeof(req), false); 1913 } 1914 EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config); 1915 1916 int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable) 1917 { 1918 struct mt76_connac_config req = { 1919 .resp_type = 0, 1920 }; 1921 1922 snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable); 1923 1924 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG), 1925 &req, sizeof(req), false); 1926 } 1927 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep); 1928 1929 int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1930 enum ieee80211_sta_state old_state, 1931 enum ieee80211_sta_state new_state) 1932 { 1933 if ((old_state == IEEE80211_STA_ASSOC && 1934 new_state == IEEE80211_STA_AUTHORIZED) || 1935 (old_state == IEEE80211_STA_NONE && 1936 new_state == IEEE80211_STA_NOTEXIST)) 1937 mt76_connac_mcu_set_deep_sleep(dev, true); 1938 1939 if ((old_state == IEEE80211_STA_NOTEXIST && 1940 new_state == IEEE80211_STA_NONE) || 1941 (old_state == IEEE80211_STA_AUTHORIZED && 1942 new_state == IEEE80211_STA_ASSOC)) 1943 mt76_connac_mcu_set_deep_sleep(dev, false); 1944 1945 return 0; 1946 } 1947 EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp); 1948 1949 void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 1950 struct mt76_connac_coredump *coredump) 1951 { 1952 spin_lock_bh(&dev->lock); 1953 __skb_queue_tail(&coredump->msg_list, skb); 1954 spin_unlock_bh(&dev->lock); 1955 1956 coredump->last_activity = jiffies; 1957 1958 queue_delayed_work(dev->wq, &coredump->work, 1959 MT76_CONNAC_COREDUMP_TIMEOUT); 1960 } 1961 EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event); 1962 1963 static void 1964 mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku, 1965 struct mt76_power_limits *limits, 1966 enum nl80211_band band) 1967 { 1968 int max_power = is_mt7921(dev) ? 127 : 63; 1969 int i, offset = sizeof(limits->cck); 1970 1971 memset(sku, max_power, MT_SKU_POWER_LIMIT); 1972 1973 if (band == NL80211_BAND_2GHZ) { 1974 /* cck */ 1975 memcpy(sku, limits->cck, sizeof(limits->cck)); 1976 } 1977 1978 /* ofdm */ 1979 memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm)); 1980 offset += sizeof(limits->ofdm); 1981 1982 /* ht */ 1983 for (i = 0; i < 2; i++) { 1984 memcpy(&sku[offset], limits->mcs[i], 8); 1985 offset += 8; 1986 } 1987 sku[offset++] = limits->mcs[0][0]; 1988 1989 /* vht */ 1990 for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) { 1991 memcpy(&sku[offset], limits->mcs[i], 1992 ARRAY_SIZE(limits->mcs[i])); 1993 offset += 12; 1994 } 1995 1996 if (!is_mt7921(dev)) 1997 return; 1998 1999 /* he */ 2000 for (i = 0; i < ARRAY_SIZE(limits->ru); i++) { 2001 memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i])); 2002 offset += ARRAY_SIZE(limits->ru[i]); 2003 } 2004 } 2005 2006 s8 mt76_connac_get_ch_power(struct mt76_phy *phy, 2007 struct ieee80211_channel *chan, 2008 s8 target_power) 2009 { 2010 struct mt76_dev *dev = phy->dev; 2011 struct ieee80211_supported_band *sband; 2012 int i; 2013 2014 switch (chan->band) { 2015 case NL80211_BAND_2GHZ: 2016 sband = &phy->sband_2g.sband; 2017 break; 2018 case NL80211_BAND_5GHZ: 2019 sband = &phy->sband_5g.sband; 2020 break; 2021 case NL80211_BAND_6GHZ: 2022 sband = &phy->sband_6g.sband; 2023 break; 2024 default: 2025 return target_power; 2026 } 2027 2028 for (i = 0; i < sband->n_channels; i++) { 2029 struct ieee80211_channel *ch = &sband->channels[i]; 2030 2031 if (ch->hw_value == chan->hw_value) { 2032 if (!(ch->flags & IEEE80211_CHAN_DISABLED)) { 2033 int power = 2 * ch->max_reg_power; 2034 2035 if (is_mt7663(dev) && (power > 63 || power < -64)) 2036 power = 63; 2037 target_power = min_t(s8, power, target_power); 2038 } 2039 break; 2040 } 2041 } 2042 2043 return target_power; 2044 } 2045 EXPORT_SYMBOL_GPL(mt76_connac_get_ch_power); 2046 2047 static int 2048 mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy, 2049 enum nl80211_band band) 2050 { 2051 struct mt76_dev *dev = phy->dev; 2052 int sku_len, batch_len = is_mt7921(dev) ? 8 : 16; 2053 static const u8 chan_list_2ghz[] = { 2054 1, 2, 3, 4, 5, 6, 7, 2055 8, 9, 10, 11, 12, 13, 14 2056 }; 2057 static const u8 chan_list_5ghz[] = { 2058 36, 38, 40, 42, 44, 46, 48, 2059 50, 52, 54, 56, 58, 60, 62, 2060 64, 100, 102, 104, 106, 108, 110, 2061 112, 114, 116, 118, 120, 122, 124, 2062 126, 128, 132, 134, 136, 138, 140, 2063 142, 144, 149, 151, 153, 155, 157, 2064 159, 161, 165, 169, 173, 177 2065 }; 2066 static const u8 chan_list_6ghz[] = { 2067 1, 3, 5, 7, 9, 11, 13, 2068 15, 17, 19, 21, 23, 25, 27, 2069 29, 33, 35, 37, 39, 41, 43, 2070 45, 47, 49, 51, 53, 55, 57, 2071 59, 61, 65, 67, 69, 71, 73, 2072 75, 77, 79, 81, 83, 85, 87, 2073 89, 91, 93, 97, 99, 101, 103, 2074 105, 107, 109, 111, 113, 115, 117, 2075 119, 121, 123, 125, 129, 131, 133, 2076 135, 137, 139, 141, 143, 145, 147, 2077 149, 151, 153, 155, 157, 161, 163, 2078 165, 167, 169, 171, 173, 175, 177, 2079 179, 181, 183, 185, 187, 189, 193, 2080 195, 197, 199, 201, 203, 205, 207, 2081 209, 211, 213, 215, 217, 219, 221, 2082 225, 227, 229, 233 2083 }; 2084 int i, n_chan, batch_size, idx = 0, tx_power, last_ch, err = 0; 2085 struct mt76_connac_sku_tlv sku_tlbv; 2086 struct mt76_power_limits *limits; 2087 const u8 *ch_list; 2088 2089 limits = devm_kmalloc(dev->dev, sizeof(*limits), GFP_KERNEL); 2090 if (!limits) 2091 return -ENOMEM; 2092 2093 sku_len = is_mt7921(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92; 2094 tx_power = 2 * phy->hw->conf.power_level; 2095 if (!tx_power) 2096 tx_power = 127; 2097 2098 if (band == NL80211_BAND_2GHZ) { 2099 n_chan = ARRAY_SIZE(chan_list_2ghz); 2100 ch_list = chan_list_2ghz; 2101 } else if (band == NL80211_BAND_6GHZ) { 2102 n_chan = ARRAY_SIZE(chan_list_6ghz); 2103 ch_list = chan_list_6ghz; 2104 } else { 2105 n_chan = ARRAY_SIZE(chan_list_5ghz); 2106 ch_list = chan_list_5ghz; 2107 } 2108 batch_size = DIV_ROUND_UP(n_chan, batch_len); 2109 2110 if (phy->cap.has_6ghz) 2111 last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1]; 2112 else if (phy->cap.has_5ghz) 2113 last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1]; 2114 else 2115 last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1]; 2116 2117 for (i = 0; i < batch_size; i++) { 2118 struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {}; 2119 int j, msg_len, num_ch; 2120 struct sk_buff *skb; 2121 2122 num_ch = i == batch_size - 1 ? n_chan - i * batch_len : batch_len; 2123 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv); 2124 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len); 2125 if (!skb) { 2126 err = -ENOMEM; 2127 goto out; 2128 } 2129 2130 skb_reserve(skb, sizeof(tx_power_tlv)); 2131 2132 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2)); 2133 memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2)); 2134 tx_power_tlv.n_chan = num_ch; 2135 2136 switch (band) { 2137 case NL80211_BAND_2GHZ: 2138 tx_power_tlv.band = 1; 2139 break; 2140 case NL80211_BAND_6GHZ: 2141 tx_power_tlv.band = 3; 2142 break; 2143 default: 2144 tx_power_tlv.band = 2; 2145 break; 2146 } 2147 2148 for (j = 0; j < num_ch; j++, idx++) { 2149 struct ieee80211_channel chan = { 2150 .hw_value = ch_list[idx], 2151 .band = band, 2152 }; 2153 s8 reg_power, sar_power; 2154 2155 reg_power = mt76_connac_get_ch_power(phy, &chan, 2156 tx_power); 2157 sar_power = mt76_get_sar_power(phy, &chan, reg_power); 2158 2159 mt76_get_rate_power_limits(phy, &chan, limits, 2160 sar_power); 2161 2162 tx_power_tlv.last_msg = ch_list[idx] == last_ch; 2163 sku_tlbv.channel = ch_list[idx]; 2164 2165 mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit, 2166 limits, band); 2167 skb_put_data(skb, &sku_tlbv, sku_len); 2168 } 2169 __skb_push(skb, sizeof(tx_power_tlv)); 2170 memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv)); 2171 2172 err = mt76_mcu_skb_send_msg(dev, skb, 2173 MCU_CE_CMD(SET_RATE_TX_POWER), 2174 false); 2175 if (err < 0) 2176 goto out; 2177 } 2178 2179 out: 2180 devm_kfree(dev->dev, limits); 2181 return err; 2182 } 2183 2184 int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy) 2185 { 2186 int err; 2187 2188 if (phy->cap.has_2ghz) { 2189 err = mt76_connac_mcu_rate_txpower_band(phy, 2190 NL80211_BAND_2GHZ); 2191 if (err < 0) 2192 return err; 2193 } 2194 if (phy->cap.has_5ghz) { 2195 err = mt76_connac_mcu_rate_txpower_band(phy, 2196 NL80211_BAND_5GHZ); 2197 if (err < 0) 2198 return err; 2199 } 2200 if (phy->cap.has_6ghz) { 2201 err = mt76_connac_mcu_rate_txpower_band(phy, 2202 NL80211_BAND_6GHZ); 2203 if (err < 0) 2204 return err; 2205 } 2206 2207 return 0; 2208 } 2209 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower); 2210 2211 int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 2212 struct mt76_vif *vif, 2213 struct ieee80211_bss_conf *info) 2214 { 2215 struct ieee80211_vif *mvif = container_of(info, struct ieee80211_vif, 2216 bss_conf); 2217 struct sk_buff *skb; 2218 int i, len = min_t(int, mvif->cfg.arp_addr_cnt, 2219 IEEE80211_BSS_ARP_ADDR_LIST_LEN); 2220 struct { 2221 struct { 2222 u8 bss_idx; 2223 u8 pad[3]; 2224 } __packed hdr; 2225 struct mt76_connac_arpns_tlv arp; 2226 } req_hdr = { 2227 .hdr = { 2228 .bss_idx = vif->idx, 2229 }, 2230 .arp = { 2231 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP), 2232 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)), 2233 .ips_num = len, 2234 .mode = 2, /* update */ 2235 .option = 1, 2236 }, 2237 }; 2238 2239 skb = mt76_mcu_msg_alloc(dev, NULL, 2240 sizeof(req_hdr) + len * sizeof(__be32)); 2241 if (!skb) 2242 return -ENOMEM; 2243 2244 skb_put_data(skb, &req_hdr, sizeof(req_hdr)); 2245 for (i = 0; i < len; i++) 2246 skb_put_data(skb, &mvif->cfg.arp_addr_list[i], sizeof(__be32)); 2247 2248 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true); 2249 } 2250 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter); 2251 2252 int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 2253 struct ieee80211_vif *vif) 2254 { 2255 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2256 int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow; 2257 struct mt76_phy *phy = hw->priv; 2258 struct { 2259 __le32 ct_win; 2260 u8 bss_idx; 2261 u8 rsv[3]; 2262 } __packed req = { 2263 .ct_win = cpu_to_le32(ct_window), 2264 .bss_idx = mvif->idx, 2265 }; 2266 2267 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS), 2268 &req, sizeof(req), false); 2269 } 2270 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps); 2271 2272 #ifdef CONFIG_PM 2273 2274 const struct wiphy_wowlan_support mt76_connac_wowlan_support = { 2275 .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT | 2276 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT, 2277 .n_patterns = 1, 2278 .pattern_min_len = 1, 2279 .pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN, 2280 .max_nd_match_sets = 10, 2281 }; 2282 EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support); 2283 2284 static void 2285 mt76_connac_mcu_key_iter(struct ieee80211_hw *hw, 2286 struct ieee80211_vif *vif, 2287 struct ieee80211_sta *sta, 2288 struct ieee80211_key_conf *key, 2289 void *data) 2290 { 2291 struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data; 2292 u32 cipher; 2293 2294 if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC && 2295 key->cipher != WLAN_CIPHER_SUITE_CCMP && 2296 key->cipher != WLAN_CIPHER_SUITE_TKIP) 2297 return; 2298 2299 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 2300 cipher = BIT(3); 2301 else 2302 cipher = BIT(4); 2303 2304 /* we are assuming here to have a single pairwise key */ 2305 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) { 2306 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 2307 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1); 2308 else 2309 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2); 2310 2311 gtk_tlv->pairwise_cipher = cpu_to_le32(cipher); 2312 gtk_tlv->keyid = key->keyidx; 2313 } else { 2314 gtk_tlv->group_cipher = cpu_to_le32(cipher); 2315 } 2316 } 2317 2318 int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 2319 struct ieee80211_vif *vif, 2320 struct cfg80211_gtk_rekey_data *key) 2321 { 2322 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2323 struct mt76_connac_gtk_rekey_tlv *gtk_tlv; 2324 struct mt76_phy *phy = hw->priv; 2325 struct sk_buff *skb; 2326 struct { 2327 u8 bss_idx; 2328 u8 pad[3]; 2329 } __packed hdr = { 2330 .bss_idx = mvif->idx, 2331 }; 2332 2333 skb = mt76_mcu_msg_alloc(phy->dev, NULL, 2334 sizeof(hdr) + sizeof(*gtk_tlv)); 2335 if (!skb) 2336 return -ENOMEM; 2337 2338 skb_put_data(skb, &hdr, sizeof(hdr)); 2339 gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put_zero(skb, 2340 sizeof(*gtk_tlv)); 2341 gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY); 2342 gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv)); 2343 gtk_tlv->rekey_mode = 2; 2344 gtk_tlv->option = 1; 2345 2346 rcu_read_lock(); 2347 ieee80211_iter_keys_rcu(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv); 2348 rcu_read_unlock(); 2349 2350 memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN); 2351 memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN); 2352 memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN); 2353 2354 return mt76_mcu_skb_send_msg(phy->dev, skb, 2355 MCU_UNI_CMD(OFFLOAD), true); 2356 } 2357 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey); 2358 2359 static int 2360 mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif, 2361 bool suspend) 2362 { 2363 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2364 struct { 2365 struct { 2366 u8 bss_idx; 2367 u8 pad[3]; 2368 } __packed hdr; 2369 struct mt76_connac_arpns_tlv arpns; 2370 } req = { 2371 .hdr = { 2372 .bss_idx = mvif->idx, 2373 }, 2374 .arpns = { 2375 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP), 2376 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)), 2377 .mode = suspend, 2378 }, 2379 }; 2380 2381 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req, 2382 sizeof(req), true); 2383 } 2384 2385 int 2386 mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif, 2387 bool suspend) 2388 { 2389 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2390 struct { 2391 struct { 2392 u8 bss_idx; 2393 u8 pad[3]; 2394 } __packed hdr; 2395 struct mt76_connac_gtk_rekey_tlv gtk_tlv; 2396 } __packed req = { 2397 .hdr = { 2398 .bss_idx = mvif->idx, 2399 }, 2400 .gtk_tlv = { 2401 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY), 2402 .len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)), 2403 .rekey_mode = !suspend, 2404 }, 2405 }; 2406 2407 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req, 2408 sizeof(req), true); 2409 } 2410 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_gtk_rekey); 2411 2412 int 2413 mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev, 2414 struct ieee80211_vif *vif, 2415 bool enable, u8 mdtim, 2416 bool wow_suspend) 2417 { 2418 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2419 struct { 2420 struct { 2421 u8 bss_idx; 2422 u8 pad[3]; 2423 } __packed hdr; 2424 struct mt76_connac_suspend_tlv suspend_tlv; 2425 } req = { 2426 .hdr = { 2427 .bss_idx = mvif->idx, 2428 }, 2429 .suspend_tlv = { 2430 .tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING), 2431 .len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)), 2432 .enable = enable, 2433 .mdtim = mdtim, 2434 .wow_suspend = wow_suspend, 2435 }, 2436 }; 2437 2438 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req, 2439 sizeof(req), true); 2440 } 2441 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_mode); 2442 2443 static int 2444 mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev, 2445 struct ieee80211_vif *vif, 2446 u8 index, bool enable, 2447 struct cfg80211_pkt_pattern *pattern) 2448 { 2449 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2450 struct mt76_connac_wow_pattern_tlv *ptlv; 2451 struct sk_buff *skb; 2452 struct req_hdr { 2453 u8 bss_idx; 2454 u8 pad[3]; 2455 } __packed hdr = { 2456 .bss_idx = mvif->idx, 2457 }; 2458 2459 skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv)); 2460 if (!skb) 2461 return -ENOMEM; 2462 2463 skb_put_data(skb, &hdr, sizeof(hdr)); 2464 ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put_zero(skb, sizeof(*ptlv)); 2465 ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN); 2466 ptlv->len = cpu_to_le16(sizeof(*ptlv)); 2467 ptlv->data_len = pattern->pattern_len; 2468 ptlv->enable = enable; 2469 ptlv->index = index; 2470 2471 memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len); 2472 memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8)); 2473 2474 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true); 2475 } 2476 2477 int 2478 mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif, 2479 bool suspend, struct cfg80211_wowlan *wowlan) 2480 { 2481 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2482 struct mt76_dev *dev = phy->dev; 2483 struct { 2484 struct { 2485 u8 bss_idx; 2486 u8 pad[3]; 2487 } __packed hdr; 2488 struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv; 2489 struct mt76_connac_wow_gpio_param_tlv gpio_tlv; 2490 } req = { 2491 .hdr = { 2492 .bss_idx = mvif->idx, 2493 }, 2494 .wow_ctrl_tlv = { 2495 .tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL), 2496 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)), 2497 .cmd = suspend ? 1 : 2, 2498 }, 2499 .gpio_tlv = { 2500 .tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM), 2501 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)), 2502 .gpio_pin = 0xff, /* follow fw about GPIO pin */ 2503 }, 2504 }; 2505 2506 if (wowlan->magic_pkt) 2507 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC; 2508 if (wowlan->disconnect) 2509 req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT | 2510 UNI_WOW_DETECT_TYPE_BCN_LOST); 2511 if (wowlan->nd_config) { 2512 mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config); 2513 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT; 2514 mt76_connac_mcu_sched_scan_enable(phy, vif, suspend); 2515 } 2516 if (wowlan->n_patterns) 2517 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP; 2518 2519 if (mt76_is_mmio(dev)) 2520 req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE; 2521 else if (mt76_is_usb(dev)) 2522 req.wow_ctrl_tlv.wakeup_hif = WOW_USB; 2523 else if (mt76_is_sdio(dev)) 2524 req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO; 2525 2526 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req, 2527 sizeof(req), true); 2528 } 2529 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_wow_ctrl); 2530 2531 int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend) 2532 { 2533 struct { 2534 struct { 2535 u8 hif_type; /* 0x0: HIF_SDIO 2536 * 0x1: HIF_USB 2537 * 0x2: HIF_PCIE 2538 */ 2539 u8 pad[3]; 2540 } __packed hdr; 2541 struct hif_suspend_tlv { 2542 __le16 tag; 2543 __le16 len; 2544 u8 suspend; 2545 u8 pad[7]; 2546 } __packed hif_suspend; 2547 } req = { 2548 .hif_suspend = { 2549 .tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */ 2550 .len = cpu_to_le16(sizeof(struct hif_suspend_tlv)), 2551 .suspend = suspend, 2552 }, 2553 }; 2554 2555 if (mt76_is_mmio(dev)) 2556 req.hdr.hif_type = 2; 2557 else if (mt76_is_usb(dev)) 2558 req.hdr.hif_type = 1; 2559 else if (mt76_is_sdio(dev)) 2560 req.hdr.hif_type = 0; 2561 2562 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req, 2563 sizeof(req), true); 2564 } 2565 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend); 2566 2567 void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 2568 struct ieee80211_vif *vif) 2569 { 2570 struct mt76_phy *phy = priv; 2571 bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state); 2572 struct ieee80211_hw *hw = phy->hw; 2573 struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config; 2574 int i; 2575 2576 mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend); 2577 mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend); 2578 2579 mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true); 2580 2581 for (i = 0; i < wowlan->n_patterns; i++) 2582 mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend, 2583 &wowlan->patterns[i]); 2584 mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan); 2585 } 2586 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter); 2587 #endif /* CONFIG_PM */ 2588 2589 u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset) 2590 { 2591 struct { 2592 __le32 addr; 2593 __le32 val; 2594 } __packed req = { 2595 .addr = cpu_to_le32(offset), 2596 }; 2597 2598 return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req, 2599 sizeof(req), true); 2600 } 2601 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr); 2602 2603 void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val) 2604 { 2605 struct { 2606 __le32 addr; 2607 __le32 val; 2608 } __packed req = { 2609 .addr = cpu_to_le32(offset), 2610 .val = cpu_to_le32(val), 2611 }; 2612 2613 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req, 2614 sizeof(req), false); 2615 } 2616 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr); 2617 2618 static int 2619 mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf, 2620 struct sk_buff *skb, 2621 struct ieee80211_key_conf *key, 2622 enum set_key_cmd cmd) 2623 { 2624 struct sta_rec_sec *sec; 2625 u32 len = sizeof(*sec); 2626 struct tlv *tlv; 2627 2628 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2629 sec = (struct sta_rec_sec *)tlv; 2630 sec->add = cmd; 2631 2632 if (cmd == SET_KEY) { 2633 struct sec_key *sec_key; 2634 u8 cipher; 2635 2636 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2637 if (cipher == MCU_CIPHER_NONE) 2638 return -EOPNOTSUPP; 2639 2640 sec_key = &sec->key[0]; 2641 sec_key->cipher_len = sizeof(*sec_key); 2642 2643 if (cipher == MCU_CIPHER_BIP_CMAC_128) { 2644 sec_key->cipher_id = MCU_CIPHER_AES_CCMP; 2645 sec_key->key_id = sta_key_conf->keyidx; 2646 sec_key->key_len = 16; 2647 memcpy(sec_key->key, sta_key_conf->key, 16); 2648 2649 sec_key = &sec->key[1]; 2650 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; 2651 sec_key->cipher_len = sizeof(*sec_key); 2652 sec_key->key_len = 16; 2653 memcpy(sec_key->key, key->key, 16); 2654 sec->n_cipher = 2; 2655 } else { 2656 sec_key->cipher_id = cipher; 2657 sec_key->key_id = key->keyidx; 2658 sec_key->key_len = key->keylen; 2659 memcpy(sec_key->key, key->key, key->keylen); 2660 2661 if (cipher == MCU_CIPHER_TKIP) { 2662 /* Rx/Tx MIC keys are swapped */ 2663 memcpy(sec_key->key + 16, key->key + 24, 8); 2664 memcpy(sec_key->key + 24, key->key + 16, 8); 2665 } 2666 2667 /* store key_conf for BIP batch update */ 2668 if (cipher == MCU_CIPHER_AES_CCMP) { 2669 memcpy(sta_key_conf->key, key->key, key->keylen); 2670 sta_key_conf->keyidx = key->keyidx; 2671 } 2672 2673 len -= sizeof(*sec_key); 2674 sec->n_cipher = 1; 2675 } 2676 } else { 2677 len -= sizeof(sec->key); 2678 sec->n_cipher = 0; 2679 } 2680 sec->len = cpu_to_le16(len); 2681 2682 return 0; 2683 } 2684 2685 int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2686 struct mt76_connac_sta_key_conf *sta_key_conf, 2687 struct ieee80211_key_conf *key, int mcu_cmd, 2688 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2689 { 2690 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2691 struct sk_buff *skb; 2692 int ret; 2693 2694 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 2695 if (IS_ERR(skb)) 2696 return PTR_ERR(skb); 2697 2698 ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd); 2699 if (ret) 2700 return ret; 2701 2702 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 2703 if (ret) 2704 return ret; 2705 2706 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2707 } 2708 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key); 2709 2710 /* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */ 2711 #define BCN_TX_ESTIMATE_TIME (4096 + 20) 2712 void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif) 2713 { 2714 struct bss_info_ext_bss *ext; 2715 int ext_bss_idx, tsf_offset; 2716 struct tlv *tlv; 2717 2718 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 2719 if (ext_bss_idx < 0) 2720 return; 2721 2722 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); 2723 2724 ext = (struct bss_info_ext_bss *)tlv; 2725 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 2726 ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); 2727 } 2728 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv); 2729 2730 int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 2731 struct ieee80211_vif *vif, 2732 struct ieee80211_sta *sta, 2733 struct mt76_phy *phy, u16 wlan_idx, 2734 bool enable) 2735 { 2736 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2737 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA; 2738 struct bss_info_basic *bss; 2739 struct tlv *tlv; 2740 2741 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); 2742 bss = (struct bss_info_basic *)tlv; 2743 2744 switch (vif->type) { 2745 case NL80211_IFTYPE_MESH_POINT: 2746 case NL80211_IFTYPE_MONITOR: 2747 break; 2748 case NL80211_IFTYPE_AP: 2749 if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) { 2750 u8 bssid_id = vif->bss_conf.bssid_indicator; 2751 struct wiphy *wiphy = phy->hw->wiphy; 2752 2753 if (bssid_id > ilog2(wiphy->mbssid_max_interfaces)) 2754 return -EINVAL; 2755 2756 bss->non_tx_bssid = vif->bss_conf.bssid_index; 2757 bss->max_bssid = bssid_id; 2758 } 2759 break; 2760 case NL80211_IFTYPE_STATION: 2761 if (enable) { 2762 rcu_read_lock(); 2763 if (!sta) 2764 sta = ieee80211_find_sta(vif, 2765 vif->bss_conf.bssid); 2766 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 2767 if (sta) { 2768 struct mt76_wcid *wcid; 2769 2770 wcid = (struct mt76_wcid *)sta->drv_priv; 2771 wlan_idx = wcid->idx; 2772 } 2773 rcu_read_unlock(); 2774 } 2775 break; 2776 case NL80211_IFTYPE_ADHOC: 2777 type = NETWORK_IBSS; 2778 break; 2779 default: 2780 WARN_ON(1); 2781 break; 2782 } 2783 2784 bss->network_type = cpu_to_le32(type); 2785 bss->bmc_wcid_lo = to_wcid_lo(wlan_idx); 2786 bss->bmc_wcid_hi = to_wcid_hi(wlan_idx); 2787 bss->wmm_idx = mvif->wmm_idx; 2788 bss->active = enable; 2789 bss->cipher = mvif->cipher; 2790 2791 if (vif->type != NL80211_IFTYPE_MONITOR) { 2792 struct cfg80211_chan_def *chandef = &phy->chandef; 2793 2794 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 2795 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 2796 bss->dtim_period = vif->bss_conf.dtim_period; 2797 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif, 2798 chandef->chan->band, NULL); 2799 } else { 2800 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 2801 } 2802 2803 return 0; 2804 } 2805 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv); 2806 2807 #define ENTER_PM_STATE 1 2808 #define EXIT_PM_STATE 2 2809 int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter) 2810 { 2811 struct { 2812 u8 pm_number; 2813 u8 pm_state; 2814 u8 bssid[ETH_ALEN]; 2815 u8 dtim_period; 2816 u8 wlan_idx_lo; 2817 __le16 bcn_interval; 2818 __le32 aid; 2819 __le32 rx_filter; 2820 u8 band_idx; 2821 u8 wlan_idx_hi; 2822 u8 rsv[2]; 2823 __le32 feature; 2824 u8 omac_idx; 2825 u8 wmm_idx; 2826 u8 bcn_loss_cnt; 2827 u8 bcn_sp_duration; 2828 } __packed req = { 2829 .pm_number = 5, 2830 .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE, 2831 .band_idx = band, 2832 }; 2833 2834 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req, 2835 sizeof(req), true); 2836 } 2837 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm); 2838 2839 int mt76_connac_mcu_restart(struct mt76_dev *dev) 2840 { 2841 struct { 2842 u8 power_mode; 2843 u8 rsv[3]; 2844 } req = { 2845 .power_mode = 1, 2846 }; 2847 2848 return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req, 2849 sizeof(req), false); 2850 } 2851 EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart); 2852 2853 int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 2854 u8 rx_sel, u8 val) 2855 { 2856 struct { 2857 u8 ctrl; 2858 u8 rdd_idx; 2859 u8 rdd_rx_sel; 2860 u8 val; 2861 u8 rsv[4]; 2862 } __packed req = { 2863 .ctrl = cmd, 2864 .rdd_idx = index, 2865 .rdd_rx_sel = rx_sel, 2866 .val = val, 2867 }; 2868 2869 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req, 2870 sizeof(req), true); 2871 } 2872 EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd); 2873 2874 static int 2875 mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev, 2876 const struct mt76_connac2_fw_trailer *hdr, 2877 const u8 *data, bool is_wa) 2878 { 2879 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 2880 u32 override = 0, option = 0; 2881 2882 for (i = 0; i < hdr->n_region; i++) { 2883 const struct mt76_connac2_fw_region *region; 2884 u32 len, addr, mode; 2885 int err; 2886 2887 region = (const void *)((const u8 *)hdr - 2888 (hdr->n_region - i) * sizeof(*region)); 2889 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set, 2890 is_wa); 2891 len = le32_to_cpu(region->len); 2892 addr = le32_to_cpu(region->addr); 2893 2894 if (region->feature_set & FW_FEATURE_NON_DL) 2895 goto next; 2896 2897 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2898 override = addr; 2899 2900 err = mt76_connac_mcu_init_download(dev, addr, len, mode); 2901 if (err) { 2902 dev_err(dev->dev, "Download request failed\n"); 2903 return err; 2904 } 2905 2906 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 2907 data + offset, len, max_len); 2908 if (err) { 2909 dev_err(dev->dev, "Failed to send firmware.\n"); 2910 return err; 2911 } 2912 2913 next: 2914 offset += len; 2915 } 2916 2917 if (override) 2918 option |= FW_START_OVERRIDE; 2919 if (is_wa) 2920 option |= FW_START_WORKING_PDA_CR4; 2921 2922 return mt76_connac_mcu_start_firmware(dev, override, option); 2923 } 2924 2925 int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 2926 const char *fw_wa) 2927 { 2928 const struct mt76_connac2_fw_trailer *hdr; 2929 const struct firmware *fw; 2930 int ret; 2931 2932 ret = request_firmware(&fw, fw_wm, dev->dev); 2933 if (ret) 2934 return ret; 2935 2936 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2937 dev_err(dev->dev, "Invalid firmware\n"); 2938 ret = -EINVAL; 2939 goto out; 2940 } 2941 2942 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 2943 dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n", 2944 hdr->fw_ver, hdr->build_date); 2945 2946 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false); 2947 if (ret) { 2948 dev_err(dev->dev, "Failed to start WM firmware\n"); 2949 goto out; 2950 } 2951 2952 snprintf(dev->hw->wiphy->fw_version, 2953 sizeof(dev->hw->wiphy->fw_version), 2954 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2955 2956 release_firmware(fw); 2957 2958 if (!fw_wa) 2959 return 0; 2960 2961 ret = request_firmware(&fw, fw_wa, dev->dev); 2962 if (ret) 2963 return ret; 2964 2965 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2966 dev_err(dev->dev, "Invalid firmware\n"); 2967 ret = -EINVAL; 2968 goto out; 2969 } 2970 2971 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 2972 dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n", 2973 hdr->fw_ver, hdr->build_date); 2974 2975 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true); 2976 if (ret) { 2977 dev_err(dev->dev, "Failed to start WA firmware\n"); 2978 goto out; 2979 } 2980 2981 snprintf(dev->hw->wiphy->fw_version, 2982 sizeof(dev->hw->wiphy->fw_version), 2983 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2984 2985 out: 2986 release_firmware(fw); 2987 2988 return ret; 2989 } 2990 EXPORT_SYMBOL_GPL(mt76_connac2_load_ram); 2991 2992 static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info) 2993 { 2994 u32 mode = DL_MODE_NEED_RSP; 2995 2996 if ((!is_mt7921(dev) && !is_mt7925(dev)) || info == PATCH_SEC_NOT_SUPPORT) 2997 return mode; 2998 2999 switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) { 3000 case PATCH_SEC_ENC_TYPE_PLAIN: 3001 break; 3002 case PATCH_SEC_ENC_TYPE_AES: 3003 mode |= DL_MODE_ENCRYPT; 3004 mode |= FIELD_PREP(DL_MODE_KEY_IDX, 3005 (info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX; 3006 mode |= DL_MODE_RESET_SEC_IV; 3007 break; 3008 case PATCH_SEC_ENC_TYPE_SCRAMBLE: 3009 mode |= DL_MODE_ENCRYPT; 3010 mode |= DL_CONFIG_ENCRY_MODE_SEL; 3011 mode |= DL_MODE_RESET_SEC_IV; 3012 break; 3013 default: 3014 dev_err(dev->dev, "Encryption type not support!\n"); 3015 } 3016 3017 return mode; 3018 } 3019 3020 int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name) 3021 { 3022 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 3023 const struct mt76_connac2_patch_hdr *hdr; 3024 const struct firmware *fw = NULL; 3025 3026 sem = mt76_connac_mcu_patch_sem_ctrl(dev, true); 3027 switch (sem) { 3028 case PATCH_IS_DL: 3029 return 0; 3030 case PATCH_NOT_DL_SEM_SUCCESS: 3031 break; 3032 default: 3033 dev_err(dev->dev, "Failed to get patch semaphore\n"); 3034 return -EAGAIN; 3035 } 3036 3037 ret = request_firmware(&fw, fw_name, dev->dev); 3038 if (ret) 3039 goto out; 3040 3041 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3042 dev_err(dev->dev, "Invalid firmware\n"); 3043 ret = -EINVAL; 3044 goto out; 3045 } 3046 3047 hdr = (const void *)fw->data; 3048 dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 3049 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 3050 3051 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 3052 struct mt76_connac2_patch_sec *sec; 3053 u32 len, addr, mode; 3054 const u8 *dl; 3055 u32 sec_info; 3056 3057 sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec)); 3058 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 3059 PATCH_SEC_TYPE_INFO) { 3060 ret = -EINVAL; 3061 goto out; 3062 } 3063 3064 addr = be32_to_cpu(sec->info.addr); 3065 len = be32_to_cpu(sec->info.len); 3066 dl = fw->data + be32_to_cpu(sec->offs); 3067 sec_info = be32_to_cpu(sec->info.sec_key_idx); 3068 mode = mt76_connac2_get_data_mode(dev, sec_info); 3069 3070 ret = mt76_connac_mcu_init_download(dev, addr, len, mode); 3071 if (ret) { 3072 dev_err(dev->dev, "Download request failed\n"); 3073 goto out; 3074 } 3075 3076 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3077 dl, len, max_len); 3078 if (ret) { 3079 dev_err(dev->dev, "Failed to send patch\n"); 3080 goto out; 3081 } 3082 } 3083 3084 ret = mt76_connac_mcu_start_patch(dev); 3085 if (ret) 3086 dev_err(dev->dev, "Failed to start patch\n"); 3087 3088 out: 3089 sem = mt76_connac_mcu_patch_sem_ctrl(dev, false); 3090 switch (sem) { 3091 case PATCH_REL_SEM_SUCCESS: 3092 break; 3093 default: 3094 ret = -EAGAIN; 3095 dev_err(dev->dev, "Failed to release patch semaphore\n"); 3096 break; 3097 } 3098 3099 release_firmware(fw); 3100 3101 return ret; 3102 } 3103 EXPORT_SYMBOL_GPL(mt76_connac2_load_patch); 3104 3105 int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb, 3106 int cmd, int *wait_seq) 3107 { 3108 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 3109 struct mt76_connac2_mcu_uni_txd *uni_txd; 3110 struct mt76_connac2_mcu_txd *mcu_txd; 3111 __le32 *txd; 3112 u32 val; 3113 u8 seq; 3114 3115 /* TODO: make dynamic based on msg type */ 3116 dev->mcu.timeout = 20 * HZ; 3117 3118 seq = ++dev->mcu.msg_seq & 0xf; 3119 if (!seq) 3120 seq = ++dev->mcu.msg_seq & 0xf; 3121 3122 if (cmd == MCU_CMD(FW_SCATTER)) 3123 goto exit; 3124 3125 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 3126 txd = (__le32 *)skb_push(skb, txd_len); 3127 3128 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 3129 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 3130 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 3131 txd[0] = cpu_to_le32(val); 3132 3133 val = MT_TXD1_LONG_FORMAT | 3134 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 3135 txd[1] = cpu_to_le32(val); 3136 3137 if (cmd & __MCU_CMD_FIELD_UNI) { 3138 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 3139 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 3140 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 3141 uni_txd->cid = cpu_to_le16(mcu_cmd); 3142 uni_txd->s2d_index = MCU_S2D_H2N; 3143 uni_txd->pkt_type = MCU_PKT_ID; 3144 uni_txd->seq = seq; 3145 3146 goto exit; 3147 } 3148 3149 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 3150 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 3151 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 3152 MT_TX_MCU_PORT_RX_Q0)); 3153 mcu_txd->pkt_type = MCU_PKT_ID; 3154 mcu_txd->seq = seq; 3155 mcu_txd->cid = mcu_cmd; 3156 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 3157 3158 if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) { 3159 if (cmd & __MCU_CMD_FIELD_QUERY) 3160 mcu_txd->set_query = MCU_Q_QUERY; 3161 else 3162 mcu_txd->set_query = MCU_Q_SET; 3163 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid; 3164 } else { 3165 mcu_txd->set_query = MCU_Q_NA; 3166 } 3167 3168 if (cmd & __MCU_CMD_FIELD_WA) 3169 mcu_txd->s2d_index = MCU_S2D_H2C; 3170 else 3171 mcu_txd->s2d_index = MCU_S2D_H2N; 3172 3173 exit: 3174 if (wait_seq) 3175 *wait_seq = seq; 3176 3177 return 0; 3178 } 3179 EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message); 3180 3181 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); 3182 MODULE_DESCRIPTION("MediaTek MT76x connac layer helpers"); 3183 MODULE_LICENSE("Dual BSD/GPL"); 3184