1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include "mt76_connac.h" 5 #include "mt76_connac2_mac.h" 6 #include "dma.h" 7 8 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f) 9 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\ 10 IEEE80211_RADIOTAP_HE_##f) 11 12 int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm) 13 { 14 struct mt76_dev *dev = phy->dev; 15 16 if (mt76_is_usb(dev)) 17 return 0; 18 19 cancel_delayed_work_sync(&pm->ps_work); 20 if (!test_bit(MT76_STATE_PM, &phy->state)) 21 return 0; 22 23 if (pm->suspended) 24 return 0; 25 26 queue_work(dev->wq, &pm->wake_work); 27 if (!wait_event_timeout(pm->wait, 28 !test_bit(MT76_STATE_PM, &phy->state), 29 3 * HZ)) { 30 ieee80211_wake_queues(phy->hw); 31 return -ETIMEDOUT; 32 } 33 34 return 0; 35 } 36 EXPORT_SYMBOL_GPL(mt76_connac_pm_wake); 37 38 void mt76_connac_power_save_sched(struct mt76_phy *phy, 39 struct mt76_connac_pm *pm) 40 { 41 struct mt76_dev *dev = phy->dev; 42 43 if (mt76_is_usb(dev)) 44 return; 45 46 if (!pm->enable) 47 return; 48 49 if (pm->suspended) 50 return; 51 52 pm->last_activity = jiffies; 53 54 if (!test_bit(MT76_STATE_PM, &phy->state)) { 55 cancel_delayed_work(&phy->mac_work); 56 queue_delayed_work(dev->wq, &pm->ps_work, pm->idle_timeout); 57 } 58 } 59 EXPORT_SYMBOL_GPL(mt76_connac_power_save_sched); 60 61 void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, 62 struct mt76_wcid *wcid) 63 { 64 int i; 65 66 spin_lock_bh(&pm->txq_lock); 67 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 68 if (wcid && pm->tx_q[i].wcid != wcid) 69 continue; 70 71 dev_kfree_skb(pm->tx_q[i].skb); 72 pm->tx_q[i].skb = NULL; 73 } 74 spin_unlock_bh(&pm->txq_lock); 75 } 76 EXPORT_SYMBOL_GPL(mt76_connac_free_pending_tx_skbs); 77 78 void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw, 79 struct mt76_connac_pm *pm, 80 struct mt76_wcid *wcid, 81 struct sk_buff *skb) 82 { 83 int qid = skb_get_queue_mapping(skb); 84 struct mt76_phy *phy = hw->priv; 85 86 spin_lock_bh(&pm->txq_lock); 87 if (!pm->tx_q[qid].skb) { 88 ieee80211_stop_queues(hw); 89 pm->tx_q[qid].wcid = wcid; 90 pm->tx_q[qid].skb = skb; 91 queue_work(phy->dev->wq, &pm->wake_work); 92 } else { 93 dev_kfree_skb(skb); 94 } 95 spin_unlock_bh(&pm->txq_lock); 96 } 97 EXPORT_SYMBOL_GPL(mt76_connac_pm_queue_skb); 98 99 void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy, 100 struct mt76_connac_pm *pm) 101 { 102 int i; 103 104 spin_lock_bh(&pm->txq_lock); 105 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 106 struct mt76_wcid *wcid = pm->tx_q[i].wcid; 107 struct ieee80211_sta *sta = NULL; 108 109 if (!pm->tx_q[i].skb) 110 continue; 111 112 if (wcid && wcid->sta) 113 sta = container_of((void *)wcid, struct ieee80211_sta, 114 drv_priv); 115 116 mt76_tx(phy, sta, wcid, pm->tx_q[i].skb); 117 pm->tx_q[i].skb = NULL; 118 } 119 spin_unlock_bh(&pm->txq_lock); 120 121 mt76_worker_schedule(&phy->dev->tx_worker); 122 } 123 EXPORT_SYMBOL_GPL(mt76_connac_pm_dequeue_skbs); 124 125 void mt76_connac_tx_complete_skb(struct mt76_dev *mdev, 126 struct mt76_queue_entry *e) 127 { 128 if (!e->txwi) { 129 dev_kfree_skb_any(e->skb); 130 return; 131 } 132 133 /* error path */ 134 if (e->skb == DMA_DUMMY_DATA) { 135 struct mt76_connac_txp_common *txp; 136 struct mt76_txwi_cache *t; 137 u16 token; 138 139 txp = mt76_connac_txwi_to_txp(mdev, e->txwi); 140 if (is_mt76_fw_txp(mdev)) 141 token = le16_to_cpu(txp->fw.token); 142 else 143 token = le16_to_cpu(txp->hw.msdu_id[0]) & 144 ~MT_MSDU_ID_VALID; 145 146 t = mt76_token_put(mdev, token); 147 e->skb = t ? t->skb : NULL; 148 } 149 150 if (e->skb) 151 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 152 } 153 EXPORT_SYMBOL_GPL(mt76_connac_tx_complete_skb); 154 155 void mt76_connac_write_hw_txp(struct mt76_dev *dev, 156 struct mt76_tx_info *tx_info, 157 void *txp_ptr, u32 id) 158 { 159 struct mt76_connac_hw_txp *txp = txp_ptr; 160 struct mt76_connac_txp_ptr *ptr = &txp->ptr[0]; 161 int i, nbuf = tx_info->nbuf - 1; 162 u32 last_mask; 163 164 tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp); 165 tx_info->nbuf = 1; 166 167 txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID); 168 169 if (is_mt7663(dev) || is_mt7921(dev)) 170 last_mask = MT_TXD_LEN_LAST; 171 else 172 last_mask = MT_TXD_LEN_AMSDU_LAST | 173 MT_TXD_LEN_MSDU_LAST; 174 175 for (i = 0; i < nbuf; i++) { 176 u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK; 177 u32 addr = tx_info->buf[i + 1].addr; 178 179 if (i == nbuf - 1) 180 len |= last_mask; 181 182 if (i & 1) { 183 ptr->buf1 = cpu_to_le32(addr); 184 ptr->len1 = cpu_to_le16(len); 185 ptr++; 186 } else { 187 ptr->buf0 = cpu_to_le32(addr); 188 ptr->len0 = cpu_to_le16(len); 189 } 190 } 191 } 192 EXPORT_SYMBOL_GPL(mt76_connac_write_hw_txp); 193 194 static void 195 mt76_connac_txp_skb_unmap_fw(struct mt76_dev *mdev, 196 struct mt76_connac_fw_txp *txp) 197 { 198 struct device *dev = is_connac_v1(mdev) ? mdev->dev : mdev->dma_dev; 199 int i; 200 201 for (i = 0; i < txp->nbuf; i++) 202 dma_unmap_single(dev, le32_to_cpu(txp->buf[i]), 203 le16_to_cpu(txp->len[i]), DMA_TO_DEVICE); 204 } 205 206 static void 207 mt76_connac_txp_skb_unmap_hw(struct mt76_dev *dev, 208 struct mt76_connac_hw_txp *txp) 209 { 210 u32 last_mask; 211 int i; 212 213 if (is_mt7663(dev) || is_mt7921(dev)) 214 last_mask = MT_TXD_LEN_LAST; 215 else 216 last_mask = MT_TXD_LEN_MSDU_LAST; 217 218 for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) { 219 struct mt76_connac_txp_ptr *ptr = &txp->ptr[i]; 220 bool last; 221 u16 len; 222 223 len = le16_to_cpu(ptr->len0); 224 last = len & last_mask; 225 len &= MT_TXD_LEN_MASK; 226 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len, 227 DMA_TO_DEVICE); 228 if (last) 229 break; 230 231 len = le16_to_cpu(ptr->len1); 232 last = len & last_mask; 233 len &= MT_TXD_LEN_MASK; 234 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len, 235 DMA_TO_DEVICE); 236 if (last) 237 break; 238 } 239 } 240 241 void mt76_connac_txp_skb_unmap(struct mt76_dev *dev, 242 struct mt76_txwi_cache *t) 243 { 244 struct mt76_connac_txp_common *txp; 245 246 txp = mt76_connac_txwi_to_txp(dev, t); 247 if (is_mt76_fw_txp(dev)) 248 mt76_connac_txp_skb_unmap_fw(dev, &txp->fw); 249 else 250 mt76_connac_txp_skb_unmap_hw(dev, &txp->hw); 251 } 252 EXPORT_SYMBOL_GPL(mt76_connac_txp_skb_unmap); 253 254 int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc, 255 int ring_base, u32 flags) 256 { 257 int i, err; 258 259 err = mt76_init_tx_queue(phy, 0, idx, n_desc, ring_base, flags); 260 if (err < 0) 261 return err; 262 263 for (i = 1; i <= MT_TXQ_PSD; i++) 264 phy->q_tx[i] = phy->q_tx[0]; 265 266 return 0; 267 } 268 EXPORT_SYMBOL_GPL(mt76_connac_init_tx_queues); 269 270 static u16 271 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy, struct ieee80211_vif *vif, 272 bool beacon, bool mcast) 273 { 274 u8 mode = 0, band = mphy->chandef.chan->band; 275 int rateidx = 0, mcast_rate; 276 277 if (!vif) 278 goto legacy; 279 280 if (is_mt7921(mphy->dev)) { 281 rateidx = ffs(vif->bss_conf.basic_rates) - 1; 282 goto legacy; 283 } 284 285 if (beacon) { 286 struct cfg80211_bitrate_mask *mask; 287 288 mask = &vif->bss_conf.beacon_tx_rate; 289 if (hweight16(mask->control[band].he_mcs[0]) == 1) { 290 rateidx = ffs(mask->control[band].he_mcs[0]) - 1; 291 mode = MT_PHY_TYPE_HE_SU; 292 goto out; 293 } else if (hweight16(mask->control[band].vht_mcs[0]) == 1) { 294 rateidx = ffs(mask->control[band].vht_mcs[0]) - 1; 295 mode = MT_PHY_TYPE_VHT; 296 goto out; 297 } else if (hweight8(mask->control[band].ht_mcs[0]) == 1) { 298 rateidx = ffs(mask->control[band].ht_mcs[0]) - 1; 299 mode = MT_PHY_TYPE_HT; 300 goto out; 301 } else if (hweight32(mask->control[band].legacy) == 1) { 302 rateidx = ffs(mask->control[band].legacy) - 1; 303 goto legacy; 304 } 305 } 306 307 mcast_rate = vif->bss_conf.mcast_rate[band]; 308 if (mcast && mcast_rate > 0) 309 rateidx = mcast_rate - 1; 310 else 311 rateidx = ffs(vif->bss_conf.basic_rates) - 1; 312 313 legacy: 314 rateidx = mt76_calculate_default_rate(mphy, rateidx); 315 mode = rateidx >> 8; 316 rateidx &= GENMASK(7, 0); 317 318 out: 319 return FIELD_PREP(MT_TX_RATE_IDX, rateidx) | 320 FIELD_PREP(MT_TX_RATE_MODE, mode); 321 } 322 323 static void 324 mt76_connac2_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb, 325 struct mt76_wcid *wcid) 326 { 327 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 328 u8 fc_type, fc_stype; 329 u16 ethertype; 330 bool wmm = false; 331 u32 val; 332 333 if (wcid->sta) { 334 struct ieee80211_sta *sta; 335 336 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv); 337 wmm = sta->wme; 338 } 339 340 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) | 341 FIELD_PREP(MT_TXD1_TID, tid); 342 343 ethertype = get_unaligned_be16(&skb->data[12]); 344 if (ethertype >= ETH_P_802_3_MIN) 345 val |= MT_TXD1_ETH_802_3; 346 347 txwi[1] |= cpu_to_le32(val); 348 349 fc_type = IEEE80211_FTYPE_DATA >> 2; 350 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0; 351 352 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 353 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 354 355 txwi[2] |= cpu_to_le32(val); 356 357 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 358 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 359 360 txwi[7] |= cpu_to_le32(val); 361 } 362 363 static void 364 mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, 365 struct sk_buff *skb, 366 struct ieee80211_key_conf *key) 367 { 368 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 369 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 370 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 371 bool multicast = is_multicast_ether_addr(hdr->addr1); 372 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 373 __le16 fc = hdr->frame_control; 374 u8 fc_type, fc_stype; 375 u32 val; 376 377 if (ieee80211_is_action(fc) && 378 mgmt->u.action.category == WLAN_CATEGORY_BACK && 379 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) { 380 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); 381 382 txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA); 383 tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK; 384 } else if (ieee80211_is_back_req(hdr->frame_control)) { 385 struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr; 386 u16 control = le16_to_cpu(bar->control); 387 388 tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control); 389 } 390 391 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | 392 FIELD_PREP(MT_TXD1_HDR_INFO, 393 ieee80211_get_hdrlen_from_skb(skb) / 2) | 394 FIELD_PREP(MT_TXD1_TID, tid); 395 396 txwi[1] |= cpu_to_le32(val); 397 398 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; 399 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; 400 401 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 402 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) | 403 FIELD_PREP(MT_TXD2_MULTICAST, multicast); 404 405 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) && 406 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { 407 val |= MT_TXD2_BIP; 408 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME); 409 } 410 411 if (!ieee80211_is_data(fc) || multicast || 412 info->flags & IEEE80211_TX_CTL_USE_MINRATE) 413 val |= MT_TXD2_FIX_RATE; 414 415 txwi[2] |= cpu_to_le32(val); 416 417 if (ieee80211_is_beacon(fc)) { 418 txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT); 419 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); 420 if (!is_mt7921(dev)) 421 txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, 422 0x18)); 423 } 424 425 if (info->flags & IEEE80211_TX_CTL_INJECTED) { 426 u16 seqno = le16_to_cpu(hdr->seq_ctrl); 427 428 if (ieee80211_is_back_req(hdr->frame_control)) { 429 struct ieee80211_bar *bar; 430 431 bar = (struct ieee80211_bar *)skb->data; 432 seqno = le16_to_cpu(bar->start_seq_num); 433 } 434 435 val = MT_TXD3_SN_VALID | 436 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); 437 txwi[3] |= cpu_to_le32(val); 438 txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); 439 } 440 441 if (mt76_is_mmio(dev)) { 442 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 443 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 444 txwi[7] |= cpu_to_le32(val); 445 } else { 446 val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | 447 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); 448 txwi[8] |= cpu_to_le32(val); 449 } 450 } 451 452 void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 453 struct sk_buff *skb, struct mt76_wcid *wcid, 454 struct ieee80211_key_conf *key, int pid, 455 enum mt76_txq_id qid, u32 changed) 456 { 457 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 458 u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2; 459 struct ieee80211_vif *vif = info->control.vif; 460 struct mt76_phy *mphy = &dev->phy; 461 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0; 462 u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE; 463 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 464 bool beacon = !!(changed & (BSS_CHANGED_BEACON | 465 BSS_CHANGED_BEACON_ENABLED)); 466 bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP | 467 BSS_CHANGED_FILS_DISCOVERY)); 468 469 if (vif) { 470 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 471 472 omac_idx = mvif->omac_idx; 473 wmm_idx = mvif->wmm_idx; 474 band_idx = mvif->band_idx; 475 } 476 477 if (phy_idx && dev->phys[MT_BAND1]) 478 mphy = dev->phys[MT_BAND1]; 479 480 if (inband_disc) { 481 p_fmt = MT_TX_TYPE_FW; 482 q_idx = MT_LMAC_ALTX0; 483 } else if (beacon) { 484 p_fmt = MT_TX_TYPE_FW; 485 q_idx = MT_LMAC_BCN0; 486 } else if (qid >= MT_TXQ_PSD) { 487 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 488 q_idx = MT_LMAC_ALTX0; 489 } else { 490 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 491 q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS + 492 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); 493 } 494 495 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | 496 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | 497 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 498 txwi[0] = cpu_to_le32(val); 499 500 val = MT_TXD1_LONG_FORMAT | 501 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | 502 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); 503 if (!is_mt7921(dev)) 504 val |= MT_TXD1_VTA; 505 if (phy_idx || band_idx) 506 val |= MT_TXD1_TGID; 507 508 txwi[1] = cpu_to_le32(val); 509 txwi[2] = 0; 510 511 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15); 512 if (!is_mt7921(dev)) 513 val |= MT_TXD3_SW_POWER_MGMT; 514 if (key) 515 val |= MT_TXD3_PROTECT_FRAME; 516 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 517 val |= MT_TXD3_NO_ACK; 518 519 txwi[3] = cpu_to_le32(val); 520 txwi[4] = 0; 521 522 val = FIELD_PREP(MT_TXD5_PID, pid); 523 if (pid >= MT_PACKET_ID_FIRST) 524 val |= MT_TXD5_TX_STATUS_HOST; 525 526 txwi[5] = cpu_to_le32(val); 527 txwi[6] = 0; 528 txwi[7] = wcid->amsdu ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0; 529 530 if (is_8023) 531 mt76_connac2_mac_write_txwi_8023(txwi, skb, wcid); 532 else 533 mt76_connac2_mac_write_txwi_80211(dev, txwi, skb, key); 534 535 if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) { 536 /* Fixed rata is available just for 802.11 txd */ 537 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 538 bool multicast = is_multicast_ether_addr(hdr->addr1); 539 u16 rate = mt76_connac2_mac_tx_rate_val(mphy, vif, beacon, 540 multicast); 541 u32 val = MT_TXD6_FIXED_BW; 542 543 /* hardware won't add HTC for mgmt/ctrl frame */ 544 txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD); 545 546 val |= FIELD_PREP(MT_TXD6_TX_RATE, rate); 547 txwi[6] |= cpu_to_le32(val); 548 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 549 } 550 } 551 EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi); 552 553 bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, 554 int pid, __le32 *txs_data, 555 struct mt76_sta_stats *stats) 556 { 557 struct ieee80211_supported_band *sband; 558 struct mt76_phy *mphy; 559 struct ieee80211_tx_info *info; 560 struct sk_buff_head list; 561 struct rate_info rate = {}; 562 struct sk_buff *skb; 563 bool cck = false; 564 u32 txrate, txs, mode; 565 566 mt76_tx_status_lock(dev, &list); 567 skb = mt76_tx_status_skb_get(dev, wcid, pid, &list); 568 if (!skb) 569 goto out; 570 571 txs = le32_to_cpu(txs_data[0]); 572 573 info = IEEE80211_SKB_CB(skb); 574 if (!(txs & MT_TXS0_ACK_ERROR_MASK)) 575 info->flags |= IEEE80211_TX_STAT_ACK; 576 577 info->status.ampdu_len = 1; 578 info->status.ampdu_ack_len = !!(info->flags & 579 IEEE80211_TX_STAT_ACK); 580 581 info->status.rates[0].idx = -1; 582 583 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); 584 585 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 586 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 587 588 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 589 stats->tx_nss[rate.nss - 1]++; 590 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 591 stats->tx_mcs[rate.mcs]++; 592 593 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 594 switch (mode) { 595 case MT_PHY_TYPE_CCK: 596 cck = true; 597 fallthrough; 598 case MT_PHY_TYPE_OFDM: 599 mphy = &dev->phy; 600 if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1]) 601 mphy = dev->phys[MT_BAND1]; 602 603 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 604 sband = &mphy->sband_5g.sband; 605 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 606 sband = &mphy->sband_6g.sband; 607 else 608 sband = &mphy->sband_2g.sband; 609 610 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck); 611 rate.legacy = sband->bitrates[rate.mcs].bitrate; 612 break; 613 case MT_PHY_TYPE_HT: 614 case MT_PHY_TYPE_HT_GF: 615 if (rate.mcs > 31) 616 goto out; 617 618 rate.flags = RATE_INFO_FLAGS_MCS; 619 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 620 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 621 break; 622 case MT_PHY_TYPE_VHT: 623 if (rate.mcs > 9) 624 goto out; 625 626 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 627 break; 628 case MT_PHY_TYPE_HE_SU: 629 case MT_PHY_TYPE_HE_EXT_SU: 630 case MT_PHY_TYPE_HE_TB: 631 case MT_PHY_TYPE_HE_MU: 632 if (rate.mcs > 11) 633 goto out; 634 635 rate.he_gi = wcid->rate.he_gi; 636 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 637 rate.flags = RATE_INFO_FLAGS_HE_MCS; 638 break; 639 default: 640 goto out; 641 } 642 643 stats->tx_mode[mode]++; 644 645 switch (FIELD_GET(MT_TXS0_BW, txs)) { 646 case IEEE80211_STA_RX_BW_160: 647 rate.bw = RATE_INFO_BW_160; 648 stats->tx_bw[3]++; 649 break; 650 case IEEE80211_STA_RX_BW_80: 651 rate.bw = RATE_INFO_BW_80; 652 stats->tx_bw[2]++; 653 break; 654 case IEEE80211_STA_RX_BW_40: 655 rate.bw = RATE_INFO_BW_40; 656 stats->tx_bw[1]++; 657 break; 658 default: 659 rate.bw = RATE_INFO_BW_20; 660 stats->tx_bw[0]++; 661 break; 662 } 663 wcid->rate = rate; 664 665 out: 666 if (skb) 667 mt76_tx_status_skb_done(dev, skb, &list); 668 669 mt76_tx_status_unlock(dev, &list); 670 671 return !!skb; 672 } 673 EXPORT_SYMBOL_GPL(mt76_connac2_mac_add_txs_skb); 674 675 static void 676 mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status *status, 677 struct ieee80211_radiotap_he *he, 678 __le32 *rxv) 679 { 680 u32 ru_h, ru_l; 681 u8 ru, offs = 0; 682 683 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L); 684 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H); 685 ru = (u8)(ru_l | ru_h << 4); 686 687 status->bw = RATE_INFO_BW_HE_RU; 688 689 switch (ru) { 690 case 0 ... 36: 691 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26; 692 offs = ru; 693 break; 694 case 37 ... 52: 695 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52; 696 offs = ru - 37; 697 break; 698 case 53 ... 60: 699 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106; 700 offs = ru - 53; 701 break; 702 case 61 ... 64: 703 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242; 704 offs = ru - 61; 705 break; 706 case 65 ... 66: 707 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484; 708 offs = ru - 65; 709 break; 710 case 67: 711 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996; 712 break; 713 case 68: 714 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996; 715 break; 716 } 717 718 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 719 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) | 720 le16_encode_bits(offs, 721 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET); 722 } 723 724 static void 725 mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev *dev, struct sk_buff *skb, 726 __le32 *rxv) 727 { 728 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 729 static struct ieee80211_radiotap_he_mu mu_known = { 730 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) | 731 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) | 732 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) | 733 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN), 734 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN), 735 }; 736 struct ieee80211_radiotap_he_mu *he_mu; 737 738 if (is_mt7921(dev)) { 739 mu_known.flags1 |= HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN); 740 mu_known.flags2 |= HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN); 741 } 742 743 status->flag |= RX_FLAG_RADIOTAP_HE_MU; 744 745 he_mu = skb_push(skb, sizeof(mu_known)); 746 memcpy(he_mu, &mu_known, sizeof(mu_known)); 747 748 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f) 749 750 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx); 751 if (status->he_dcm) 752 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm); 753 754 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) | 755 MU_PREP(FLAGS2_SIG_B_SYMS_USERS, 756 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER)); 757 758 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0); 759 760 if (status->bw >= RATE_INFO_BW_40) { 761 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN); 762 he_mu->ru_ch2[0] = 763 le32_get_bits(rxv[3], MT_CRXV_HE_RU1); 764 } 765 766 if (status->bw >= RATE_INFO_BW_80) { 767 he_mu->ru_ch1[1] = 768 le32_get_bits(rxv[3], MT_CRXV_HE_RU2); 769 he_mu->ru_ch2[1] = 770 le32_get_bits(rxv[3], MT_CRXV_HE_RU3); 771 } 772 } 773 774 void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev, 775 struct sk_buff *skb, 776 __le32 *rxv, u32 mode) 777 { 778 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 779 static const struct ieee80211_radiotap_he known = { 780 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) | 781 HE_BITS(DATA1_DATA_DCM_KNOWN) | 782 HE_BITS(DATA1_STBC_KNOWN) | 783 HE_BITS(DATA1_CODING_KNOWN) | 784 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) | 785 HE_BITS(DATA1_DOPPLER_KNOWN) | 786 HE_BITS(DATA1_SPTL_REUSE_KNOWN) | 787 HE_BITS(DATA1_BSS_COLOR_KNOWN), 788 .data2 = HE_BITS(DATA2_GI_KNOWN) | 789 HE_BITS(DATA2_TXBF_KNOWN) | 790 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) | 791 HE_BITS(DATA2_TXOP_KNOWN), 792 }; 793 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1; 794 struct ieee80211_radiotap_he *he; 795 796 status->flag |= RX_FLAG_RADIOTAP_HE; 797 798 he = skb_push(skb, sizeof(known)); 799 memcpy(he, &known, sizeof(known)); 800 801 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) | 802 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]); 803 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]); 804 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) | 805 le16_encode_bits(ltf_size, 806 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE); 807 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF) 808 he->data5 |= HE_BITS(DATA5_TXBF); 809 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) | 810 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]); 811 812 switch (mode) { 813 case MT_PHY_TYPE_HE_SU: 814 he->data1 |= HE_BITS(DATA1_FORMAT_SU) | 815 HE_BITS(DATA1_UL_DL_KNOWN) | 816 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) | 817 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 818 819 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | 820 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 821 break; 822 case MT_PHY_TYPE_HE_EXT_SU: 823 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | 824 HE_BITS(DATA1_UL_DL_KNOWN) | 825 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 826 827 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 828 break; 829 case MT_PHY_TYPE_HE_MU: 830 he->data1 |= HE_BITS(DATA1_FORMAT_MU) | 831 HE_BITS(DATA1_UL_DL_KNOWN); 832 833 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 834 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]); 835 836 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv); 837 mt76_connac2_mac_decode_he_mu_radiotap(dev, skb, rxv); 838 break; 839 case MT_PHY_TYPE_HE_TB: 840 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) | 841 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) | 842 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) | 843 HE_BITS(DATA1_SPTL_REUSE4_KNOWN); 844 845 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) | 846 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) | 847 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) | 848 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]); 849 850 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv); 851 break; 852 default: 853 break; 854 } 855 } 856 EXPORT_SYMBOL_GPL(mt76_connac2_mac_decode_he_radiotap); 857 858 /* The HW does not translate the mac header to 802.3 for mesh point */ 859 int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif, 860 struct sk_buff *skb, u16 hdr_offset) 861 { 862 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 863 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_offset); 864 __le32 *rxd = (__le32 *)skb->data; 865 struct ieee80211_sta *sta; 866 struct ieee80211_hdr hdr; 867 u16 frame_control; 868 869 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != 870 MT_RXD3_NORMAL_U2M) 871 return -EINVAL; 872 873 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4)) 874 return -EINVAL; 875 876 sta = container_of((void *)status->wcid, struct ieee80211_sta, drv_priv); 877 878 /* store the info from RXD and ethhdr to avoid being overridden */ 879 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL); 880 hdr.frame_control = cpu_to_le16(frame_control); 881 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL)); 882 hdr.duration_id = 0; 883 884 ether_addr_copy(hdr.addr1, vif->addr); 885 ether_addr_copy(hdr.addr2, sta->addr); 886 switch (frame_control & (IEEE80211_FCTL_TODS | 887 IEEE80211_FCTL_FROMDS)) { 888 case 0: 889 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); 890 break; 891 case IEEE80211_FCTL_FROMDS: 892 ether_addr_copy(hdr.addr3, eth_hdr->h_source); 893 break; 894 case IEEE80211_FCTL_TODS: 895 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 896 break; 897 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: 898 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 899 ether_addr_copy(hdr.addr4, eth_hdr->h_source); 900 break; 901 default: 902 break; 903 } 904 905 skb_pull(skb, hdr_offset + sizeof(struct ethhdr) - 2); 906 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || 907 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) 908 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); 909 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) 910 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); 911 else 912 skb_pull(skb, 2); 913 914 if (ieee80211_has_order(hdr.frame_control)) 915 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9], 916 IEEE80211_HT_CTL_LEN); 917 if (ieee80211_is_data_qos(hdr.frame_control)) { 918 __le16 qos_ctrl; 919 920 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL)); 921 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, 922 IEEE80211_QOS_CTL_LEN); 923 } 924 925 if (ieee80211_has_a4(hdr.frame_control)) 926 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 927 else 928 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6); 929 930 return 0; 931 } 932 EXPORT_SYMBOL_GPL(mt76_connac2_reverse_frag0_hdr_trans); 933 934 int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev, 935 struct mt76_rx_status *status, 936 struct ieee80211_supported_band *sband, 937 __le32 *rxv, u8 *mode) 938 { 939 u32 v0, v2; 940 u8 stbc, gi, bw, dcm, nss; 941 int i, idx; 942 bool cck = false; 943 944 v0 = le32_to_cpu(rxv[0]); 945 v2 = le32_to_cpu(rxv[2]); 946 947 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0); 948 nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1; 949 950 if (!is_mt7915(dev)) { 951 stbc = FIELD_GET(MT_PRXV_HT_STBC, v0); 952 gi = FIELD_GET(MT_PRXV_HT_SGI, v0); 953 *mode = FIELD_GET(MT_PRXV_TX_MODE, v0); 954 if (is_mt7921(dev)) 955 dcm = !!(idx & MT_PRXV_TX_DCM); 956 else 957 dcm = FIELD_GET(MT_PRXV_DCM, v0); 958 bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0); 959 } else { 960 stbc = FIELD_GET(MT_CRXV_HT_STBC, v2); 961 gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2); 962 *mode = FIELD_GET(MT_CRXV_TX_MODE, v2); 963 dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM); 964 bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2); 965 } 966 967 switch (*mode) { 968 case MT_PHY_TYPE_CCK: 969 cck = true; 970 fallthrough; 971 case MT_PHY_TYPE_OFDM: 972 i = mt76_get_rate(dev, sband, i, cck); 973 break; 974 case MT_PHY_TYPE_HT_GF: 975 case MT_PHY_TYPE_HT: 976 status->encoding = RX_ENC_HT; 977 if (gi) 978 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 979 if (i > 31) 980 return -EINVAL; 981 break; 982 case MT_PHY_TYPE_VHT: 983 status->nss = nss; 984 status->encoding = RX_ENC_VHT; 985 if (gi) 986 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 987 if (i > 11) 988 return -EINVAL; 989 break; 990 case MT_PHY_TYPE_HE_MU: 991 case MT_PHY_TYPE_HE_SU: 992 case MT_PHY_TYPE_HE_EXT_SU: 993 case MT_PHY_TYPE_HE_TB: 994 status->nss = nss; 995 status->encoding = RX_ENC_HE; 996 i &= GENMASK(3, 0); 997 998 if (gi <= NL80211_RATE_INFO_HE_GI_3_2) 999 status->he_gi = gi; 1000 1001 status->he_dcm = dcm; 1002 break; 1003 default: 1004 return -EINVAL; 1005 } 1006 status->rate_idx = i; 1007 1008 switch (bw) { 1009 case IEEE80211_STA_RX_BW_20: 1010 break; 1011 case IEEE80211_STA_RX_BW_40: 1012 if (*mode & MT_PHY_TYPE_HE_EXT_SU && 1013 (idx & MT_PRXV_TX_ER_SU_106T)) { 1014 status->bw = RATE_INFO_BW_HE_RU; 1015 status->he_ru = 1016 NL80211_RATE_INFO_HE_RU_ALLOC_106; 1017 } else { 1018 status->bw = RATE_INFO_BW_40; 1019 } 1020 break; 1021 case IEEE80211_STA_RX_BW_80: 1022 status->bw = RATE_INFO_BW_80; 1023 break; 1024 case IEEE80211_STA_RX_BW_160: 1025 status->bw = RATE_INFO_BW_160; 1026 break; 1027 default: 1028 return -EINVAL; 1029 } 1030 1031 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; 1032 if (*mode < MT_PHY_TYPE_HE_SU && gi) 1033 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1034 1035 return 0; 1036 } 1037 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_rx_rate); 1038