1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2019 MediaTek Inc. */ 3 4 #ifndef __MT7615_H 5 #define __MT7615_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include <linux/regmap.h> 10 #include "../mt76.h" 11 #include "regs.h" 12 13 #define MT7615_MAX_INTERFACES 4 14 #define MT7615_MAX_WMM_SETS 4 15 #define MT7615_WTBL_SIZE 128 16 #define MT7615_WTBL_RESERVED (MT7615_WTBL_SIZE - 1) 17 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \ 18 MT7615_MAX_INTERFACES) 19 20 #define MT7615_WATCHDOG_TIME (HZ / 10) 21 #define MT7615_RESET_TIMEOUT (30 * HZ) 22 #define MT7615_RATE_RETRY 2 23 24 #define MT7615_TX_RING_SIZE 1024 25 #define MT7615_TX_MGMT_RING_SIZE 128 26 #define MT7615_TX_MCU_RING_SIZE 128 27 #define MT7615_TX_FWDL_RING_SIZE 128 28 29 #define MT7615_RX_RING_SIZE 1024 30 #define MT7615_RX_MCU_RING_SIZE 512 31 32 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin" 33 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin" 34 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin" 35 36 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin" 37 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin" 38 39 #define MT7615_FIRMWARE_V1 1 40 #define MT7615_FIRMWARE_V2 2 41 42 #define MT7615_EEPROM_SIZE 1024 43 #define MT7615_TOKEN_SIZE 4096 44 45 #define MT_FRAC_SCALE 12 46 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div)) 47 48 #define MT_CHFREQ_VALID BIT(7) 49 #define MT_CHFREQ_DBDC_IDX BIT(6) 50 #define MT_CHFREQ_SEQ GENMASK(5, 0) 51 52 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */ 53 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 54 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 55 56 struct mt7615_vif; 57 struct mt7615_sta; 58 struct mt7615_dfs_pulse; 59 struct mt7615_dfs_pattern; 60 61 enum mt7615_hw_txq_id { 62 MT7615_TXQ_MAIN, 63 MT7615_TXQ_EXT, 64 MT7615_TXQ_MCU, 65 MT7615_TXQ_FWDL, 66 }; 67 68 enum mt7622_hw_txq_id { 69 MT7622_TXQ_AC0, 70 MT7622_TXQ_AC1, 71 MT7622_TXQ_AC2, 72 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL, 73 MT7622_TXQ_AC3, 74 MT7622_TXQ_MGMT, 75 MT7622_TXQ_MCU = 15, 76 }; 77 78 struct mt7615_rate_set { 79 struct ieee80211_tx_rate probe_rate; 80 struct ieee80211_tx_rate rates[4]; 81 }; 82 83 struct mt7615_sta { 84 struct mt76_wcid wcid; /* must be first */ 85 86 struct mt7615_vif *vif; 87 88 struct list_head poll_list; 89 u32 airtime_ac[8]; 90 91 struct ieee80211_tx_rate rates[4]; 92 93 struct mt7615_rate_set rateset[2]; 94 u32 rate_set_tsf; 95 96 u8 rate_count; 97 u8 n_rates; 98 99 u8 rate_probe; 100 }; 101 102 struct mt7615_vif { 103 u8 idx; 104 u8 omac_idx; 105 u8 band_idx; 106 u8 wmm_idx; 107 108 struct mt7615_sta sta; 109 }; 110 111 struct mib_stats { 112 u32 ack_fail_cnt; 113 u32 fcs_err_cnt; 114 u32 rts_cnt; 115 u32 rts_retries_cnt; 116 }; 117 118 struct mt7615_phy { 119 struct mt76_phy *mt76; 120 struct mt7615_dev *dev; 121 122 u32 rxfilter; 123 u32 omac_mask; 124 125 u16 noise; 126 127 unsigned long last_cca_adj; 128 int false_cca_ofdm, false_cca_cck; 129 s8 ofdm_sensitivity; 130 s8 cck_sensitivity; 131 132 u16 chainmask; 133 134 s16 coverage_class; 135 u8 slottime; 136 137 u8 chfreq; 138 u8 rdd_state; 139 int dfs_state; 140 141 __le32 rx_ampdu_ts; 142 u32 ampdu_ref; 143 144 struct mib_stats mib; 145 }; 146 147 struct mt7615_dev { 148 union { /* must be first */ 149 struct mt76_dev mt76; 150 struct mt76_phy mphy; 151 }; 152 153 struct mt7615_phy phy; 154 u32 vif_mask; 155 u32 omac_mask; 156 157 u16 chainmask; 158 159 struct regmap *infracfg; 160 161 struct work_struct mcu_work; 162 163 struct work_struct reset_work; 164 wait_queue_head_t reset_wait; 165 u32 reset_state; 166 167 struct list_head sta_poll_list; 168 spinlock_t sta_poll_lock; 169 170 struct { 171 u8 n_pulses; 172 u32 period; 173 u16 width; 174 s16 power; 175 } radar_pattern; 176 u32 hw_pattern; 177 178 u8 mac_work_count; 179 bool scs_en; 180 bool fw_debug; 181 182 spinlock_t token_lock; 183 struct idr token; 184 185 u8 fw_ver; 186 }; 187 188 enum { 189 HW_BSSID_0 = 0x0, 190 HW_BSSID_1, 191 HW_BSSID_2, 192 HW_BSSID_3, 193 HW_BSSID_MAX, 194 EXT_BSSID_START = 0x10, 195 EXT_BSSID_1, 196 EXT_BSSID_2, 197 EXT_BSSID_3, 198 EXT_BSSID_4, 199 EXT_BSSID_5, 200 EXT_BSSID_6, 201 EXT_BSSID_7, 202 EXT_BSSID_8, 203 EXT_BSSID_9, 204 EXT_BSSID_10, 205 EXT_BSSID_11, 206 EXT_BSSID_12, 207 EXT_BSSID_13, 208 EXT_BSSID_14, 209 EXT_BSSID_15, 210 EXT_BSSID_END 211 }; 212 213 enum { 214 MT_RX_SEL0, 215 MT_RX_SEL1, 216 }; 217 218 enum mt7615_rdd_cmd { 219 RDD_STOP, 220 RDD_START, 221 RDD_DET_MODE, 222 RDD_DET_STOP, 223 RDD_CAC_START, 224 RDD_CAC_END, 225 RDD_NORMAL_START, 226 RDD_DISABLE_DFS_CAL, 227 RDD_PULSE_DBG, 228 RDD_READ_PULSE, 229 RDD_RESUME_BF, 230 }; 231 232 static inline struct mt7615_phy * 233 mt7615_hw_phy(struct ieee80211_hw *hw) 234 { 235 struct mt76_phy *phy = hw->priv; 236 237 return phy->priv; 238 } 239 240 static inline struct mt7615_dev * 241 mt7615_hw_dev(struct ieee80211_hw *hw) 242 { 243 struct mt76_phy *phy = hw->priv; 244 245 return container_of(phy->dev, struct mt7615_dev, mt76); 246 } 247 248 static inline struct mt7615_phy * 249 mt7615_ext_phy(struct mt7615_dev *dev) 250 { 251 struct mt76_phy *phy = dev->mt76.phy2; 252 253 if (!phy) 254 return NULL; 255 256 return phy->priv; 257 } 258 259 extern const struct ieee80211_ops mt7615_ops; 260 extern struct pci_driver mt7615_pci_driver; 261 extern struct platform_driver mt7622_wmac_driver; 262 263 #ifdef CONFIG_MT7622_WMAC 264 int mt7622_wmac_init(struct mt7615_dev *dev); 265 #else 266 static inline int mt7622_wmac_init(struct mt7615_dev *dev) 267 { 268 return 0; 269 } 270 #endif 271 272 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq); 273 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr); 274 275 int mt7615_register_device(struct mt7615_dev *dev); 276 void mt7615_unregister_device(struct mt7615_dev *dev); 277 int mt7615_register_ext_phy(struct mt7615_dev *dev); 278 void mt7615_unregister_ext_phy(struct mt7615_dev *dev); 279 int mt7615_eeprom_init(struct mt7615_dev *dev); 280 int mt7615_eeprom_get_power_index(struct mt7615_dev *dev, 281 struct ieee80211_channel *chan, 282 u8 chain_idx); 283 int mt7615_dma_init(struct mt7615_dev *dev); 284 void mt7615_dma_cleanup(struct mt7615_dev *dev); 285 int mt7615_mcu_init(struct mt7615_dev *dev); 286 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev); 287 int mt7615_mcu_set_dev_info(struct mt7615_dev *dev, 288 struct ieee80211_vif *vif, bool enable); 289 int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, struct ieee80211_vif *vif, 290 int en); 291 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, 292 struct ieee80211_tx_rate *probe_rate, 293 struct ieee80211_tx_rate *rates); 294 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev); 295 int mt7615_mcu_set_bmc(struct mt7615_dev *dev, struct ieee80211_vif *vif, 296 bool en); 297 int mt7615_mcu_set_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif, 298 struct ieee80211_sta *sta, bool en); 299 int mt7615_mcu_set_bcn(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 300 int en); 301 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd); 302 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 303 const struct ieee80211_tx_queue_params *params); 304 int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev, 305 struct ieee80211_ampdu_params *params, 306 bool add); 307 int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev, 308 struct ieee80211_ampdu_params *params, 309 bool add); 310 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb); 311 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, 312 enum mt7615_rdd_cmd cmd, u8 index, 313 u8 rx_sel, u8 val); 314 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev); 315 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl); 316 317 static inline bool is_mt7622(struct mt76_dev *dev) 318 { 319 if (!IS_ENABLED(CONFIG_MT7622_WMAC)) 320 return false; 321 322 return mt76_chip(dev) == 0x7622; 323 } 324 325 static inline bool is_mt7615(struct mt76_dev *dev) 326 { 327 return mt76_chip(dev) == 0x7615; 328 } 329 330 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask) 331 { 332 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); 333 } 334 335 static inline void mt7615_irq_disable(struct mt7615_dev *dev, u32 mask) 336 { 337 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 338 } 339 340 void mt7615_update_channel(struct mt76_dev *mdev); 341 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask); 342 void mt7615_mac_reset_counters(struct mt7615_dev *dev); 343 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy); 344 void mt7615_mac_set_scs(struct mt7615_dev *dev, bool enable); 345 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy); 346 void mt7615_mac_sta_poll(struct mt7615_dev *dev); 347 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, 348 struct sk_buff *skb, struct mt76_wcid *wcid, 349 struct ieee80211_sta *sta, int pid, 350 struct ieee80211_key_conf *key); 351 void mt7615_mac_set_timing(struct mt7615_phy *phy); 352 int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb); 353 void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data); 354 void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb); 355 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, 356 struct ieee80211_key_conf *key, 357 enum set_key_cmd cmd); 358 void mt7615_mac_reset_work(struct work_struct *work); 359 360 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev); 361 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev); 362 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable); 363 int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val); 364 int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int enter); 365 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index); 366 void mt7615_mcu_exit(struct mt7615_dev *dev); 367 368 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 369 enum mt76_txq_id qid, struct mt76_wcid *wcid, 370 struct ieee80211_sta *sta, 371 struct mt76_tx_info *tx_info); 372 373 void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, 374 struct mt76_queue_entry *e); 375 376 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 377 struct sk_buff *skb); 378 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 379 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 380 struct ieee80211_sta *sta); 381 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 382 struct ieee80211_sta *sta); 383 void mt7615_mac_work(struct work_struct *work); 384 void mt7615_txp_skb_unmap(struct mt76_dev *dev, 385 struct mt76_txwi_cache *txwi); 386 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val); 387 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev, 388 const struct mt7615_dfs_pulse *pulse); 389 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index, 390 const struct mt7615_dfs_pattern *pattern); 391 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable); 392 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy); 393 394 int mt7615_init_debugfs(struct mt7615_dev *dev); 395 396 #endif 397