1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Roy Luo <royluo@google.com> 5 * Ryder Lee <ryder.lee@mediatek.com> 6 */ 7 8 #include <linux/firmware.h> 9 #include "mt7615.h" 10 #include "mcu.h" 11 #include "mac.h" 12 #include "eeprom.h" 13 14 struct mt7615_patch_hdr { 15 char build_date[16]; 16 char platform[4]; 17 __be32 hw_sw_ver; 18 __be32 patch_ver; 19 __be16 checksum; 20 } __packed; 21 22 struct mt7615_fw_trailer { 23 __le32 addr; 24 u8 chip_id; 25 u8 feature_set; 26 u8 eco_code; 27 char fw_ver[10]; 28 char build_date[15]; 29 __le32 len; 30 } __packed; 31 32 #define MT7615_PATCH_ADDRESS 0x80000 33 #define MT7622_PATCH_ADDRESS 0x9c000 34 35 #define N9_REGION_NUM 2 36 #define CR4_REGION_NUM 1 37 38 #define IMG_CRC_LEN 4 39 40 #define FW_FEATURE_SET_ENCRYPT BIT(0) 41 #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 42 43 #define DL_MODE_ENCRYPT BIT(0) 44 #define DL_MODE_KEY_IDX GENMASK(2, 1) 45 #define DL_MODE_RESET_SEC_IV BIT(3) 46 #define DL_MODE_WORKING_PDA_CR4 BIT(4) 47 #define DL_MODE_NEED_RSP BIT(31) 48 49 #define FW_START_OVERRIDE BIT(0) 50 #define FW_START_WORKING_PDA_CR4 BIT(2) 51 52 static int __mt7615_mcu_msg_send(struct mt7615_dev *dev, struct sk_buff *skb, 53 int cmd, int *wait_seq) 54 { 55 struct mt7615_mcu_txd *mcu_txd; 56 u8 seq, q_idx, pkt_fmt; 57 enum mt76_txq_id qid; 58 u32 val; 59 __le32 *txd; 60 61 seq = ++dev->mt76.mcu.msg_seq & 0xf; 62 if (!seq) 63 seq = ++dev->mt76.mcu.msg_seq & 0xf; 64 65 mcu_txd = (struct mt7615_mcu_txd *)skb_push(skb, 66 sizeof(struct mt7615_mcu_txd)); 67 memset(mcu_txd, 0, sizeof(struct mt7615_mcu_txd)); 68 69 if (cmd != -MCU_CMD_FW_SCATTER) { 70 q_idx = MT_TX_MCU_PORT_RX_Q0; 71 pkt_fmt = MT_TX_TYPE_CMD; 72 } else { 73 q_idx = MT_TX_MCU_PORT_RX_FWDL; 74 pkt_fmt = MT_TX_TYPE_FW; 75 } 76 77 txd = mcu_txd->txd; 78 79 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 80 FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_MCU) | 81 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 82 txd[0] = cpu_to_le32(val); 83 84 val = MT_TXD1_LONG_FORMAT | 85 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD) | 86 FIELD_PREP(MT_TXD1_PKT_FMT, pkt_fmt); 87 txd[1] = cpu_to_le32(val); 88 89 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 90 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, q_idx)); 91 mcu_txd->pkt_type = MCU_PKT_ID; 92 mcu_txd->seq = seq; 93 94 if (cmd < 0) { 95 mcu_txd->set_query = MCU_Q_NA; 96 mcu_txd->cid = -cmd; 97 } else { 98 mcu_txd->cid = MCU_CMD_EXT_CID; 99 mcu_txd->set_query = MCU_Q_SET; 100 mcu_txd->ext_cid = cmd; 101 mcu_txd->ext_cid_ack = 1; 102 } 103 mcu_txd->s2d_index = MCU_S2D_H2N; 104 105 if (wait_seq) 106 *wait_seq = seq; 107 108 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 109 qid = MT_TXQ_MCU; 110 else 111 qid = MT_TXQ_FWDL; 112 113 return mt76_tx_queue_skb_raw(dev, qid, skb, 0); 114 } 115 116 static int 117 mt7615_mcu_parse_response(struct mt7615_dev *dev, int cmd, 118 struct sk_buff *skb, int seq) 119 { 120 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 121 int ret = 0; 122 123 if (seq != rxd->seq) 124 return -EAGAIN; 125 126 switch (cmd) { 127 case -MCU_CMD_PATCH_SEM_CONTROL: 128 skb_pull(skb, sizeof(*rxd) - 4); 129 ret = *skb->data; 130 break; 131 case MCU_EXT_CMD_GET_TEMP: 132 skb_pull(skb, sizeof(*rxd)); 133 ret = le32_to_cpu(*(__le32 *)skb->data); 134 break; 135 default: 136 break; 137 } 138 dev_kfree_skb(skb); 139 140 return ret; 141 } 142 143 static int 144 mt7615_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data, 145 int len, bool wait_resp) 146 { 147 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 148 unsigned long expires = jiffies + 20 * HZ; 149 struct sk_buff *skb; 150 int ret, seq; 151 152 skb = mt7615_mcu_msg_alloc(data, len); 153 if (!skb) 154 return -ENOMEM; 155 156 mutex_lock(&mdev->mcu.mutex); 157 158 ret = __mt7615_mcu_msg_send(dev, skb, cmd, &seq); 159 if (ret) 160 goto out; 161 162 while (wait_resp) { 163 skb = mt76_mcu_get_response(mdev, expires); 164 if (!skb) { 165 dev_err(mdev->dev, "Message %d (seq %d) timeout\n", 166 cmd, seq); 167 ret = -ETIMEDOUT; 168 break; 169 } 170 171 ret = mt7615_mcu_parse_response(dev, cmd, skb, seq); 172 if (ret != -EAGAIN) 173 break; 174 } 175 176 out: 177 mutex_unlock(&mdev->mcu.mutex); 178 179 return ret; 180 } 181 182 static void 183 mt7615_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 184 { 185 if (vif->csa_active) 186 ieee80211_csa_finish(vif); 187 } 188 189 static void 190 mt7615_mcu_rx_radar_detected(struct mt7615_dev *dev, struct sk_buff *skb) 191 { 192 struct mt76_phy *mphy = &dev->mt76.phy; 193 struct mt7615_mcu_rdd_report *r; 194 195 r = (struct mt7615_mcu_rdd_report *)skb->data; 196 197 if (r->idx && dev->mt76.phy2) 198 mphy = dev->mt76.phy2; 199 200 ieee80211_radar_detected(mphy->hw); 201 dev->hw_pattern++; 202 } 203 204 static void 205 mt7615_mcu_rx_log_message(struct mt7615_dev *dev, struct sk_buff *skb) 206 { 207 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 208 const char *data = (char *)&rxd[1]; 209 const char *type; 210 211 switch (rxd->s2d_index) { 212 case 0: 213 type = "N9"; 214 break; 215 case 2: 216 type = "CR4"; 217 break; 218 default: 219 type = "unknown"; 220 break; 221 } 222 223 wiphy_info(mt76_hw(dev)->wiphy, "%s: %s", type, data); 224 } 225 226 static void 227 mt7615_mcu_rx_ext_event(struct mt7615_dev *dev, struct sk_buff *skb) 228 { 229 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 230 231 switch (rxd->ext_eid) { 232 case MCU_EXT_EVENT_RDD_REPORT: 233 mt7615_mcu_rx_radar_detected(dev, skb); 234 break; 235 case MCU_EXT_EVENT_CSA_NOTIFY: 236 ieee80211_iterate_active_interfaces_atomic(dev->mt76.hw, 237 IEEE80211_IFACE_ITER_RESUME_ALL, 238 mt7615_mcu_csa_finish, dev); 239 break; 240 case MCU_EXT_EVENT_FW_LOG_2_HOST: 241 mt7615_mcu_rx_log_message(dev, skb); 242 break; 243 default: 244 break; 245 } 246 } 247 248 static void 249 mt7615_mcu_rx_unsolicited_event(struct mt7615_dev *dev, struct sk_buff *skb) 250 { 251 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 252 253 switch (rxd->eid) { 254 case MCU_EVENT_EXT: 255 mt7615_mcu_rx_ext_event(dev, skb); 256 break; 257 default: 258 break; 259 } 260 dev_kfree_skb(skb); 261 } 262 263 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb) 264 { 265 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 266 267 if (rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT || 268 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 269 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP || 270 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || 271 !rxd->seq) 272 mt7615_mcu_rx_unsolicited_event(dev, skb); 273 else 274 mt76_mcu_rx_event(&dev->mt76, skb); 275 } 276 277 static int mt7615_mcu_init_download(struct mt7615_dev *dev, u32 addr, 278 u32 len, u32 mode) 279 { 280 struct { 281 __le32 addr; 282 __le32 len; 283 __le32 mode; 284 } req = { 285 .addr = cpu_to_le32(addr), 286 .len = cpu_to_le32(len), 287 .mode = cpu_to_le32(mode), 288 }; 289 290 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_TARGET_ADDRESS_LEN_REQ, 291 &req, sizeof(req), true); 292 } 293 294 static int mt7615_mcu_send_firmware(struct mt7615_dev *dev, const void *data, 295 int len) 296 { 297 int ret = 0, cur_len; 298 299 while (len > 0) { 300 cur_len = min_t(int, 4096 - sizeof(struct mt7615_mcu_txd), 301 len); 302 303 ret = __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_FW_SCATTER, 304 data, cur_len, false); 305 if (ret) 306 break; 307 308 data += cur_len; 309 len -= cur_len; 310 mt76_queue_tx_cleanup(dev, MT_TXQ_FWDL, false); 311 } 312 313 return ret; 314 } 315 316 static int mt7615_mcu_start_firmware(struct mt7615_dev *dev, u32 addr, 317 u32 option) 318 { 319 struct { 320 __le32 option; 321 __le32 addr; 322 } req = { 323 .option = cpu_to_le32(option), 324 .addr = cpu_to_le32(addr), 325 }; 326 327 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_FW_START_REQ, 328 &req, sizeof(req), true); 329 } 330 331 static int mt7615_mcu_restart(struct mt76_dev *dev) 332 { 333 return __mt76_mcu_send_msg(dev, -MCU_CMD_RESTART_DL_REQ, NULL, 334 0, true); 335 } 336 337 static int mt7615_mcu_patch_sem_ctrl(struct mt7615_dev *dev, bool get) 338 { 339 struct { 340 __le32 op; 341 } req = { 342 .op = cpu_to_le32(get ? PATCH_SEM_GET : PATCH_SEM_RELEASE), 343 }; 344 345 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_PATCH_SEM_CONTROL, 346 &req, sizeof(req), true); 347 } 348 349 static int mt7615_mcu_start_patch(struct mt7615_dev *dev) 350 { 351 struct { 352 u8 check_crc; 353 u8 reserved[3]; 354 } req = { 355 .check_crc = 0, 356 }; 357 358 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_PATCH_FINISH_REQ, 359 &req, sizeof(req), true); 360 } 361 362 static void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en) 363 { 364 if (!is_mt7622(&dev->mt76)) 365 return; 366 367 regmap_update_bits(dev->infracfg, MT_INFRACFG_MISC, 368 MT_INFRACFG_MISC_AP2CONN_WAKE, 369 !en * MT_INFRACFG_MISC_AP2CONN_WAKE); 370 } 371 372 static int mt7615_driver_own(struct mt7615_dev *dev) 373 { 374 mt76_wr(dev, MT_CFG_LPCR_HOST, MT_CFG_LPCR_HOST_DRV_OWN); 375 376 mt7622_trigger_hif_int(dev, true); 377 if (!mt76_poll_msec(dev, MT_CFG_LPCR_HOST, 378 MT_CFG_LPCR_HOST_FW_OWN, 0, 3000)) { 379 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 380 return -EIO; 381 } 382 mt7622_trigger_hif_int(dev, false); 383 384 return 0; 385 } 386 387 static int mt7615_firmware_own(struct mt7615_dev *dev) 388 { 389 mt7622_trigger_hif_int(dev, true); 390 391 mt76_wr(dev, MT_CFG_LPCR_HOST, MT_CFG_LPCR_HOST_FW_OWN); 392 393 if (is_mt7622(&dev->mt76) && 394 !mt76_poll_msec(dev, MT_CFG_LPCR_HOST, 395 MT_CFG_LPCR_HOST_FW_OWN, 396 MT_CFG_LPCR_HOST_FW_OWN, 3000)) { 397 dev_err(dev->mt76.dev, "Timeout for firmware own\n"); 398 return -EIO; 399 } 400 mt7622_trigger_hif_int(dev, false); 401 402 return 0; 403 } 404 405 static int mt7615_load_patch(struct mt7615_dev *dev, u32 addr, const char *name) 406 { 407 const struct mt7615_patch_hdr *hdr; 408 const struct firmware *fw = NULL; 409 int len, ret, sem; 410 411 sem = mt7615_mcu_patch_sem_ctrl(dev, 1); 412 switch (sem) { 413 case PATCH_IS_DL: 414 return 0; 415 case PATCH_NOT_DL_SEM_SUCCESS: 416 break; 417 default: 418 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 419 return -EAGAIN; 420 } 421 422 ret = request_firmware(&fw, name, dev->mt76.dev); 423 if (ret) 424 goto out; 425 426 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 427 dev_err(dev->mt76.dev, "Invalid firmware\n"); 428 ret = -EINVAL; 429 goto out; 430 } 431 432 hdr = (const struct mt7615_patch_hdr *)(fw->data); 433 434 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 435 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 436 437 len = fw->size - sizeof(*hdr); 438 439 ret = mt7615_mcu_init_download(dev, addr, len, DL_MODE_NEED_RSP); 440 if (ret) { 441 dev_err(dev->mt76.dev, "Download request failed\n"); 442 goto out; 443 } 444 445 ret = mt7615_mcu_send_firmware(dev, fw->data + sizeof(*hdr), len); 446 if (ret) { 447 dev_err(dev->mt76.dev, "Failed to send firmware to device\n"); 448 goto out; 449 } 450 451 ret = mt7615_mcu_start_patch(dev); 452 if (ret) 453 dev_err(dev->mt76.dev, "Failed to start patch\n"); 454 455 out: 456 release_firmware(fw); 457 458 sem = mt7615_mcu_patch_sem_ctrl(dev, 0); 459 switch (sem) { 460 case PATCH_REL_SEM_SUCCESS: 461 break; 462 default: 463 ret = -EAGAIN; 464 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 465 break; 466 } 467 468 return ret; 469 } 470 471 static u32 mt7615_mcu_gen_dl_mode(u8 feature_set, bool is_cr4) 472 { 473 u32 ret = 0; 474 475 ret |= (feature_set & FW_FEATURE_SET_ENCRYPT) ? 476 (DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV) : 0; 477 ret |= FIELD_PREP(DL_MODE_KEY_IDX, 478 FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 479 ret |= DL_MODE_NEED_RSP; 480 ret |= is_cr4 ? DL_MODE_WORKING_PDA_CR4 : 0; 481 482 return ret; 483 } 484 485 static int 486 mt7615_mcu_send_ram_firmware(struct mt7615_dev *dev, 487 const struct mt7615_fw_trailer *hdr, 488 const u8 *data, bool is_cr4) 489 { 490 int n_region = is_cr4 ? CR4_REGION_NUM : N9_REGION_NUM; 491 int err, i, offset = 0; 492 u32 len, addr, mode; 493 494 for (i = 0; i < n_region; i++) { 495 mode = mt7615_mcu_gen_dl_mode(hdr[i].feature_set, is_cr4); 496 len = le32_to_cpu(hdr[i].len) + IMG_CRC_LEN; 497 addr = le32_to_cpu(hdr[i].addr); 498 499 err = mt7615_mcu_init_download(dev, addr, len, mode); 500 if (err) { 501 dev_err(dev->mt76.dev, "Download request failed\n"); 502 return err; 503 } 504 505 err = mt7615_mcu_send_firmware(dev, data + offset, len); 506 if (err) { 507 dev_err(dev->mt76.dev, "Failed to send firmware to device\n"); 508 return err; 509 } 510 511 offset += len; 512 } 513 514 return 0; 515 } 516 517 static int mt7615_load_n9(struct mt7615_dev *dev, const char *name) 518 { 519 const struct mt7615_fw_trailer *hdr; 520 const struct firmware *fw; 521 int ret; 522 523 ret = request_firmware(&fw, name, dev->mt76.dev); 524 if (ret) 525 return ret; 526 527 if (!fw || !fw->data || fw->size < N9_REGION_NUM * sizeof(*hdr)) { 528 dev_err(dev->mt76.dev, "Invalid firmware\n"); 529 ret = -EINVAL; 530 goto out; 531 } 532 533 hdr = (const struct mt7615_fw_trailer *)(fw->data + fw->size - 534 N9_REGION_NUM * sizeof(*hdr)); 535 536 dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n", 537 hdr->fw_ver, hdr->build_date); 538 539 ret = mt7615_mcu_send_ram_firmware(dev, hdr, fw->data, false); 540 if (ret) 541 goto out; 542 543 ret = mt7615_mcu_start_firmware(dev, le32_to_cpu(hdr->addr), 544 FW_START_OVERRIDE); 545 if (ret) { 546 dev_err(dev->mt76.dev, "Failed to start N9 firmware\n"); 547 goto out; 548 } 549 550 snprintf(dev->mt76.hw->wiphy->fw_version, 551 sizeof(dev->mt76.hw->wiphy->fw_version), 552 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 553 554 if (!strncmp(hdr->fw_ver, "2.0", sizeof(hdr->fw_ver))) 555 dev->fw_ver = MT7615_FIRMWARE_V2; 556 else 557 dev->fw_ver = MT7615_FIRMWARE_V1; 558 559 out: 560 release_firmware(fw); 561 return ret; 562 } 563 564 static int mt7615_load_cr4(struct mt7615_dev *dev, const char *name) 565 { 566 const struct mt7615_fw_trailer *hdr; 567 const struct firmware *fw; 568 int ret; 569 570 ret = request_firmware(&fw, name, dev->mt76.dev); 571 if (ret) 572 return ret; 573 574 if (!fw || !fw->data || fw->size < CR4_REGION_NUM * sizeof(*hdr)) { 575 dev_err(dev->mt76.dev, "Invalid firmware\n"); 576 ret = -EINVAL; 577 goto out; 578 } 579 580 hdr = (const struct mt7615_fw_trailer *)(fw->data + fw->size - 581 CR4_REGION_NUM * sizeof(*hdr)); 582 583 dev_info(dev->mt76.dev, "CR4 Firmware Version: %.10s, Build Time: %.15s\n", 584 hdr->fw_ver, hdr->build_date); 585 586 ret = mt7615_mcu_send_ram_firmware(dev, hdr, fw->data, true); 587 if (ret) 588 goto out; 589 590 ret = mt7615_mcu_start_firmware(dev, 0, FW_START_WORKING_PDA_CR4); 591 if (ret) { 592 dev_err(dev->mt76.dev, "Failed to start CR4 firmware\n"); 593 goto out; 594 } 595 596 out: 597 release_firmware(fw); 598 599 return ret; 600 } 601 602 static int mt7615_load_ram(struct mt7615_dev *dev) 603 { 604 int ret; 605 606 ret = mt7615_load_n9(dev, MT7615_FIRMWARE_N9); 607 if (ret) 608 return ret; 609 610 return mt7615_load_cr4(dev, MT7615_FIRMWARE_CR4); 611 } 612 613 static int mt7615_load_firmware(struct mt7615_dev *dev) 614 { 615 int ret; 616 u32 val; 617 618 val = mt76_get_field(dev, MT_TOP_MISC2, MT_TOP_MISC2_FW_STATE); 619 620 if (val != FW_STATE_FW_DOWNLOAD) { 621 dev_err(dev->mt76.dev, "Firmware is not ready for download\n"); 622 return -EIO; 623 } 624 625 ret = mt7615_load_patch(dev, MT7615_PATCH_ADDRESS, MT7615_ROM_PATCH); 626 if (ret) 627 return ret; 628 629 ret = mt7615_load_ram(dev); 630 if (ret) 631 return ret; 632 633 if (!mt76_poll_msec(dev, MT_TOP_MISC2, MT_TOP_MISC2_FW_STATE, 634 FIELD_PREP(MT_TOP_MISC2_FW_STATE, 635 FW_STATE_CR4_RDY), 500)) { 636 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 637 return -EIO; 638 } 639 640 return 0; 641 } 642 643 static int mt7622_load_firmware(struct mt7615_dev *dev) 644 { 645 int ret; 646 u32 val; 647 648 mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH); 649 650 val = mt76_get_field(dev, MT_TOP_OFF_RSV, MT_TOP_OFF_RSV_FW_STATE); 651 if (val != FW_STATE_FW_DOWNLOAD) { 652 dev_err(dev->mt76.dev, "Firmware is not ready for download\n"); 653 return -EIO; 654 } 655 656 ret = mt7615_load_patch(dev, MT7622_PATCH_ADDRESS, MT7622_ROM_PATCH); 657 if (ret) 658 return ret; 659 660 ret = mt7615_load_n9(dev, MT7622_FIRMWARE_N9); 661 if (ret) 662 return ret; 663 664 if (!mt76_poll_msec(dev, MT_TOP_OFF_RSV, MT_TOP_OFF_RSV_FW_STATE, 665 FIELD_PREP(MT_TOP_OFF_RSV_FW_STATE, 666 FW_STATE_NORMAL_TRX), 1500)) { 667 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 668 return -EIO; 669 } 670 671 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH); 672 673 return 0; 674 } 675 676 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl) 677 { 678 struct { 679 u8 ctrl_val; 680 u8 pad[3]; 681 } data = { 682 .ctrl_val = ctrl 683 }; 684 685 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_FW_LOG_2_HOST, 686 &data, sizeof(data), true); 687 } 688 689 int mt7615_mcu_init(struct mt7615_dev *dev) 690 { 691 static const struct mt76_mcu_ops mt7615_mcu_ops = { 692 .mcu_send_msg = mt7615_mcu_msg_send, 693 .mcu_restart = mt7615_mcu_restart, 694 }; 695 int ret; 696 697 dev->mt76.mcu_ops = &mt7615_mcu_ops, 698 699 ret = mt7615_driver_own(dev); 700 if (ret) 701 return ret; 702 703 if (is_mt7622(&dev->mt76)) 704 ret = mt7622_load_firmware(dev); 705 else 706 ret = mt7615_load_firmware(dev); 707 if (ret) 708 return ret; 709 710 mt76_queue_tx_cleanup(dev, MT_TXQ_FWDL, false); 711 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 712 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 713 mt7615_mcu_fw_log_2_host(dev, 0); 714 715 return 0; 716 } 717 718 void mt7615_mcu_exit(struct mt7615_dev *dev) 719 { 720 __mt76_mcu_restart(&dev->mt76); 721 mt7615_firmware_own(dev); 722 skb_queue_purge(&dev->mt76.mcu.res_q); 723 } 724 725 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev) 726 { 727 struct { 728 u8 buffer_mode; 729 u8 pad; 730 __le16 len; 731 } __packed req_hdr = { 732 .buffer_mode = 1, 733 }; 734 int ret, len, eep_len; 735 u8 *req, *eep = (u8 *)dev->mt76.eeprom.data; 736 737 if (is_mt7622(&dev->mt76)) 738 eep_len = MT7622_EE_MAX - MT_EE_NIC_CONF_0; 739 else 740 eep_len = MT7615_EE_MAX - MT_EE_NIC_CONF_0; 741 742 len = sizeof(req_hdr) + eep_len; 743 req = kzalloc(len, GFP_KERNEL); 744 if (!req) 745 return -ENOMEM; 746 747 req_hdr.len = cpu_to_le16(eep_len); 748 memcpy(req, &req_hdr, sizeof(req_hdr)); 749 memcpy(req + sizeof(req_hdr), eep + MT_EE_NIC_CONF_0, eep_len); 750 751 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EFUSE_BUFFER_MODE, 752 req, len, true); 753 kfree(req); 754 755 return ret; 756 } 757 758 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable) 759 { 760 struct { 761 u8 enable; 762 u8 band; 763 u8 rsv[2]; 764 } __packed req = { 765 .enable = enable, 766 .band = band, 767 }; 768 769 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_MAC_INIT_CTRL, 770 &req, sizeof(req), true); 771 } 772 773 int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val) 774 { 775 struct mt7615_dev *dev = phy->dev; 776 struct { 777 u8 prot_idx; 778 u8 band; 779 u8 rsv[2]; 780 __le32 len_thresh; 781 __le32 pkt_thresh; 782 } __packed req = { 783 .prot_idx = 1, 784 .band = phy != &dev->phy, 785 .len_thresh = cpu_to_le32(val), 786 .pkt_thresh = cpu_to_le32(0x2), 787 }; 788 789 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_PROTECT_CTRL, 790 &req, sizeof(req), true); 791 } 792 793 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 794 const struct ieee80211_tx_queue_params *params) 795 { 796 #define WMM_AIFS_SET BIT(0) 797 #define WMM_CW_MIN_SET BIT(1) 798 #define WMM_CW_MAX_SET BIT(2) 799 #define WMM_TXOP_SET BIT(3) 800 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 801 WMM_CW_MAX_SET | WMM_TXOP_SET) 802 struct req_data { 803 u8 number; 804 u8 rsv[3]; 805 u8 queue; 806 u8 valid; 807 u8 aifs; 808 u8 cw_min; 809 __le16 cw_max; 810 __le16 txop; 811 } __packed req = { 812 .number = 1, 813 .queue = queue, 814 .valid = WMM_PARAM_SET, 815 .aifs = params->aifs, 816 .cw_min = 5, 817 .cw_max = cpu_to_le16(10), 818 .txop = cpu_to_le16(params->txop), 819 }; 820 821 if (params->cw_min) 822 req.cw_min = fls(params->cw_min); 823 if (params->cw_max) 824 req.cw_max = cpu_to_le16(fls(params->cw_max)); 825 826 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EDCA_UPDATE, 827 &req, sizeof(req), true); 828 } 829 830 int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int enter) 831 { 832 #define ENTER_PM_STATE 1 833 #define EXIT_PM_STATE 2 834 struct { 835 u8 pm_number; 836 u8 pm_state; 837 u8 bssid[ETH_ALEN]; 838 u8 dtim_period; 839 u8 wlan_idx; 840 __le16 bcn_interval; 841 __le32 aid; 842 __le32 rx_filter; 843 u8 band_idx; 844 u8 rsv[3]; 845 __le32 feature; 846 u8 omac_idx; 847 u8 wmm_idx; 848 u8 bcn_loss_cnt; 849 u8 bcn_sp_duration; 850 } __packed req = { 851 .pm_number = 5, 852 .pm_state = (enter) ? ENTER_PM_STATE : EXIT_PM_STATE, 853 .band_idx = band, 854 }; 855 856 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_PM_STATE_CTRL, 857 &req, sizeof(req), true); 858 } 859 860 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev) 861 { 862 struct mt7615_phy *ext_phy = mt7615_ext_phy(dev); 863 struct dbdc_entry { 864 u8 type; 865 u8 index; 866 u8 band; 867 u8 _rsv; 868 }; 869 struct { 870 u8 enable; 871 u8 num; 872 u8 _rsv[2]; 873 struct dbdc_entry entry[64]; 874 } req = { 875 .enable = !!ext_phy, 876 }; 877 int i; 878 879 if (!ext_phy) 880 goto out; 881 882 #define ADD_DBDC_ENTRY(_type, _idx, _band) \ 883 do { \ 884 req.entry[req.num].type = _type; \ 885 req.entry[req.num].index = _idx; \ 886 req.entry[req.num++].band = _band; \ 887 } while (0) 888 889 for (i = 0; i < 4; i++) { 890 bool band = !!(ext_phy->omac_mask & BIT(i)); 891 892 ADD_DBDC_ENTRY(DBDC_TYPE_BSS, i, band); 893 } 894 895 for (i = 0; i < 14; i++) { 896 bool band = !!(ext_phy->omac_mask & BIT(0x11 + i)); 897 898 ADD_DBDC_ENTRY(DBDC_TYPE_MBSS, i, band); 899 } 900 901 ADD_DBDC_ENTRY(DBDC_TYPE_MU, 0, 1); 902 903 for (i = 0; i < 3; i++) 904 ADD_DBDC_ENTRY(DBDC_TYPE_BF, i, 1); 905 906 ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 0, 0); 907 ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 1, 0); 908 ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 2, 1); 909 ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 3, 1); 910 911 ADD_DBDC_ENTRY(DBDC_TYPE_MGMT, 0, 0); 912 ADD_DBDC_ENTRY(DBDC_TYPE_MGMT, 1, 1); 913 914 out: 915 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_DBDC_CTRL, 916 &req, sizeof(req), true); 917 } 918 919 int mt7615_mcu_set_dev_info(struct mt7615_dev *dev, 920 struct ieee80211_vif *vif, bool enable) 921 { 922 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 923 struct { 924 struct req_hdr { 925 u8 omac_idx; 926 u8 band_idx; 927 __le16 tlv_num; 928 u8 is_tlv_append; 929 u8 rsv[3]; 930 } __packed hdr; 931 struct req_tlv { 932 __le16 tag; 933 __le16 len; 934 u8 active; 935 u8 band_idx; 936 u8 omac_addr[ETH_ALEN]; 937 } __packed tlv; 938 } data = { 939 .hdr = { 940 .omac_idx = mvif->omac_idx, 941 .band_idx = mvif->band_idx, 942 .tlv_num = cpu_to_le16(1), 943 .is_tlv_append = 1, 944 }, 945 .tlv = { 946 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 947 .len = cpu_to_le16(sizeof(struct req_tlv)), 948 .active = enable, 949 .band_idx = mvif->band_idx, 950 }, 951 }; 952 953 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 954 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_DEV_INFO_UPDATE, 955 &data, sizeof(data), true); 956 } 957 958 static void 959 mt7615_mcu_bss_info_omac_header(struct mt7615_vif *mvif, u8 *data, 960 u32 conn_type) 961 { 962 struct bss_info_omac *hdr = (struct bss_info_omac *)data; 963 u8 idx; 964 965 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 966 hdr->tag = cpu_to_le16(BSS_INFO_OMAC); 967 hdr->len = cpu_to_le16(sizeof(struct bss_info_omac)); 968 hdr->hw_bss_idx = idx; 969 hdr->omac_idx = mvif->omac_idx; 970 hdr->band_idx = mvif->band_idx; 971 hdr->conn_type = cpu_to_le32(conn_type); 972 } 973 974 static void 975 mt7615_mcu_bss_info_basic_header(struct ieee80211_vif *vif, u8 *data, 976 u32 net_type, u8 tx_wlan_idx, 977 bool enable) 978 { 979 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 980 struct bss_info_basic *hdr = (struct bss_info_basic *)data; 981 982 hdr->tag = cpu_to_le16(BSS_INFO_BASIC); 983 hdr->len = cpu_to_le16(sizeof(struct bss_info_basic)); 984 hdr->network_type = cpu_to_le32(net_type); 985 hdr->active = enable; 986 hdr->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 987 memcpy(hdr->bssid, vif->bss_conf.bssid, ETH_ALEN); 988 hdr->wmm_idx = mvif->wmm_idx; 989 hdr->dtim_period = vif->bss_conf.dtim_period; 990 hdr->bmc_tx_wlan_idx = tx_wlan_idx; 991 } 992 993 static void 994 mt7615_mcu_bss_info_ext_header(struct mt7615_vif *mvif, u8 *data) 995 { 996 /* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ 997 #define BCN_TX_ESTIMATE_TIME (4096 + 20) 998 struct bss_info_ext_bss *hdr = (struct bss_info_ext_bss *)data; 999 int ext_bss_idx, tsf_offset; 1000 1001 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 1002 if (ext_bss_idx < 0) 1003 return; 1004 1005 hdr->tag = cpu_to_le16(BSS_INFO_EXT_BSS); 1006 hdr->len = cpu_to_le16(sizeof(struct bss_info_ext_bss)); 1007 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 1008 hdr->mbss_tsf_offset = cpu_to_le32(tsf_offset); 1009 } 1010 1011 int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, 1012 struct ieee80211_vif *vif, int en) 1013 { 1014 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1015 struct req_hdr { 1016 u8 bss_idx; 1017 u8 rsv0; 1018 __le16 tlv_num; 1019 u8 is_tlv_append; 1020 u8 rsv1[3]; 1021 } __packed; 1022 int len = sizeof(struct req_hdr) + sizeof(struct bss_info_basic); 1023 int ret, i, features = BIT(BSS_INFO_BASIC), ntlv = 1; 1024 u32 conn_type = 0, net_type = NETWORK_INFRA; 1025 u8 *buf, *data, tx_wlan_idx = 0; 1026 struct req_hdr *hdr; 1027 1028 if (en) { 1029 len += sizeof(struct bss_info_omac); 1030 features |= BIT(BSS_INFO_OMAC); 1031 if (mvif->omac_idx > EXT_BSSID_START) { 1032 len += sizeof(struct bss_info_ext_bss); 1033 features |= BIT(BSS_INFO_EXT_BSS); 1034 ntlv++; 1035 } 1036 ntlv++; 1037 } 1038 1039 switch (vif->type) { 1040 case NL80211_IFTYPE_AP: 1041 case NL80211_IFTYPE_MESH_POINT: 1042 tx_wlan_idx = mvif->sta.wcid.idx; 1043 conn_type = CONNECTION_INFRA_AP; 1044 break; 1045 case NL80211_IFTYPE_STATION: { 1046 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 1047 if (en) { 1048 struct ieee80211_sta *sta; 1049 struct mt7615_sta *msta; 1050 1051 rcu_read_lock(); 1052 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 1053 if (!sta) { 1054 rcu_read_unlock(); 1055 return -EINVAL; 1056 } 1057 1058 msta = (struct mt7615_sta *)sta->drv_priv; 1059 tx_wlan_idx = msta->wcid.idx; 1060 rcu_read_unlock(); 1061 } 1062 conn_type = CONNECTION_INFRA_STA; 1063 break; 1064 } 1065 case NL80211_IFTYPE_ADHOC: 1066 conn_type = CONNECTION_IBSS_ADHOC; 1067 tx_wlan_idx = mvif->sta.wcid.idx; 1068 net_type = NETWORK_IBSS; 1069 break; 1070 default: 1071 WARN_ON(1); 1072 break; 1073 } 1074 1075 buf = kzalloc(len, GFP_KERNEL); 1076 if (!buf) 1077 return -ENOMEM; 1078 1079 hdr = (struct req_hdr *)buf; 1080 hdr->bss_idx = mvif->idx; 1081 hdr->tlv_num = cpu_to_le16(ntlv); 1082 hdr->is_tlv_append = 1; 1083 1084 data = buf + sizeof(*hdr); 1085 for (i = 0; i < BSS_INFO_MAX_NUM; i++) { 1086 int tag = ffs(features & BIT(i)) - 1; 1087 1088 switch (tag) { 1089 case BSS_INFO_OMAC: 1090 mt7615_mcu_bss_info_omac_header(mvif, data, 1091 conn_type); 1092 data += sizeof(struct bss_info_omac); 1093 break; 1094 case BSS_INFO_BASIC: 1095 mt7615_mcu_bss_info_basic_header(vif, data, net_type, 1096 tx_wlan_idx, en); 1097 data += sizeof(struct bss_info_basic); 1098 break; 1099 case BSS_INFO_EXT_BSS: 1100 mt7615_mcu_bss_info_ext_header(mvif, data); 1101 data += sizeof(struct bss_info_ext_bss); 1102 break; 1103 default: 1104 break; 1105 } 1106 } 1107 1108 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BSS_INFO_UPDATE, 1109 buf, len, true); 1110 kfree(buf); 1111 1112 return ret; 1113 } 1114 1115 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev) 1116 { 1117 struct wtbl_req_hdr req = { 1118 .operation = WTBL_RESET_ALL, 1119 }; 1120 1121 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1122 &req, sizeof(req), true); 1123 } 1124 1125 static int 1126 mt7615_mcu_send_sta_rec(struct mt7615_dev *dev, u8 *req, u8 *wreq, 1127 u8 wlen, bool enable) 1128 { 1129 bool is_v1 = (dev->fw_ver == MT7615_FIRMWARE_V1); 1130 u32 slen = is_v1 ? wreq - req : wreq - req + wlen; 1131 int ret; 1132 1133 if (is_v1 && !enable) { 1134 ret = __mt76_mcu_send_msg(&dev->mt76, 1135 MCU_EXT_CMD_STA_REC_UPDATE, 1136 req, slen, true); 1137 if (ret) 1138 return ret; 1139 1140 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1141 wreq, wlen, true); 1142 } 1143 1144 if (is_v1) { 1145 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1146 wreq, wlen, true); 1147 if (ret) 1148 return ret; 1149 } 1150 1151 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 1152 req, slen, true); 1153 } 1154 1155 int mt7615_mcu_set_bmc(struct mt7615_dev *dev, 1156 struct ieee80211_vif *vif, bool en) 1157 { 1158 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1159 struct { 1160 struct sta_req_hdr hdr; 1161 struct sta_rec_basic basic; 1162 u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 1163 } __packed req = { 1164 .hdr = { 1165 .bss_idx = mvif->idx, 1166 .wlan_idx = mvif->sta.wcid.idx, 1167 .tlv_num = cpu_to_le16(1), 1168 .is_tlv_append = 1, 1169 .muar_idx = mvif->omac_idx, 1170 }, 1171 .basic = { 1172 .tag = cpu_to_le16(STA_REC_BASIC), 1173 .len = cpu_to_le16(sizeof(struct sta_rec_basic)), 1174 .conn_type = cpu_to_le32(CONNECTION_INFRA_BC), 1175 }, 1176 }; 1177 struct sta_rec_wtbl *wtbl = NULL; 1178 struct wtbl_req_hdr *wtbl_hdr; 1179 struct wtbl_generic *wtbl_g; 1180 struct wtbl_rx *wtbl_rx; 1181 u8 *buf = req.buf; 1182 1183 eth_broadcast_addr(req.basic.peer_addr); 1184 1185 if (dev->fw_ver > MT7615_FIRMWARE_V1) { 1186 req.hdr.tlv_num = cpu_to_le16(2); 1187 wtbl = (struct sta_rec_wtbl *)buf; 1188 wtbl->tag = cpu_to_le16(STA_REC_WTBL); 1189 buf += sizeof(*wtbl); 1190 } 1191 1192 wtbl_hdr = (struct wtbl_req_hdr *)buf; 1193 buf += sizeof(*wtbl_hdr); 1194 wtbl_hdr->wlan_idx = mvif->sta.wcid.idx; 1195 wtbl_hdr->operation = WTBL_RESET_AND_SET; 1196 1197 if (en) { 1198 req.basic.conn_state = CONN_STATE_PORT_SECURE; 1199 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER | 1200 EXTRA_INFO_NEW); 1201 } else { 1202 req.basic.conn_state = CONN_STATE_DISCONNECT; 1203 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER); 1204 goto out; 1205 } 1206 1207 wtbl_g = (struct wtbl_generic *)buf; 1208 buf += sizeof(*wtbl_g); 1209 wtbl_g->tag = cpu_to_le16(WTBL_GENERIC); 1210 wtbl_g->len = cpu_to_le16(sizeof(*wtbl_g)); 1211 wtbl_g->muar_idx = 0xe; 1212 eth_broadcast_addr(wtbl_g->peer_addr); 1213 1214 wtbl_rx = (struct wtbl_rx *)buf; 1215 buf += sizeof(*wtbl_rx); 1216 wtbl_rx->tag = cpu_to_le16(WTBL_RX); 1217 wtbl_rx->len = cpu_to_le16(sizeof(*wtbl_rx)); 1218 wtbl_rx->rv = 1; 1219 wtbl_rx->rca1 = 1; 1220 wtbl_rx->rca2 = 1; 1221 1222 wtbl_hdr->tlv_num = cpu_to_le16(2); 1223 1224 out: 1225 if (wtbl) 1226 wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 1227 1228 return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 1229 buf - (u8 *)wtbl_hdr, en); 1230 } 1231 1232 int mt7615_mcu_set_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1233 struct ieee80211_sta *sta, bool en) 1234 { 1235 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1236 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 1237 1238 struct { 1239 struct sta_req_hdr hdr; 1240 struct sta_rec_basic basic; 1241 u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 1242 } __packed req = { 1243 .hdr = { 1244 .bss_idx = mvif->idx, 1245 .wlan_idx = msta->wcid.idx, 1246 .is_tlv_append = 1, 1247 .muar_idx = mvif->omac_idx, 1248 }, 1249 .basic = { 1250 .tag = cpu_to_le16(STA_REC_BASIC), 1251 .len = cpu_to_le16(sizeof(struct sta_rec_basic)), 1252 .qos = sta->wme, 1253 .aid = cpu_to_le16(sta->aid), 1254 }, 1255 }; 1256 struct sta_rec_wtbl *wtbl = NULL; 1257 struct wtbl_req_hdr *wtbl_hdr; 1258 struct wtbl_generic *wtbl_g; 1259 struct wtbl_rx *wtbl_rx; 1260 u8 *buf = req.buf; 1261 u8 wtlv = 0, stlv = 1; 1262 1263 memcpy(req.basic.peer_addr, sta->addr, ETH_ALEN); 1264 1265 switch (vif->type) { 1266 case NL80211_IFTYPE_AP: 1267 case NL80211_IFTYPE_MESH_POINT: 1268 req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 1269 break; 1270 case NL80211_IFTYPE_STATION: 1271 req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 1272 break; 1273 case NL80211_IFTYPE_ADHOC: 1274 req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1275 break; 1276 default: 1277 WARN_ON(1); 1278 break; 1279 } 1280 1281 if (en) { 1282 req.basic.conn_state = CONN_STATE_PORT_SECURE; 1283 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER | 1284 EXTRA_INFO_NEW); 1285 1286 /* sta_rec ht */ 1287 if (sta->ht_cap.ht_supported) { 1288 struct sta_rec_ht *sta_ht; 1289 1290 sta_ht = (struct sta_rec_ht *)buf; 1291 buf += sizeof(*sta_ht); 1292 sta_ht->tag = cpu_to_le16(STA_REC_HT); 1293 sta_ht->len = cpu_to_le16(sizeof(*sta_ht)); 1294 sta_ht->ht_cap = cpu_to_le16(sta->ht_cap.cap); 1295 stlv++; 1296 1297 /* sta_rec vht */ 1298 if (sta->vht_cap.vht_supported) { 1299 struct sta_rec_vht *sta_vht; 1300 1301 sta_vht = (struct sta_rec_vht *)buf; 1302 buf += sizeof(*sta_vht); 1303 sta_vht->tag = cpu_to_le16(STA_REC_VHT); 1304 sta_vht->len = cpu_to_le16(sizeof(*sta_vht)); 1305 sta_vht->vht_cap = 1306 cpu_to_le32(sta->vht_cap.cap); 1307 sta_vht->vht_rx_mcs_map = 1308 sta->vht_cap.vht_mcs.rx_mcs_map; 1309 sta_vht->vht_tx_mcs_map = 1310 sta->vht_cap.vht_mcs.tx_mcs_map; 1311 stlv++; 1312 } 1313 } 1314 } else { 1315 req.basic.conn_state = CONN_STATE_DISCONNECT; 1316 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER); 1317 } 1318 1319 /* wtbl */ 1320 if (dev->fw_ver > MT7615_FIRMWARE_V1) { 1321 wtbl = (struct sta_rec_wtbl *)buf; 1322 wtbl->tag = cpu_to_le16(STA_REC_WTBL); 1323 buf += sizeof(*wtbl); 1324 stlv++; 1325 } 1326 1327 wtbl_hdr = (struct wtbl_req_hdr *)buf; 1328 buf += sizeof(*wtbl_hdr); 1329 wtbl_hdr->wlan_idx = msta->wcid.idx; 1330 wtbl_hdr->operation = WTBL_RESET_AND_SET; 1331 1332 if (!en) 1333 goto out; 1334 1335 wtbl_g = (struct wtbl_generic *)buf; 1336 buf += sizeof(*wtbl_g); 1337 wtbl_g->tag = cpu_to_le16(WTBL_GENERIC); 1338 wtbl_g->len = cpu_to_le16(sizeof(*wtbl_g)); 1339 wtbl_g->muar_idx = mvif->omac_idx; 1340 wtbl_g->qos = sta->wme; 1341 wtbl_g->partial_aid = cpu_to_le16(sta->aid); 1342 memcpy(wtbl_g->peer_addr, sta->addr, ETH_ALEN); 1343 wtlv++; 1344 1345 wtbl_rx = (struct wtbl_rx *)buf; 1346 buf += sizeof(*wtbl_rx); 1347 wtbl_rx->tag = cpu_to_le16(WTBL_RX); 1348 wtbl_rx->len = cpu_to_le16(sizeof(*wtbl_rx)); 1349 wtbl_rx->rv = 1; 1350 wtbl_rx->rca1 = vif->type != NL80211_IFTYPE_AP; 1351 wtbl_rx->rca2 = 1; 1352 wtlv++; 1353 1354 /* wtbl ht */ 1355 if (sta->ht_cap.ht_supported) { 1356 struct wtbl_ht *wtbl_ht; 1357 struct wtbl_raw *wtbl_raw; 1358 u32 val = 0, msk; 1359 1360 wtbl_ht = (struct wtbl_ht *)buf; 1361 buf += sizeof(*wtbl_ht); 1362 wtbl_ht->tag = cpu_to_le16(WTBL_HT); 1363 wtbl_ht->len = cpu_to_le16(sizeof(*wtbl_ht)); 1364 wtbl_ht->ht = 1; 1365 wtbl_ht->ldpc = sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING; 1366 wtbl_ht->af = sta->ht_cap.ampdu_factor; 1367 wtbl_ht->mm = sta->ht_cap.ampdu_density; 1368 wtlv++; 1369 1370 /* wtbl vht */ 1371 if (sta->vht_cap.vht_supported) { 1372 struct wtbl_vht *wtbl_vht; 1373 1374 wtbl_vht = (struct wtbl_vht *)buf; 1375 buf += sizeof(*wtbl_vht); 1376 wtbl_vht->tag = cpu_to_le16(WTBL_VHT); 1377 wtbl_vht->len = cpu_to_le16(sizeof(*wtbl_vht)); 1378 wtbl_vht->vht = 1; 1379 wtbl_vht->ldpc = sta->vht_cap.cap & 1380 IEEE80211_VHT_CAP_RXLDPC; 1381 wtlv++; 1382 1383 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1384 val |= MT_WTBL_W5_SHORT_GI_80; 1385 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1386 val |= MT_WTBL_W5_SHORT_GI_160; 1387 } 1388 1389 /* wtbl smps */ 1390 if (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) { 1391 struct wtbl_smps *wtbl_smps; 1392 1393 wtbl_smps = (struct wtbl_smps *)buf; 1394 buf += sizeof(*wtbl_smps); 1395 wtbl_smps->tag = cpu_to_le16(WTBL_SMPS); 1396 wtbl_smps->len = cpu_to_le16(sizeof(*wtbl_smps)); 1397 wtbl_smps->smps = 1; 1398 wtlv++; 1399 } 1400 1401 /* sgi */ 1402 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 1403 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 1404 1405 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1406 val |= MT_WTBL_W5_SHORT_GI_20; 1407 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1408 val |= MT_WTBL_W5_SHORT_GI_40; 1409 1410 wtbl_raw = (struct wtbl_raw *)buf; 1411 buf += sizeof(*wtbl_raw); 1412 wtbl_raw->tag = cpu_to_le16(WTBL_RAW_DATA); 1413 wtbl_raw->len = cpu_to_le16(sizeof(*wtbl_raw)); 1414 wtbl_raw->wtbl_idx = 1; 1415 wtbl_raw->dw = 5; 1416 wtbl_raw->msk = cpu_to_le32(~msk); 1417 wtbl_raw->val = cpu_to_le32(val); 1418 wtlv++; 1419 } 1420 1421 out: 1422 if (wtbl) 1423 wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 1424 1425 wtbl_hdr->tlv_num = cpu_to_le16(wtlv); 1426 req.hdr.tlv_num = cpu_to_le16(stlv); 1427 1428 return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 1429 buf - (u8 *)wtbl_hdr, en); 1430 } 1431 1432 int mt7615_mcu_set_bcn(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1433 int en) 1434 { 1435 struct mt7615_dev *dev = mt7615_hw_dev(hw); 1436 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1437 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1438 struct ieee80211_mutable_offsets offs; 1439 struct ieee80211_tx_info *info; 1440 struct req { 1441 u8 omac_idx; 1442 u8 enable; 1443 u8 wlan_idx; 1444 u8 band_idx; 1445 u8 pkt_type; 1446 u8 need_pre_tbtt_int; 1447 __le16 csa_ie_pos; 1448 __le16 pkt_len; 1449 __le16 tim_ie_pos; 1450 u8 pkt[512]; 1451 u8 csa_cnt; 1452 /* bss color change */ 1453 u8 bcc_cnt; 1454 __le16 bcc_ie_pos; 1455 } __packed req = { 1456 .omac_idx = mvif->omac_idx, 1457 .enable = en, 1458 .wlan_idx = wcid->idx, 1459 .band_idx = mvif->band_idx, 1460 }; 1461 struct sk_buff *skb; 1462 1463 skb = ieee80211_beacon_get_template(hw, vif, &offs); 1464 if (!skb) 1465 return -EINVAL; 1466 1467 if (skb->len > 512 - MT_TXD_SIZE) { 1468 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 1469 dev_kfree_skb(skb); 1470 return -EINVAL; 1471 } 1472 1473 if (mvif->band_idx) { 1474 info = IEEE80211_SKB_CB(skb); 1475 info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY; 1476 } 1477 1478 mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL, 1479 0, NULL); 1480 memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len); 1481 req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 1482 req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); 1483 if (offs.csa_counter_offs[0]) { 1484 u16 csa_offs; 1485 1486 csa_offs = MT_TXD_SIZE + offs.csa_counter_offs[0] - 4; 1487 req.csa_ie_pos = cpu_to_le16(csa_offs); 1488 req.csa_cnt = skb->data[offs.csa_counter_offs[0]]; 1489 } 1490 dev_kfree_skb(skb); 1491 1492 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BCN_OFFLOAD, 1493 &req, sizeof(req), true); 1494 } 1495 1496 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, 1497 enum mt7615_rdd_cmd cmd, u8 index, 1498 u8 rx_sel, u8 val) 1499 { 1500 struct { 1501 u8 ctrl; 1502 u8 rdd_idx; 1503 u8 rdd_rx_sel; 1504 u8 val; 1505 u8 rsv[4]; 1506 } req = { 1507 .ctrl = cmd, 1508 .rdd_idx = index, 1509 .rdd_rx_sel = rx_sel, 1510 .val = val, 1511 }; 1512 1513 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_CTRL, 1514 &req, sizeof(req), true); 1515 } 1516 1517 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val) 1518 { 1519 struct { 1520 u16 tag; 1521 u16 min_lpn; 1522 } req = { 1523 .tag = 0x1, 1524 .min_lpn = val, 1525 }; 1526 1527 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, 1528 &req, sizeof(req), true); 1529 } 1530 1531 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev, 1532 const struct mt7615_dfs_pulse *pulse) 1533 { 1534 struct { 1535 u16 tag; 1536 struct mt7615_dfs_pulse pulse; 1537 } req = { 1538 .tag = 0x3, 1539 }; 1540 1541 memcpy(&req.pulse, pulse, sizeof(*pulse)); 1542 1543 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, 1544 &req, sizeof(req), true); 1545 } 1546 1547 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index, 1548 const struct mt7615_dfs_pattern *pattern) 1549 { 1550 struct { 1551 u16 tag; 1552 u16 radar_type; 1553 struct mt7615_dfs_pattern pattern; 1554 } req = { 1555 .tag = 0x2, 1556 .radar_type = index, 1557 }; 1558 1559 memcpy(&req.pattern, pattern, sizeof(*pattern)); 1560 1561 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, 1562 &req, sizeof(req), true); 1563 } 1564 1565 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev) 1566 { 1567 struct { 1568 u8 pulse_num; 1569 u8 rsv[3]; 1570 struct { 1571 u32 start_time; 1572 u16 width; 1573 s16 power; 1574 } pattern[32]; 1575 } req = { 1576 .pulse_num = dev->radar_pattern.n_pulses, 1577 }; 1578 u32 start_time = ktime_to_ms(ktime_get_boottime()); 1579 int i; 1580 1581 if (dev->radar_pattern.n_pulses > ARRAY_SIZE(req.pattern)) 1582 return -EINVAL; 1583 1584 /* TODO: add some noise here */ 1585 for (i = 0; i < dev->radar_pattern.n_pulses; i++) { 1586 req.pattern[i].width = dev->radar_pattern.width; 1587 req.pattern[i].power = dev->radar_pattern.power; 1588 req.pattern[i].start_time = start_time + 1589 i * dev->radar_pattern.period; 1590 } 1591 1592 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_PATTERN, 1593 &req, sizeof(req), false); 1594 } 1595 1596 static void mt7615_mcu_set_txpower_sku(struct mt7615_phy *phy, u8 *sku) 1597 { 1598 struct mt76_phy *mphy = phy->mt76; 1599 struct ieee80211_hw *hw = mphy->hw; 1600 int n_chains = hweight8(mphy->antenna_mask); 1601 int tx_power; 1602 int i; 1603 1604 tx_power = hw->conf.power_level * 2 - 1605 mt76_tx_power_nss_delta(n_chains); 1606 mphy->txpower_cur = tx_power; 1607 1608 for (i = 0; i < MT_SKU_1SS_DELTA; i++) 1609 sku[i] = tx_power; 1610 1611 for (i = 0; i < 4; i++) { 1612 int delta = 0; 1613 1614 if (i < n_chains - 1) 1615 delta = mt76_tx_power_nss_delta(n_chains) - 1616 mt76_tx_power_nss_delta(i + 1); 1617 sku[MT_SKU_1SS_DELTA + i] = delta; 1618 } 1619 } 1620 1621 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd) 1622 { 1623 struct mt7615_dev *dev = phy->dev; 1624 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 1625 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2; 1626 struct { 1627 u8 control_chan; 1628 u8 center_chan; 1629 u8 bw; 1630 u8 tx_streams; 1631 u8 rx_streams_mask; 1632 u8 switch_reason; 1633 u8 band_idx; 1634 /* for 80+80 only */ 1635 u8 center_chan2; 1636 __le16 cac_case; 1637 u8 channel_band; 1638 u8 rsv0; 1639 __le32 outband_freq; 1640 u8 txpower_drop; 1641 u8 rsv1[3]; 1642 u8 txpower_sku[53]; 1643 u8 rsv2[3]; 1644 } req = { 1645 .control_chan = chandef->chan->hw_value, 1646 .center_chan = ieee80211_frequency_to_channel(freq1), 1647 .tx_streams = hweight8(phy->mt76->antenna_mask), 1648 .rx_streams_mask = phy->chainmask, 1649 .center_chan2 = ieee80211_frequency_to_channel(freq2), 1650 }; 1651 1652 if (dev->mt76.hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 1653 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 1654 else if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && 1655 chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) 1656 req.switch_reason = CH_SWITCH_DFS; 1657 else 1658 req.switch_reason = CH_SWITCH_NORMAL; 1659 1660 req.band_idx = phy != &dev->phy; 1661 1662 switch (chandef->width) { 1663 case NL80211_CHAN_WIDTH_40: 1664 req.bw = CMD_CBW_40MHZ; 1665 break; 1666 case NL80211_CHAN_WIDTH_80: 1667 req.bw = CMD_CBW_80MHZ; 1668 break; 1669 case NL80211_CHAN_WIDTH_80P80: 1670 req.bw = CMD_CBW_8080MHZ; 1671 break; 1672 case NL80211_CHAN_WIDTH_160: 1673 req.bw = CMD_CBW_160MHZ; 1674 break; 1675 case NL80211_CHAN_WIDTH_5: 1676 req.bw = CMD_CBW_5MHZ; 1677 break; 1678 case NL80211_CHAN_WIDTH_10: 1679 req.bw = CMD_CBW_10MHZ; 1680 break; 1681 case NL80211_CHAN_WIDTH_20_NOHT: 1682 case NL80211_CHAN_WIDTH_20: 1683 default: 1684 req.bw = CMD_CBW_20MHZ; 1685 break; 1686 } 1687 1688 mt7615_mcu_set_txpower_sku(phy, req.txpower_sku); 1689 1690 return __mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true); 1691 } 1692 1693 int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev, 1694 struct ieee80211_ampdu_params *params, 1695 bool add) 1696 { 1697 struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 1698 struct mt7615_vif *mvif = msta->vif; 1699 struct { 1700 struct sta_req_hdr hdr; 1701 struct sta_rec_ba ba; 1702 u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 1703 } __packed req = { 1704 .hdr = { 1705 .bss_idx = mvif->idx, 1706 .wlan_idx = msta->wcid.idx, 1707 .tlv_num = cpu_to_le16(1), 1708 .is_tlv_append = 1, 1709 .muar_idx = mvif->omac_idx, 1710 }, 1711 .ba = { 1712 .tag = cpu_to_le16(STA_REC_BA), 1713 .len = cpu_to_le16(sizeof(struct sta_rec_ba)), 1714 .tid = params->tid, 1715 .ba_type = MT_BA_TYPE_ORIGINATOR, 1716 .amsdu = params->amsdu, 1717 .ba_en = add << params->tid, 1718 .ssn = cpu_to_le16(params->ssn), 1719 .winsize = cpu_to_le16(params->buf_size), 1720 }, 1721 }; 1722 struct sta_rec_wtbl *wtbl = NULL; 1723 struct wtbl_req_hdr *wtbl_hdr; 1724 struct wtbl_ba *wtbl_ba; 1725 u8 *buf = req.buf; 1726 1727 if (dev->fw_ver > MT7615_FIRMWARE_V1) { 1728 req.hdr.tlv_num = cpu_to_le16(2); 1729 wtbl = (struct sta_rec_wtbl *)buf; 1730 wtbl->tag = cpu_to_le16(STA_REC_WTBL); 1731 buf += sizeof(*wtbl); 1732 } 1733 1734 wtbl_hdr = (struct wtbl_req_hdr *)buf; 1735 buf += sizeof(*wtbl_hdr); 1736 wtbl_hdr->wlan_idx = msta->wcid.idx; 1737 wtbl_hdr->operation = WTBL_SET; 1738 wtbl_hdr->tlv_num = cpu_to_le16(1); 1739 1740 wtbl_ba = (struct wtbl_ba *)buf; 1741 buf += sizeof(*wtbl_ba); 1742 wtbl_ba->tag = cpu_to_le16(WTBL_BA); 1743 wtbl_ba->len = cpu_to_le16(sizeof(*wtbl_ba)); 1744 wtbl_ba->tid = params->tid; 1745 wtbl_ba->ba_type = MT_BA_TYPE_ORIGINATOR; 1746 wtbl_ba->sn = add ? cpu_to_le16(params->ssn) : 0; 1747 wtbl_ba->ba_en = add; 1748 1749 if (add) { 1750 u8 idx, ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 1751 1752 for (idx = 7; idx > 0; idx--) { 1753 if (params->buf_size >= ba_range[idx]) 1754 break; 1755 } 1756 1757 wtbl_ba->ba_winsize_idx = idx; 1758 } 1759 1760 if (wtbl) 1761 wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 1762 1763 return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 1764 buf - (u8 *)wtbl_hdr, true); 1765 } 1766 1767 int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev, 1768 struct ieee80211_ampdu_params *params, 1769 bool add) 1770 { 1771 struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 1772 struct mt7615_vif *mvif = msta->vif; 1773 struct { 1774 struct sta_req_hdr hdr; 1775 struct sta_rec_ba ba; 1776 u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 1777 } __packed req = { 1778 .hdr = { 1779 .bss_idx = mvif->idx, 1780 .wlan_idx = msta->wcid.idx, 1781 .tlv_num = cpu_to_le16(1), 1782 .is_tlv_append = 1, 1783 .muar_idx = mvif->omac_idx, 1784 }, 1785 .ba = { 1786 .tag = cpu_to_le16(STA_REC_BA), 1787 .len = cpu_to_le16(sizeof(struct sta_rec_ba)), 1788 .tid = params->tid, 1789 .ba_type = MT_BA_TYPE_RECIPIENT, 1790 .amsdu = params->amsdu, 1791 .ba_en = add << params->tid, 1792 .ssn = cpu_to_le16(params->ssn), 1793 .winsize = cpu_to_le16(params->buf_size), 1794 }, 1795 }; 1796 struct sta_rec_wtbl *wtbl = NULL; 1797 struct wtbl_req_hdr *wtbl_hdr; 1798 struct wtbl_ba *wtbl_ba; 1799 u8 *buf = req.buf; 1800 1801 if (dev->fw_ver > MT7615_FIRMWARE_V1) { 1802 req.hdr.tlv_num = cpu_to_le16(2); 1803 wtbl = (struct sta_rec_wtbl *)buf; 1804 wtbl->tag = cpu_to_le16(STA_REC_WTBL); 1805 buf += sizeof(*wtbl); 1806 } 1807 1808 wtbl_hdr = (struct wtbl_req_hdr *)buf; 1809 buf += sizeof(*wtbl_hdr); 1810 wtbl_hdr->wlan_idx = msta->wcid.idx; 1811 wtbl_hdr->operation = WTBL_SET; 1812 wtbl_hdr->tlv_num = cpu_to_le16(1); 1813 1814 wtbl_ba = (struct wtbl_ba *)buf; 1815 buf += sizeof(*wtbl_ba); 1816 wtbl_ba->tag = cpu_to_le16(WTBL_BA); 1817 wtbl_ba->len = cpu_to_le16(sizeof(*wtbl_ba)); 1818 wtbl_ba->tid = params->tid; 1819 wtbl_ba->ba_type = MT_BA_TYPE_RECIPIENT; 1820 wtbl_ba->rst_ba_tid = params->tid; 1821 wtbl_ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; 1822 wtbl_ba->rst_ba_sb = 1; 1823 1824 memcpy(wtbl_ba->peer_addr, params->sta->addr, ETH_ALEN); 1825 1826 if (wtbl) 1827 wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 1828 1829 return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 1830 buf - (u8 *)wtbl_hdr, add); 1831 } 1832 1833 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index) 1834 { 1835 struct { 1836 u8 action; 1837 u8 rsv[3]; 1838 } req = { 1839 .action = index, 1840 }; 1841 1842 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_GET_TEMP, &req, 1843 sizeof(req), true); 1844 } 1845 1846 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable) 1847 { 1848 struct mt7615_dev *dev = phy->dev; 1849 struct { 1850 u8 format_id; 1851 u8 sku_enable; 1852 u8 band_idx; 1853 u8 rsv; 1854 } req = { 1855 .format_id = 0, 1856 .band_idx = phy != &dev->phy, 1857 .sku_enable = enable, 1858 }; 1859 1860 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_TX_POWER_FEATURE_CTRL, &req, 1861 sizeof(req), true); 1862 } 1863