1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Roy Luo <royluo@google.com> 5 * Ryder Lee <ryder.lee@mediatek.com> 6 * Felix Fietkau <nbd@nbd.name> 7 * Lorenzo Bianconi <lorenzo@kernel.org> 8 */ 9 10 #include <linux/etherdevice.h> 11 #include "mt7615.h" 12 #include "mac.h" 13 #include "eeprom.h" 14 15 void mt7615_phy_init(struct mt7615_dev *dev) 16 { 17 /* disable rf low power beacon mode */ 18 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 19 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 20 } 21 EXPORT_SYMBOL_GPL(mt7615_phy_init); 22 23 static void 24 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain) 25 { 26 u32 val; 27 28 if (!chain) 29 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN; 30 else 31 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN; 32 33 /* enable band 0/1 clk */ 34 mt76_set(dev, MT_CFG_CCR, val); 35 36 mt76_rmw(dev, MT_TMAC_TRCR(chain), 37 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, 38 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | 39 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); 40 41 mt76_wr(dev, MT_AGG_ACR(chain), 42 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | 43 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | 44 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT)); 45 46 mt76_wr(dev, MT_AGG_ARUCR(chain), 47 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | 48 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | 49 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | 50 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | 51 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | 52 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | 53 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | 54 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1)); 55 56 mt76_wr(dev, MT_AGG_ARDCR(chain), 57 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | 58 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | 59 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | 60 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | 61 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | 62 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | 63 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | 64 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1)); 65 66 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS); 67 if (!mt7615_firmware_offload(dev)) { 68 u32 mask, set; 69 70 mask = MT_DMA_RCFR0_MCU_RX_MGMT | 71 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | 72 MT_DMA_RCFR0_MCU_RX_CTL_BAR | 73 MT_DMA_RCFR0_MCU_RX_BYPASS | 74 MT_DMA_RCFR0_RX_DROPPED_UCAST | 75 MT_DMA_RCFR0_RX_DROPPED_MCAST; 76 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | 77 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); 78 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set); 79 } 80 } 81 82 void mt7615_mac_init(struct mt7615_dev *dev) 83 { 84 int i; 85 86 mt7615_init_mac_chain(dev, 0); 87 88 mt76_rmw_field(dev, MT_TMAC_CTCR0, 89 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); 90 mt76_rmw_field(dev, MT_TMAC_CTCR0, 91 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3); 92 mt76_rmw(dev, MT_TMAC_CTCR0, 93 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 94 MT_TMAC_CTCR0_INS_DDLMT_EN, 95 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 96 MT_TMAC_CTCR0_INS_DDLMT_EN); 97 98 mt7615_mcu_set_rts_thresh(&dev->phy, 0x92b); 99 mt7615_mac_set_scs(&dev->phy, true); 100 101 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS, 102 MT_AGG_SCR_NLNAV_MID_PTEC_DIS); 103 104 mt76_wr(dev, MT_AGG_ARCR, 105 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | 106 MT_AGG_ARCR_RATE_DOWN_RATIO_EN | 107 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | 108 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)); 109 110 for (i = 0; i < MT7615_WTBL_SIZE; i++) 111 mt7615_mac_wtbl_update(dev, i, 112 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 113 114 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN); 115 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN); 116 117 /* disable hdr translation and hw AMSDU */ 118 mt76_wr(dev, MT_DMA_DCR0, 119 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) | 120 MT_DMA_DCR0_RX_VEC_DROP); 121 /* disable TDLS filtering */ 122 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN); 123 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN); 124 if (is_mt7663(&dev->mt76)) { 125 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02); 126 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040); 127 } else { 128 mt7615_init_mac_chain(dev, 1); 129 } 130 } 131 EXPORT_SYMBOL_GPL(mt7615_mac_init); 132 133 void mt7615_check_offload_capability(struct mt7615_dev *dev) 134 { 135 struct ieee80211_hw *hw = mt76_hw(dev); 136 struct wiphy *wiphy = hw->wiphy; 137 138 if (mt7615_firmware_offload(dev)) { 139 ieee80211_hw_set(hw, SUPPORTS_PS); 140 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 141 142 wiphy->max_remain_on_channel_duration = 5000; 143 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR | 144 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR | 145 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL | 146 NL80211_FEATURE_P2P_GO_CTWIN | 147 NL80211_FEATURE_P2P_GO_OPPPS; 148 } else { 149 dev->ops->hw_scan = NULL; 150 dev->ops->cancel_hw_scan = NULL; 151 dev->ops->sched_scan_start = NULL; 152 dev->ops->sched_scan_stop = NULL; 153 dev->ops->set_rekey_data = NULL; 154 dev->ops->remain_on_channel = NULL; 155 dev->ops->cancel_remain_on_channel = NULL; 156 157 wiphy->max_sched_scan_plan_interval = 0; 158 wiphy->max_sched_scan_ie_len = 0; 159 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN; 160 wiphy->max_sched_scan_ssids = 0; 161 wiphy->max_match_sets = 0; 162 wiphy->max_sched_scan_reqs = 0; 163 } 164 } 165 EXPORT_SYMBOL_GPL(mt7615_check_offload_capability); 166 167 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev) 168 { 169 flush_work(&dev->mcu_work); 170 171 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 172 } 173 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init); 174 175 #define CCK_RATE(_idx, _rate) { \ 176 .bitrate = _rate, \ 177 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \ 178 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \ 179 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \ 180 } 181 182 #define OFDM_RATE(_idx, _rate) { \ 183 .bitrate = _rate, \ 184 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \ 185 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \ 186 } 187 188 struct ieee80211_rate mt7615_rates[] = { 189 CCK_RATE(0, 10), 190 CCK_RATE(1, 20), 191 CCK_RATE(2, 55), 192 CCK_RATE(3, 110), 193 OFDM_RATE(11, 60), 194 OFDM_RATE(15, 90), 195 OFDM_RATE(10, 120), 196 OFDM_RATE(14, 180), 197 OFDM_RATE(9, 240), 198 OFDM_RATE(13, 360), 199 OFDM_RATE(8, 480), 200 OFDM_RATE(12, 540), 201 }; 202 EXPORT_SYMBOL_GPL(mt7615_rates); 203 204 static const struct ieee80211_iface_limit if_limits[] = { 205 { 206 .max = 1, 207 .types = BIT(NL80211_IFTYPE_ADHOC) 208 }, { 209 .max = MT7615_MAX_INTERFACES, 210 .types = BIT(NL80211_IFTYPE_AP) | 211 #ifdef CONFIG_MAC80211_MESH 212 BIT(NL80211_IFTYPE_MESH_POINT) | 213 #endif 214 BIT(NL80211_IFTYPE_P2P_CLIENT) | 215 BIT(NL80211_IFTYPE_P2P_GO) | 216 BIT(NL80211_IFTYPE_STATION) 217 } 218 }; 219 220 static const struct ieee80211_iface_combination if_comb_radar[] = { 221 { 222 .limits = if_limits, 223 .n_limits = ARRAY_SIZE(if_limits), 224 .max_interfaces = MT7615_MAX_INTERFACES, 225 .num_different_channels = 1, 226 .beacon_int_infra_match = true, 227 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 228 BIT(NL80211_CHAN_WIDTH_20) | 229 BIT(NL80211_CHAN_WIDTH_40) | 230 BIT(NL80211_CHAN_WIDTH_80) | 231 BIT(NL80211_CHAN_WIDTH_160) | 232 BIT(NL80211_CHAN_WIDTH_80P80), 233 } 234 }; 235 236 static const struct ieee80211_iface_combination if_comb[] = { 237 { 238 .limits = if_limits, 239 .n_limits = ARRAY_SIZE(if_limits), 240 .max_interfaces = MT7615_MAX_INTERFACES, 241 .num_different_channels = 1, 242 .beacon_int_infra_match = true, 243 } 244 }; 245 246 void mt7615_init_txpower(struct mt7615_dev *dev, 247 struct ieee80211_supported_band *sband) 248 { 249 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains; 250 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains); 251 u8 *eep = (u8 *)dev->mt76.eeprom.data; 252 enum nl80211_band band = sband->band; 253 u8 rate_val; 254 255 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band); 256 rate_val = eep[delta_idx]; 257 if ((rate_val & ~MT_EE_RATE_POWER_MASK) == 258 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN)) 259 delta += rate_val & MT_EE_RATE_POWER_MASK; 260 261 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band)) 262 target_chains = 1; 263 else 264 target_chains = n_chains; 265 266 for (i = 0; i < sband->n_channels; i++) { 267 struct ieee80211_channel *chan = &sband->channels[i]; 268 u8 target_power = 0; 269 int j; 270 271 for (j = 0; j < target_chains; j++) { 272 int index; 273 274 index = mt7615_eeprom_get_target_power_index(dev, chan, j); 275 if (index < 0) 276 continue; 277 278 target_power = max(target_power, eep[index]); 279 } 280 281 target_power = DIV_ROUND_UP(target_power + delta, 2); 282 chan->max_power = min_t(int, chan->max_reg_power, 283 target_power); 284 chan->orig_mpwr = target_power; 285 } 286 } 287 EXPORT_SYMBOL_GPL(mt7615_init_txpower); 288 289 static void 290 mt7615_regd_notifier(struct wiphy *wiphy, 291 struct regulatory_request *request) 292 { 293 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 294 struct mt7615_dev *dev = mt7615_hw_dev(hw); 295 struct mt76_phy *mphy = hw->priv; 296 struct mt7615_phy *phy = mphy->priv; 297 struct cfg80211_chan_def *chandef = &mphy->chandef; 298 299 dev->mt76.region = request->dfs_region; 300 301 if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR)) 302 return; 303 304 mt7615_mutex_acquire(dev); 305 mt7615_dfs_init_radar_detector(phy); 306 mt7615_mutex_release(dev); 307 } 308 309 static void 310 mt7615_init_wiphy(struct ieee80211_hw *hw) 311 { 312 struct mt7615_phy *phy = mt7615_hw_phy(hw); 313 struct wiphy *wiphy = hw->wiphy; 314 315 hw->queues = 4; 316 hw->max_rates = 3; 317 hw->max_report_rates = 7; 318 hw->max_rate_tries = 11; 319 320 phy->slottime = 9; 321 322 hw->sta_data_size = sizeof(struct mt7615_sta); 323 hw->vif_data_size = sizeof(struct mt7615_vif); 324 325 if (is_mt7663(&phy->dev->mt76)) { 326 wiphy->iface_combinations = if_comb; 327 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 328 } else { 329 wiphy->iface_combinations = if_comb_radar; 330 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar); 331 } 332 wiphy->reg_notifier = mt7615_regd_notifier; 333 334 wiphy->max_sched_scan_plan_interval = MT7615_MAX_SCHED_SCAN_INTERVAL; 335 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN; 336 wiphy->max_scan_ie_len = MT7615_SCAN_IE_LEN; 337 wiphy->max_sched_scan_ssids = MT7615_MAX_SCHED_SCAN_SSID; 338 wiphy->max_match_sets = MT7615_MAX_SCAN_MATCH; 339 wiphy->max_sched_scan_reqs = 1; 340 wiphy->max_scan_ssids = 4; 341 342 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); 343 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 344 345 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 346 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN); 347 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 348 349 if (is_mt7615(&phy->dev->mt76)) 350 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM; 351 else 352 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM; 353 } 354 355 static void 356 mt7615_cap_dbdc_enable(struct mt7615_dev *dev) 357 { 358 dev->mphy.sband_5g.sband.vht_cap.cap &= 359 ~(IEEE80211_VHT_CAP_SHORT_GI_160 | 360 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ); 361 if (dev->chainmask == 0xf) 362 dev->mphy.antenna_mask = dev->chainmask >> 2; 363 else 364 dev->mphy.antenna_mask = dev->chainmask >> 1; 365 dev->phy.chainmask = dev->mphy.antenna_mask; 366 dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask; 367 dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask; 368 mt76_set_stream_caps(&dev->mphy, true); 369 } 370 371 static void 372 mt7615_cap_dbdc_disable(struct mt7615_dev *dev) 373 { 374 dev->mphy.sband_5g.sband.vht_cap.cap |= 375 IEEE80211_VHT_CAP_SHORT_GI_160 | 376 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; 377 dev->mphy.antenna_mask = dev->chainmask; 378 dev->phy.chainmask = dev->chainmask; 379 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask; 380 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask; 381 mt76_set_stream_caps(&dev->mphy, true); 382 } 383 384 int mt7615_register_ext_phy(struct mt7615_dev *dev) 385 { 386 struct mt7615_phy *phy = mt7615_ext_phy(dev); 387 struct mt76_phy *mphy; 388 int i, ret; 389 390 if (!is_mt7615(&dev->mt76)) 391 return -EOPNOTSUPP; 392 393 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state)) 394 return -EINVAL; 395 396 if (phy) 397 return 0; 398 399 mt7615_cap_dbdc_enable(dev); 400 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops); 401 if (!mphy) 402 return -ENOMEM; 403 404 phy = mphy->priv; 405 phy->dev = dev; 406 phy->mt76 = mphy; 407 phy->chainmask = dev->chainmask & ~dev->phy.chainmask; 408 mphy->antenna_mask = BIT(hweight8(phy->chainmask)) - 1; 409 mt7615_init_wiphy(mphy->hw); 410 411 INIT_DELAYED_WORK(&phy->mac_work, mt7615_mac_work); 412 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work); 413 skb_queue_head_init(&phy->scan_event_list); 414 415 INIT_WORK(&phy->roc_work, mt7615_roc_work); 416 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0); 417 init_waitqueue_head(&phy->roc_wait); 418 419 mt7615_mac_set_scs(phy, true); 420 421 /* 422 * Make the secondary PHY MAC address local without overlapping with 423 * the usual MAC address allocation scheme on multiple virtual interfaces 424 */ 425 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 426 ETH_ALEN); 427 mphy->macaddr[0] |= 2; 428 mphy->macaddr[0] ^= BIT(7); 429 mt76_eeprom_override(mphy); 430 431 /* second phy can only handle 5 GHz */ 432 mphy->cap.has_5ghz = true; 433 434 /* mt7615 second phy shares the same hw queues with the primary one */ 435 for (i = 0; i <= MT_TXQ_PSD ; i++) 436 mphy->q_tx[i] = dev->mphy.q_tx[i]; 437 438 ret = mt76_register_phy(mphy, true, mt7615_rates, 439 ARRAY_SIZE(mt7615_rates)); 440 if (ret) 441 ieee80211_free_hw(mphy->hw); 442 443 return ret; 444 } 445 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy); 446 447 void mt7615_unregister_ext_phy(struct mt7615_dev *dev) 448 { 449 struct mt7615_phy *phy = mt7615_ext_phy(dev); 450 struct mt76_phy *mphy = dev->mt76.phy2; 451 452 if (!phy) 453 return; 454 455 mt7615_cap_dbdc_disable(dev); 456 mt76_unregister_phy(mphy); 457 ieee80211_free_hw(mphy->hw); 458 } 459 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy); 460 461 void mt7615_init_device(struct mt7615_dev *dev) 462 { 463 struct ieee80211_hw *hw = mt76_hw(dev); 464 465 dev->phy.dev = dev; 466 dev->phy.mt76 = &dev->mt76.phy; 467 dev->mt76.phy.priv = &dev->phy; 468 469 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work); 470 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work); 471 init_completion(&dev->pm.wake_cmpl); 472 spin_lock_init(&dev->pm.txq_lock); 473 set_bit(MT76_STATE_PM, &dev->mphy.state); 474 INIT_DELAYED_WORK(&dev->phy.mac_work, mt7615_mac_work); 475 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work); 476 skb_queue_head_init(&dev->phy.scan_event_list); 477 INIT_LIST_HEAD(&dev->sta_poll_list); 478 spin_lock_init(&dev->sta_poll_lock); 479 init_waitqueue_head(&dev->reset_wait); 480 init_waitqueue_head(&dev->phy.roc_wait); 481 482 INIT_WORK(&dev->reset_work, mt7615_mac_reset_work); 483 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work); 484 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0); 485 486 mt7615_init_wiphy(hw); 487 dev->pm.idle_timeout = MT7615_PM_TIMEOUT; 488 dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 489 dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 490 dev->mphy.sband_5g.sband.vht_cap.cap |= 491 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 | 492 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 493 mt7615_cap_dbdc_disable(dev); 494 dev->phy.dfs_state = -1; 495 496 #ifdef CONFIG_NL80211_TESTMODE 497 dev->mt76.test_ops = &mt7615_testmode_ops; 498 #endif 499 } 500 EXPORT_SYMBOL_GPL(mt7615_init_device); 501