17f17b86aSRyder Lee // SPDX-License-Identifier: ISC
2c8846e10SFelix Fietkau
3c8846e10SFelix Fietkau #include <linux/etherdevice.h>
4c8846e10SFelix Fietkau #include <linux/platform_device.h>
5c8846e10SFelix Fietkau #include <linux/pci.h>
6c8846e10SFelix Fietkau #include <linux/module.h>
7c8846e10SFelix Fietkau #include "mt7603.h"
8b126c889SFelix Fietkau #include "mac.h"
9c8846e10SFelix Fietkau #include "eeprom.h"
10c8846e10SFelix Fietkau
11c8846e10SFelix Fietkau static int
mt7603_start(struct ieee80211_hw * hw)12c8846e10SFelix Fietkau mt7603_start(struct ieee80211_hw *hw)
13c8846e10SFelix Fietkau {
14c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
15c8846e10SFelix Fietkau
165a8d4678SLorenzo Bianconi mt7603_mac_reset_counters(dev);
17c8846e10SFelix Fietkau mt7603_mac_start(dev);
1896747a51SFelix Fietkau dev->mphy.survey_time = ktime_get_boottime();
19011849e0SFelix Fietkau set_bit(MT76_STATE_RUNNING, &dev->mphy.state);
20a782f8bfSLorenzo Bianconi mt7603_mac_work(&dev->mphy.mac_work.work);
21c8846e10SFelix Fietkau
22c8846e10SFelix Fietkau return 0;
23c8846e10SFelix Fietkau }
24c8846e10SFelix Fietkau
25c8846e10SFelix Fietkau static void
mt7603_stop(struct ieee80211_hw * hw,bool suspend)261decf05dSEmmanuel Grumbach mt7603_stop(struct ieee80211_hw *hw, bool suspend)
27c8846e10SFelix Fietkau {
28c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
29c8846e10SFelix Fietkau
30011849e0SFelix Fietkau clear_bit(MT76_STATE_RUNNING, &dev->mphy.state);
31a782f8bfSLorenzo Bianconi cancel_delayed_work_sync(&dev->mphy.mac_work);
32c8846e10SFelix Fietkau mt7603_mac_stop(dev);
33c8846e10SFelix Fietkau }
34c8846e10SFelix Fietkau
35c8846e10SFelix Fietkau static int
mt7603_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)36c8846e10SFelix Fietkau mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
37c8846e10SFelix Fietkau {
38c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
39c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
40c8846e10SFelix Fietkau struct mt76_txq *mtxq;
41c8846e10SFelix Fietkau u8 bc_addr[ETH_ALEN];
42c8846e10SFelix Fietkau int idx;
43c8846e10SFelix Fietkau int ret = 0;
44c8846e10SFelix Fietkau
45c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex);
46c8846e10SFelix Fietkau
47b619e013SEvelyn Tsai mvif->idx = __ffs64(~dev->mt76.vif_mask);
48c8846e10SFelix Fietkau if (mvif->idx >= MT7603_MAX_INTERFACES) {
49c8846e10SFelix Fietkau ret = -ENOSPC;
50c8846e10SFelix Fietkau goto out;
51c8846e10SFelix Fietkau }
52c8846e10SFelix Fietkau
53c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR0(mvif->idx),
54c8846e10SFelix Fietkau get_unaligned_le32(vif->addr));
55c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR1(mvif->idx),
56c8846e10SFelix Fietkau (get_unaligned_le16(vif->addr + 4) |
57c8846e10SFelix Fietkau MT_MAC_ADDR1_VALID));
58c8846e10SFelix Fietkau
59c8846e10SFelix Fietkau if (vif->type == NL80211_IFTYPE_AP) {
60c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx),
61c8846e10SFelix Fietkau get_unaligned_le32(vif->addr));
62c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx),
63c8846e10SFelix Fietkau (get_unaligned_le16(vif->addr + 4) |
64c8846e10SFelix Fietkau MT_BSSID1_VALID));
65c8846e10SFelix Fietkau }
66c8846e10SFelix Fietkau
67c8846e10SFelix Fietkau idx = MT7603_WTBL_RESERVED - 1 - mvif->idx;
68b619e013SEvelyn Tsai dev->mt76.vif_mask |= BIT_ULL(mvif->idx);
692d29058eSLorenzo Bianconi INIT_LIST_HEAD(&mvif->sta.wcid.poll_list);
70c8846e10SFelix Fietkau mvif->sta.wcid.idx = idx;
71c8846e10SFelix Fietkau mvif->sta.wcid.hw_key_idx = -1;
72fe0ea395SFelix Fietkau mvif->sta.vif = mvif;
730335c034SFelix Fietkau mt76_wcid_init(&mvif->sta.wcid);
74c8846e10SFelix Fietkau
75c8846e10SFelix Fietkau eth_broadcast_addr(bc_addr);
76c8846e10SFelix Fietkau mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr);
77c8846e10SFelix Fietkau
78c8846e10SFelix Fietkau mtxq = (struct mt76_txq *)vif->txq->drv_priv;
7951fb1278SFelix Fietkau mtxq->wcid = idx;
80c8846e10SFelix Fietkau rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
81c8846e10SFelix Fietkau
82c8846e10SFelix Fietkau out:
83c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex);
84c8846e10SFelix Fietkau
85c8846e10SFelix Fietkau return ret;
86c8846e10SFelix Fietkau }
87c8846e10SFelix Fietkau
88c8846e10SFelix Fietkau static void
mt7603_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)89c8846e10SFelix Fietkau mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
90c8846e10SFelix Fietkau {
91c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
92ea565833SFelix Fietkau struct mt7603_sta *msta = &mvif->sta;
93c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
94ea565833SFelix Fietkau int idx = msta->wcid.idx;
95c8846e10SFelix Fietkau
96c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0);
97c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0);
98c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
99c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
100c8846e10SFelix Fietkau mt7603_beacon_set_timer(dev, mvif->idx, 0);
101c8846e10SFelix Fietkau
102c8846e10SFelix Fietkau rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
103c8846e10SFelix Fietkau
104c55e898bSLorenzo Bianconi spin_lock_bh(&dev->mt76.sta_poll_lock);
1052d29058eSLorenzo Bianconi if (!list_empty(&msta->wcid.poll_list))
1062d29058eSLorenzo Bianconi list_del_init(&msta->wcid.poll_list);
107c55e898bSLorenzo Bianconi spin_unlock_bh(&dev->mt76.sta_poll_lock);
108ea565833SFelix Fietkau
109c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex);
110b619e013SEvelyn Tsai dev->mt76.vif_mask &= ~BIT_ULL(mvif->idx);
111c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex);
112bd1e3e7bSLorenzo Bianconi
1130335c034SFelix Fietkau mt76_wcid_cleanup(&dev->mt76, &mvif->sta.wcid);
114c8846e10SFelix Fietkau }
115c8846e10SFelix Fietkau
mt7603_init_edcca(struct mt7603_dev * dev)116984d8854SLorenzo Bianconi void mt7603_init_edcca(struct mt7603_dev *dev)
117c8846e10SFelix Fietkau {
118c8846e10SFelix Fietkau /* Set lower signal level to -65dBm */
119c8846e10SFelix Fietkau mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23);
120c8846e10SFelix Fietkau
121c8846e10SFelix Fietkau /* clear previous energy detect monitor results */
122c8846e10SFelix Fietkau mt76_rr(dev, MT_MIB_STAT_ED);
123c8846e10SFelix Fietkau
124c8846e10SFelix Fietkau if (dev->ed_monitor)
125c8846e10SFelix Fietkau mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
126c8846e10SFelix Fietkau else
127c8846e10SFelix Fietkau mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
128c8846e10SFelix Fietkau
129c8846e10SFelix Fietkau dev->ed_strict_mode = 0xff;
130c8846e10SFelix Fietkau dev->ed_strong_signal = 0;
131c8846e10SFelix Fietkau dev->ed_time = ktime_get_boottime();
132c8846e10SFelix Fietkau
133c8846e10SFelix Fietkau mt7603_edcca_set_strict(dev, false);
134c8846e10SFelix Fietkau }
135c8846e10SFelix Fietkau
mt7603_set_channel(struct mt76_phy * mphy)136f4fdd771SFelix Fietkau int mt7603_set_channel(struct mt76_phy *mphy)
137c8846e10SFelix Fietkau {
138f4fdd771SFelix Fietkau struct mt7603_dev *dev = container_of(mphy->dev, struct mt7603_dev, mt76);
139f4fdd771SFelix Fietkau struct cfg80211_chan_def *def = &mphy->chandef;
140f4fdd771SFelix Fietkau
141c8846e10SFelix Fietkau u8 *rssi_data = (u8 *)dev->mt76.eeprom.data;
142c8846e10SFelix Fietkau int idx, ret;
143c8846e10SFelix Fietkau u8 bw = MT_BW_20;
144c8846e10SFelix Fietkau bool failed = false;
145c8846e10SFelix Fietkau
146bd115805SLorenzo Bianconi tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
147c8846e10SFelix Fietkau
148bd115805SLorenzo Bianconi mt7603_beacon_set_timer(dev, -1, 0);
149c8846e10SFelix Fietkau mt7603_mac_stop(dev);
150c8846e10SFelix Fietkau
151c8846e10SFelix Fietkau if (def->width == NL80211_CHAN_WIDTH_40)
152c8846e10SFelix Fietkau bw = MT_BW_40;
153c8846e10SFelix Fietkau
154c8846e10SFelix Fietkau mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw);
155c8846e10SFelix Fietkau ret = mt7603_mcu_set_channel(dev);
156c8846e10SFelix Fietkau if (ret) {
157c8846e10SFelix Fietkau failed = true;
158c8846e10SFelix Fietkau goto out;
159c8846e10SFelix Fietkau }
160c8846e10SFelix Fietkau
161c8846e10SFelix Fietkau if (def->chan->band == NL80211_BAND_5GHZ) {
162c8846e10SFelix Fietkau idx = 1;
163c8846e10SFelix Fietkau rssi_data += MT_EE_RSSI_OFFSET_5G;
164c8846e10SFelix Fietkau } else {
165c8846e10SFelix Fietkau idx = 0;
166c8846e10SFelix Fietkau rssi_data += MT_EE_RSSI_OFFSET_2G;
167c8846e10SFelix Fietkau }
168c8846e10SFelix Fietkau
169c8846e10SFelix Fietkau memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset));
170c8846e10SFelix Fietkau
171c8846e10SFelix Fietkau idx |= (def->chan -
172c8846e10SFelix Fietkau mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1;
173c8846e10SFelix Fietkau mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx);
174c8846e10SFelix Fietkau mt7603_mac_set_timing(dev);
175c8846e10SFelix Fietkau mt7603_mac_start(dev);
176c8846e10SFelix Fietkau
177a782f8bfSLorenzo Bianconi ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work,
1785e814e71SLorenzo Bianconi msecs_to_jiffies(MT7603_WATCHDOG_TIME));
179c8846e10SFelix Fietkau
180c8846e10SFelix Fietkau /* reset channel stats */
181c8846e10SFelix Fietkau mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS);
182c8846e10SFelix Fietkau mt76_set(dev, MT_MIB_CTL,
183c8846e10SFelix Fietkau MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME);
18400c29ab2SLorenzo Bianconi mt76_rr(dev, MT_MIB_STAT_CCA);
185c8846e10SFelix Fietkau mt7603_cca_stats_reset(dev);
186c8846e10SFelix Fietkau
18796747a51SFelix Fietkau dev->mphy.survey_time = ktime_get_boottime();
188c8846e10SFelix Fietkau
189c8846e10SFelix Fietkau mt7603_init_edcca(dev);
190c8846e10SFelix Fietkau
191c8846e10SFelix Fietkau out:
192f4fdd771SFelix Fietkau if (!mphy->offchannel)
193bd115805SLorenzo Bianconi mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int);
194c8846e10SFelix Fietkau
195bd115805SLorenzo Bianconi tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
196bd115805SLorenzo Bianconi
197c8846e10SFelix Fietkau if (failed)
198a782f8bfSLorenzo Bianconi mt7603_mac_work(&dev->mphy.mac_work.work);
199c8846e10SFelix Fietkau
200c8846e10SFelix Fietkau return ret;
201c8846e10SFelix Fietkau }
202c8846e10SFelix Fietkau
mt7603_set_sar_specs(struct ieee80211_hw * hw,const struct cfg80211_sar_specs * sar)2034bbd6d83SLorenzo Bianconi static int mt7603_set_sar_specs(struct ieee80211_hw *hw,
2044bbd6d83SLorenzo Bianconi const struct cfg80211_sar_specs *sar)
2054bbd6d83SLorenzo Bianconi {
2064bbd6d83SLorenzo Bianconi struct mt7603_dev *dev = hw->priv;
2074bbd6d83SLorenzo Bianconi struct mt76_phy *mphy = &dev->mphy;
2084bbd6d83SLorenzo Bianconi int err;
2094bbd6d83SLorenzo Bianconi
2104bbd6d83SLorenzo Bianconi if (!cfg80211_chandef_valid(&mphy->chandef))
2114bbd6d83SLorenzo Bianconi return -EINVAL;
2124bbd6d83SLorenzo Bianconi
2134bbd6d83SLorenzo Bianconi err = mt76_init_sar_power(hw, sar);
2144bbd6d83SLorenzo Bianconi if (err)
2154bbd6d83SLorenzo Bianconi return err;
2164bbd6d83SLorenzo Bianconi
217f4fdd771SFelix Fietkau return mt76_update_channel(mphy);
2184bbd6d83SLorenzo Bianconi }
2194bbd6d83SLorenzo Bianconi
220c8846e10SFelix Fietkau static int
mt7603_config(struct ieee80211_hw * hw,u32 changed)221c8846e10SFelix Fietkau mt7603_config(struct ieee80211_hw *hw, u32 changed)
222c8846e10SFelix Fietkau {
223c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
224c8846e10SFelix Fietkau int ret = 0;
225c8846e10SFelix Fietkau
226c8846e10SFelix Fietkau if (changed & (IEEE80211_CONF_CHANGE_CHANNEL |
2274bbd6d83SLorenzo Bianconi IEEE80211_CONF_CHANGE_POWER))
228f4fdd771SFelix Fietkau ret = mt76_update_channel(&dev->mphy);
229c8846e10SFelix Fietkau
230c8846e10SFelix Fietkau if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
231c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex);
232c8846e10SFelix Fietkau
233c8846e10SFelix Fietkau if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
234c8846e10SFelix Fietkau dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
235c8846e10SFelix Fietkau else
236c8846e10SFelix Fietkau dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
237c8846e10SFelix Fietkau
238c8846e10SFelix Fietkau mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
239c8846e10SFelix Fietkau
240c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex);
241c8846e10SFelix Fietkau }
242c8846e10SFelix Fietkau
243c8846e10SFelix Fietkau return ret;
244c8846e10SFelix Fietkau }
245c8846e10SFelix Fietkau
246c8846e10SFelix Fietkau static void
mt7603_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)247c8846e10SFelix Fietkau mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
248c8846e10SFelix Fietkau unsigned int *total_flags, u64 multicast)
249c8846e10SFelix Fietkau {
250c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
251c8846e10SFelix Fietkau u32 flags = 0;
252c8846e10SFelix Fietkau
253c8846e10SFelix Fietkau #define MT76_FILTER(_flag, _hw) do { \
254c8846e10SFelix Fietkau flags |= *total_flags & FIF_##_flag; \
255c8846e10SFelix Fietkau dev->rxfilter &= ~(_hw); \
256c8846e10SFelix Fietkau dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \
257c8846e10SFelix Fietkau } while (0)
258c8846e10SFelix Fietkau
259c8846e10SFelix Fietkau dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS |
260c8846e10SFelix Fietkau MT_WF_RFCR_DROP_OTHER_BEACON |
261c8846e10SFelix Fietkau MT_WF_RFCR_DROP_FRAME_REPORT |
262c8846e10SFelix Fietkau MT_WF_RFCR_DROP_PROBEREQ |
263c8846e10SFelix Fietkau MT_WF_RFCR_DROP_MCAST_FILTERED |
264c8846e10SFelix Fietkau MT_WF_RFCR_DROP_MCAST |
265c8846e10SFelix Fietkau MT_WF_RFCR_DROP_BCAST |
266c8846e10SFelix Fietkau MT_WF_RFCR_DROP_DUPLICATE |
267c8846e10SFelix Fietkau MT_WF_RFCR_DROP_A2_BSSID |
268c8846e10SFelix Fietkau MT_WF_RFCR_DROP_UNWANTED_CTL |
269c8846e10SFelix Fietkau MT_WF_RFCR_DROP_STBC_MULTI);
270c8846e10SFelix Fietkau
271c8846e10SFelix Fietkau MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
272c8846e10SFelix Fietkau MT_WF_RFCR_DROP_A3_MAC |
273c8846e10SFelix Fietkau MT_WF_RFCR_DROP_A3_BSSID);
274c8846e10SFelix Fietkau
275c8846e10SFelix Fietkau MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
276c8846e10SFelix Fietkau
277c8846e10SFelix Fietkau MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS |
278c8846e10SFelix Fietkau MT_WF_RFCR_DROP_RTS |
279c8846e10SFelix Fietkau MT_WF_RFCR_DROP_CTL_RSV |
280c8846e10SFelix Fietkau MT_WF_RFCR_DROP_NDPA);
281c8846e10SFelix Fietkau
282c8846e10SFelix Fietkau *total_flags = flags;
283c8846e10SFelix Fietkau mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
284c8846e10SFelix Fietkau }
285c8846e10SFelix Fietkau
286c8846e10SFelix Fietkau static void
mt7603_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * info,u64 changed)287c8846e10SFelix Fietkau mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2887b7090b4SJohannes Berg struct ieee80211_bss_conf *info, u64 changed)
289c8846e10SFelix Fietkau {
290c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
291c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
292c8846e10SFelix Fietkau
293c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex);
294c8846e10SFelix Fietkau
295c8846e10SFelix Fietkau if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) {
296f276e20bSJohannes Berg if (vif->cfg.assoc || vif->cfg.ibss_joined) {
297c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx),
298c8846e10SFelix Fietkau get_unaligned_le32(info->bssid));
299c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx),
300c8846e10SFelix Fietkau (get_unaligned_le16(info->bssid + 4) |
301c8846e10SFelix Fietkau MT_BSSID1_VALID));
302c8846e10SFelix Fietkau } else {
303c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
304c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
305c8846e10SFelix Fietkau }
306c8846e10SFelix Fietkau }
307c8846e10SFelix Fietkau
308c8846e10SFelix Fietkau if (changed & BSS_CHANGED_ERP_SLOT) {
309c8846e10SFelix Fietkau int slottime = info->use_short_slot ? 9 : 20;
310c8846e10SFelix Fietkau
311c8846e10SFelix Fietkau if (slottime != dev->slottime) {
312c8846e10SFelix Fietkau dev->slottime = slottime;
313c8846e10SFelix Fietkau mt7603_mac_set_timing(dev);
314c8846e10SFelix Fietkau }
315c8846e10SFelix Fietkau }
316c8846e10SFelix Fietkau
317c8846e10SFelix Fietkau if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) {
318c8846e10SFelix Fietkau int beacon_int = !!info->enable_beacon * info->beacon_int;
319c8846e10SFelix Fietkau
320dc6057f4SLorenzo Bianconi tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
321c8846e10SFelix Fietkau mt7603_beacon_set_timer(dev, mvif->idx, beacon_int);
322dc6057f4SLorenzo Bianconi tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
323c8846e10SFelix Fietkau }
324c8846e10SFelix Fietkau
325c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex);
326c8846e10SFelix Fietkau }
327c8846e10SFelix Fietkau
328c8846e10SFelix Fietkau int
mt7603_sta_add(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)329c8846e10SFelix Fietkau mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
330c8846e10SFelix Fietkau struct ieee80211_sta *sta)
331c8846e10SFelix Fietkau {
332c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
333c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
334c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
335c8846e10SFelix Fietkau int idx;
336c8846e10SFelix Fietkau int ret = 0;
337c8846e10SFelix Fietkau
338c8846e10SFelix Fietkau idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1);
339c8846e10SFelix Fietkau if (idx < 0)
340c8846e10SFelix Fietkau return -ENOSPC;
341c8846e10SFelix Fietkau
3422d29058eSLorenzo Bianconi INIT_LIST_HEAD(&msta->wcid.poll_list);
343c8846e10SFelix Fietkau __skb_queue_head_init(&msta->psq);
344c8846e10SFelix Fietkau msta->ps = ~0;
345c8846e10SFelix Fietkau msta->smps = ~0;
346c8846e10SFelix Fietkau msta->wcid.sta = 1;
347c8846e10SFelix Fietkau msta->wcid.idx = idx;
348fe0ea395SFelix Fietkau msta->vif = mvif;
349c8846e10SFelix Fietkau mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr);
350c8846e10SFelix Fietkau mt7603_wtbl_set_ps(dev, msta, false);
351c8846e10SFelix Fietkau
352c8846e10SFelix Fietkau if (vif->type == NL80211_IFTYPE_AP)
353c8846e10SFelix Fietkau set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
354c8846e10SFelix Fietkau
355c8846e10SFelix Fietkau return ret;
356c8846e10SFelix Fietkau }
357c8846e10SFelix Fietkau
358*17b0f68aSFelix Fietkau int
mt7603_sta_event(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,enum mt76_sta_event ev)359*17b0f68aSFelix Fietkau mt7603_sta_event(struct mt76_dev *mdev, struct ieee80211_vif *vif,
360*17b0f68aSFelix Fietkau struct ieee80211_sta *sta, enum mt76_sta_event ev)
361c8846e10SFelix Fietkau {
362c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
363c8846e10SFelix Fietkau
364*17b0f68aSFelix Fietkau if (ev == MT76_STA_EVENT_ASSOC) {
365*17b0f68aSFelix Fietkau mutex_lock(&dev->mt76.mutex);
366c8846e10SFelix Fietkau mt7603_wtbl_update_cap(dev, sta);
367*17b0f68aSFelix Fietkau mutex_unlock(&dev->mt76.mutex);
368*17b0f68aSFelix Fietkau }
369*17b0f68aSFelix Fietkau
370*17b0f68aSFelix Fietkau return 0;
371c8846e10SFelix Fietkau }
372c8846e10SFelix Fietkau
373c8846e10SFelix Fietkau void
mt7603_sta_remove(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)374c8846e10SFelix Fietkau mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
375c8846e10SFelix Fietkau struct ieee80211_sta *sta)
376c8846e10SFelix Fietkau {
377c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
378fe0ea395SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
379c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
380c8846e10SFelix Fietkau struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
381c8846e10SFelix Fietkau
382c8846e10SFelix Fietkau spin_lock_bh(&dev->ps_lock);
383c8846e10SFelix Fietkau __skb_queue_purge(&msta->psq);
384fe0ea395SFelix Fietkau mt7603_filter_tx(dev, mvif->idx, wcid->idx, true);
385c8846e10SFelix Fietkau spin_unlock_bh(&dev->ps_lock);
386c8846e10SFelix Fietkau
387c55e898bSLorenzo Bianconi spin_lock_bh(&mdev->sta_poll_lock);
3882d29058eSLorenzo Bianconi if (!list_empty(&msta->wcid.poll_list))
3892d29058eSLorenzo Bianconi list_del_init(&msta->wcid.poll_list);
390c55e898bSLorenzo Bianconi spin_unlock_bh(&mdev->sta_poll_lock);
391ea565833SFelix Fietkau
392c8846e10SFelix Fietkau mt7603_wtbl_clear(dev, wcid->idx);
393c8846e10SFelix Fietkau }
394c8846e10SFelix Fietkau
395c8846e10SFelix Fietkau static void
mt7603_ps_tx_list(struct mt7603_dev * dev,struct sk_buff_head * list)396c8846e10SFelix Fietkau mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list)
397c8846e10SFelix Fietkau {
398c8846e10SFelix Fietkau struct sk_buff *skb;
399c8846e10SFelix Fietkau
400d95093a1SLorenzo Bianconi while ((skb = __skb_dequeue(list)) != NULL) {
401d95093a1SLorenzo Bianconi int qid = skb_get_queue_mapping(skb);
402d95093a1SLorenzo Bianconi
40391990519SLorenzo Bianconi mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[qid], skb, 0);
404d95093a1SLorenzo Bianconi }
405c8846e10SFelix Fietkau }
406c8846e10SFelix Fietkau
407c8846e10SFelix Fietkau void
mt7603_sta_ps(struct mt76_dev * mdev,struct ieee80211_sta * sta,bool ps)408c8846e10SFelix Fietkau mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
409c8846e10SFelix Fietkau {
410c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
411c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
412c8846e10SFelix Fietkau struct sk_buff_head list;
413c8846e10SFelix Fietkau
41491990519SLorenzo Bianconi mt76_stop_tx_queues(&dev->mphy, sta, true);
415c8846e10SFelix Fietkau mt7603_wtbl_set_ps(dev, msta, ps);
416c8846e10SFelix Fietkau if (ps)
417c8846e10SFelix Fietkau return;
418c8846e10SFelix Fietkau
419c8846e10SFelix Fietkau __skb_queue_head_init(&list);
420c8846e10SFelix Fietkau
421c8846e10SFelix Fietkau spin_lock_bh(&dev->ps_lock);
422c8846e10SFelix Fietkau skb_queue_splice_tail_init(&msta->psq, &list);
423c8846e10SFelix Fietkau spin_unlock_bh(&dev->ps_lock);
424c8846e10SFelix Fietkau
425c8846e10SFelix Fietkau mt7603_ps_tx_list(dev, &list);
426c8846e10SFelix Fietkau }
427c8846e10SFelix Fietkau
428c8846e10SFelix Fietkau static void
mt7603_ps_set_more_data(struct sk_buff * skb)429b126c889SFelix Fietkau mt7603_ps_set_more_data(struct sk_buff *skb)
430b126c889SFelix Fietkau {
431b126c889SFelix Fietkau struct ieee80211_hdr *hdr;
432b126c889SFelix Fietkau
433b126c889SFelix Fietkau hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE];
434b126c889SFelix Fietkau hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
435b126c889SFelix Fietkau }
436b126c889SFelix Fietkau
437b126c889SFelix Fietkau static void
mt7603_release_buffered_frames(struct ieee80211_hw * hw,struct ieee80211_sta * sta,u16 tids,int nframes,enum ieee80211_frame_release_type reason,bool more_data)438c8846e10SFelix Fietkau mt7603_release_buffered_frames(struct ieee80211_hw *hw,
439c8846e10SFelix Fietkau struct ieee80211_sta *sta,
440c8846e10SFelix Fietkau u16 tids, int nframes,
441c8846e10SFelix Fietkau enum ieee80211_frame_release_type reason,
442c8846e10SFelix Fietkau bool more_data)
443c8846e10SFelix Fietkau {
444c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
445c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
446c8846e10SFelix Fietkau struct sk_buff_head list;
447c8846e10SFelix Fietkau struct sk_buff *skb, *tmp;
448c8846e10SFelix Fietkau
449c8846e10SFelix Fietkau __skb_queue_head_init(&list);
450c8846e10SFelix Fietkau
451f25e813bSFelix Fietkau mt7603_wtbl_set_ps(dev, msta, false);
452f25e813bSFelix Fietkau
453c8846e10SFelix Fietkau spin_lock_bh(&dev->ps_lock);
454c8846e10SFelix Fietkau skb_queue_walk_safe(&msta->psq, skb, tmp) {
455c8846e10SFelix Fietkau if (!nframes)
456c8846e10SFelix Fietkau break;
457c8846e10SFelix Fietkau
458c8846e10SFelix Fietkau if (!(tids & BIT(skb->priority)))
459c8846e10SFelix Fietkau continue;
460c8846e10SFelix Fietkau
461c8846e10SFelix Fietkau skb_set_queue_mapping(skb, MT_TXQ_PSD);
462c8846e10SFelix Fietkau __skb_unlink(skb, &msta->psq);
463b126c889SFelix Fietkau mt7603_ps_set_more_data(skb);
464c8846e10SFelix Fietkau __skb_queue_tail(&list, skb);
465c8846e10SFelix Fietkau nframes--;
466c8846e10SFelix Fietkau }
467c8846e10SFelix Fietkau spin_unlock_bh(&dev->ps_lock);
468c8846e10SFelix Fietkau
469b7001f46SFelix Fietkau if (!skb_queue_empty(&list))
470b7001f46SFelix Fietkau ieee80211_sta_eosp(sta);
471b7001f46SFelix Fietkau
472c8846e10SFelix Fietkau mt7603_ps_tx_list(dev, &list);
473c8846e10SFelix Fietkau
474c8846e10SFelix Fietkau if (nframes)
475c8846e10SFelix Fietkau mt76_release_buffered_frames(hw, sta, tids, nframes, reason,
476c8846e10SFelix Fietkau more_data);
477c8846e10SFelix Fietkau }
478c8846e10SFelix Fietkau
479c8846e10SFelix Fietkau static int
mt7603_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)480c8846e10SFelix Fietkau mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
481c8846e10SFelix Fietkau struct ieee80211_vif *vif, struct ieee80211_sta *sta,
482c8846e10SFelix Fietkau struct ieee80211_key_conf *key)
483c8846e10SFelix Fietkau {
484c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
485c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
486c8846e10SFelix Fietkau struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv :
487c8846e10SFelix Fietkau &mvif->sta;
488c8846e10SFelix Fietkau struct mt76_wcid *wcid = &msta->wcid;
489c8846e10SFelix Fietkau int idx = key->keyidx;
490c8846e10SFelix Fietkau
491c8846e10SFelix Fietkau /* fall back to sw encryption for unsupported ciphers */
492c8846e10SFelix Fietkau switch (key->cipher) {
493c8846e10SFelix Fietkau case WLAN_CIPHER_SUITE_TKIP:
494c8846e10SFelix Fietkau case WLAN_CIPHER_SUITE_CCMP:
495c8846e10SFelix Fietkau break;
496c8846e10SFelix Fietkau default:
497c8846e10SFelix Fietkau return -EOPNOTSUPP;
498c8846e10SFelix Fietkau }
499c8846e10SFelix Fietkau
500c8846e10SFelix Fietkau /*
501c8846e10SFelix Fietkau * The hardware does not support per-STA RX GTK, fall back
502c8846e10SFelix Fietkau * to software mode for these.
503c8846e10SFelix Fietkau */
504c8846e10SFelix Fietkau if ((vif->type == NL80211_IFTYPE_ADHOC ||
505c8846e10SFelix Fietkau vif->type == NL80211_IFTYPE_MESH_POINT) &&
506c8846e10SFelix Fietkau (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
507c8846e10SFelix Fietkau key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
508c8846e10SFelix Fietkau !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
509c8846e10SFelix Fietkau return -EOPNOTSUPP;
510c8846e10SFelix Fietkau
511e6db67faSFelix Fietkau if (cmd != SET_KEY) {
512c8846e10SFelix Fietkau if (idx == wcid->hw_key_idx)
513c8846e10SFelix Fietkau wcid->hw_key_idx = -1;
514c8846e10SFelix Fietkau
515e6db67faSFelix Fietkau return 0;
516c8846e10SFelix Fietkau }
517e6db67faSFelix Fietkau
518e6db67faSFelix Fietkau key->hw_key_idx = wcid->idx;
519e6db67faSFelix Fietkau wcid->hw_key_idx = idx;
520c8846e10SFelix Fietkau mt76_wcid_key_setup(&dev->mt76, wcid, key);
521c8846e10SFelix Fietkau
522c8846e10SFelix Fietkau return mt7603_wtbl_set_key(dev, wcid->idx, key);
523c8846e10SFelix Fietkau }
524c8846e10SFelix Fietkau
525c8846e10SFelix Fietkau static int
mt7603_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,u16 queue,const struct ieee80211_tx_queue_params * params)526b3e2130bSJohannes Berg mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
527b3e2130bSJohannes Berg unsigned int link_id, u16 queue,
528c8846e10SFelix Fietkau const struct ieee80211_tx_queue_params *params)
529c8846e10SFelix Fietkau {
530c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
531c8846e10SFelix Fietkau u16 cw_min = (1 << 5) - 1;
532c8846e10SFelix Fietkau u16 cw_max = (1 << 10) - 1;
533c8846e10SFelix Fietkau u32 val;
534c8846e10SFelix Fietkau
53591990519SLorenzo Bianconi queue = dev->mphy.q_tx[queue]->hw_idx;
536c8846e10SFelix Fietkau
537c8846e10SFelix Fietkau if (params->cw_min)
538c8846e10SFelix Fietkau cw_min = params->cw_min;
539c8846e10SFelix Fietkau if (params->cw_max)
540c8846e10SFelix Fietkau cw_max = params->cw_max;
541c8846e10SFelix Fietkau
542c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex);
543c8846e10SFelix Fietkau mt7603_mac_stop(dev);
544c8846e10SFelix Fietkau
545c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_TXOP(queue));
546c8846e10SFelix Fietkau val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue));
547c8846e10SFelix Fietkau val |= params->txop << MT_WMM_TXOP_SHIFT(queue);
548c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_TXOP(queue), val);
549c8846e10SFelix Fietkau
550c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_AIFSN);
551c8846e10SFelix Fietkau val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue));
552c8846e10SFelix Fietkau val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue);
553c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_AIFSN, val);
554c8846e10SFelix Fietkau
555c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_CWMIN);
556c8846e10SFelix Fietkau val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue));
557c8846e10SFelix Fietkau val |= cw_min << MT_WMM_CWMIN_SHIFT(queue);
558c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_CWMIN, val);
559c8846e10SFelix Fietkau
560c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_CWMAX(queue));
561c8846e10SFelix Fietkau val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue));
562c8846e10SFelix Fietkau val |= cw_max << MT_WMM_CWMAX_SHIFT(queue);
563c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_CWMAX(queue), val);
564c8846e10SFelix Fietkau
565c8846e10SFelix Fietkau mt7603_mac_start(dev);
566c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex);
567c8846e10SFelix Fietkau
568c8846e10SFelix Fietkau return 0;
569c8846e10SFelix Fietkau }
570c8846e10SFelix Fietkau
571c8846e10SFelix Fietkau static void
mt7603_flush(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u32 queues,bool drop)572c8846e10SFelix Fietkau mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
573c8846e10SFelix Fietkau u32 queues, bool drop)
574c8846e10SFelix Fietkau {
575c8846e10SFelix Fietkau }
576c8846e10SFelix Fietkau
577c8846e10SFelix Fietkau static int
mt7603_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_ampdu_params * params)578c8846e10SFelix Fietkau mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
579c8846e10SFelix Fietkau struct ieee80211_ampdu_params *params)
580c8846e10SFelix Fietkau {
581c8846e10SFelix Fietkau enum ieee80211_ampdu_mlme_action action = params->action;
582c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
583c8846e10SFelix Fietkau struct ieee80211_sta *sta = params->sta;
584c8846e10SFelix Fietkau struct ieee80211_txq *txq = sta->txq[params->tid];
585c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
586c8846e10SFelix Fietkau u16 tid = params->tid;
587f8f3b20aSStanislaw Gruszka u16 ssn = params->ssn;
588c8846e10SFelix Fietkau u8 ba_size = params->buf_size;
589c8846e10SFelix Fietkau struct mt76_txq *mtxq;
59005d6c8cfSMarkus Theil int ret = 0;
591c8846e10SFelix Fietkau
592c8846e10SFelix Fietkau if (!txq)
593c8846e10SFelix Fietkau return -EINVAL;
594c8846e10SFelix Fietkau
595c8846e10SFelix Fietkau mtxq = (struct mt76_txq *)txq->drv_priv;
596c8846e10SFelix Fietkau
5971a817fa7SFelix Fietkau mutex_lock(&dev->mt76.mutex);
598c8846e10SFelix Fietkau switch (action) {
599c8846e10SFelix Fietkau case IEEE80211_AMPDU_RX_START:
600f8f3b20aSStanislaw Gruszka mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
601c8846e10SFelix Fietkau params->buf_size);
602c8846e10SFelix Fietkau mt7603_mac_rx_ba_reset(dev, sta->addr, tid);
603c8846e10SFelix Fietkau break;
604c8846e10SFelix Fietkau case IEEE80211_AMPDU_RX_STOP:
605c8846e10SFelix Fietkau mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
606c8846e10SFelix Fietkau break;
607c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_OPERATIONAL:
608c8846e10SFelix Fietkau mtxq->aggr = true;
609c8846e10SFelix Fietkau mtxq->send_bar = false;
610aa3cb24bSFelix Fietkau mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size);
611c8846e10SFelix Fietkau break;
612c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_STOP_FLUSH:
613c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
614c8846e10SFelix Fietkau mtxq->aggr = false;
615aa3cb24bSFelix Fietkau mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
616c8846e10SFelix Fietkau break;
617c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_START:
618f8f3b20aSStanislaw Gruszka mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
61905d6c8cfSMarkus Theil ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
62005d6c8cfSMarkus Theil break;
621c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_STOP_CONT:
622c8846e10SFelix Fietkau mtxq->aggr = false;
623aa3cb24bSFelix Fietkau mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
624c8846e10SFelix Fietkau ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
625c8846e10SFelix Fietkau break;
626c8846e10SFelix Fietkau }
6271a817fa7SFelix Fietkau mutex_unlock(&dev->mt76.mutex);
628c8846e10SFelix Fietkau
62905d6c8cfSMarkus Theil return ret;
630c8846e10SFelix Fietkau }
631c8846e10SFelix Fietkau
632c8846e10SFelix Fietkau static void
mt7603_sta_rate_tbl_update(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)633c8846e10SFelix Fietkau mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
634c8846e10SFelix Fietkau struct ieee80211_sta *sta)
635c8846e10SFelix Fietkau {
636c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
637c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
638c8846e10SFelix Fietkau struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates);
639c8846e10SFelix Fietkau int i;
640c8846e10SFelix Fietkau
641fc8e2c70SLorenzo Bianconi if (!sta_rates)
642fc8e2c70SLorenzo Bianconi return;
643fc8e2c70SLorenzo Bianconi
644c8846e10SFelix Fietkau spin_lock_bh(&dev->mt76.lock);
645c8846e10SFelix Fietkau for (i = 0; i < ARRAY_SIZE(msta->rates); i++) {
646c8846e10SFelix Fietkau msta->rates[i].idx = sta_rates->rate[i].idx;
647c8846e10SFelix Fietkau msta->rates[i].count = sta_rates->rate[i].count;
648c8846e10SFelix Fietkau msta->rates[i].flags = sta_rates->rate[i].flags;
649c8846e10SFelix Fietkau
650c8846e10SFelix Fietkau if (msta->rates[i].idx < 0 || !msta->rates[i].count)
651c8846e10SFelix Fietkau break;
652c8846e10SFelix Fietkau }
653c8846e10SFelix Fietkau msta->n_rates = i;
654c8846e10SFelix Fietkau mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates);
655c8846e10SFelix Fietkau msta->rate_probe = false;
656c8846e10SFelix Fietkau mt7603_wtbl_set_smps(dev, msta,
657261ce887SBenjamin Berg sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC);
658c8846e10SFelix Fietkau spin_unlock_bh(&dev->mt76.lock);
659c8846e10SFelix Fietkau }
660c8846e10SFelix Fietkau
661c8846e10SFelix Fietkau static void
mt7603_set_coverage_class(struct ieee80211_hw * hw,s16 coverage_class)662c8846e10SFelix Fietkau mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
663c8846e10SFelix Fietkau {
664c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
665c8846e10SFelix Fietkau
6662cb002e3SLorenzo Bianconi mutex_lock(&dev->mt76.mutex);
6676a792b1aSLorenzo Bianconi dev->coverage_class = max_t(s16, coverage_class, 0);
668c8846e10SFelix Fietkau mt7603_mac_set_timing(dev);
6692cb002e3SLorenzo Bianconi mutex_unlock(&dev->mt76.mutex);
670c8846e10SFelix Fietkau }
671c8846e10SFelix Fietkau
mt7603_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)6727f17b86aSRyder Lee static void mt7603_tx(struct ieee80211_hw *hw,
6737f17b86aSRyder Lee struct ieee80211_tx_control *control,
674c8846e10SFelix Fietkau struct sk_buff *skb)
675c8846e10SFelix Fietkau {
676c8846e10SFelix Fietkau struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
677c8846e10SFelix Fietkau struct ieee80211_vif *vif = info->control.vif;
678c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv;
679c8846e10SFelix Fietkau struct mt76_wcid *wcid = &dev->global_sta.wcid;
680c8846e10SFelix Fietkau
681c8846e10SFelix Fietkau if (control->sta) {
682c8846e10SFelix Fietkau struct mt7603_sta *msta;
683c8846e10SFelix Fietkau
684c8846e10SFelix Fietkau msta = (struct mt7603_sta *)control->sta->drv_priv;
685c8846e10SFelix Fietkau wcid = &msta->wcid;
686c8846e10SFelix Fietkau } else if (vif) {
687c8846e10SFelix Fietkau struct mt7603_vif *mvif;
688c8846e10SFelix Fietkau
689c8846e10SFelix Fietkau mvif = (struct mt7603_vif *)vif->drv_priv;
690c8846e10SFelix Fietkau wcid = &mvif->sta.wcid;
691c8846e10SFelix Fietkau }
692c8846e10SFelix Fietkau
6939fba6d07SFelix Fietkau mt76_tx(&dev->mphy, control->sta, wcid, skb);
694c8846e10SFelix Fietkau }
695c8846e10SFelix Fietkau
696c8846e10SFelix Fietkau const struct ieee80211_ops mt7603_ops = {
6970a44dfc0SJohannes Berg .add_chanctx = ieee80211_emulate_add_chanctx,
6980a44dfc0SJohannes Berg .remove_chanctx = ieee80211_emulate_remove_chanctx,
6990a44dfc0SJohannes Berg .change_chanctx = ieee80211_emulate_change_chanctx,
7000a44dfc0SJohannes Berg .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
701c8846e10SFelix Fietkau .tx = mt7603_tx,
702c8846e10SFelix Fietkau .start = mt7603_start,
703c8846e10SFelix Fietkau .stop = mt7603_stop,
704c8846e10SFelix Fietkau .add_interface = mt7603_add_interface,
705c8846e10SFelix Fietkau .remove_interface = mt7603_remove_interface,
706c8846e10SFelix Fietkau .config = mt7603_config,
707c8846e10SFelix Fietkau .configure_filter = mt7603_configure_filter,
708c8846e10SFelix Fietkau .bss_info_changed = mt7603_bss_info_changed,
709c8846e10SFelix Fietkau .sta_state = mt76_sta_state,
71043ba1922SFelix Fietkau .sta_pre_rcu_remove = mt76_sta_pre_rcu_remove,
711c8846e10SFelix Fietkau .set_key = mt7603_set_key,
712c8846e10SFelix Fietkau .conf_tx = mt7603_conf_tx,
7138b8ab5c2SLorenzo Bianconi .sw_scan_start = mt76_sw_scan,
7148b8ab5c2SLorenzo Bianconi .sw_scan_complete = mt76_sw_scan_complete,
715c8846e10SFelix Fietkau .flush = mt7603_flush,
716c8846e10SFelix Fietkau .ampdu_action = mt7603_ampdu_action,
717c8846e10SFelix Fietkau .get_txpower = mt76_get_txpower,
718c8846e10SFelix Fietkau .wake_tx_queue = mt76_wake_tx_queue,
719c8846e10SFelix Fietkau .sta_rate_tbl_update = mt7603_sta_rate_tbl_update,
720c8846e10SFelix Fietkau .release_buffered_frames = mt7603_release_buffered_frames,
721c8846e10SFelix Fietkau .set_coverage_class = mt7603_set_coverage_class,
72287d53103SStanislaw Gruszka .set_tim = mt76_set_tim,
723c8846e10SFelix Fietkau .get_survey = mt76_get_survey,
724e49c76d4SLorenzo Bianconi .get_antenna = mt76_get_antenna,
7254bbd6d83SLorenzo Bianconi .set_sar_specs = mt7603_set_sar_specs,
726c8846e10SFelix Fietkau };
727c8846e10SFelix Fietkau
728f3f8f050SBreno Leitao MODULE_DESCRIPTION("MediaTek MT7603E and MT76x8 wireless driver");
729c8846e10SFelix Fietkau MODULE_LICENSE("Dual BSD/GPL");
730c8846e10SFelix Fietkau
mt7603_init(void)731c8846e10SFelix Fietkau static int __init mt7603_init(void)
732c8846e10SFelix Fietkau {
733c8846e10SFelix Fietkau int ret;
734c8846e10SFelix Fietkau
735c8846e10SFelix Fietkau ret = platform_driver_register(&mt76_wmac_driver);
736c8846e10SFelix Fietkau if (ret)
737c8846e10SFelix Fietkau return ret;
738c8846e10SFelix Fietkau
739c8846e10SFelix Fietkau #ifdef CONFIG_PCI
740c8846e10SFelix Fietkau ret = pci_register_driver(&mt7603_pci_driver);
741c8846e10SFelix Fietkau if (ret)
742c8846e10SFelix Fietkau platform_driver_unregister(&mt76_wmac_driver);
743c8846e10SFelix Fietkau #endif
744c8846e10SFelix Fietkau return ret;
745c8846e10SFelix Fietkau }
746c8846e10SFelix Fietkau
mt7603_exit(void)747c8846e10SFelix Fietkau static void __exit mt7603_exit(void)
748c8846e10SFelix Fietkau {
749c8846e10SFelix Fietkau #ifdef CONFIG_PCI
750c8846e10SFelix Fietkau pci_unregister_driver(&mt7603_pci_driver);
751c8846e10SFelix Fietkau #endif
752c8846e10SFelix Fietkau platform_driver_unregister(&mt76_wmac_driver);
753c8846e10SFelix Fietkau }
754c8846e10SFelix Fietkau
755c8846e10SFelix Fietkau module_init(mt7603_init);
756c8846e10SFelix Fietkau module_exit(mt7603_exit);
757