1*828c91f7SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2277b024eSKalle Valo /* 3277b024eSKalle Valo * This file contains definitions for mwifiex USB interface driver. 4277b024eSKalle Valo * 5932183aaSGanapathi Bhat * Copyright 2011-2020 NXP 6277b024eSKalle Valo */ 7277b024eSKalle Valo 8277b024eSKalle Valo #ifndef _MWIFIEX_USB_H 9277b024eSKalle Valo #define _MWIFIEX_USB_H 10277b024eSKalle Valo 114a79aa17SBrian Norris #include <linux/completion.h> 12277b024eSKalle Valo #include <linux/usb.h> 13277b024eSKalle Valo 14277b024eSKalle Valo #define USB8XXX_VID 0x1286 15277b024eSKalle Valo 16277b024eSKalle Valo #define USB8766_PID_1 0x2041 17277b024eSKalle Valo #define USB8766_PID_2 0x2042 18277b024eSKalle Valo #define USB8797_PID_1 0x2043 19277b024eSKalle Valo #define USB8797_PID_2 0x2044 20277b024eSKalle Valo #define USB8801_PID_1 0x2049 21277b024eSKalle Valo #define USB8801_PID_2 0x204a 22277b024eSKalle Valo #define USB8997_PID_1 0x2052 23277b024eSKalle Valo #define USB8997_PID_2 0x204e 24277b024eSKalle Valo 25277b024eSKalle Valo 26277b024eSKalle Valo #define USB8XXX_FW_DNLD 1 27277b024eSKalle Valo #define USB8XXX_FW_READY 2 28277b024eSKalle Valo #define USB8XXX_FW_MAX_RETRY 3 29277b024eSKalle Valo 30277b024eSKalle Valo #define MWIFIEX_TX_DATA_PORT 2 31277b024eSKalle Valo #define MWIFIEX_TX_DATA_URB 6 32277b024eSKalle Valo #define MWIFIEX_RX_DATA_URB 6 33277b024eSKalle Valo #define MWIFIEX_USB_TIMEOUT 100 34277b024eSKalle Valo 35277b024eSKalle Valo #define USB8766_DEFAULT_FW_NAME "mrvl/usb8766_uapsta.bin" 36277b024eSKalle Valo #define USB8797_DEFAULT_FW_NAME "mrvl/usb8797_uapsta.bin" 37277b024eSKalle Valo #define USB8801_DEFAULT_FW_NAME "mrvl/usb8801_uapsta.bin" 38b7450e24SGanapathi Bhat #define USB8997_DEFAULT_FW_NAME "mrvl/usbusb8997_combo_v4.bin" 39277b024eSKalle Valo 40277b024eSKalle Valo #define FW_DNLD_TX_BUF_SIZE 620 41277b024eSKalle Valo #define FW_DNLD_RX_BUF_SIZE 2048 42277b024eSKalle Valo #define FW_HAS_LAST_BLOCK 0x00000004 4378776467SGanapathi Bhat #define FW_CMD_7 0x00000007 44277b024eSKalle Valo 45277b024eSKalle Valo #define FW_DATA_XMIT_SIZE \ 46277b024eSKalle Valo (sizeof(struct fw_header) + dlen + sizeof(u32)) 47277b024eSKalle Valo 48277b024eSKalle Valo struct urb_context { 49277b024eSKalle Valo struct mwifiex_adapter *adapter; 50277b024eSKalle Valo struct sk_buff *skb; 51277b024eSKalle Valo struct urb *urb; 52277b024eSKalle Valo u8 ep; 53277b024eSKalle Valo }; 54277b024eSKalle Valo 55a2ca85adSXinming Hu #define MWIFIEX_USB_TX_AGGR_TMO_MIN 1 56a2ca85adSXinming Hu #define MWIFIEX_USB_TX_AGGR_TMO_MAX 4 57a2ca85adSXinming Hu 58a2ca85adSXinming Hu struct tx_aggr_tmr_cnxt { 59a2ca85adSXinming Hu struct mwifiex_adapter *adapter; 60a2ca85adSXinming Hu struct usb_tx_data_port *port; 61a2ca85adSXinming Hu struct timer_list hold_timer; 62a2ca85adSXinming Hu bool is_hold_timer_set; 63a2ca85adSXinming Hu u32 hold_tmo_msecs; 64a2ca85adSXinming Hu }; 65a2ca85adSXinming Hu 66c5994293SXinming Hu struct usb_tx_aggr { 67c5994293SXinming Hu struct sk_buff_head aggr_list; 68c5994293SXinming Hu int aggr_len; 69c5994293SXinming Hu int aggr_num; 70a2ca85adSXinming Hu struct tx_aggr_tmr_cnxt timer_cnxt; 71c5994293SXinming Hu }; 72c5994293SXinming Hu 73277b024eSKalle Valo struct usb_tx_data_port { 74277b024eSKalle Valo u8 tx_data_ep; 75277b024eSKalle Valo u8 block_status; 76277b024eSKalle Valo atomic_t tx_data_urb_pending; 77277b024eSKalle Valo int tx_data_ix; 78277b024eSKalle Valo struct urb_context tx_data_list[MWIFIEX_TX_DATA_URB]; 79c5994293SXinming Hu /* usb tx aggregation*/ 80c5994293SXinming Hu struct usb_tx_aggr tx_aggr; 81c5994293SXinming Hu struct sk_buff *skb_aggr[MWIFIEX_TX_DATA_URB]; 82a2ca85adSXinming Hu /* lock for protect tx aggregation data path*/ 83a2ca85adSXinming Hu spinlock_t tx_aggr_lock; 84277b024eSKalle Valo }; 85277b024eSKalle Valo 86277b024eSKalle Valo struct usb_card_rec { 87277b024eSKalle Valo struct mwifiex_adapter *adapter; 88277b024eSKalle Valo struct usb_device *udev; 89277b024eSKalle Valo struct usb_interface *intf; 904a79aa17SBrian Norris struct completion fw_done; 91277b024eSKalle Valo u8 rx_cmd_ep; 92277b024eSKalle Valo struct urb_context rx_cmd; 93277b024eSKalle Valo atomic_t rx_cmd_urb_pending; 94277b024eSKalle Valo struct urb_context rx_data_list[MWIFIEX_RX_DATA_URB]; 95277b024eSKalle Valo u8 usb_boot_state; 96277b024eSKalle Valo u8 rx_data_ep; 97277b024eSKalle Valo atomic_t rx_data_urb_pending; 98277b024eSKalle Valo u8 tx_cmd_ep; 99277b024eSKalle Valo atomic_t tx_cmd_urb_pending; 100277b024eSKalle Valo int bulk_out_maxpktsize; 101277b024eSKalle Valo struct urb_context tx_cmd; 102277b024eSKalle Valo u8 mc_resync_flag; 103277b024eSKalle Valo struct usb_tx_data_port port[MWIFIEX_TX_DATA_PORT]; 104182f5696SGanapathi Bhat int rx_cmd_ep_type; 105182f5696SGanapathi Bhat u8 rx_cmd_interval; 106182f5696SGanapathi Bhat int tx_cmd_ep_type; 107182f5696SGanapathi Bhat u8 tx_cmd_interval; 108277b024eSKalle Valo }; 109277b024eSKalle Valo 110277b024eSKalle Valo struct fw_header { 111277b024eSKalle Valo __le32 dnld_cmd; 112277b024eSKalle Valo __le32 base_addr; 113277b024eSKalle Valo __le32 data_len; 114277b024eSKalle Valo __le32 crc; 115277b024eSKalle Valo }; 116277b024eSKalle Valo 117277b024eSKalle Valo struct fw_sync_header { 118277b024eSKalle Valo __le32 cmd; 119277b024eSKalle Valo __le32 seq_num; 1205c0b8798SKarthik Ananthapadmanabha } __packed; 121277b024eSKalle Valo 122277b024eSKalle Valo struct fw_data { 123277b024eSKalle Valo struct fw_header fw_hdr; 124277b024eSKalle Valo __le32 seq_num; 125090f2c5dSGustavo A. R. Silva u8 data[]; 1265c0b8798SKarthik Ananthapadmanabha } __packed; 127277b024eSKalle Valo 128277b024eSKalle Valo #endif /*_MWIFIEX_USB_H */ 129