1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * NXP Wireless LAN device driver: SDIO specific handling 4 * 5 * Copyright 2011-2020 NXP 6 */ 7 8 #include <linux/firmware.h> 9 10 #include "decl.h" 11 #include "ioctl.h" 12 #include "util.h" 13 #include "fw.h" 14 #include "main.h" 15 #include "wmm.h" 16 #include "11n.h" 17 #include "sdio.h" 18 19 20 #define SDIO_VERSION "1.0" 21 22 static void mwifiex_sdio_work(struct work_struct *work); 23 24 static struct mwifiex_if_ops sdio_ops; 25 26 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = { 27 .start_rd_port = 1, 28 .start_wr_port = 1, 29 .base_0_reg = 0x0040, 30 .base_1_reg = 0x0041, 31 .poll_reg = 0x30, 32 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK, 33 .host_int_rsr_reg = 0x1, 34 .host_int_mask_reg = 0x02, 35 .host_int_status_reg = 0x03, 36 .status_reg_0 = 0x60, 37 .status_reg_1 = 0x61, 38 .sdio_int_mask = 0x3f, 39 .data_port_mask = 0x0000fffe, 40 .io_port_0_reg = 0x78, 41 .io_port_1_reg = 0x79, 42 .io_port_2_reg = 0x7A, 43 .max_mp_regs = 64, 44 .rd_bitmap_l = 0x04, 45 .rd_bitmap_u = 0x05, 46 .wr_bitmap_l = 0x06, 47 .wr_bitmap_u = 0x07, 48 .rd_len_p0_l = 0x08, 49 .rd_len_p0_u = 0x09, 50 .card_misc_cfg_reg = 0x6c, 51 .func1_dump_reg_start = 0x0, 52 .func1_dump_reg_end = 0x9, 53 .func1_scratch_reg = 0x60, 54 .func1_spec_reg_num = 5, 55 .func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c}, 56 }; 57 58 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = { 59 .start_rd_port = 0, 60 .start_wr_port = 0, 61 .base_0_reg = 0x60, 62 .base_1_reg = 0x61, 63 .poll_reg = 0x50, 64 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 65 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 66 .host_int_rsr_reg = 0x1, 67 .host_int_status_reg = 0x03, 68 .host_int_mask_reg = 0x02, 69 .status_reg_0 = 0xc0, 70 .status_reg_1 = 0xc1, 71 .sdio_int_mask = 0xff, 72 .data_port_mask = 0xffffffff, 73 .io_port_0_reg = 0xD8, 74 .io_port_1_reg = 0xD9, 75 .io_port_2_reg = 0xDA, 76 .max_mp_regs = 184, 77 .rd_bitmap_l = 0x04, 78 .rd_bitmap_u = 0x05, 79 .rd_bitmap_1l = 0x06, 80 .rd_bitmap_1u = 0x07, 81 .wr_bitmap_l = 0x08, 82 .wr_bitmap_u = 0x09, 83 .wr_bitmap_1l = 0x0a, 84 .wr_bitmap_1u = 0x0b, 85 .rd_len_p0_l = 0x0c, 86 .rd_len_p0_u = 0x0d, 87 .card_misc_cfg_reg = 0xcc, 88 .card_cfg_2_1_reg = 0xcd, 89 .cmd_rd_len_0 = 0xb4, 90 .cmd_rd_len_1 = 0xb5, 91 .cmd_rd_len_2 = 0xb6, 92 .cmd_rd_len_3 = 0xb7, 93 .cmd_cfg_0 = 0xb8, 94 .cmd_cfg_1 = 0xb9, 95 .cmd_cfg_2 = 0xba, 96 .cmd_cfg_3 = 0xbb, 97 .fw_dump_host_ready = 0xee, 98 .fw_dump_ctrl = 0xe2, 99 .fw_dump_start = 0xe3, 100 .fw_dump_end = 0xea, 101 .func1_dump_reg_start = 0x0, 102 .func1_dump_reg_end = 0xb, 103 .func1_scratch_reg = 0xc0, 104 .func1_spec_reg_num = 8, 105 .func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58, 106 0x59, 0x5c, 0x5d}, 107 }; 108 109 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8977 = { 110 .start_rd_port = 0, 111 .start_wr_port = 0, 112 .base_0_reg = 0xF8, 113 .base_1_reg = 0xF9, 114 .poll_reg = 0x5C, 115 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 116 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 117 .host_int_rsr_reg = 0x4, 118 .host_int_status_reg = 0x0C, 119 .host_int_mask_reg = 0x08, 120 .status_reg_0 = 0xE8, 121 .status_reg_1 = 0xE9, 122 .sdio_int_mask = 0xff, 123 .data_port_mask = 0xffffffff, 124 .io_port_0_reg = 0xE4, 125 .io_port_1_reg = 0xE5, 126 .io_port_2_reg = 0xE6, 127 .max_mp_regs = 196, 128 .rd_bitmap_l = 0x10, 129 .rd_bitmap_u = 0x11, 130 .rd_bitmap_1l = 0x12, 131 .rd_bitmap_1u = 0x13, 132 .wr_bitmap_l = 0x14, 133 .wr_bitmap_u = 0x15, 134 .wr_bitmap_1l = 0x16, 135 .wr_bitmap_1u = 0x17, 136 .rd_len_p0_l = 0x18, 137 .rd_len_p0_u = 0x19, 138 .card_misc_cfg_reg = 0xd8, 139 .card_cfg_2_1_reg = 0xd9, 140 .cmd_rd_len_0 = 0xc0, 141 .cmd_rd_len_1 = 0xc1, 142 .cmd_rd_len_2 = 0xc2, 143 .cmd_rd_len_3 = 0xc3, 144 .cmd_cfg_0 = 0xc4, 145 .cmd_cfg_1 = 0xc5, 146 .cmd_cfg_2 = 0xc6, 147 .cmd_cfg_3 = 0xc7, 148 .fw_dump_host_ready = 0xcc, 149 .fw_dump_ctrl = 0xf0, 150 .fw_dump_start = 0xf1, 151 .fw_dump_end = 0xf8, 152 .func1_dump_reg_start = 0x10, 153 .func1_dump_reg_end = 0x17, 154 .func1_scratch_reg = 0xe8, 155 .func1_spec_reg_num = 13, 156 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 157 0x60, 0x61, 0x62, 0x64, 158 0x65, 0x66, 0x68, 0x69, 159 0x6a}, 160 }; 161 162 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = { 163 .start_rd_port = 0, 164 .start_wr_port = 0, 165 .base_0_reg = 0xF8, 166 .base_1_reg = 0xF9, 167 .poll_reg = 0x5C, 168 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 169 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 170 .host_int_rsr_reg = 0x4, 171 .host_int_status_reg = 0x0C, 172 .host_int_mask_reg = 0x08, 173 .host_strap_reg = 0xF4, 174 .host_strap_mask = 0x01, 175 .host_strap_value = 0x00, 176 .status_reg_0 = 0xE8, 177 .status_reg_1 = 0xE9, 178 .sdio_int_mask = 0xff, 179 .data_port_mask = 0xffffffff, 180 .io_port_0_reg = 0xE4, 181 .io_port_1_reg = 0xE5, 182 .io_port_2_reg = 0xE6, 183 .max_mp_regs = 196, 184 .rd_bitmap_l = 0x10, 185 .rd_bitmap_u = 0x11, 186 .rd_bitmap_1l = 0x12, 187 .rd_bitmap_1u = 0x13, 188 .wr_bitmap_l = 0x14, 189 .wr_bitmap_u = 0x15, 190 .wr_bitmap_1l = 0x16, 191 .wr_bitmap_1u = 0x17, 192 .rd_len_p0_l = 0x18, 193 .rd_len_p0_u = 0x19, 194 .card_misc_cfg_reg = 0xd8, 195 .card_cfg_2_1_reg = 0xd9, 196 .cmd_rd_len_0 = 0xc0, 197 .cmd_rd_len_1 = 0xc1, 198 .cmd_rd_len_2 = 0xc2, 199 .cmd_rd_len_3 = 0xc3, 200 .cmd_cfg_0 = 0xc4, 201 .cmd_cfg_1 = 0xc5, 202 .cmd_cfg_2 = 0xc6, 203 .cmd_cfg_3 = 0xc7, 204 .fw_dump_host_ready = 0xcc, 205 .fw_dump_ctrl = 0xf0, 206 .fw_dump_start = 0xf1, 207 .fw_dump_end = 0xf8, 208 .func1_dump_reg_start = 0x10, 209 .func1_dump_reg_end = 0x17, 210 .func1_scratch_reg = 0xe8, 211 .func1_spec_reg_num = 13, 212 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 213 0x60, 0x61, 0x62, 0x64, 214 0x65, 0x66, 0x68, 0x69, 215 0x6a}, 216 }; 217 218 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = { 219 .start_rd_port = 0, 220 .start_wr_port = 0, 221 .base_0_reg = 0x6C, 222 .base_1_reg = 0x6D, 223 .poll_reg = 0x5C, 224 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 225 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 226 .host_int_rsr_reg = 0x4, 227 .host_int_status_reg = 0x0C, 228 .host_int_mask_reg = 0x08, 229 .status_reg_0 = 0x90, 230 .status_reg_1 = 0x91, 231 .sdio_int_mask = 0xff, 232 .data_port_mask = 0xffffffff, 233 .io_port_0_reg = 0xE4, 234 .io_port_1_reg = 0xE5, 235 .io_port_2_reg = 0xE6, 236 .max_mp_regs = 196, 237 .rd_bitmap_l = 0x10, 238 .rd_bitmap_u = 0x11, 239 .rd_bitmap_1l = 0x12, 240 .rd_bitmap_1u = 0x13, 241 .wr_bitmap_l = 0x14, 242 .wr_bitmap_u = 0x15, 243 .wr_bitmap_1l = 0x16, 244 .wr_bitmap_1u = 0x17, 245 .rd_len_p0_l = 0x18, 246 .rd_len_p0_u = 0x19, 247 .card_misc_cfg_reg = 0xd8, 248 .card_cfg_2_1_reg = 0xd9, 249 .cmd_rd_len_0 = 0xc0, 250 .cmd_rd_len_1 = 0xc1, 251 .cmd_rd_len_2 = 0xc2, 252 .cmd_rd_len_3 = 0xc3, 253 .cmd_cfg_0 = 0xc4, 254 .cmd_cfg_1 = 0xc5, 255 .cmd_cfg_2 = 0xc6, 256 .cmd_cfg_3 = 0xc7, 257 .func1_dump_reg_start = 0x10, 258 .func1_dump_reg_end = 0x17, 259 .func1_scratch_reg = 0x90, 260 .func1_spec_reg_num = 13, 261 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60, 262 0x61, 0x62, 0x64, 0x65, 0x66, 263 0x68, 0x69, 0x6a}, 264 }; 265 266 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd89xx = { 267 .start_rd_port = 0, 268 .start_wr_port = 0, 269 .base_0_reg = 0xF8, 270 .base_1_reg = 0xF9, 271 .poll_reg = 0x5C, 272 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 273 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 274 .host_int_rsr_reg = 0x4, 275 .host_int_status_reg = 0x0C, 276 .host_int_mask_reg = 0x08, 277 .host_strap_reg = 0xF4, 278 .host_strap_mask = 0x01, 279 .host_strap_value = 0x00, 280 .status_reg_0 = 0xE8, 281 .status_reg_1 = 0xE9, 282 .sdio_int_mask = 0xff, 283 .data_port_mask = 0xffffffff, 284 .io_port_0_reg = 0xE4, 285 .io_port_1_reg = 0xE5, 286 .io_port_2_reg = 0xE6, 287 .max_mp_regs = 196, 288 .rd_bitmap_l = 0x10, 289 .rd_bitmap_u = 0x11, 290 .rd_bitmap_1l = 0x12, 291 .rd_bitmap_1u = 0x13, 292 .wr_bitmap_l = 0x14, 293 .wr_bitmap_u = 0x15, 294 .wr_bitmap_1l = 0x16, 295 .wr_bitmap_1u = 0x17, 296 .rd_len_p0_l = 0x18, 297 .rd_len_p0_u = 0x19, 298 .card_misc_cfg_reg = 0xd8, 299 .card_cfg_2_1_reg = 0xd9, 300 .cmd_rd_len_0 = 0xc0, 301 .cmd_rd_len_1 = 0xc1, 302 .cmd_rd_len_2 = 0xc2, 303 .cmd_rd_len_3 = 0xc3, 304 .cmd_cfg_0 = 0xc4, 305 .cmd_cfg_1 = 0xc5, 306 .cmd_cfg_2 = 0xc6, 307 .cmd_cfg_3 = 0xc7, 308 .fw_dump_host_ready = 0xcc, 309 .fw_dump_ctrl = 0xf9, 310 .fw_dump_start = 0xf1, 311 .fw_dump_end = 0xf8, 312 .func1_dump_reg_start = 0x10, 313 .func1_dump_reg_end = 0x17, 314 .func1_scratch_reg = 0xE8, 315 .func1_spec_reg_num = 13, 316 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60, 317 0x61, 0x62, 0x64, 0x65, 0x66, 318 0x68, 0x69, 0x6a}, 319 }; 320 321 static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = { 322 .firmware = SD8786_DEFAULT_FW_NAME, 323 .reg = &mwifiex_reg_sd87xx, 324 .max_ports = 16, 325 .mp_agg_pkt_limit = 8, 326 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 327 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 328 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 329 .supports_sdio_new_mode = false, 330 .has_control_mask = true, 331 .can_dump_fw = false, 332 .can_auto_tdls = false, 333 .can_ext_scan = false, 334 .fw_ready_extra_delay = false, 335 }; 336 337 static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = { 338 .firmware = SD8787_DEFAULT_FW_NAME, 339 .reg = &mwifiex_reg_sd87xx, 340 .max_ports = 16, 341 .mp_agg_pkt_limit = 8, 342 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 343 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 344 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 345 .supports_sdio_new_mode = false, 346 .has_control_mask = true, 347 .can_dump_fw = false, 348 .can_auto_tdls = false, 349 .can_ext_scan = true, 350 .fw_ready_extra_delay = false, 351 }; 352 353 static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = { 354 .firmware = SD8797_DEFAULT_FW_NAME, 355 .reg = &mwifiex_reg_sd87xx, 356 .max_ports = 16, 357 .mp_agg_pkt_limit = 8, 358 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 359 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 360 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 361 .supports_sdio_new_mode = false, 362 .has_control_mask = true, 363 .can_dump_fw = false, 364 .can_auto_tdls = false, 365 .can_ext_scan = true, 366 .fw_ready_extra_delay = false, 367 }; 368 369 static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = { 370 .firmware = SD8897_DEFAULT_FW_NAME, 371 .reg = &mwifiex_reg_sd8897, 372 .max_ports = 32, 373 .mp_agg_pkt_limit = 16, 374 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 375 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 376 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 377 .supports_sdio_new_mode = true, 378 .has_control_mask = false, 379 .can_dump_fw = true, 380 .can_auto_tdls = false, 381 .can_ext_scan = true, 382 .fw_ready_extra_delay = false, 383 }; 384 385 static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = { 386 .firmware = SD8977_DEFAULT_FW_NAME, 387 .reg = &mwifiex_reg_sd8977, 388 .max_ports = 32, 389 .mp_agg_pkt_limit = 16, 390 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 391 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 392 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 393 .supports_sdio_new_mode = true, 394 .has_control_mask = false, 395 .can_dump_fw = true, 396 .fw_dump_enh = true, 397 .can_auto_tdls = false, 398 .can_ext_scan = true, 399 .fw_ready_extra_delay = false, 400 }; 401 402 static const struct mwifiex_sdio_device mwifiex_sdio_sd8978 = { 403 .firmware_sdiouart = SD8978_SDIOUART_FW_NAME, 404 .reg = &mwifiex_reg_sd89xx, 405 .max_ports = 32, 406 .mp_agg_pkt_limit = 16, 407 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 408 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 409 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 410 .supports_sdio_new_mode = true, 411 .has_control_mask = false, 412 .can_dump_fw = true, 413 .fw_dump_enh = true, 414 .can_auto_tdls = false, 415 .can_ext_scan = true, 416 .fw_ready_extra_delay = true, 417 }; 418 419 static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = { 420 .firmware = SD8997_DEFAULT_FW_NAME, 421 .firmware_sdiouart = SD8997_SDIOUART_FW_NAME, 422 .reg = &mwifiex_reg_sd8997, 423 .max_ports = 32, 424 .mp_agg_pkt_limit = 16, 425 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 426 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 427 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 428 .supports_sdio_new_mode = true, 429 .has_control_mask = false, 430 .can_dump_fw = true, 431 .fw_dump_enh = true, 432 .can_auto_tdls = false, 433 .can_ext_scan = true, 434 .fw_ready_extra_delay = false, 435 }; 436 437 static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = { 438 .firmware = SD8887_DEFAULT_FW_NAME, 439 .reg = &mwifiex_reg_sd8887, 440 .max_ports = 32, 441 .mp_agg_pkt_limit = 16, 442 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 443 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K, 444 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K, 445 .supports_sdio_new_mode = true, 446 .has_control_mask = false, 447 .can_dump_fw = false, 448 .can_auto_tdls = true, 449 .can_ext_scan = true, 450 .fw_ready_extra_delay = false, 451 }; 452 453 static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = { 454 .firmware = SD8987_DEFAULT_FW_NAME, 455 .reg = &mwifiex_reg_sd89xx, 456 .max_ports = 32, 457 .mp_agg_pkt_limit = 16, 458 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 459 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 460 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 461 .supports_sdio_new_mode = true, 462 .has_control_mask = false, 463 .can_dump_fw = true, 464 .fw_dump_enh = true, 465 .can_auto_tdls = true, 466 .can_ext_scan = true, 467 .fw_ready_extra_delay = false, 468 }; 469 470 static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = { 471 .firmware = SD8801_DEFAULT_FW_NAME, 472 .reg = &mwifiex_reg_sd87xx, 473 .max_ports = 16, 474 .mp_agg_pkt_limit = 8, 475 .supports_sdio_new_mode = false, 476 .has_control_mask = true, 477 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 478 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 479 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 480 .can_dump_fw = false, 481 .can_auto_tdls = false, 482 .can_ext_scan = true, 483 .fw_ready_extra_delay = false, 484 }; 485 486 static struct memory_type_mapping generic_mem_type_map[] = { 487 {"DUMP", NULL, 0, 0xDD}, 488 }; 489 490 static struct memory_type_mapping mem_type_mapping_tbl[] = { 491 {"ITCM", NULL, 0, 0xF0}, 492 {"DTCM", NULL, 0, 0xF1}, 493 {"SQRAM", NULL, 0, 0xF2}, 494 {"APU", NULL, 0, 0xF3}, 495 {"CIU", NULL, 0, 0xF4}, 496 {"ICU", NULL, 0, 0xF5}, 497 {"MAC", NULL, 0, 0xF6}, 498 {"EXT7", NULL, 0, 0xF7}, 499 {"EXT8", NULL, 0, 0xF8}, 500 {"EXT9", NULL, 0, 0xF9}, 501 {"EXT10", NULL, 0, 0xFA}, 502 {"EXT11", NULL, 0, 0xFB}, 503 {"EXT12", NULL, 0, 0xFC}, 504 {"EXT13", NULL, 0, 0xFD}, 505 {"EXTLAST", NULL, 0, 0xFE}, 506 }; 507 508 static const struct of_device_id mwifiex_sdio_of_match_table[] __maybe_unused = { 509 { .compatible = "marvell,sd8787" }, 510 { .compatible = "marvell,sd8897" }, 511 { .compatible = "marvell,sd8978" }, 512 { .compatible = "marvell,sd8997" }, 513 { .compatible = "nxp,iw416" }, 514 { } 515 }; 516 517 /* This function parse device tree node using mmc subnode devicetree API. 518 * The device node is saved in card->plt_of_node. 519 * if the device tree node exist and include interrupts attributes, this 520 * function will also request platform specific wakeup interrupt. 521 */ 522 static int mwifiex_sdio_probe_of(struct device *dev) 523 { 524 if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) { 525 dev_err(dev, "required compatible string missing\n"); 526 return -EINVAL; 527 } 528 529 return 0; 530 } 531 532 /* 533 * SDIO probe. 534 * 535 * This function probes an mwifiex device and registers it. It allocates 536 * the card structure, enables SDIO function number and initiates the 537 * device registration and initialization procedure by adding a logical 538 * interface. 539 */ 540 static int 541 mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id) 542 { 543 int ret; 544 struct sdio_mmc_card *card = NULL; 545 546 pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n", 547 func->vendor, func->device, func->class, func->num); 548 549 card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL); 550 if (!card) 551 return -ENOMEM; 552 553 init_completion(&card->fw_done); 554 555 card->func = func; 556 557 func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE; 558 559 if (id->driver_data) { 560 struct mwifiex_sdio_device *data = (void *)id->driver_data; 561 562 card->firmware = data->firmware; 563 card->firmware_sdiouart = data->firmware_sdiouart; 564 card->reg = data->reg; 565 card->max_ports = data->max_ports; 566 card->mp_agg_pkt_limit = data->mp_agg_pkt_limit; 567 card->supports_sdio_new_mode = data->supports_sdio_new_mode; 568 card->has_control_mask = data->has_control_mask; 569 card->tx_buf_size = data->tx_buf_size; 570 card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size; 571 card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size; 572 card->can_dump_fw = data->can_dump_fw; 573 card->fw_dump_enh = data->fw_dump_enh; 574 card->can_auto_tdls = data->can_auto_tdls; 575 card->can_ext_scan = data->can_ext_scan; 576 card->fw_ready_extra_delay = data->fw_ready_extra_delay; 577 INIT_WORK(&card->work, mwifiex_sdio_work); 578 } 579 580 sdio_claim_host(func); 581 ret = sdio_enable_func(func); 582 sdio_release_host(func); 583 584 if (ret) { 585 dev_err(&func->dev, "failed to enable function\n"); 586 return ret; 587 } 588 589 /* device tree node parsing and platform specific configuration*/ 590 if (func->dev.of_node) { 591 ret = mwifiex_sdio_probe_of(&func->dev); 592 if (ret) 593 goto err_disable; 594 } 595 596 ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops, 597 MWIFIEX_SDIO, &func->dev); 598 if (ret) { 599 dev_err(&func->dev, "add card failed\n"); 600 goto err_disable; 601 } 602 603 return 0; 604 605 err_disable: 606 sdio_claim_host(func); 607 sdio_disable_func(func); 608 sdio_release_host(func); 609 610 return ret; 611 } 612 613 /* 614 * SDIO resume. 615 * 616 * Kernel needs to suspend all functions separately. Therefore all 617 * registered functions must have drivers with suspend and resume 618 * methods. Failing that the kernel simply removes the whole card. 619 * 620 * If already not resumed, this function turns on the traffic and 621 * sends a host sleep cancel request to the firmware. 622 */ 623 static int mwifiex_sdio_resume(struct device *dev) 624 { 625 struct sdio_func *func = dev_to_sdio_func(dev); 626 struct sdio_mmc_card *card; 627 struct mwifiex_adapter *adapter; 628 629 card = sdio_get_drvdata(func); 630 if (!card || !card->adapter) { 631 dev_err(dev, "resume: invalid card or adapter\n"); 632 return 0; 633 } 634 635 adapter = card->adapter; 636 637 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 638 mwifiex_dbg(adapter, WARN, 639 "device already resumed\n"); 640 return 0; 641 } 642 643 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 644 645 /* Disable Host Sleep */ 646 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 647 MWIFIEX_SYNC_CMD); 648 649 mwifiex_disable_wake(adapter); 650 651 return 0; 652 } 653 654 /* Write data into SDIO card register. Caller claims SDIO device. */ 655 static int 656 mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data) 657 { 658 int ret = -1; 659 660 sdio_writeb(func, data, reg, &ret); 661 return ret; 662 } 663 664 /* This function writes data into SDIO card register. 665 */ 666 static int 667 mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data) 668 { 669 struct sdio_mmc_card *card = adapter->card; 670 int ret; 671 672 sdio_claim_host(card->func); 673 ret = mwifiex_write_reg_locked(card->func, reg, data); 674 sdio_release_host(card->func); 675 676 return ret; 677 } 678 679 /* This function reads data from SDIO card register. 680 */ 681 static int 682 mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data) 683 { 684 struct sdio_mmc_card *card = adapter->card; 685 int ret = -1; 686 u8 val; 687 688 sdio_claim_host(card->func); 689 val = sdio_readb(card->func, reg, &ret); 690 sdio_release_host(card->func); 691 692 *data = val; 693 694 return ret; 695 } 696 697 /* This function writes multiple data into SDIO card memory. 698 * 699 * This does not work in suspended mode. 700 */ 701 static int 702 mwifiex_write_data_sync(struct mwifiex_adapter *adapter, 703 u8 *buffer, u32 pkt_len, u32 port) 704 { 705 struct sdio_mmc_card *card = adapter->card; 706 int ret; 707 u8 blk_mode = 708 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE; 709 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 710 u32 blk_cnt = 711 (blk_mode == 712 BLOCK_MODE) ? (pkt_len / 713 MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len; 714 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 715 716 if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 717 mwifiex_dbg(adapter, ERROR, 718 "%s: not allowed while suspended\n", __func__); 719 return -1; 720 } 721 722 sdio_claim_host(card->func); 723 724 ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size); 725 726 sdio_release_host(card->func); 727 728 return ret; 729 } 730 731 /* This function reads multiple data from SDIO card memory. 732 */ 733 static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer, 734 u32 len, u32 port, u8 claim) 735 { 736 struct sdio_mmc_card *card = adapter->card; 737 int ret; 738 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE 739 : BLOCK_MODE; 740 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 741 u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE) 742 : len; 743 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 744 745 if (claim) 746 sdio_claim_host(card->func); 747 748 ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size); 749 750 if (claim) 751 sdio_release_host(card->func); 752 753 return ret; 754 } 755 756 /* This function reads the firmware status. 757 */ 758 static int 759 mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat) 760 { 761 struct sdio_mmc_card *card = adapter->card; 762 const struct mwifiex_sdio_card_reg *reg = card->reg; 763 u8 fws0, fws1; 764 765 if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0)) 766 return -1; 767 768 if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1)) 769 return -1; 770 771 *dat = (u16)((fws1 << 8) | fws0); 772 return 0; 773 } 774 775 /* This function checks the firmware status in card. 776 */ 777 static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, 778 u32 poll_num) 779 { 780 struct sdio_mmc_card *card = adapter->card; 781 int ret = 0; 782 u16 firmware_stat = 0; 783 u32 tries; 784 785 for (tries = 0; tries < poll_num; tries++) { 786 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 787 if (ret) 788 continue; 789 if (firmware_stat == FIRMWARE_READY_SDIO) { 790 ret = 0; 791 break; 792 } 793 794 msleep(100); 795 ret = -1; 796 } 797 798 if (card->fw_ready_extra_delay && 799 firmware_stat == FIRMWARE_READY_SDIO) 800 /* firmware might pretend to be ready, when it's not. 801 * Wait a little bit more as a workaround. 802 */ 803 msleep(100); 804 805 return ret; 806 } 807 808 /* This function checks if WLAN is the winner. 809 */ 810 static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 811 { 812 int ret = 0; 813 u8 winner = 0; 814 struct sdio_mmc_card *card = adapter->card; 815 816 if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner)) 817 return -1; 818 819 if (winner) 820 adapter->winner = 0; 821 else 822 adapter->winner = 1; 823 824 return ret; 825 } 826 827 /* 828 * SDIO remove. 829 * 830 * This function removes the interface and frees up the card structure. 831 */ 832 static void 833 mwifiex_sdio_remove(struct sdio_func *func) 834 { 835 struct sdio_mmc_card *card; 836 struct mwifiex_adapter *adapter; 837 struct mwifiex_private *priv; 838 int ret = 0; 839 u16 firmware_stat; 840 841 card = sdio_get_drvdata(func); 842 if (!card) 843 return; 844 845 wait_for_completion(&card->fw_done); 846 847 adapter = card->adapter; 848 if (!adapter || !adapter->priv_num) 849 return; 850 851 mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num); 852 853 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 854 if (!ret && firmware_stat == FIRMWARE_READY_SDIO && 855 !adapter->mfg_mode) { 856 mwifiex_deauthenticate_all(adapter); 857 858 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 859 mwifiex_disable_auto_ds(priv); 860 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 861 } 862 863 mwifiex_remove_card(adapter); 864 } 865 866 /* 867 * SDIO suspend. 868 * 869 * Kernel needs to suspend all functions separately. Therefore all 870 * registered functions must have drivers with suspend and resume 871 * methods. Failing that the kernel simply removes the whole card. 872 * 873 * If already not suspended, this function allocates and sends a host 874 * sleep activate request to the firmware and turns off the traffic. 875 */ 876 static int mwifiex_sdio_suspend(struct device *dev) 877 { 878 struct sdio_func *func = dev_to_sdio_func(dev); 879 struct sdio_mmc_card *card; 880 struct mwifiex_adapter *adapter; 881 mmc_pm_flag_t pm_flag = 0; 882 int ret = 0; 883 884 pm_flag = sdio_get_host_pm_caps(func); 885 pr_debug("cmd: %s: suspend: PM flag = 0x%x\n", 886 sdio_func_id(func), pm_flag); 887 if (!(pm_flag & MMC_PM_KEEP_POWER)) { 888 dev_err(dev, "%s: cannot remain alive while host is" 889 " suspended\n", sdio_func_id(func)); 890 return -ENOSYS; 891 } 892 893 card = sdio_get_drvdata(func); 894 if (!card) { 895 dev_err(dev, "suspend: invalid card\n"); 896 return 0; 897 } 898 899 /* Might still be loading firmware */ 900 wait_for_completion(&card->fw_done); 901 902 adapter = card->adapter; 903 if (!adapter) { 904 dev_err(dev, "adapter is not valid\n"); 905 return 0; 906 } 907 908 if (!adapter->is_up) 909 return -EBUSY; 910 911 mwifiex_enable_wake(adapter); 912 913 /* Enable the Host Sleep */ 914 if (!mwifiex_enable_hs(adapter)) { 915 mwifiex_dbg(adapter, ERROR, 916 "cmd: failed to suspend\n"); 917 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 918 mwifiex_disable_wake(adapter); 919 return -EFAULT; 920 } 921 922 mwifiex_dbg(adapter, INFO, 923 "cmd: suspend with MMC_PM_KEEP_POWER\n"); 924 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 925 926 /* Indicate device suspended */ 927 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 928 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 929 930 return ret; 931 } 932 933 static void mwifiex_sdio_coredump(struct device *dev) 934 { 935 struct sdio_func *func = dev_to_sdio_func(dev); 936 struct sdio_mmc_card *card; 937 938 card = sdio_get_drvdata(func); 939 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 940 &card->work_flags)) 941 schedule_work(&card->work); 942 } 943 944 /* WLAN IDs */ 945 static const struct sdio_device_id mwifiex_ids[] = { 946 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786_WLAN), 947 .driver_data = (unsigned long) &mwifiex_sdio_sd8786}, 948 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787_WLAN), 949 .driver_data = (unsigned long) &mwifiex_sdio_sd8787}, 950 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_WLAN), 951 .driver_data = (unsigned long) &mwifiex_sdio_sd8797}, 952 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897_WLAN), 953 .driver_data = (unsigned long) &mwifiex_sdio_sd8897}, 954 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887_WLAN), 955 .driver_data = (unsigned long)&mwifiex_sdio_sd8887}, 956 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801_WLAN), 957 .driver_data = (unsigned long)&mwifiex_sdio_sd8801}, 958 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN), 959 .driver_data = (unsigned long)&mwifiex_sdio_sd8977}, 960 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8978_WLAN), 961 .driver_data = (unsigned long)&mwifiex_sdio_sd8978}, 962 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN), 963 .driver_data = (unsigned long)&mwifiex_sdio_sd8987}, 964 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN), 965 .driver_data = (unsigned long)&mwifiex_sdio_sd8997}, 966 {}, 967 }; 968 969 MODULE_DEVICE_TABLE(sdio, mwifiex_ids); 970 971 static const struct dev_pm_ops mwifiex_sdio_pm_ops = { 972 .suspend = mwifiex_sdio_suspend, 973 .resume = mwifiex_sdio_resume, 974 }; 975 976 static struct sdio_driver mwifiex_sdio = { 977 .name = "mwifiex_sdio", 978 .id_table = mwifiex_ids, 979 .probe = mwifiex_sdio_probe, 980 .remove = mwifiex_sdio_remove, 981 .drv = { 982 .coredump = mwifiex_sdio_coredump, 983 .pm = &mwifiex_sdio_pm_ops, 984 } 985 }; 986 987 /* 988 * This function wakes up the card. 989 * 990 * A host power up command is written to the card configuration 991 * register to wake up the card. 992 */ 993 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 994 { 995 mwifiex_dbg(adapter, EVENT, 996 "event: wakeup device...\n"); 997 998 return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP); 999 } 1000 1001 /* 1002 * This function is called after the card has woken up. 1003 * 1004 * The card configuration register is reset. 1005 */ 1006 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 1007 { 1008 mwifiex_dbg(adapter, EVENT, 1009 "cmd: wakeup device completed\n"); 1010 1011 return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0); 1012 } 1013 1014 static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter, 1015 struct mwifiex_fw_image *fw) 1016 { 1017 struct sdio_mmc_card *card = adapter->card; 1018 int ret; 1019 1020 sdio_claim_host(card->func); 1021 ret = mwifiex_dnld_fw(adapter, fw); 1022 sdio_release_host(card->func); 1023 1024 return ret; 1025 } 1026 1027 /* 1028 * This function is used to initialize IO ports for the 1029 * chipsets supporting SDIO new mode eg SD8897. 1030 */ 1031 static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter) 1032 { 1033 u8 reg; 1034 struct sdio_mmc_card *card = adapter->card; 1035 1036 adapter->ioport = MEM_PORT; 1037 1038 /* enable sdio new mode */ 1039 if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®)) 1040 return -1; 1041 if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg, 1042 reg | CMD53_NEW_MODE)) 1043 return -1; 1044 1045 /* Configure cmd port and enable reading rx length from the register */ 1046 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®)) 1047 return -1; 1048 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0, 1049 reg | CMD_PORT_RD_LEN_EN)) 1050 return -1; 1051 1052 /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is 1053 * completed 1054 */ 1055 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®)) 1056 return -1; 1057 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1, 1058 reg | CMD_PORT_AUTO_EN)) 1059 return -1; 1060 1061 return 0; 1062 } 1063 1064 /* This function initializes the IO ports. 1065 * 1066 * The following operations are performed - 1067 * - Read the IO ports (0, 1 and 2) 1068 * - Set host interrupt Reset-To-Read to clear 1069 * - Set auto re-enable interrupt 1070 */ 1071 static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter) 1072 { 1073 u8 reg; 1074 struct sdio_mmc_card *card = adapter->card; 1075 1076 adapter->ioport = 0; 1077 1078 if (card->supports_sdio_new_mode) { 1079 if (mwifiex_init_sdio_new_mode(adapter)) 1080 return -1; 1081 goto cont; 1082 } 1083 1084 /* Read the IO port */ 1085 if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®)) 1086 adapter->ioport |= (reg & 0xff); 1087 else 1088 return -1; 1089 1090 if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®)) 1091 adapter->ioport |= ((reg & 0xff) << 8); 1092 else 1093 return -1; 1094 1095 if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®)) 1096 adapter->ioport |= ((reg & 0xff) << 16); 1097 else 1098 return -1; 1099 cont: 1100 mwifiex_dbg(adapter, INFO, 1101 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport); 1102 1103 /* Set Host interrupt reset to read to clear */ 1104 if (mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®)) 1105 return -1; 1106 if (mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg, 1107 reg | card->reg->sdio_int_mask)) 1108 return -1; 1109 1110 /* Dnld/Upld ready set to auto reset */ 1111 if (mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®)) 1112 return -1; 1113 if (mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg, 1114 reg | AUTO_RE_ENABLE_INT)) 1115 return -1; 1116 1117 return 0; 1118 } 1119 1120 /* 1121 * This function sends data to the card. 1122 */ 1123 static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter, 1124 u8 *payload, u32 pkt_len, u32 port) 1125 { 1126 u32 i = 0; 1127 int ret; 1128 1129 do { 1130 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port); 1131 if (ret) { 1132 i++; 1133 mwifiex_dbg(adapter, ERROR, 1134 "host_to_card, write iomem\t" 1135 "(%d) failed: %d\n", i, ret); 1136 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1137 mwifiex_dbg(adapter, ERROR, 1138 "write CFG reg failed\n"); 1139 1140 ret = -1; 1141 if (i > MAX_WRITE_IOMEM_RETRY) 1142 return ret; 1143 } 1144 } while (ret == -1); 1145 1146 return ret; 1147 } 1148 1149 /* 1150 * This function gets the read port. 1151 * 1152 * If control port bit is set in MP read bitmap, the control port 1153 * is returned, otherwise the current read port is returned and 1154 * the value is increased (provided it does not reach the maximum 1155 * limit, in which case it is reset to 1) 1156 */ 1157 static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port) 1158 { 1159 struct sdio_mmc_card *card = adapter->card; 1160 const struct mwifiex_sdio_card_reg *reg = card->reg; 1161 u32 rd_bitmap = card->mp_rd_bitmap; 1162 1163 mwifiex_dbg(adapter, DATA, 1164 "data: mp_rd_bitmap=0x%08x\n", rd_bitmap); 1165 1166 if (card->supports_sdio_new_mode) { 1167 if (!(rd_bitmap & reg->data_port_mask)) 1168 return -1; 1169 } else { 1170 if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask))) 1171 return -1; 1172 } 1173 1174 if ((card->has_control_mask) && 1175 (card->mp_rd_bitmap & CTRL_PORT_MASK)) { 1176 card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK); 1177 *port = CTRL_PORT; 1178 mwifiex_dbg(adapter, DATA, 1179 "data: port=%d mp_rd_bitmap=0x%08x\n", 1180 *port, card->mp_rd_bitmap); 1181 return 0; 1182 } 1183 1184 if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port))) 1185 return -1; 1186 1187 /* We are now handling the SDIO data ports */ 1188 card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port)); 1189 *port = card->curr_rd_port; 1190 1191 if (++card->curr_rd_port == card->max_ports) 1192 card->curr_rd_port = reg->start_rd_port; 1193 1194 mwifiex_dbg(adapter, DATA, 1195 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n", 1196 *port, rd_bitmap, card->mp_rd_bitmap); 1197 1198 return 0; 1199 } 1200 1201 /* 1202 * This function gets the write port for data. 1203 * 1204 * The current write port is returned if available and the value is 1205 * increased (provided it does not reach the maximum limit, in which 1206 * case it is reset to 1) 1207 */ 1208 static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port) 1209 { 1210 struct sdio_mmc_card *card = adapter->card; 1211 const struct mwifiex_sdio_card_reg *reg = card->reg; 1212 u32 wr_bitmap = card->mp_wr_bitmap; 1213 1214 mwifiex_dbg(adapter, DATA, 1215 "data: mp_wr_bitmap=0x%08x\n", wr_bitmap); 1216 1217 if (!(wr_bitmap & card->mp_data_port_mask)) { 1218 adapter->data_sent = true; 1219 return -EBUSY; 1220 } 1221 1222 if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) { 1223 card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port)); 1224 *port = card->curr_wr_port; 1225 if (++card->curr_wr_port == card->mp_end_port) 1226 card->curr_wr_port = reg->start_wr_port; 1227 } else { 1228 adapter->data_sent = true; 1229 return -EBUSY; 1230 } 1231 1232 if ((card->has_control_mask) && (*port == CTRL_PORT)) { 1233 mwifiex_dbg(adapter, ERROR, 1234 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 1235 *port, card->curr_wr_port, wr_bitmap, 1236 card->mp_wr_bitmap); 1237 return -1; 1238 } 1239 1240 mwifiex_dbg(adapter, DATA, 1241 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 1242 *port, wr_bitmap, card->mp_wr_bitmap); 1243 1244 return 0; 1245 } 1246 1247 /* 1248 * This function polls the card status. 1249 */ 1250 static int 1251 mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits) 1252 { 1253 struct sdio_mmc_card *card = adapter->card; 1254 u32 tries; 1255 u8 cs; 1256 1257 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1258 if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs)) 1259 break; 1260 else if ((cs & bits) == bits) 1261 return 0; 1262 1263 usleep_range(10, 20); 1264 } 1265 1266 mwifiex_dbg(adapter, ERROR, 1267 "poll card status failed, tries = %d\n", tries); 1268 1269 return -1; 1270 } 1271 1272 /* 1273 * This function disables the host interrupt. 1274 * 1275 * The host interrupt mask is read, the disable bit is reset and 1276 * written back to the card host interrupt mask register. 1277 */ 1278 static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter) 1279 { 1280 struct sdio_mmc_card *card = adapter->card; 1281 struct sdio_func *func = card->func; 1282 1283 sdio_claim_host(func); 1284 mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0); 1285 sdio_release_irq(func); 1286 sdio_release_host(func); 1287 } 1288 1289 /* 1290 * This function reads the interrupt status from card. 1291 */ 1292 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) 1293 { 1294 struct sdio_mmc_card *card = adapter->card; 1295 u8 sdio_ireg; 1296 unsigned long flags; 1297 1298 if (mwifiex_read_data_sync(adapter, card->mp_regs, 1299 card->reg->max_mp_regs, 1300 REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) { 1301 mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n"); 1302 return; 1303 } 1304 1305 sdio_ireg = card->mp_regs[card->reg->host_int_status_reg]; 1306 if (sdio_ireg) { 1307 /* 1308 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS 1309 * For SDIO new mode CMD port interrupts 1310 * DN_LD_CMD_PORT_HOST_INT_STATUS and/or 1311 * UP_LD_CMD_PORT_HOST_INT_STATUS 1312 * Clear the interrupt status register 1313 */ 1314 mwifiex_dbg(adapter, INTR, 1315 "int: sdio_ireg = %#x\n", sdio_ireg); 1316 spin_lock_irqsave(&adapter->int_lock, flags); 1317 adapter->int_status |= sdio_ireg; 1318 spin_unlock_irqrestore(&adapter->int_lock, flags); 1319 } 1320 } 1321 1322 /* 1323 * SDIO interrupt handler. 1324 * 1325 * This function reads the interrupt status from firmware and handles 1326 * the interrupt in current thread (ksdioirqd) right away. 1327 */ 1328 static void 1329 mwifiex_sdio_interrupt(struct sdio_func *func) 1330 { 1331 struct mwifiex_adapter *adapter; 1332 struct sdio_mmc_card *card; 1333 1334 card = sdio_get_drvdata(func); 1335 if (!card || !card->adapter) { 1336 pr_err("int: func=%p card=%p adapter=%p\n", 1337 func, card, card ? card->adapter : NULL); 1338 return; 1339 } 1340 adapter = card->adapter; 1341 1342 if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP) 1343 adapter->ps_state = PS_STATE_AWAKE; 1344 1345 mwifiex_interrupt_status(adapter); 1346 mwifiex_main_process(adapter); 1347 } 1348 1349 /* 1350 * This function enables the host interrupt. 1351 * 1352 * The host interrupt enable mask is written to the card 1353 * host interrupt mask register. 1354 */ 1355 static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter) 1356 { 1357 struct sdio_mmc_card *card = adapter->card; 1358 struct sdio_func *func = card->func; 1359 int ret; 1360 1361 sdio_claim_host(func); 1362 1363 /* Request the SDIO IRQ */ 1364 ret = sdio_claim_irq(func, mwifiex_sdio_interrupt); 1365 if (ret) { 1366 mwifiex_dbg(adapter, ERROR, 1367 "claim irq failed: ret=%d\n", ret); 1368 goto out; 1369 } 1370 1371 /* Simply write the mask to the register */ 1372 ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 1373 card->reg->host_int_enable); 1374 if (ret) { 1375 mwifiex_dbg(adapter, ERROR, 1376 "enable host interrupt failed\n"); 1377 sdio_release_irq(func); 1378 } 1379 1380 out: 1381 sdio_release_host(func); 1382 return ret; 1383 } 1384 1385 /* 1386 * This function sends a data buffer to the card. 1387 */ 1388 static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter, 1389 u32 *type, u8 *buffer, 1390 u32 npayload, u32 ioport) 1391 { 1392 int ret; 1393 u32 nb; 1394 1395 if (!buffer) { 1396 mwifiex_dbg(adapter, ERROR, 1397 "%s: buffer is NULL\n", __func__); 1398 return -1; 1399 } 1400 1401 ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1); 1402 1403 if (ret) { 1404 mwifiex_dbg(adapter, ERROR, 1405 "%s: read iomem failed: %d\n", __func__, 1406 ret); 1407 return -1; 1408 } 1409 1410 nb = get_unaligned_le16((buffer)); 1411 if (nb > npayload) { 1412 mwifiex_dbg(adapter, ERROR, 1413 "%s: invalid packet, nb=%d npayload=%d\n", 1414 __func__, nb, npayload); 1415 return -1; 1416 } 1417 1418 *type = get_unaligned_le16((buffer + 2)); 1419 1420 return ret; 1421 } 1422 1423 /* 1424 * This function downloads the firmware to the card. 1425 * 1426 * Firmware is downloaded to the card in blocks. Every block download 1427 * is tested for CRC errors, and retried a number of times before 1428 * returning failure. 1429 */ 1430 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 1431 struct mwifiex_fw_image *fw) 1432 { 1433 struct sdio_mmc_card *card = adapter->card; 1434 const struct mwifiex_sdio_card_reg *reg = card->reg; 1435 int ret; 1436 u8 *firmware = fw->fw_buf; 1437 u32 firmware_len = fw->fw_len; 1438 u32 offset = 0; 1439 u8 base0, base1; 1440 u8 *fwbuf; 1441 u16 len = 0; 1442 u32 txlen, tx_blocks = 0, tries; 1443 u32 i = 0; 1444 1445 if (!firmware_len) { 1446 mwifiex_dbg(adapter, ERROR, 1447 "firmware image not found! Terminating download\n"); 1448 return -1; 1449 } 1450 1451 mwifiex_dbg(adapter, INFO, 1452 "info: downloading FW image (%d bytes)\n", 1453 firmware_len); 1454 1455 /* Assume that the allocated buffer is 8-byte aligned */ 1456 fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL); 1457 if (!fwbuf) 1458 return -ENOMEM; 1459 1460 sdio_claim_host(card->func); 1461 1462 /* Perform firmware data transfer */ 1463 do { 1464 /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY 1465 bits */ 1466 ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY | 1467 DN_LD_CARD_RDY); 1468 if (ret) { 1469 mwifiex_dbg(adapter, ERROR, 1470 "FW download with helper:\t" 1471 "poll status timeout @ %d\n", offset); 1472 goto done; 1473 } 1474 1475 /* More data? */ 1476 if (offset >= firmware_len) 1477 break; 1478 1479 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1480 ret = mwifiex_read_reg(adapter, reg->base_0_reg, 1481 &base0); 1482 if (ret) { 1483 mwifiex_dbg(adapter, ERROR, 1484 "dev BASE0 register read failed:\t" 1485 "base0=%#04X(%d). Terminating dnld\n", 1486 base0, base0); 1487 goto done; 1488 } 1489 ret = mwifiex_read_reg(adapter, reg->base_1_reg, 1490 &base1); 1491 if (ret) { 1492 mwifiex_dbg(adapter, ERROR, 1493 "dev BASE1 register read failed:\t" 1494 "base1=%#04X(%d). Terminating dnld\n", 1495 base1, base1); 1496 goto done; 1497 } 1498 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff)); 1499 1500 if (len) 1501 break; 1502 1503 usleep_range(10, 20); 1504 } 1505 1506 if (!len) { 1507 break; 1508 } else if (len > MWIFIEX_UPLD_SIZE) { 1509 mwifiex_dbg(adapter, ERROR, 1510 "FW dnld failed @ %d, invalid length %d\n", 1511 offset, len); 1512 ret = -1; 1513 goto done; 1514 } 1515 1516 txlen = len; 1517 1518 if (len & BIT(0)) { 1519 i++; 1520 if (i > MAX_WRITE_IOMEM_RETRY) { 1521 mwifiex_dbg(adapter, ERROR, 1522 "FW dnld failed @ %d, over max retry\n", 1523 offset); 1524 ret = -1; 1525 goto done; 1526 } 1527 mwifiex_dbg(adapter, ERROR, 1528 "CRC indicated by the helper:\t" 1529 "len = 0x%04X, txlen = %d\n", len, txlen); 1530 len &= ~BIT(0); 1531 /* Setting this to 0 to resend from same offset */ 1532 txlen = 0; 1533 } else { 1534 i = 0; 1535 1536 /* Set blocksize to transfer - checking for last 1537 block */ 1538 if (firmware_len - offset < txlen) 1539 txlen = firmware_len - offset; 1540 1541 tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1) 1542 / MWIFIEX_SDIO_BLOCK_SIZE; 1543 1544 /* Copy payload to buffer */ 1545 memmove(fwbuf, &firmware[offset], txlen); 1546 } 1547 1548 ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks * 1549 MWIFIEX_SDIO_BLOCK_SIZE, 1550 adapter->ioport); 1551 if (ret) { 1552 mwifiex_dbg(adapter, ERROR, 1553 "FW download, write iomem (%d) failed @ %d\n", 1554 i, offset); 1555 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1556 mwifiex_dbg(adapter, ERROR, 1557 "write CFG reg failed\n"); 1558 1559 ret = -1; 1560 goto done; 1561 } 1562 1563 offset += txlen; 1564 } while (true); 1565 1566 mwifiex_dbg(adapter, MSG, 1567 "info: FW download over, size %d bytes\n", offset); 1568 1569 ret = 0; 1570 done: 1571 sdio_release_host(card->func); 1572 kfree(fwbuf); 1573 return ret; 1574 } 1575 1576 /* 1577 * This function decodes sdio aggregation pkt. 1578 * 1579 * Based on the data block size and pkt_len, 1580 * skb data will be decoded to few packets. 1581 */ 1582 static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter, 1583 struct sk_buff *skb) 1584 { 1585 u32 total_pkt_len, pkt_len; 1586 struct sk_buff *skb_deaggr; 1587 u16 blk_size; 1588 u8 blk_num; 1589 u8 *data; 1590 1591 data = skb->data; 1592 total_pkt_len = skb->len; 1593 1594 while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) { 1595 if (total_pkt_len < adapter->sdio_rx_block_size) 1596 break; 1597 blk_num = *(data + BLOCK_NUMBER_OFFSET); 1598 blk_size = adapter->sdio_rx_block_size * blk_num; 1599 if (blk_size > total_pkt_len) { 1600 mwifiex_dbg(adapter, ERROR, 1601 "%s: error in blk_size,\t" 1602 "blk_num=%d, blk_size=%d, total_pkt_len=%d\n", 1603 __func__, blk_num, blk_size, total_pkt_len); 1604 break; 1605 } 1606 pkt_len = get_unaligned_le16((data + 1607 SDIO_HEADER_OFFSET)); 1608 if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) { 1609 mwifiex_dbg(adapter, ERROR, 1610 "%s: error in pkt_len,\t" 1611 "pkt_len=%d, blk_size=%d\n", 1612 __func__, pkt_len, blk_size); 1613 break; 1614 } 1615 1616 skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL); 1617 if (!skb_deaggr) 1618 break; 1619 skb_put(skb_deaggr, pkt_len); 1620 memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len); 1621 skb_pull(skb_deaggr, adapter->intf_hdr_len); 1622 1623 mwifiex_handle_rx_packet(adapter, skb_deaggr); 1624 data += blk_size; 1625 total_pkt_len -= blk_size; 1626 } 1627 } 1628 1629 /* 1630 * This function decodes a received packet. 1631 * 1632 * Based on the type, the packet is treated as either a data, or 1633 * a command response, or an event, and the correct handler 1634 * function is invoked. 1635 */ 1636 static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter, 1637 struct sk_buff *skb, u32 upld_typ) 1638 { 1639 u8 *cmd_buf; 1640 u16 pkt_len; 1641 struct mwifiex_rxinfo *rx_info; 1642 1643 pkt_len = get_unaligned_le16(skb->data); 1644 1645 if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) { 1646 skb_trim(skb, pkt_len); 1647 skb_pull(skb, adapter->intf_hdr_len); 1648 } 1649 1650 switch (upld_typ) { 1651 case MWIFIEX_TYPE_AGGR_DATA: 1652 mwifiex_dbg(adapter, INFO, 1653 "info: --- Rx: Aggr Data packet ---\n"); 1654 rx_info = MWIFIEX_SKB_RXCB(skb); 1655 rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA; 1656 if (adapter->rx_work_enabled) { 1657 skb_queue_tail(&adapter->rx_data_q, skb); 1658 atomic_inc(&adapter->rx_pending); 1659 adapter->data_received = true; 1660 } else { 1661 mwifiex_deaggr_sdio_pkt(adapter, skb); 1662 dev_kfree_skb_any(skb); 1663 } 1664 break; 1665 1666 case MWIFIEX_TYPE_DATA: 1667 mwifiex_dbg(adapter, DATA, 1668 "info: --- Rx: Data packet ---\n"); 1669 if (adapter->rx_work_enabled) { 1670 skb_queue_tail(&adapter->rx_data_q, skb); 1671 adapter->data_received = true; 1672 atomic_inc(&adapter->rx_pending); 1673 } else { 1674 mwifiex_handle_rx_packet(adapter, skb); 1675 } 1676 break; 1677 1678 case MWIFIEX_TYPE_CMD: 1679 mwifiex_dbg(adapter, CMD, 1680 "info: --- Rx: Cmd Response ---\n"); 1681 /* take care of curr_cmd = NULL case */ 1682 if (!adapter->curr_cmd) { 1683 cmd_buf = adapter->upld_buf; 1684 1685 if (adapter->ps_state == PS_STATE_SLEEP_CFM) 1686 mwifiex_process_sleep_confirm_resp(adapter, 1687 skb->data, 1688 skb->len); 1689 1690 memcpy(cmd_buf, skb->data, 1691 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, 1692 skb->len)); 1693 1694 dev_kfree_skb_any(skb); 1695 } else { 1696 adapter->cmd_resp_received = true; 1697 adapter->curr_cmd->resp_skb = skb; 1698 } 1699 break; 1700 1701 case MWIFIEX_TYPE_EVENT: 1702 mwifiex_dbg(adapter, EVENT, 1703 "info: --- Rx: Event ---\n"); 1704 adapter->event_cause = get_unaligned_le32(skb->data); 1705 1706 if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE)) 1707 memcpy(adapter->event_body, 1708 skb->data + MWIFIEX_EVENT_HEADER_LEN, 1709 skb->len); 1710 1711 /* event cause has been saved to adapter->event_cause */ 1712 adapter->event_received = true; 1713 adapter->event_skb = skb; 1714 1715 break; 1716 1717 default: 1718 mwifiex_dbg(adapter, ERROR, 1719 "unknown upload type %#x\n", upld_typ); 1720 dev_kfree_skb_any(skb); 1721 break; 1722 } 1723 1724 return 0; 1725 } 1726 1727 /* 1728 * This function transfers received packets from card to driver, performing 1729 * aggregation if required. 1730 * 1731 * For data received on control port, or if aggregation is disabled, the 1732 * received buffers are uploaded as separate packets. However, if aggregation 1733 * is enabled and required, the buffers are copied onto an aggregation buffer, 1734 * provided there is space left, processed and finally uploaded. 1735 */ 1736 static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter, 1737 u16 rx_len, u8 port) 1738 { 1739 struct sdio_mmc_card *card = adapter->card; 1740 s32 f_do_rx_aggr = 0; 1741 s32 f_do_rx_cur = 0; 1742 s32 f_aggr_cur = 0; 1743 s32 f_post_aggr_cur = 0; 1744 struct sk_buff *skb_deaggr; 1745 struct sk_buff *skb = NULL; 1746 u32 pkt_len, pkt_type, mport, pind; 1747 u8 *curr_ptr; 1748 1749 if ((card->has_control_mask) && (port == CTRL_PORT)) { 1750 /* Read the command Resp without aggr */ 1751 mwifiex_dbg(adapter, CMD, 1752 "info: %s: no aggregation for cmd\t" 1753 "response\n", __func__); 1754 1755 f_do_rx_cur = 1; 1756 goto rx_curr_single; 1757 } 1758 1759 if (!card->mpa_rx.enabled) { 1760 mwifiex_dbg(adapter, WARN, 1761 "info: %s: rx aggregation disabled\n", 1762 __func__); 1763 1764 f_do_rx_cur = 1; 1765 goto rx_curr_single; 1766 } 1767 1768 if ((!card->has_control_mask && (card->mp_rd_bitmap & 1769 card->reg->data_port_mask)) || 1770 (card->has_control_mask && (card->mp_rd_bitmap & 1771 (~((u32) CTRL_PORT_MASK))))) { 1772 /* Some more data RX pending */ 1773 mwifiex_dbg(adapter, INFO, 1774 "info: %s: not last packet\n", __func__); 1775 1776 if (MP_RX_AGGR_IN_PROGRESS(card)) { 1777 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) { 1778 f_aggr_cur = 1; 1779 } else { 1780 /* No room in Aggr buf, do rx aggr now */ 1781 f_do_rx_aggr = 1; 1782 f_post_aggr_cur = 1; 1783 } 1784 } else { 1785 /* Rx aggr not in progress */ 1786 f_aggr_cur = 1; 1787 } 1788 1789 } else { 1790 /* No more data RX pending */ 1791 mwifiex_dbg(adapter, INFO, 1792 "info: %s: last packet\n", __func__); 1793 1794 if (MP_RX_AGGR_IN_PROGRESS(card)) { 1795 f_do_rx_aggr = 1; 1796 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) 1797 f_aggr_cur = 1; 1798 else 1799 /* No room in Aggr buf, do rx aggr now */ 1800 f_do_rx_cur = 1; 1801 } else { 1802 f_do_rx_cur = 1; 1803 } 1804 } 1805 1806 if (f_aggr_cur) { 1807 mwifiex_dbg(adapter, INFO, 1808 "info: current packet aggregation\n"); 1809 /* Curr pkt can be aggregated */ 1810 mp_rx_aggr_setup(card, rx_len, port); 1811 1812 if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) || 1813 mp_rx_aggr_port_limit_reached(card)) { 1814 mwifiex_dbg(adapter, INFO, 1815 "info: %s: aggregated packet\t" 1816 "limit reached\n", __func__); 1817 /* No more pkts allowed in Aggr buf, rx it */ 1818 f_do_rx_aggr = 1; 1819 } 1820 } 1821 1822 if (f_do_rx_aggr) { 1823 /* do aggr RX now */ 1824 mwifiex_dbg(adapter, DATA, 1825 "info: do_rx_aggr: num of packets: %d\n", 1826 card->mpa_rx.pkt_cnt); 1827 1828 if (card->supports_sdio_new_mode) { 1829 int i; 1830 u32 port_count; 1831 1832 for (i = 0, port_count = 0; i < card->max_ports; i++) 1833 if (card->mpa_rx.ports & BIT(i)) 1834 port_count++; 1835 1836 /* Reading data from "start_port + 0" to "start_port + 1837 * port_count -1", so decrease the count by 1 1838 */ 1839 port_count--; 1840 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1841 (port_count << 8)) + card->mpa_rx.start_port; 1842 } else { 1843 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1844 (card->mpa_rx.ports << 4)) + 1845 card->mpa_rx.start_port; 1846 } 1847 1848 if (card->mpa_rx.pkt_cnt == 1) 1849 mport = adapter->ioport + card->mpa_rx.start_port; 1850 1851 if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf, 1852 card->mpa_rx.buf_len, mport, 1)) 1853 goto error; 1854 1855 curr_ptr = card->mpa_rx.buf; 1856 1857 for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) { 1858 u32 *len_arr = card->mpa_rx.len_arr; 1859 1860 /* get curr PKT len & type */ 1861 pkt_len = get_unaligned_le16(&curr_ptr[0]); 1862 pkt_type = get_unaligned_le16(&curr_ptr[2]); 1863 1864 /* copy pkt to deaggr buf */ 1865 skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind], 1866 GFP_KERNEL); 1867 if (!skb_deaggr) { 1868 mwifiex_dbg(adapter, ERROR, "skb allocation failure\t" 1869 "drop pkt len=%d type=%d\n", 1870 pkt_len, pkt_type); 1871 curr_ptr += len_arr[pind]; 1872 continue; 1873 } 1874 1875 skb_put(skb_deaggr, len_arr[pind]); 1876 1877 if ((pkt_type == MWIFIEX_TYPE_DATA || 1878 (pkt_type == MWIFIEX_TYPE_AGGR_DATA && 1879 adapter->sdio_rx_aggr_enable)) && 1880 (pkt_len <= len_arr[pind])) { 1881 1882 memcpy(skb_deaggr->data, curr_ptr, pkt_len); 1883 1884 skb_trim(skb_deaggr, pkt_len); 1885 1886 /* Process de-aggr packet */ 1887 mwifiex_decode_rx_packet(adapter, skb_deaggr, 1888 pkt_type); 1889 } else { 1890 mwifiex_dbg(adapter, ERROR, 1891 "drop wrong aggr pkt:\t" 1892 "sdio_single_port_rx_aggr=%d\t" 1893 "type=%d len=%d max_len=%d\n", 1894 adapter->sdio_rx_aggr_enable, 1895 pkt_type, pkt_len, len_arr[pind]); 1896 dev_kfree_skb_any(skb_deaggr); 1897 } 1898 curr_ptr += len_arr[pind]; 1899 } 1900 MP_RX_AGGR_BUF_RESET(card); 1901 } 1902 1903 rx_curr_single: 1904 if (f_do_rx_cur) { 1905 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n", 1906 port, rx_len); 1907 1908 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 1909 if (!skb) { 1910 mwifiex_dbg(adapter, ERROR, 1911 "single skb allocated fail,\t" 1912 "drop pkt port=%d len=%d\n", port, rx_len); 1913 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1914 card->mpa_rx.buf, rx_len, 1915 adapter->ioport + port)) 1916 goto error; 1917 return 0; 1918 } 1919 1920 skb_put(skb, rx_len); 1921 1922 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1923 skb->data, skb->len, 1924 adapter->ioport + port)) 1925 goto error; 1926 if (!adapter->sdio_rx_aggr_enable && 1927 pkt_type == MWIFIEX_TYPE_AGGR_DATA) { 1928 mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t" 1929 "current SDIO RX Aggr not enabled\n", 1930 pkt_type); 1931 dev_kfree_skb_any(skb); 1932 return 0; 1933 } 1934 1935 mwifiex_decode_rx_packet(adapter, skb, pkt_type); 1936 } 1937 if (f_post_aggr_cur) { 1938 mwifiex_dbg(adapter, INFO, 1939 "info: current packet aggregation\n"); 1940 /* Curr pkt can be aggregated */ 1941 mp_rx_aggr_setup(card, rx_len, port); 1942 } 1943 1944 return 0; 1945 error: 1946 if (MP_RX_AGGR_IN_PROGRESS(card)) 1947 MP_RX_AGGR_BUF_RESET(card); 1948 1949 if (f_do_rx_cur && skb) 1950 /* Single transfer pending. Free curr buff also */ 1951 dev_kfree_skb_any(skb); 1952 1953 return -1; 1954 } 1955 1956 /* 1957 * This function checks the current interrupt status. 1958 * 1959 * The following interrupts are checked and handled by this function - 1960 * - Data sent 1961 * - Command sent 1962 * - Packets received 1963 * 1964 * Since the firmware does not generate download ready interrupt if the 1965 * port updated is command port only, command sent interrupt checking 1966 * should be done manually, and for every SDIO interrupt. 1967 * 1968 * In case of Rx packets received, the packets are uploaded from card to 1969 * host and processed accordingly. 1970 */ 1971 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 1972 { 1973 struct sdio_mmc_card *card = adapter->card; 1974 const struct mwifiex_sdio_card_reg *reg = card->reg; 1975 int ret = 0; 1976 u8 sdio_ireg; 1977 struct sk_buff *skb; 1978 u8 port = CTRL_PORT; 1979 u32 len_reg_l, len_reg_u; 1980 u32 rx_blocks; 1981 u16 rx_len; 1982 unsigned long flags; 1983 u32 bitmap; 1984 u8 cr; 1985 1986 spin_lock_irqsave(&adapter->int_lock, flags); 1987 sdio_ireg = adapter->int_status; 1988 adapter->int_status = 0; 1989 spin_unlock_irqrestore(&adapter->int_lock, flags); 1990 1991 if (!sdio_ireg) 1992 return ret; 1993 1994 /* Following interrupt is only for SDIO new mode */ 1995 if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent) 1996 adapter->cmd_sent = false; 1997 1998 /* Following interrupt is only for SDIO new mode */ 1999 if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) { 2000 u32 pkt_type; 2001 2002 /* read the len of control packet */ 2003 rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8; 2004 rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0]; 2005 rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE); 2006 if (rx_len <= adapter->intf_hdr_len || 2007 (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 2008 MWIFIEX_RX_DATA_BUF_SIZE) 2009 return -1; 2010 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 2011 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len); 2012 2013 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 2014 if (!skb) 2015 return -1; 2016 2017 skb_put(skb, rx_len); 2018 2019 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data, 2020 skb->len, adapter->ioport | 2021 CMD_PORT_SLCT)) { 2022 mwifiex_dbg(adapter, ERROR, 2023 "%s: failed to card_to_host", __func__); 2024 dev_kfree_skb_any(skb); 2025 goto term_cmd; 2026 } 2027 2028 if ((pkt_type != MWIFIEX_TYPE_CMD) && 2029 (pkt_type != MWIFIEX_TYPE_EVENT)) 2030 mwifiex_dbg(adapter, ERROR, 2031 "%s:Received wrong packet on cmd port", 2032 __func__); 2033 2034 mwifiex_decode_rx_packet(adapter, skb, pkt_type); 2035 } 2036 2037 if (sdio_ireg & DN_LD_HOST_INT_STATUS) { 2038 bitmap = (u32) card->mp_regs[reg->wr_bitmap_l]; 2039 bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8; 2040 if (card->supports_sdio_new_mode) { 2041 bitmap |= 2042 ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16; 2043 bitmap |= 2044 ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24; 2045 } 2046 card->mp_wr_bitmap = bitmap; 2047 2048 mwifiex_dbg(adapter, INTR, 2049 "int: DNLD: wr_bitmap=0x%x\n", 2050 card->mp_wr_bitmap); 2051 if (adapter->data_sent && 2052 (card->mp_wr_bitmap & card->mp_data_port_mask)) { 2053 mwifiex_dbg(adapter, INTR, 2054 "info: <--- Tx DONE Interrupt --->\n"); 2055 adapter->data_sent = false; 2056 } 2057 } 2058 2059 /* As firmware will not generate download ready interrupt if the port 2060 updated is command port only, cmd_sent should be done for any SDIO 2061 interrupt. */ 2062 if (card->has_control_mask && adapter->cmd_sent) { 2063 /* Check if firmware has attach buffer at command port and 2064 update just that in wr_bit_map. */ 2065 card->mp_wr_bitmap |= 2066 (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK; 2067 if (card->mp_wr_bitmap & CTRL_PORT_MASK) 2068 adapter->cmd_sent = false; 2069 } 2070 2071 mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n", 2072 adapter->cmd_sent, adapter->data_sent); 2073 if (sdio_ireg & UP_LD_HOST_INT_STATUS) { 2074 bitmap = (u32) card->mp_regs[reg->rd_bitmap_l]; 2075 bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8; 2076 if (card->supports_sdio_new_mode) { 2077 bitmap |= 2078 ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16; 2079 bitmap |= 2080 ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24; 2081 } 2082 card->mp_rd_bitmap = bitmap; 2083 mwifiex_dbg(adapter, INTR, 2084 "int: UPLD: rd_bitmap=0x%x\n", 2085 card->mp_rd_bitmap); 2086 2087 while (true) { 2088 ret = mwifiex_get_rd_port(adapter, &port); 2089 if (ret) { 2090 mwifiex_dbg(adapter, INFO, 2091 "info: no more rd_port available\n"); 2092 break; 2093 } 2094 len_reg_l = reg->rd_len_p0_l + (port << 1); 2095 len_reg_u = reg->rd_len_p0_u + (port << 1); 2096 rx_len = ((u16) card->mp_regs[len_reg_u]) << 8; 2097 rx_len |= (u16) card->mp_regs[len_reg_l]; 2098 mwifiex_dbg(adapter, INFO, 2099 "info: RX: port=%d rx_len=%u\n", 2100 port, rx_len); 2101 rx_blocks = 2102 (rx_len + MWIFIEX_SDIO_BLOCK_SIZE - 2103 1) / MWIFIEX_SDIO_BLOCK_SIZE; 2104 if (rx_len <= adapter->intf_hdr_len || 2105 (card->mpa_rx.enabled && 2106 ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 2107 card->mpa_rx.buf_size))) { 2108 mwifiex_dbg(adapter, ERROR, 2109 "invalid rx_len=%d\n", 2110 rx_len); 2111 return -1; 2112 } 2113 2114 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 2115 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", 2116 rx_len); 2117 2118 if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len, 2119 port)) { 2120 mwifiex_dbg(adapter, ERROR, 2121 "card_to_host_mpa failed: int status=%#x\n", 2122 sdio_ireg); 2123 goto term_cmd; 2124 } 2125 } 2126 } 2127 2128 return 0; 2129 2130 term_cmd: 2131 /* terminate cmd */ 2132 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 2133 mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n"); 2134 else 2135 mwifiex_dbg(adapter, INFO, 2136 "info: CFG reg val = %d\n", cr); 2137 2138 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04))) 2139 mwifiex_dbg(adapter, ERROR, 2140 "write CFG reg failed\n"); 2141 else 2142 mwifiex_dbg(adapter, INFO, "info: write success\n"); 2143 2144 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 2145 mwifiex_dbg(adapter, ERROR, 2146 "read CFG reg failed\n"); 2147 else 2148 mwifiex_dbg(adapter, INFO, 2149 "info: CFG reg val =%x\n", cr); 2150 2151 return -1; 2152 } 2153 2154 /* 2155 * This function aggregates transmission buffers in driver and downloads 2156 * the aggregated packet to card. 2157 * 2158 * The individual packets are aggregated by copying into an aggregation 2159 * buffer and then downloaded to the card. Previous unsent packets in the 2160 * aggregation buffer are pre-copied first before new packets are added. 2161 * Aggregation is done till there is space left in the aggregation buffer, 2162 * or till new packets are available. 2163 * 2164 * The function will only download the packet to the card when aggregation 2165 * stops, otherwise it will just aggregate the packet in aggregation buffer 2166 * and return. 2167 */ 2168 static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter, 2169 u8 *payload, u32 pkt_len, u32 port, 2170 u32 next_pkt_len) 2171 { 2172 struct sdio_mmc_card *card = adapter->card; 2173 int ret = 0; 2174 s32 f_send_aggr_buf = 0; 2175 s32 f_send_cur_buf = 0; 2176 s32 f_precopy_cur_buf = 0; 2177 s32 f_postcopy_cur_buf = 0; 2178 u32 mport; 2179 int index; 2180 2181 if (!card->mpa_tx.enabled || 2182 (card->has_control_mask && (port == CTRL_PORT)) || 2183 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) { 2184 mwifiex_dbg(adapter, WARN, 2185 "info: %s: tx aggregation disabled\n", 2186 __func__); 2187 2188 f_send_cur_buf = 1; 2189 goto tx_curr_single; 2190 } 2191 2192 if (next_pkt_len) { 2193 /* More pkt in TX queue */ 2194 mwifiex_dbg(adapter, INFO, 2195 "info: %s: more packets in queue.\n", 2196 __func__); 2197 2198 if (MP_TX_AGGR_IN_PROGRESS(card)) { 2199 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) { 2200 f_precopy_cur_buf = 1; 2201 2202 if (!(card->mp_wr_bitmap & 2203 (1 << card->curr_wr_port)) || 2204 !MP_TX_AGGR_BUF_HAS_ROOM( 2205 card, pkt_len + next_pkt_len)) 2206 f_send_aggr_buf = 1; 2207 } else { 2208 /* No room in Aggr buf, send it */ 2209 f_send_aggr_buf = 1; 2210 2211 if (!(card->mp_wr_bitmap & 2212 (1 << card->curr_wr_port))) 2213 f_send_cur_buf = 1; 2214 else 2215 f_postcopy_cur_buf = 1; 2216 } 2217 } else { 2218 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) && 2219 (card->mp_wr_bitmap & (1 << card->curr_wr_port))) 2220 f_precopy_cur_buf = 1; 2221 else 2222 f_send_cur_buf = 1; 2223 } 2224 } else { 2225 /* Last pkt in TX queue */ 2226 mwifiex_dbg(adapter, INFO, 2227 "info: %s: Last packet in Tx Queue.\n", 2228 __func__); 2229 2230 if (MP_TX_AGGR_IN_PROGRESS(card)) { 2231 /* some packs in Aggr buf already */ 2232 f_send_aggr_buf = 1; 2233 2234 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) 2235 f_precopy_cur_buf = 1; 2236 else 2237 /* No room in Aggr buf, send it */ 2238 f_send_cur_buf = 1; 2239 } else { 2240 f_send_cur_buf = 1; 2241 } 2242 } 2243 2244 if (f_precopy_cur_buf) { 2245 mwifiex_dbg(adapter, DATA, 2246 "data: %s: precopy current buffer\n", 2247 __func__); 2248 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 2249 2250 if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) || 2251 mp_tx_aggr_port_limit_reached(card)) 2252 /* No more pkts allowed in Aggr buf, send it */ 2253 f_send_aggr_buf = 1; 2254 } 2255 2256 if (f_send_aggr_buf) { 2257 mwifiex_dbg(adapter, DATA, 2258 "data: %s: send aggr buffer: %d %d\n", 2259 __func__, card->mpa_tx.start_port, 2260 card->mpa_tx.ports); 2261 if (card->supports_sdio_new_mode) { 2262 u32 port_count; 2263 int i; 2264 2265 for (i = 0, port_count = 0; i < card->max_ports; i++) 2266 if (card->mpa_tx.ports & BIT(i)) 2267 port_count++; 2268 2269 /* Writing data from "start_port + 0" to "start_port + 2270 * port_count -1", so decrease the count by 1 2271 */ 2272 port_count--; 2273 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 2274 (port_count << 8)) + card->mpa_tx.start_port; 2275 } else { 2276 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 2277 (card->mpa_tx.ports << 4)) + 2278 card->mpa_tx.start_port; 2279 } 2280 2281 if (card->mpa_tx.pkt_cnt == 1) 2282 mport = adapter->ioport + card->mpa_tx.start_port; 2283 2284 ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf, 2285 card->mpa_tx.buf_len, mport); 2286 2287 /* Save the last multi port tx aggregation info to debug log. */ 2288 index = adapter->dbg.last_sdio_mp_index; 2289 index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM; 2290 adapter->dbg.last_sdio_mp_index = index; 2291 adapter->dbg.last_mp_wr_ports[index] = mport; 2292 adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap; 2293 adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len; 2294 adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port; 2295 2296 MP_TX_AGGR_BUF_RESET(card); 2297 } 2298 2299 tx_curr_single: 2300 if (f_send_cur_buf) { 2301 mwifiex_dbg(adapter, DATA, 2302 "data: %s: send current buffer %d\n", 2303 __func__, port); 2304 ret = mwifiex_write_data_to_card(adapter, payload, pkt_len, 2305 adapter->ioport + port); 2306 } 2307 2308 if (f_postcopy_cur_buf) { 2309 mwifiex_dbg(adapter, DATA, 2310 "data: %s: postcopy current buffer\n", 2311 __func__); 2312 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 2313 } 2314 2315 return ret; 2316 } 2317 2318 /* 2319 * This function downloads data from driver to card. 2320 * 2321 * Both commands and data packets are transferred to the card by this 2322 * function. 2323 * 2324 * This function adds the SDIO specific header to the front of the buffer 2325 * before transferring. The header contains the length of the packet and 2326 * the type. The firmware handles the packets based upon this set type. 2327 */ 2328 static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter, 2329 u8 type, struct sk_buff *skb, 2330 struct mwifiex_tx_param *tx_param) 2331 { 2332 struct sdio_mmc_card *card = adapter->card; 2333 int ret; 2334 u32 buf_block_len; 2335 u32 blk_size; 2336 u32 port = CTRL_PORT; 2337 u8 *payload = (u8 *)skb->data; 2338 u32 pkt_len = skb->len; 2339 2340 /* Allocate buffer and copy payload */ 2341 blk_size = MWIFIEX_SDIO_BLOCK_SIZE; 2342 buf_block_len = (pkt_len + blk_size - 1) / blk_size; 2343 put_unaligned_le16((u16)pkt_len, payload + 0); 2344 put_unaligned_le16((u32)type, payload + 2); 2345 2346 2347 /* 2348 * This is SDIO specific header 2349 * u16 length, 2350 * u16 type (MWIFIEX_TYPE_DATA = 0, MWIFIEX_TYPE_CMD = 1, 2351 * MWIFIEX_TYPE_EVENT = 3) 2352 */ 2353 if (type == MWIFIEX_TYPE_DATA) { 2354 ret = mwifiex_get_wr_port_data(adapter, &port); 2355 if (ret) { 2356 mwifiex_dbg(adapter, ERROR, 2357 "%s: no wr_port available\n", 2358 __func__); 2359 return ret; 2360 } 2361 } else { 2362 adapter->cmd_sent = true; 2363 /* Type must be MWIFIEX_TYPE_CMD */ 2364 2365 if (pkt_len <= adapter->intf_hdr_len || 2366 pkt_len > MWIFIEX_UPLD_SIZE) 2367 mwifiex_dbg(adapter, ERROR, 2368 "%s: payload=%p, nb=%d\n", 2369 __func__, payload, pkt_len); 2370 2371 if (card->supports_sdio_new_mode) 2372 port = CMD_PORT_SLCT; 2373 } 2374 2375 /* Transfer data to card */ 2376 pkt_len = buf_block_len * blk_size; 2377 2378 if (tx_param) 2379 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 2380 port, tx_param->next_pkt_len 2381 ); 2382 else 2383 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 2384 port, 0); 2385 2386 if (ret) { 2387 if (type == MWIFIEX_TYPE_CMD) 2388 adapter->cmd_sent = false; 2389 if (type == MWIFIEX_TYPE_DATA) { 2390 adapter->data_sent = false; 2391 /* restore curr_wr_port in error cases */ 2392 card->curr_wr_port = port; 2393 card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port); 2394 } 2395 } else { 2396 if (type == MWIFIEX_TYPE_DATA) { 2397 if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port))) 2398 adapter->data_sent = true; 2399 else 2400 adapter->data_sent = false; 2401 } 2402 } 2403 2404 return ret; 2405 } 2406 2407 /* 2408 * This function allocates the MPA Tx and Rx buffers. 2409 */ 2410 static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter, 2411 u32 mpa_tx_buf_size, u32 mpa_rx_buf_size) 2412 { 2413 struct sdio_mmc_card *card = adapter->card; 2414 u32 rx_buf_size; 2415 int ret = 0; 2416 2417 card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL); 2418 if (!card->mpa_tx.buf) { 2419 ret = -1; 2420 goto error; 2421 } 2422 2423 card->mpa_tx.buf_size = mpa_tx_buf_size; 2424 2425 rx_buf_size = max_t(u32, mpa_rx_buf_size, 2426 (u32)SDIO_MAX_AGGR_BUF_SIZE); 2427 card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL); 2428 if (!card->mpa_rx.buf) { 2429 ret = -1; 2430 goto error; 2431 } 2432 2433 card->mpa_rx.buf_size = rx_buf_size; 2434 2435 error: 2436 if (ret) { 2437 kfree(card->mpa_tx.buf); 2438 kfree(card->mpa_rx.buf); 2439 card->mpa_tx.buf_size = 0; 2440 card->mpa_rx.buf_size = 0; 2441 card->mpa_tx.buf = NULL; 2442 card->mpa_rx.buf = NULL; 2443 } 2444 2445 return ret; 2446 } 2447 2448 /* 2449 * This function unregisters the SDIO device. 2450 * 2451 * The SDIO IRQ is released, the function is disabled and driver 2452 * data is set to null. 2453 */ 2454 static void 2455 mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 2456 { 2457 struct sdio_mmc_card *card = adapter->card; 2458 2459 if (adapter->card) { 2460 card->adapter = NULL; 2461 sdio_claim_host(card->func); 2462 sdio_disable_func(card->func); 2463 sdio_release_host(card->func); 2464 } 2465 } 2466 2467 /* 2468 * This function registers the SDIO device. 2469 * 2470 * SDIO IRQ is claimed, block size is set and driver data is initialized. 2471 */ 2472 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 2473 { 2474 int ret; 2475 struct sdio_mmc_card *card = adapter->card; 2476 struct sdio_func *func = card->func; 2477 const char *firmware = card->firmware; 2478 2479 /* save adapter pointer in card */ 2480 card->adapter = adapter; 2481 adapter->tx_buf_size = card->tx_buf_size; 2482 2483 sdio_claim_host(func); 2484 2485 /* Set block size */ 2486 ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 2487 sdio_release_host(func); 2488 if (ret) { 2489 mwifiex_dbg(adapter, ERROR, 2490 "cannot set SDIO block size\n"); 2491 return ret; 2492 } 2493 2494 /* Select correct firmware (sdsd or sdiouart) firmware based on the strapping 2495 * option 2496 */ 2497 if (card->firmware_sdiouart) { 2498 u8 val; 2499 2500 mwifiex_read_reg(adapter, card->reg->host_strap_reg, &val); 2501 if ((val & card->reg->host_strap_mask) == card->reg->host_strap_value) 2502 firmware = card->firmware_sdiouart; 2503 } 2504 strcpy(adapter->fw_name, firmware); 2505 2506 if (card->fw_dump_enh) { 2507 adapter->mem_type_mapping_tbl = generic_mem_type_map; 2508 adapter->num_mem_types = 1; 2509 } else { 2510 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl; 2511 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl); 2512 } 2513 2514 return 0; 2515 } 2516 2517 /* 2518 * This function initializes the SDIO driver. 2519 * 2520 * The following initializations steps are followed - 2521 * - Read the Host interrupt status register to acknowledge 2522 * the first interrupt got from bootloader 2523 * - Disable host interrupt mask register 2524 * - Get SDIO port 2525 * - Initialize SDIO variables in card 2526 * - Allocate MP registers 2527 * - Allocate MPA Tx and Rx buffers 2528 */ 2529 static int mwifiex_init_sdio(struct mwifiex_adapter *adapter) 2530 { 2531 struct sdio_mmc_card *card = adapter->card; 2532 const struct mwifiex_sdio_card_reg *reg = card->reg; 2533 int ret; 2534 u8 sdio_ireg; 2535 2536 sdio_set_drvdata(card->func, card); 2537 2538 /* 2539 * Read the host_int_status_reg for ACK the first interrupt got 2540 * from the bootloader. If we don't do this we get a interrupt 2541 * as soon as we register the irq. 2542 */ 2543 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 2544 2545 /* Get SDIO ioport */ 2546 if (mwifiex_init_sdio_ioport(adapter)) 2547 return -EIO; 2548 2549 /* Initialize SDIO variables in card */ 2550 card->mp_rd_bitmap = 0; 2551 card->mp_wr_bitmap = 0; 2552 card->curr_rd_port = reg->start_rd_port; 2553 card->curr_wr_port = reg->start_wr_port; 2554 2555 card->mp_data_port_mask = reg->data_port_mask; 2556 2557 card->mpa_tx.buf_len = 0; 2558 card->mpa_tx.pkt_cnt = 0; 2559 card->mpa_tx.start_port = 0; 2560 2561 card->mpa_tx.enabled = 1; 2562 card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2563 2564 card->mpa_rx.buf_len = 0; 2565 card->mpa_rx.pkt_cnt = 0; 2566 card->mpa_rx.start_port = 0; 2567 2568 card->mpa_rx.enabled = 1; 2569 card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2570 2571 /* Allocate buffers for SDIO MP-A */ 2572 card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL); 2573 if (!card->mp_regs) 2574 return -ENOMEM; 2575 2576 card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit, 2577 sizeof(*card->mpa_rx.len_arr), 2578 GFP_KERNEL); 2579 if (!card->mpa_rx.len_arr) { 2580 kfree(card->mp_regs); 2581 return -ENOMEM; 2582 } 2583 2584 ret = mwifiex_alloc_sdio_mpa_buffers(adapter, 2585 card->mp_tx_agg_buf_size, 2586 card->mp_rx_agg_buf_size); 2587 2588 /* Allocate 32k MPA Tx/Rx buffers if 64k memory allocation fails */ 2589 if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX || 2590 card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) { 2591 /* Disable rx single port aggregation */ 2592 adapter->host_disable_sdio_rx_aggr = true; 2593 2594 ret = mwifiex_alloc_sdio_mpa_buffers 2595 (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K, 2596 MWIFIEX_MP_AGGR_BUF_SIZE_32K); 2597 if (ret) { 2598 /* Disable multi port aggregation */ 2599 card->mpa_tx.enabled = 0; 2600 card->mpa_rx.enabled = 0; 2601 } 2602 } 2603 2604 adapter->auto_tdls = card->can_auto_tdls; 2605 adapter->ext_scan = card->can_ext_scan; 2606 return 0; 2607 } 2608 2609 /* 2610 * This function resets the MPA Tx and Rx buffers. 2611 */ 2612 static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter) 2613 { 2614 struct sdio_mmc_card *card = adapter->card; 2615 2616 MP_TX_AGGR_BUF_RESET(card); 2617 MP_RX_AGGR_BUF_RESET(card); 2618 } 2619 2620 /* 2621 * This function cleans up the allocated card buffers. 2622 * 2623 * The following are freed by this function - 2624 * - MP registers 2625 * - MPA Tx buffer 2626 * - MPA Rx buffer 2627 */ 2628 static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter) 2629 { 2630 struct sdio_mmc_card *card = adapter->card; 2631 2632 cancel_work_sync(&card->work); 2633 2634 kfree(card->mp_regs); 2635 kfree(card->mpa_rx.len_arr); 2636 kfree(card->mpa_tx.buf); 2637 kfree(card->mpa_rx.buf); 2638 } 2639 2640 /* 2641 * This function updates the MP end port in card. 2642 */ 2643 static void 2644 mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port) 2645 { 2646 struct sdio_mmc_card *card = adapter->card; 2647 const struct mwifiex_sdio_card_reg *reg = card->reg; 2648 int i; 2649 2650 card->mp_end_port = port; 2651 2652 card->mp_data_port_mask = reg->data_port_mask; 2653 2654 if (reg->start_wr_port) { 2655 for (i = 1; i <= card->max_ports - card->mp_end_port; i++) 2656 card->mp_data_port_mask &= 2657 ~(1 << (card->max_ports - i)); 2658 } 2659 2660 card->curr_wr_port = reg->start_wr_port; 2661 2662 mwifiex_dbg(adapter, CMD, 2663 "cmd: mp_end_port %d, data port mask 0x%x\n", 2664 port, card->mp_data_port_mask); 2665 } 2666 2667 static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter) 2668 { 2669 struct sdio_mmc_card *card = adapter->card; 2670 struct sdio_func *func = card->func; 2671 int ret; 2672 2673 /* Prepare the adapter for the reset. */ 2674 mwifiex_shutdown_sw(adapter); 2675 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 2676 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 2677 2678 /* Run a HW reset of the SDIO interface. */ 2679 sdio_claim_host(func); 2680 ret = mmc_hw_reset(func->card); 2681 sdio_release_host(func); 2682 2683 switch (ret) { 2684 case 1: 2685 dev_dbg(&func->dev, "SDIO HW reset asynchronous\n"); 2686 complete_all(adapter->fw_done); 2687 break; 2688 case 0: 2689 ret = mwifiex_reinit_sw(adapter); 2690 if (ret) 2691 dev_err(&func->dev, "reinit failed: %d\n", ret); 2692 break; 2693 default: 2694 dev_err(&func->dev, "SDIO HW reset failed: %d\n", ret); 2695 break; 2696 } 2697 } 2698 2699 /* This function read/write firmware */ 2700 static enum 2701 rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter, 2702 u8 doneflag) 2703 { 2704 struct sdio_mmc_card *card = adapter->card; 2705 int ret, tries; 2706 u8 ctrl_data = 0; 2707 2708 sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2709 card->reg->fw_dump_ctrl, &ret); 2710 if (ret) { 2711 mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n"); 2712 return RDWR_STATUS_FAILURE; 2713 } 2714 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2715 ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl, 2716 &ret); 2717 if (ret) { 2718 mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2719 return RDWR_STATUS_FAILURE; 2720 } 2721 if (ctrl_data == FW_DUMP_DONE) 2722 break; 2723 if (doneflag && ctrl_data == doneflag) 2724 return RDWR_STATUS_DONE; 2725 if (ctrl_data != card->reg->fw_dump_host_ready) { 2726 mwifiex_dbg(adapter, WARN, 2727 "The ctrl reg was changed, re-try again\n"); 2728 sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2729 card->reg->fw_dump_ctrl, &ret); 2730 if (ret) { 2731 mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2732 return RDWR_STATUS_FAILURE; 2733 } 2734 } 2735 usleep_range(100, 200); 2736 } 2737 if (ctrl_data == card->reg->fw_dump_host_ready) { 2738 mwifiex_dbg(adapter, ERROR, 2739 "Fail to pull ctrl_data\n"); 2740 return RDWR_STATUS_FAILURE; 2741 } 2742 2743 return RDWR_STATUS_SUCCESS; 2744 } 2745 2746 /* This function dump firmware memory to file */ 2747 static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter) 2748 { 2749 struct sdio_mmc_card *card = adapter->card; 2750 int ret = 0; 2751 unsigned int reg, reg_start, reg_end; 2752 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0; 2753 enum rdwr_status stat; 2754 u32 memory_size; 2755 2756 if (!card->can_dump_fw) 2757 return; 2758 2759 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) { 2760 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2761 2762 if (entry->mem_ptr) { 2763 vfree(entry->mem_ptr); 2764 entry->mem_ptr = NULL; 2765 } 2766 entry->mem_size = 0; 2767 } 2768 2769 mwifiex_pm_wakeup_card(adapter); 2770 sdio_claim_host(card->func); 2771 2772 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2773 2774 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2775 if (stat == RDWR_STATUS_FAILURE) 2776 goto done; 2777 2778 reg = card->reg->fw_dump_start; 2779 /* Read the number of the memories which will dump */ 2780 dump_num = sdio_readb(card->func, reg, &ret); 2781 if (ret) { 2782 mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n"); 2783 goto done; 2784 } 2785 2786 /* Read the length of every memory which will dump */ 2787 for (idx = 0; idx < dump_num; idx++) { 2788 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2789 2790 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2791 if (stat == RDWR_STATUS_FAILURE) 2792 goto done; 2793 2794 memory_size = 0; 2795 reg = card->reg->fw_dump_start; 2796 for (i = 0; i < 4; i++) { 2797 read_reg = sdio_readb(card->func, reg, &ret); 2798 if (ret) { 2799 mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2800 goto done; 2801 } 2802 memory_size |= (read_reg << i*8); 2803 reg++; 2804 } 2805 2806 if (memory_size == 0) { 2807 mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n"); 2808 ret = mwifiex_write_reg(adapter, 2809 card->reg->fw_dump_ctrl, 2810 FW_DUMP_READ_DONE); 2811 if (ret) { 2812 mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2813 return; 2814 } 2815 break; 2816 } 2817 2818 mwifiex_dbg(adapter, DUMP, 2819 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2820 entry->mem_ptr = vmalloc(memory_size + 1); 2821 entry->mem_size = memory_size; 2822 if (!entry->mem_ptr) { 2823 mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n", 2824 entry->mem_name); 2825 goto done; 2826 } 2827 dbg_ptr = entry->mem_ptr; 2828 end_ptr = dbg_ptr + memory_size; 2829 2830 doneflag = entry->done_flag; 2831 mwifiex_dbg(adapter, DUMP, 2832 "Start %s output, please wait...\n", 2833 entry->mem_name); 2834 2835 do { 2836 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2837 if (stat == RDWR_STATUS_FAILURE) 2838 goto done; 2839 2840 reg_start = card->reg->fw_dump_start; 2841 reg_end = card->reg->fw_dump_end; 2842 for (reg = reg_start; reg <= reg_end; reg++) { 2843 *dbg_ptr = sdio_readb(card->func, reg, &ret); 2844 if (ret) { 2845 mwifiex_dbg(adapter, ERROR, 2846 "SDIO read err\n"); 2847 goto done; 2848 } 2849 if (dbg_ptr < end_ptr) 2850 dbg_ptr++; 2851 else 2852 mwifiex_dbg(adapter, ERROR, 2853 "Allocated buf not enough\n"); 2854 } 2855 2856 if (stat != RDWR_STATUS_DONE) 2857 continue; 2858 2859 mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n", 2860 entry->mem_name, dbg_ptr - entry->mem_ptr); 2861 break; 2862 } while (1); 2863 } 2864 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2865 2866 done: 2867 sdio_release_host(card->func); 2868 } 2869 2870 static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter) 2871 { 2872 struct sdio_mmc_card *card = adapter->card; 2873 struct memory_type_mapping *entry = &generic_mem_type_map[0]; 2874 unsigned int reg, reg_start, reg_end; 2875 u8 start_flag = 0, done_flag = 0; 2876 u8 *dbg_ptr, *end_ptr; 2877 enum rdwr_status stat; 2878 int ret = -1, tries; 2879 2880 if (!card->fw_dump_enh) 2881 return; 2882 2883 if (entry->mem_ptr) { 2884 vfree(entry->mem_ptr); 2885 entry->mem_ptr = NULL; 2886 } 2887 entry->mem_size = 0; 2888 2889 mwifiex_pm_wakeup_card(adapter); 2890 sdio_claim_host(card->func); 2891 2892 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2893 2894 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2895 if (stat == RDWR_STATUS_FAILURE) 2896 goto done; 2897 2898 reg_start = card->reg->fw_dump_start; 2899 reg_end = card->reg->fw_dump_end; 2900 for (reg = reg_start; reg <= reg_end; reg++) { 2901 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2902 start_flag = sdio_readb(card->func, reg, &ret); 2903 if (ret) { 2904 mwifiex_dbg(adapter, ERROR, 2905 "SDIO read err\n"); 2906 goto done; 2907 } 2908 if (start_flag == 0) 2909 break; 2910 if (tries == MAX_POLL_TRIES) { 2911 mwifiex_dbg(adapter, ERROR, 2912 "FW not ready to dump\n"); 2913 ret = -1; 2914 goto done; 2915 } 2916 } 2917 usleep_range(100, 200); 2918 } 2919 2920 entry->mem_ptr = vmalloc(0xf0000 + 1); 2921 if (!entry->mem_ptr) { 2922 ret = -1; 2923 goto done; 2924 } 2925 dbg_ptr = entry->mem_ptr; 2926 entry->mem_size = 0xf0000; 2927 end_ptr = dbg_ptr + entry->mem_size; 2928 2929 done_flag = entry->done_flag; 2930 mwifiex_dbg(adapter, DUMP, 2931 "Start %s output, please wait...\n", entry->mem_name); 2932 2933 while (true) { 2934 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2935 if (stat == RDWR_STATUS_FAILURE) 2936 goto done; 2937 for (reg = reg_start; reg <= reg_end; reg++) { 2938 *dbg_ptr = sdio_readb(card->func, reg, &ret); 2939 if (ret) { 2940 mwifiex_dbg(adapter, ERROR, 2941 "SDIO read err\n"); 2942 goto done; 2943 } 2944 dbg_ptr++; 2945 if (dbg_ptr >= end_ptr) { 2946 u8 *tmp_ptr; 2947 2948 tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1); 2949 if (!tmp_ptr) 2950 goto done; 2951 2952 memcpy(tmp_ptr, entry->mem_ptr, 2953 entry->mem_size); 2954 vfree(entry->mem_ptr); 2955 entry->mem_ptr = tmp_ptr; 2956 tmp_ptr = NULL; 2957 dbg_ptr = entry->mem_ptr + entry->mem_size; 2958 entry->mem_size += 0x4000; 2959 end_ptr = entry->mem_ptr + entry->mem_size; 2960 } 2961 } 2962 if (stat == RDWR_STATUS_DONE) { 2963 entry->mem_size = dbg_ptr - entry->mem_ptr; 2964 mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n", 2965 entry->mem_name, entry->mem_size); 2966 ret = 0; 2967 break; 2968 } 2969 } 2970 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2971 2972 done: 2973 if (ret) { 2974 mwifiex_dbg(adapter, ERROR, "firmware dump failed\n"); 2975 if (entry->mem_ptr) { 2976 vfree(entry->mem_ptr); 2977 entry->mem_ptr = NULL; 2978 } 2979 entry->mem_size = 0; 2980 } 2981 sdio_release_host(card->func); 2982 } 2983 2984 static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter) 2985 { 2986 struct sdio_mmc_card *card = adapter->card; 2987 2988 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2989 if (!adapter->devdump_data) { 2990 mwifiex_dbg(adapter, ERROR, 2991 "vzalloc devdump data failure!\n"); 2992 return; 2993 } 2994 2995 mwifiex_drv_info_dump(adapter); 2996 if (card->fw_dump_enh) 2997 mwifiex_sdio_generic_fw_dump(adapter); 2998 else 2999 mwifiex_sdio_fw_dump(adapter); 3000 mwifiex_prepare_fw_dump_info(adapter); 3001 mwifiex_upload_device_dump(adapter); 3002 } 3003 3004 static void mwifiex_sdio_work(struct work_struct *work) 3005 { 3006 struct sdio_mmc_card *card = 3007 container_of(work, struct sdio_mmc_card, work); 3008 3009 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 3010 &card->work_flags)) 3011 mwifiex_sdio_device_dump_work(card->adapter); 3012 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 3013 &card->work_flags)) 3014 mwifiex_sdio_card_reset_work(card->adapter); 3015 } 3016 3017 /* This function resets the card */ 3018 static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter) 3019 { 3020 struct sdio_mmc_card *card = adapter->card; 3021 3022 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 3023 schedule_work(&card->work); 3024 } 3025 3026 /* This function dumps FW information */ 3027 static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter) 3028 { 3029 struct sdio_mmc_card *card = adapter->card; 3030 3031 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 3032 &card->work_flags)) 3033 schedule_work(&card->work); 3034 } 3035 3036 /* Function to dump SDIO function registers and SDIO scratch registers in case 3037 * of FW crash 3038 */ 3039 static int 3040 mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 3041 { 3042 char *p = drv_buf; 3043 struct sdio_mmc_card *cardp = adapter->card; 3044 int ret = 0; 3045 u8 count, func, data, index = 0, size = 0; 3046 u8 reg, reg_start, reg_end; 3047 char buf[256], *ptr; 3048 3049 if (!p) 3050 return 0; 3051 3052 mwifiex_dbg(adapter, MSG, "SDIO register dump start\n"); 3053 3054 mwifiex_pm_wakeup_card(adapter); 3055 3056 sdio_claim_host(cardp->func); 3057 3058 for (count = 0; count < 5; count++) { 3059 memset(buf, 0, sizeof(buf)); 3060 ptr = buf; 3061 3062 switch (count) { 3063 case 0: 3064 /* Read the registers of SDIO function0 */ 3065 func = count; 3066 reg_start = 0; 3067 reg_end = 9; 3068 break; 3069 case 1: 3070 /* Read the registers of SDIO function1 */ 3071 func = count; 3072 reg_start = cardp->reg->func1_dump_reg_start; 3073 reg_end = cardp->reg->func1_dump_reg_end; 3074 break; 3075 case 2: 3076 index = 0; 3077 func = 1; 3078 reg_start = cardp->reg->func1_spec_reg_table[index++]; 3079 size = cardp->reg->func1_spec_reg_num; 3080 reg_end = cardp->reg->func1_spec_reg_table[size-1]; 3081 break; 3082 default: 3083 /* Read the scratch registers of SDIO function1 */ 3084 if (count == 4) 3085 mdelay(100); 3086 func = 1; 3087 reg_start = cardp->reg->func1_scratch_reg; 3088 reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE; 3089 } 3090 3091 if (count != 2) 3092 ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ", 3093 func, reg_start, reg_end); 3094 else 3095 ptr += sprintf(ptr, "SDIO Func%d: ", func); 3096 3097 for (reg = reg_start; reg <= reg_end;) { 3098 if (func == 0) 3099 data = sdio_f0_readb(cardp->func, reg, &ret); 3100 else 3101 data = sdio_readb(cardp->func, reg, &ret); 3102 3103 if (count == 2) 3104 ptr += sprintf(ptr, "(%#x) ", reg); 3105 if (!ret) { 3106 ptr += sprintf(ptr, "%02x ", data); 3107 } else { 3108 ptr += sprintf(ptr, "ERR"); 3109 break; 3110 } 3111 3112 if (count == 2 && reg < reg_end) 3113 reg = cardp->reg->func1_spec_reg_table[index++]; 3114 else 3115 reg++; 3116 } 3117 3118 mwifiex_dbg(adapter, MSG, "%s\n", buf); 3119 p += sprintf(p, "%s\n", buf); 3120 } 3121 3122 sdio_release_host(cardp->func); 3123 3124 mwifiex_dbg(adapter, MSG, "SDIO register dump end\n"); 3125 3126 return p - drv_buf; 3127 } 3128 3129 /* sdio device/function initialization, code is extracted 3130 * from init_if handler and register_dev handler. 3131 */ 3132 static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter) 3133 { 3134 struct sdio_mmc_card *card = adapter->card; 3135 u8 sdio_ireg; 3136 3137 sdio_claim_host(card->func); 3138 sdio_enable_func(card->func); 3139 sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 3140 sdio_release_host(card->func); 3141 3142 /* tx_buf_size might be changed to 3584 by firmware during 3143 * data transfer, we will reset to default size. 3144 */ 3145 adapter->tx_buf_size = card->tx_buf_size; 3146 3147 /* Read the host_int_status_reg for ACK the first interrupt got 3148 * from the bootloader. If we don't do this we get a interrupt 3149 * as soon as we register the irq. 3150 */ 3151 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 3152 3153 if (mwifiex_init_sdio_ioport(adapter)) 3154 dev_err(&card->func->dev, "error enabling SDIO port\n"); 3155 } 3156 3157 static struct mwifiex_if_ops sdio_ops = { 3158 .init_if = mwifiex_init_sdio, 3159 .cleanup_if = mwifiex_cleanup_sdio, 3160 .check_fw_status = mwifiex_check_fw_status, 3161 .check_winner_status = mwifiex_check_winner_status, 3162 .prog_fw = mwifiex_prog_fw_w_helper, 3163 .register_dev = mwifiex_register_dev, 3164 .unregister_dev = mwifiex_unregister_dev, 3165 .enable_int = mwifiex_sdio_enable_host_int, 3166 .disable_int = mwifiex_sdio_disable_host_int, 3167 .process_int_status = mwifiex_process_int_status, 3168 .host_to_card = mwifiex_sdio_host_to_card, 3169 .wakeup = mwifiex_pm_wakeup_card, 3170 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3171 3172 /* SDIO specific */ 3173 .update_mp_end_port = mwifiex_update_mp_end_port, 3174 .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf, 3175 .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete, 3176 .event_complete = mwifiex_sdio_event_complete, 3177 .dnld_fw = mwifiex_sdio_dnld_fw, 3178 .card_reset = mwifiex_sdio_card_reset, 3179 .reg_dump = mwifiex_sdio_reg_dump, 3180 .device_dump = mwifiex_sdio_device_dump, 3181 .deaggr_pkt = mwifiex_deaggr_sdio_pkt, 3182 .up_dev = mwifiex_sdio_up_dev, 3183 }; 3184 3185 module_sdio_driver(mwifiex_sdio); 3186 3187 MODULE_AUTHOR("Marvell International Ltd."); 3188 MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION); 3189 MODULE_VERSION(SDIO_VERSION); 3190 MODULE_LICENSE("GPL v2"); 3191 MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME); 3192 MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME); 3193 MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME); 3194 MODULE_FIRMWARE(SD8801_DEFAULT_FW_NAME); 3195 MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME); 3196 MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME); 3197 MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME); 3198 MODULE_FIRMWARE(SD8978_SDIOUART_FW_NAME); 3199 MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME); 3200 MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME); 3201 MODULE_FIRMWARE(SD8997_SDIOUART_FW_NAME); 3202