1277b024eSKalle Valo /* 2277b024eSKalle Valo * Marvell Wireless LAN device driver: SDIO specific handling 3277b024eSKalle Valo * 4277b024eSKalle Valo * Copyright (C) 2011-2014, Marvell International Ltd. 5277b024eSKalle Valo * 6277b024eSKalle Valo * This software file (the "File") is distributed by Marvell International 7277b024eSKalle Valo * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8277b024eSKalle Valo * (the "License"). You may use, redistribute and/or modify this File in 9277b024eSKalle Valo * accordance with the terms and conditions of the License, a copy of which 10277b024eSKalle Valo * is available by writing to the Free Software Foundation, Inc., 11277b024eSKalle Valo * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12277b024eSKalle Valo * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13277b024eSKalle Valo * 14277b024eSKalle Valo * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15277b024eSKalle Valo * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16277b024eSKalle Valo * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17277b024eSKalle Valo * this warranty disclaimer. 18277b024eSKalle Valo */ 19277b024eSKalle Valo 20277b024eSKalle Valo #include <linux/firmware.h> 21277b024eSKalle Valo 22277b024eSKalle Valo #include "decl.h" 23277b024eSKalle Valo #include "ioctl.h" 24277b024eSKalle Valo #include "util.h" 25277b024eSKalle Valo #include "fw.h" 26277b024eSKalle Valo #include "main.h" 27277b024eSKalle Valo #include "wmm.h" 28277b024eSKalle Valo #include "11n.h" 29277b024eSKalle Valo #include "sdio.h" 30277b024eSKalle Valo 31277b024eSKalle Valo 32277b024eSKalle Valo #define SDIO_VERSION "1.0" 33277b024eSKalle Valo 3441efaf58SXinming Hu static void mwifiex_sdio_work(struct work_struct *work); 3541efaf58SXinming Hu 36277b024eSKalle Valo static struct mwifiex_if_ops sdio_ops; 37277b024eSKalle Valo 38277b024eSKalle Valo static struct memory_type_mapping generic_mem_type_map[] = { 39277b024eSKalle Valo {"DUMP", NULL, 0, 0xDD}, 40277b024eSKalle Valo }; 41277b024eSKalle Valo 42277b024eSKalle Valo static struct memory_type_mapping mem_type_mapping_tbl[] = { 43277b024eSKalle Valo {"ITCM", NULL, 0, 0xF0}, 44277b024eSKalle Valo {"DTCM", NULL, 0, 0xF1}, 45277b024eSKalle Valo {"SQRAM", NULL, 0, 0xF2}, 46277b024eSKalle Valo {"APU", NULL, 0, 0xF3}, 47277b024eSKalle Valo {"CIU", NULL, 0, 0xF4}, 48277b024eSKalle Valo {"ICU", NULL, 0, 0xF5}, 49277b024eSKalle Valo {"MAC", NULL, 0, 0xF6}, 50277b024eSKalle Valo {"EXT7", NULL, 0, 0xF7}, 51277b024eSKalle Valo {"EXT8", NULL, 0, 0xF8}, 52277b024eSKalle Valo {"EXT9", NULL, 0, 0xF9}, 53277b024eSKalle Valo {"EXT10", NULL, 0, 0xFA}, 54277b024eSKalle Valo {"EXT11", NULL, 0, 0xFB}, 55277b024eSKalle Valo {"EXT12", NULL, 0, 0xFC}, 56277b024eSKalle Valo {"EXT13", NULL, 0, 0xFD}, 57277b024eSKalle Valo {"EXTLAST", NULL, 0, 0xFE}, 58277b024eSKalle Valo }; 59277b024eSKalle Valo 60ce4f6f0cSXinming Hu static const struct of_device_id mwifiex_sdio_of_match_table[] = { 61ce4f6f0cSXinming Hu { .compatible = "marvell,sd8897" }, 62ce4f6f0cSXinming Hu { .compatible = "marvell,sd8997" }, 63ce4f6f0cSXinming Hu { } 64ce4f6f0cSXinming Hu }; 65ce4f6f0cSXinming Hu 66ce4f6f0cSXinming Hu /* This function parse device tree node using mmc subnode devicetree API. 67ce4f6f0cSXinming Hu * The device node is saved in card->plt_of_node. 68ce4f6f0cSXinming Hu * if the device tree node exist and include interrupts attributes, this 69ce4f6f0cSXinming Hu * function will also request platform specific wakeup interrupt. 70ce4f6f0cSXinming Hu */ 71853402a0SRajat Jain static int mwifiex_sdio_probe_of(struct device *dev) 72ce4f6f0cSXinming Hu { 736f49208fSJavier Martinez Canillas if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) { 745e94913fSJavier Martinez Canillas dev_err(dev, "required compatible string missing\n"); 755e94913fSJavier Martinez Canillas return -EINVAL; 76ce4f6f0cSXinming Hu } 77ce4f6f0cSXinming Hu 78ce4f6f0cSXinming Hu return 0; 79ce4f6f0cSXinming Hu } 80ce4f6f0cSXinming Hu 81277b024eSKalle Valo /* 82277b024eSKalle Valo * SDIO probe. 83277b024eSKalle Valo * 84277b024eSKalle Valo * This function probes an mwifiex device and registers it. It allocates 85277b024eSKalle Valo * the card structure, enables SDIO function number and initiates the 86277b024eSKalle Valo * device registration and initialization procedure by adding a logical 87277b024eSKalle Valo * interface. 88277b024eSKalle Valo */ 89277b024eSKalle Valo static int 90277b024eSKalle Valo mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id) 91277b024eSKalle Valo { 92277b024eSKalle Valo int ret; 93277b024eSKalle Valo struct sdio_mmc_card *card = NULL; 94277b024eSKalle Valo 95277b024eSKalle Valo pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n", 96277b024eSKalle Valo func->vendor, func->device, func->class, func->num); 97277b024eSKalle Valo 9866b9c182SBrian Norris card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL); 99277b024eSKalle Valo if (!card) 100277b024eSKalle Valo return -ENOMEM; 101277b024eSKalle Valo 1024a79aa17SBrian Norris init_completion(&card->fw_done); 1034a79aa17SBrian Norris 104277b024eSKalle Valo card->func = func; 105277b024eSKalle Valo 106277b024eSKalle Valo func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE; 107277b024eSKalle Valo 108277b024eSKalle Valo if (id->driver_data) { 109277b024eSKalle Valo struct mwifiex_sdio_device *data = (void *)id->driver_data; 110277b024eSKalle Valo 111277b024eSKalle Valo card->firmware = data->firmware; 112277b024eSKalle Valo card->reg = data->reg; 113277b024eSKalle Valo card->max_ports = data->max_ports; 114277b024eSKalle Valo card->mp_agg_pkt_limit = data->mp_agg_pkt_limit; 115277b024eSKalle Valo card->supports_sdio_new_mode = data->supports_sdio_new_mode; 116277b024eSKalle Valo card->has_control_mask = data->has_control_mask; 117277b024eSKalle Valo card->tx_buf_size = data->tx_buf_size; 118277b024eSKalle Valo card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size; 119277b024eSKalle Valo card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size; 120277b024eSKalle Valo card->can_dump_fw = data->can_dump_fw; 121277b024eSKalle Valo card->fw_dump_enh = data->fw_dump_enh; 122277b024eSKalle Valo card->can_auto_tdls = data->can_auto_tdls; 123277b024eSKalle Valo card->can_ext_scan = data->can_ext_scan; 124cc75c577SXinming Hu INIT_WORK(&card->work, mwifiex_sdio_work); 125277b024eSKalle Valo } 126277b024eSKalle Valo 127277b024eSKalle Valo sdio_claim_host(func); 128277b024eSKalle Valo ret = sdio_enable_func(func); 129277b024eSKalle Valo sdio_release_host(func); 130277b024eSKalle Valo 131277b024eSKalle Valo if (ret) { 132d3f04eceSJavier Martinez Canillas dev_err(&func->dev, "failed to enable function\n"); 13366b9c182SBrian Norris return ret; 134277b024eSKalle Valo } 135277b024eSKalle Valo 136ce4f6f0cSXinming Hu /* device tree node parsing and platform specific configuration*/ 137213d9421SJavier Martinez Canillas if (func->dev.of_node) { 138853402a0SRajat Jain ret = mwifiex_sdio_probe_of(&func->dev); 139853402a0SRajat Jain if (ret) 140213d9421SJavier Martinez Canillas goto err_disable; 141213d9421SJavier Martinez Canillas } 142ce4f6f0cSXinming Hu 1434a79aa17SBrian Norris ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops, 1442e02b581SRajat Jain MWIFIEX_SDIO, &func->dev); 145032e0f54SJavier Martinez Canillas if (ret) { 146d3f04eceSJavier Martinez Canillas dev_err(&func->dev, "add card failed\n"); 147a82f65aaSJavier Martinez Canillas goto err_disable; 148a82f65aaSJavier Martinez Canillas } 149a82f65aaSJavier Martinez Canillas 150a82f65aaSJavier Martinez Canillas return 0; 151a82f65aaSJavier Martinez Canillas 152a82f65aaSJavier Martinez Canillas err_disable: 153277b024eSKalle Valo sdio_claim_host(func); 154032e0f54SJavier Martinez Canillas sdio_disable_func(func); 155277b024eSKalle Valo sdio_release_host(func); 156277b024eSKalle Valo 157277b024eSKalle Valo return ret; 158277b024eSKalle Valo } 159277b024eSKalle Valo 160277b024eSKalle Valo /* 161277b024eSKalle Valo * SDIO resume. 162277b024eSKalle Valo * 163277b024eSKalle Valo * Kernel needs to suspend all functions separately. Therefore all 164277b024eSKalle Valo * registered functions must have drivers with suspend and resume 165277b024eSKalle Valo * methods. Failing that the kernel simply removes the whole card. 166277b024eSKalle Valo * 167277b024eSKalle Valo * If already not resumed, this function turns on the traffic and 168277b024eSKalle Valo * sends a host sleep cancel request to the firmware. 169277b024eSKalle Valo */ 170277b024eSKalle Valo static int mwifiex_sdio_resume(struct device *dev) 171277b024eSKalle Valo { 172277b024eSKalle Valo struct sdio_func *func = dev_to_sdio_func(dev); 173277b024eSKalle Valo struct sdio_mmc_card *card; 174277b024eSKalle Valo struct mwifiex_adapter *adapter; 175277b024eSKalle Valo 176277b024eSKalle Valo card = sdio_get_drvdata(func); 177277b024eSKalle Valo if (!card || !card->adapter) { 1786caf34cbSBrian Norris dev_err(dev, "resume: invalid card or adapter\n"); 179277b024eSKalle Valo return 0; 180277b024eSKalle Valo } 181277b024eSKalle Valo 182277b024eSKalle Valo adapter = card->adapter; 183277b024eSKalle Valo 184fc3a2fcaSGanapathi Bhat if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 185277b024eSKalle Valo mwifiex_dbg(adapter, WARN, 186277b024eSKalle Valo "device already resumed\n"); 187277b024eSKalle Valo return 0; 188277b024eSKalle Valo } 189277b024eSKalle Valo 190fc3a2fcaSGanapathi Bhat clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 191277b024eSKalle Valo 192277b024eSKalle Valo /* Disable Host Sleep */ 193277b024eSKalle Valo mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 194a92277bcSAmitkumar Karwar MWIFIEX_SYNC_CMD); 195277b024eSKalle Valo 196853402a0SRajat Jain mwifiex_disable_wake(adapter); 197ce4f6f0cSXinming Hu 198277b024eSKalle Valo return 0; 199277b024eSKalle Valo } 200277b024eSKalle Valo 20190ff71f9SXinming Hu /* Write data into SDIO card register. Caller claims SDIO device. */ 20290ff71f9SXinming Hu static int 20390ff71f9SXinming Hu mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data) 20490ff71f9SXinming Hu { 20590ff71f9SXinming Hu int ret = -1; 20690ff71f9SXinming Hu 20790ff71f9SXinming Hu sdio_writeb(func, data, reg, &ret); 20890ff71f9SXinming Hu return ret; 20990ff71f9SXinming Hu } 21090ff71f9SXinming Hu 21190ff71f9SXinming Hu /* This function writes data into SDIO card register. 21290ff71f9SXinming Hu */ 21390ff71f9SXinming Hu static int 21490ff71f9SXinming Hu mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data) 21590ff71f9SXinming Hu { 21690ff71f9SXinming Hu struct sdio_mmc_card *card = adapter->card; 21790ff71f9SXinming Hu int ret; 21890ff71f9SXinming Hu 21990ff71f9SXinming Hu sdio_claim_host(card->func); 22090ff71f9SXinming Hu ret = mwifiex_write_reg_locked(card->func, reg, data); 22190ff71f9SXinming Hu sdio_release_host(card->func); 22290ff71f9SXinming Hu 22390ff71f9SXinming Hu return ret; 22490ff71f9SXinming Hu } 22590ff71f9SXinming Hu 22690ff71f9SXinming Hu /* This function reads data from SDIO card register. 22790ff71f9SXinming Hu */ 22890ff71f9SXinming Hu static int 22990ff71f9SXinming Hu mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data) 23090ff71f9SXinming Hu { 23190ff71f9SXinming Hu struct sdio_mmc_card *card = adapter->card; 23290ff71f9SXinming Hu int ret = -1; 23390ff71f9SXinming Hu u8 val; 23490ff71f9SXinming Hu 23590ff71f9SXinming Hu sdio_claim_host(card->func); 23690ff71f9SXinming Hu val = sdio_readb(card->func, reg, &ret); 23790ff71f9SXinming Hu sdio_release_host(card->func); 23890ff71f9SXinming Hu 23990ff71f9SXinming Hu *data = val; 24090ff71f9SXinming Hu 24190ff71f9SXinming Hu return ret; 24290ff71f9SXinming Hu } 24390ff71f9SXinming Hu 24490ff71f9SXinming Hu /* This function writes multiple data into SDIO card memory. 24590ff71f9SXinming Hu * 24690ff71f9SXinming Hu * This does not work in suspended mode. 24790ff71f9SXinming Hu */ 24890ff71f9SXinming Hu static int 24990ff71f9SXinming Hu mwifiex_write_data_sync(struct mwifiex_adapter *adapter, 25090ff71f9SXinming Hu u8 *buffer, u32 pkt_len, u32 port) 25190ff71f9SXinming Hu { 25290ff71f9SXinming Hu struct sdio_mmc_card *card = adapter->card; 25390ff71f9SXinming Hu int ret; 25490ff71f9SXinming Hu u8 blk_mode = 25590ff71f9SXinming Hu (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE; 25690ff71f9SXinming Hu u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 25790ff71f9SXinming Hu u32 blk_cnt = 25890ff71f9SXinming Hu (blk_mode == 25990ff71f9SXinming Hu BLOCK_MODE) ? (pkt_len / 26090ff71f9SXinming Hu MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len; 26190ff71f9SXinming Hu u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 26290ff71f9SXinming Hu 263fc3a2fcaSGanapathi Bhat if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 26490ff71f9SXinming Hu mwifiex_dbg(adapter, ERROR, 26590ff71f9SXinming Hu "%s: not allowed while suspended\n", __func__); 26690ff71f9SXinming Hu return -1; 26790ff71f9SXinming Hu } 26890ff71f9SXinming Hu 26990ff71f9SXinming Hu sdio_claim_host(card->func); 27090ff71f9SXinming Hu 27190ff71f9SXinming Hu ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size); 27290ff71f9SXinming Hu 27390ff71f9SXinming Hu sdio_release_host(card->func); 27490ff71f9SXinming Hu 27590ff71f9SXinming Hu return ret; 27690ff71f9SXinming Hu } 27790ff71f9SXinming Hu 27890ff71f9SXinming Hu /* This function reads multiple data from SDIO card memory. 27990ff71f9SXinming Hu */ 28090ff71f9SXinming Hu static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer, 28190ff71f9SXinming Hu u32 len, u32 port, u8 claim) 28290ff71f9SXinming Hu { 28390ff71f9SXinming Hu struct sdio_mmc_card *card = adapter->card; 28490ff71f9SXinming Hu int ret; 28590ff71f9SXinming Hu u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE 28690ff71f9SXinming Hu : BLOCK_MODE; 28790ff71f9SXinming Hu u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 28890ff71f9SXinming Hu u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE) 28990ff71f9SXinming Hu : len; 29090ff71f9SXinming Hu u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 29190ff71f9SXinming Hu 29290ff71f9SXinming Hu if (claim) 29390ff71f9SXinming Hu sdio_claim_host(card->func); 29490ff71f9SXinming Hu 29590ff71f9SXinming Hu ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size); 29690ff71f9SXinming Hu 29790ff71f9SXinming Hu if (claim) 29890ff71f9SXinming Hu sdio_release_host(card->func); 29990ff71f9SXinming Hu 30090ff71f9SXinming Hu return ret; 30190ff71f9SXinming Hu } 30290ff71f9SXinming Hu 30390ff71f9SXinming Hu /* This function reads the firmware status. 30490ff71f9SXinming Hu */ 30590ff71f9SXinming Hu static int 30690ff71f9SXinming Hu mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat) 30790ff71f9SXinming Hu { 30890ff71f9SXinming Hu struct sdio_mmc_card *card = adapter->card; 30990ff71f9SXinming Hu const struct mwifiex_sdio_card_reg *reg = card->reg; 31090ff71f9SXinming Hu u8 fws0, fws1; 31190ff71f9SXinming Hu 31290ff71f9SXinming Hu if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0)) 31390ff71f9SXinming Hu return -1; 31490ff71f9SXinming Hu 31590ff71f9SXinming Hu if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1)) 31690ff71f9SXinming Hu return -1; 31790ff71f9SXinming Hu 31890ff71f9SXinming Hu *dat = (u16)((fws1 << 8) | fws0); 31990ff71f9SXinming Hu return 0; 32090ff71f9SXinming Hu } 32190ff71f9SXinming Hu 32290ff71f9SXinming Hu /* This function checks the firmware status in card. 32390ff71f9SXinming Hu */ 32490ff71f9SXinming Hu static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, 32590ff71f9SXinming Hu u32 poll_num) 32690ff71f9SXinming Hu { 32790ff71f9SXinming Hu int ret = 0; 32890ff71f9SXinming Hu u16 firmware_stat; 32990ff71f9SXinming Hu u32 tries; 33090ff71f9SXinming Hu 33190ff71f9SXinming Hu for (tries = 0; tries < poll_num; tries++) { 33290ff71f9SXinming Hu ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 33390ff71f9SXinming Hu if (ret) 33490ff71f9SXinming Hu continue; 33590ff71f9SXinming Hu if (firmware_stat == FIRMWARE_READY_SDIO) { 33690ff71f9SXinming Hu ret = 0; 33790ff71f9SXinming Hu break; 33890ff71f9SXinming Hu } 33990ff71f9SXinming Hu 34090ff71f9SXinming Hu msleep(100); 34190ff71f9SXinming Hu ret = -1; 34290ff71f9SXinming Hu } 34390ff71f9SXinming Hu 34490ff71f9SXinming Hu return ret; 34590ff71f9SXinming Hu } 34690ff71f9SXinming Hu 34790ff71f9SXinming Hu /* This function checks if WLAN is the winner. 34890ff71f9SXinming Hu */ 34990ff71f9SXinming Hu static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 35090ff71f9SXinming Hu { 35190ff71f9SXinming Hu int ret = 0; 35290ff71f9SXinming Hu u8 winner = 0; 35390ff71f9SXinming Hu struct sdio_mmc_card *card = adapter->card; 35490ff71f9SXinming Hu 35590ff71f9SXinming Hu if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner)) 35690ff71f9SXinming Hu return -1; 35790ff71f9SXinming Hu 35890ff71f9SXinming Hu if (winner) 35990ff71f9SXinming Hu adapter->winner = 0; 36090ff71f9SXinming Hu else 36190ff71f9SXinming Hu adapter->winner = 1; 36290ff71f9SXinming Hu 36390ff71f9SXinming Hu return ret; 36490ff71f9SXinming Hu } 36590ff71f9SXinming Hu 366277b024eSKalle Valo /* 367277b024eSKalle Valo * SDIO remove. 368277b024eSKalle Valo * 369277b024eSKalle Valo * This function removes the interface and frees up the card structure. 370277b024eSKalle Valo */ 371277b024eSKalle Valo static void 372a7513a4fSXinming Hu mwifiex_sdio_remove(struct sdio_func *func) 373277b024eSKalle Valo { 374277b024eSKalle Valo struct sdio_mmc_card *card; 375277b024eSKalle Valo struct mwifiex_adapter *adapter; 376277b024eSKalle Valo struct mwifiex_private *priv; 377045f0c1bSXinming Hu int ret = 0; 378045f0c1bSXinming Hu u16 firmware_stat; 379277b024eSKalle Valo 380277b024eSKalle Valo card = sdio_get_drvdata(func); 381277b024eSKalle Valo if (!card) 382277b024eSKalle Valo return; 383277b024eSKalle Valo 3844a79aa17SBrian Norris wait_for_completion(&card->fw_done); 3854a79aa17SBrian Norris 386277b024eSKalle Valo adapter = card->adapter; 387277b024eSKalle Valo if (!adapter || !adapter->priv_num) 388277b024eSKalle Valo return; 389277b024eSKalle Valo 390277b024eSKalle Valo mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num); 391277b024eSKalle Valo 392045f0c1bSXinming Hu ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 393f46a5b01SShawn Lin if (!ret && firmware_stat == FIRMWARE_READY_SDIO && 394f46a5b01SShawn Lin !adapter->mfg_mode) { 395277b024eSKalle Valo mwifiex_deauthenticate_all(adapter); 396277b024eSKalle Valo 397277b024eSKalle Valo priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 398277b024eSKalle Valo mwifiex_disable_auto_ds(priv); 399277b024eSKalle Valo mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 400277b024eSKalle Valo } 401277b024eSKalle Valo 4024a79aa17SBrian Norris mwifiex_remove_card(adapter); 403277b024eSKalle Valo } 404277b024eSKalle Valo 405277b024eSKalle Valo /* 406277b024eSKalle Valo * SDIO suspend. 407277b024eSKalle Valo * 408277b024eSKalle Valo * Kernel needs to suspend all functions separately. Therefore all 409277b024eSKalle Valo * registered functions must have drivers with suspend and resume 410277b024eSKalle Valo * methods. Failing that the kernel simply removes the whole card. 411277b024eSKalle Valo * 412277b024eSKalle Valo * If already not suspended, this function allocates and sends a host 413277b024eSKalle Valo * sleep activate request to the firmware and turns off the traffic. 414277b024eSKalle Valo */ 415277b024eSKalle Valo static int mwifiex_sdio_suspend(struct device *dev) 416277b024eSKalle Valo { 417277b024eSKalle Valo struct sdio_func *func = dev_to_sdio_func(dev); 418277b024eSKalle Valo struct sdio_mmc_card *card; 419277b024eSKalle Valo struct mwifiex_adapter *adapter; 420277b024eSKalle Valo mmc_pm_flag_t pm_flag = 0; 421277b024eSKalle Valo int ret = 0; 422277b024eSKalle Valo 423277b024eSKalle Valo pm_flag = sdio_get_host_pm_caps(func); 424277b024eSKalle Valo pr_debug("cmd: %s: suspend: PM flag = 0x%x\n", 425277b024eSKalle Valo sdio_func_id(func), pm_flag); 426277b024eSKalle Valo if (!(pm_flag & MMC_PM_KEEP_POWER)) { 4276caf34cbSBrian Norris dev_err(dev, "%s: cannot remain alive while host is" 428277b024eSKalle Valo " suspended\n", sdio_func_id(func)); 429277b024eSKalle Valo return -ENOSYS; 430277b024eSKalle Valo } 431277b024eSKalle Valo 432277b024eSKalle Valo card = sdio_get_drvdata(func); 433b42dbb27SBrian Norris if (!card) { 434b42dbb27SBrian Norris dev_err(dev, "suspend: invalid card\n"); 435277b024eSKalle Valo return 0; 436277b024eSKalle Valo } 437277b024eSKalle Valo 438b42dbb27SBrian Norris /* Might still be loading firmware */ 439b42dbb27SBrian Norris wait_for_completion(&card->fw_done); 440b42dbb27SBrian Norris 441277b024eSKalle Valo adapter = card->adapter; 442b42dbb27SBrian Norris if (!adapter) { 443b42dbb27SBrian Norris dev_err(dev, "adapter is not valid\n"); 444b42dbb27SBrian Norris return 0; 445b42dbb27SBrian Norris } 446b42dbb27SBrian Norris 447853402a0SRajat Jain mwifiex_enable_wake(adapter); 448ce4f6f0cSXinming Hu 449277b024eSKalle Valo /* Enable the Host Sleep */ 450277b024eSKalle Valo if (!mwifiex_enable_hs(adapter)) { 451277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 452277b024eSKalle Valo "cmd: failed to suspend\n"); 453fc3a2fcaSGanapathi Bhat clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 454d96e3927SBrian Norris mwifiex_disable_wake(adapter); 455277b024eSKalle Valo return -EFAULT; 456277b024eSKalle Valo } 457277b024eSKalle Valo 458277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 459277b024eSKalle Valo "cmd: suspend with MMC_PM_KEEP_POWER\n"); 460277b024eSKalle Valo ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 461277b024eSKalle Valo 462277b024eSKalle Valo /* Indicate device suspended */ 463fc3a2fcaSGanapathi Bhat set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 464fc3a2fcaSGanapathi Bhat clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 465277b024eSKalle Valo 466277b024eSKalle Valo return ret; 467277b024eSKalle Valo } 468277b024eSKalle Valo 46921c5c83cSArend Van Spriel static void mwifiex_sdio_coredump(struct device *dev) 47021c5c83cSArend Van Spriel { 47121c5c83cSArend Van Spriel struct sdio_func *func = dev_to_sdio_func(dev); 47221c5c83cSArend Van Spriel struct sdio_mmc_card *card; 47321c5c83cSArend Van Spriel 47421c5c83cSArend Van Spriel card = sdio_get_drvdata(func); 47521c5c83cSArend Van Spriel if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 47621c5c83cSArend Van Spriel &card->work_flags)) 47721c5c83cSArend Van Spriel schedule_work(&card->work); 47821c5c83cSArend Van Spriel } 47921c5c83cSArend Van Spriel 480277b024eSKalle Valo /* Device ID for SD8786 */ 481277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8786 (0x9116) 482277b024eSKalle Valo /* Device ID for SD8787 */ 483277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8787 (0x9119) 484277b024eSKalle Valo /* Device ID for SD8797 */ 485277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8797 (0x9129) 486277b024eSKalle Valo /* Device ID for SD8897 */ 487277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8897 (0x912d) 488277b024eSKalle Valo /* Device ID for SD8887 */ 489277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8887 (0x9135) 490277b024eSKalle Valo /* Device ID for SD8801 */ 491277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8801 (0x9139) 4921a0f5478SHemantkumar Suthar /* Device ID for SD8977 */ 4931a0f5478SHemantkumar Suthar #define SDIO_DEVICE_ID_MARVELL_8977 (0x9145) 494*938c7c80STamás Szűcs /* Device ID for SD8987 */ 495*938c7c80STamás Szűcs #define SDIO_DEVICE_ID_MARVELL_8987 (0x9149) 496277b024eSKalle Valo /* Device ID for SD8997 */ 497277b024eSKalle Valo #define SDIO_DEVICE_ID_MARVELL_8997 (0x9141) 498277b024eSKalle Valo 499277b024eSKalle Valo 500277b024eSKalle Valo /* WLAN IDs */ 501277b024eSKalle Valo static const struct sdio_device_id mwifiex_ids[] = { 502277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786), 503277b024eSKalle Valo .driver_data = (unsigned long) &mwifiex_sdio_sd8786}, 504277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787), 505277b024eSKalle Valo .driver_data = (unsigned long) &mwifiex_sdio_sd8787}, 506277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797), 507277b024eSKalle Valo .driver_data = (unsigned long) &mwifiex_sdio_sd8797}, 508277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897), 509277b024eSKalle Valo .driver_data = (unsigned long) &mwifiex_sdio_sd8897}, 510277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887), 511277b024eSKalle Valo .driver_data = (unsigned long)&mwifiex_sdio_sd8887}, 512277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801), 513277b024eSKalle Valo .driver_data = (unsigned long)&mwifiex_sdio_sd8801}, 5141a0f5478SHemantkumar Suthar {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977), 5151a0f5478SHemantkumar Suthar .driver_data = (unsigned long)&mwifiex_sdio_sd8977}, 516*938c7c80STamás Szűcs {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987), 517*938c7c80STamás Szűcs .driver_data = (unsigned long)&mwifiex_sdio_sd8987}, 518277b024eSKalle Valo {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997), 519277b024eSKalle Valo .driver_data = (unsigned long)&mwifiex_sdio_sd8997}, 520277b024eSKalle Valo {}, 521277b024eSKalle Valo }; 522277b024eSKalle Valo 523277b024eSKalle Valo MODULE_DEVICE_TABLE(sdio, mwifiex_ids); 524277b024eSKalle Valo 525277b024eSKalle Valo static const struct dev_pm_ops mwifiex_sdio_pm_ops = { 526277b024eSKalle Valo .suspend = mwifiex_sdio_suspend, 527277b024eSKalle Valo .resume = mwifiex_sdio_resume, 528277b024eSKalle Valo }; 529277b024eSKalle Valo 530277b024eSKalle Valo static struct sdio_driver mwifiex_sdio = { 531277b024eSKalle Valo .name = "mwifiex_sdio", 532277b024eSKalle Valo .id_table = mwifiex_ids, 533277b024eSKalle Valo .probe = mwifiex_sdio_probe, 534277b024eSKalle Valo .remove = mwifiex_sdio_remove, 535277b024eSKalle Valo .drv = { 536277b024eSKalle Valo .owner = THIS_MODULE, 53721c5c83cSArend Van Spriel .coredump = mwifiex_sdio_coredump, 538277b024eSKalle Valo .pm = &mwifiex_sdio_pm_ops, 539277b024eSKalle Valo } 540277b024eSKalle Valo }; 541277b024eSKalle Valo 542277b024eSKalle Valo /* 543277b024eSKalle Valo * This function wakes up the card. 544277b024eSKalle Valo * 545277b024eSKalle Valo * A host power up command is written to the card configuration 546277b024eSKalle Valo * register to wake up the card. 547277b024eSKalle Valo */ 548277b024eSKalle Valo static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 549277b024eSKalle Valo { 550277b024eSKalle Valo mwifiex_dbg(adapter, EVENT, 551277b024eSKalle Valo "event: wakeup device...\n"); 552277b024eSKalle Valo 553277b024eSKalle Valo return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP); 554277b024eSKalle Valo } 555277b024eSKalle Valo 556277b024eSKalle Valo /* 557277b024eSKalle Valo * This function is called after the card has woken up. 558277b024eSKalle Valo * 559277b024eSKalle Valo * The card configuration register is reset. 560277b024eSKalle Valo */ 561277b024eSKalle Valo static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 562277b024eSKalle Valo { 563277b024eSKalle Valo mwifiex_dbg(adapter, EVENT, 564277b024eSKalle Valo "cmd: wakeup device completed\n"); 565277b024eSKalle Valo 566277b024eSKalle Valo return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0); 567277b024eSKalle Valo } 568277b024eSKalle Valo 5692095b142SArnd Bergmann static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter, 5702095b142SArnd Bergmann struct mwifiex_fw_image *fw) 5712095b142SArnd Bergmann { 5722095b142SArnd Bergmann struct sdio_mmc_card *card = adapter->card; 5732095b142SArnd Bergmann int ret; 5742095b142SArnd Bergmann 5752095b142SArnd Bergmann sdio_claim_host(card->func); 5762095b142SArnd Bergmann ret = mwifiex_dnld_fw(adapter, fw); 5772095b142SArnd Bergmann sdio_release_host(card->func); 5782095b142SArnd Bergmann 5792095b142SArnd Bergmann return ret; 5802095b142SArnd Bergmann } 5812095b142SArnd Bergmann 582277b024eSKalle Valo /* 583277b024eSKalle Valo * This function is used to initialize IO ports for the 584277b024eSKalle Valo * chipsets supporting SDIO new mode eg SD8897. 585277b024eSKalle Valo */ 586277b024eSKalle Valo static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter) 587277b024eSKalle Valo { 588277b024eSKalle Valo u8 reg; 589277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 590277b024eSKalle Valo 591277b024eSKalle Valo adapter->ioport = MEM_PORT; 592277b024eSKalle Valo 593277b024eSKalle Valo /* enable sdio new mode */ 594277b024eSKalle Valo if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®)) 595277b024eSKalle Valo return -1; 596277b024eSKalle Valo if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg, 597277b024eSKalle Valo reg | CMD53_NEW_MODE)) 598277b024eSKalle Valo return -1; 599277b024eSKalle Valo 600277b024eSKalle Valo /* Configure cmd port and enable reading rx length from the register */ 601277b024eSKalle Valo if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®)) 602277b024eSKalle Valo return -1; 603277b024eSKalle Valo if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0, 604277b024eSKalle Valo reg | CMD_PORT_RD_LEN_EN)) 605277b024eSKalle Valo return -1; 606277b024eSKalle Valo 607277b024eSKalle Valo /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is 608277b024eSKalle Valo * completed 609277b024eSKalle Valo */ 610277b024eSKalle Valo if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®)) 611277b024eSKalle Valo return -1; 612277b024eSKalle Valo if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1, 613277b024eSKalle Valo reg | CMD_PORT_AUTO_EN)) 614277b024eSKalle Valo return -1; 615277b024eSKalle Valo 616277b024eSKalle Valo return 0; 617277b024eSKalle Valo } 618277b024eSKalle Valo 619277b024eSKalle Valo /* This function initializes the IO ports. 620277b024eSKalle Valo * 621277b024eSKalle Valo * The following operations are performed - 622277b024eSKalle Valo * - Read the IO ports (0, 1 and 2) 623277b024eSKalle Valo * - Set host interrupt Reset-To-Read to clear 624277b024eSKalle Valo * - Set auto re-enable interrupt 625277b024eSKalle Valo */ 626277b024eSKalle Valo static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter) 627277b024eSKalle Valo { 628277b024eSKalle Valo u8 reg; 629277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 630277b024eSKalle Valo 631277b024eSKalle Valo adapter->ioport = 0; 632277b024eSKalle Valo 633277b024eSKalle Valo if (card->supports_sdio_new_mode) { 634277b024eSKalle Valo if (mwifiex_init_sdio_new_mode(adapter)) 635277b024eSKalle Valo return -1; 636277b024eSKalle Valo goto cont; 637277b024eSKalle Valo } 638277b024eSKalle Valo 639277b024eSKalle Valo /* Read the IO port */ 640277b024eSKalle Valo if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®)) 641277b024eSKalle Valo adapter->ioport |= (reg & 0xff); 642277b024eSKalle Valo else 643277b024eSKalle Valo return -1; 644277b024eSKalle Valo 645277b024eSKalle Valo if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®)) 646277b024eSKalle Valo adapter->ioport |= ((reg & 0xff) << 8); 647277b024eSKalle Valo else 648277b024eSKalle Valo return -1; 649277b024eSKalle Valo 650277b024eSKalle Valo if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®)) 651277b024eSKalle Valo adapter->ioport |= ((reg & 0xff) << 16); 652277b024eSKalle Valo else 653277b024eSKalle Valo return -1; 654277b024eSKalle Valo cont: 655277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 656277b024eSKalle Valo "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport); 657277b024eSKalle Valo 658277b024eSKalle Valo /* Set Host interrupt reset to read to clear */ 659277b024eSKalle Valo if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®)) 660277b024eSKalle Valo mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg, 661277b024eSKalle Valo reg | card->reg->sdio_int_mask); 662277b024eSKalle Valo else 663277b024eSKalle Valo return -1; 664277b024eSKalle Valo 665277b024eSKalle Valo /* Dnld/Upld ready set to auto reset */ 666277b024eSKalle Valo if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®)) 667277b024eSKalle Valo mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg, 668277b024eSKalle Valo reg | AUTO_RE_ENABLE_INT); 669277b024eSKalle Valo else 670277b024eSKalle Valo return -1; 671277b024eSKalle Valo 672277b024eSKalle Valo return 0; 673277b024eSKalle Valo } 674277b024eSKalle Valo 675277b024eSKalle Valo /* 676277b024eSKalle Valo * This function sends data to the card. 677277b024eSKalle Valo */ 678277b024eSKalle Valo static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter, 679277b024eSKalle Valo u8 *payload, u32 pkt_len, u32 port) 680277b024eSKalle Valo { 681277b024eSKalle Valo u32 i = 0; 682277b024eSKalle Valo int ret; 683277b024eSKalle Valo 684277b024eSKalle Valo do { 685277b024eSKalle Valo ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port); 686277b024eSKalle Valo if (ret) { 687277b024eSKalle Valo i++; 688277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 689277b024eSKalle Valo "host_to_card, write iomem\t" 690277b024eSKalle Valo "(%d) failed: %d\n", i, ret); 691277b024eSKalle Valo if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 692277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 693277b024eSKalle Valo "write CFG reg failed\n"); 694277b024eSKalle Valo 695277b024eSKalle Valo ret = -1; 696277b024eSKalle Valo if (i > MAX_WRITE_IOMEM_RETRY) 697277b024eSKalle Valo return ret; 698277b024eSKalle Valo } 699277b024eSKalle Valo } while (ret == -1); 700277b024eSKalle Valo 701277b024eSKalle Valo return ret; 702277b024eSKalle Valo } 703277b024eSKalle Valo 704277b024eSKalle Valo /* 705277b024eSKalle Valo * This function gets the read port. 706277b024eSKalle Valo * 707277b024eSKalle Valo * If control port bit is set in MP read bitmap, the control port 708277b024eSKalle Valo * is returned, otherwise the current read port is returned and 709277b024eSKalle Valo * the value is increased (provided it does not reach the maximum 710277b024eSKalle Valo * limit, in which case it is reset to 1) 711277b024eSKalle Valo */ 712277b024eSKalle Valo static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port) 713277b024eSKalle Valo { 714277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 715277b024eSKalle Valo const struct mwifiex_sdio_card_reg *reg = card->reg; 716277b024eSKalle Valo u32 rd_bitmap = card->mp_rd_bitmap; 717277b024eSKalle Valo 718277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 719277b024eSKalle Valo "data: mp_rd_bitmap=0x%08x\n", rd_bitmap); 720277b024eSKalle Valo 721277b024eSKalle Valo if (card->supports_sdio_new_mode) { 722277b024eSKalle Valo if (!(rd_bitmap & reg->data_port_mask)) 723277b024eSKalle Valo return -1; 724277b024eSKalle Valo } else { 725277b024eSKalle Valo if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask))) 726277b024eSKalle Valo return -1; 727277b024eSKalle Valo } 728277b024eSKalle Valo 729277b024eSKalle Valo if ((card->has_control_mask) && 730277b024eSKalle Valo (card->mp_rd_bitmap & CTRL_PORT_MASK)) { 731277b024eSKalle Valo card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK); 732277b024eSKalle Valo *port = CTRL_PORT; 733277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 734277b024eSKalle Valo "data: port=%d mp_rd_bitmap=0x%08x\n", 735277b024eSKalle Valo *port, card->mp_rd_bitmap); 736277b024eSKalle Valo return 0; 737277b024eSKalle Valo } 738277b024eSKalle Valo 739277b024eSKalle Valo if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port))) 740277b024eSKalle Valo return -1; 741277b024eSKalle Valo 742277b024eSKalle Valo /* We are now handling the SDIO data ports */ 743277b024eSKalle Valo card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port)); 744277b024eSKalle Valo *port = card->curr_rd_port; 745277b024eSKalle Valo 746277b024eSKalle Valo if (++card->curr_rd_port == card->max_ports) 747277b024eSKalle Valo card->curr_rd_port = reg->start_rd_port; 748277b024eSKalle Valo 749277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 750277b024eSKalle Valo "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n", 751277b024eSKalle Valo *port, rd_bitmap, card->mp_rd_bitmap); 752277b024eSKalle Valo 753277b024eSKalle Valo return 0; 754277b024eSKalle Valo } 755277b024eSKalle Valo 756277b024eSKalle Valo /* 757277b024eSKalle Valo * This function gets the write port for data. 758277b024eSKalle Valo * 759277b024eSKalle Valo * The current write port is returned if available and the value is 760277b024eSKalle Valo * increased (provided it does not reach the maximum limit, in which 761277b024eSKalle Valo * case it is reset to 1) 762277b024eSKalle Valo */ 763277b024eSKalle Valo static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port) 764277b024eSKalle Valo { 765277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 766277b024eSKalle Valo const struct mwifiex_sdio_card_reg *reg = card->reg; 767277b024eSKalle Valo u32 wr_bitmap = card->mp_wr_bitmap; 768277b024eSKalle Valo 769277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 770277b024eSKalle Valo "data: mp_wr_bitmap=0x%08x\n", wr_bitmap); 771277b024eSKalle Valo 772277b024eSKalle Valo if (!(wr_bitmap & card->mp_data_port_mask)) { 773277b024eSKalle Valo adapter->data_sent = true; 774277b024eSKalle Valo return -EBUSY; 775277b024eSKalle Valo } 776277b024eSKalle Valo 777277b024eSKalle Valo if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) { 778277b024eSKalle Valo card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port)); 779277b024eSKalle Valo *port = card->curr_wr_port; 780277b024eSKalle Valo if (++card->curr_wr_port == card->mp_end_port) 781277b024eSKalle Valo card->curr_wr_port = reg->start_wr_port; 782277b024eSKalle Valo } else { 783277b024eSKalle Valo adapter->data_sent = true; 784277b024eSKalle Valo return -EBUSY; 785277b024eSKalle Valo } 786277b024eSKalle Valo 787277b024eSKalle Valo if ((card->has_control_mask) && (*port == CTRL_PORT)) { 788277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 789277b024eSKalle Valo "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 790277b024eSKalle Valo *port, card->curr_wr_port, wr_bitmap, 791277b024eSKalle Valo card->mp_wr_bitmap); 792277b024eSKalle Valo return -1; 793277b024eSKalle Valo } 794277b024eSKalle Valo 795277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 796277b024eSKalle Valo "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 797277b024eSKalle Valo *port, wr_bitmap, card->mp_wr_bitmap); 798277b024eSKalle Valo 799277b024eSKalle Valo return 0; 800277b024eSKalle Valo } 801277b024eSKalle Valo 802277b024eSKalle Valo /* 803277b024eSKalle Valo * This function polls the card status. 804277b024eSKalle Valo */ 805277b024eSKalle Valo static int 806277b024eSKalle Valo mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits) 807277b024eSKalle Valo { 808277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 809277b024eSKalle Valo u32 tries; 810277b024eSKalle Valo u8 cs; 811277b024eSKalle Valo 812277b024eSKalle Valo for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 813277b024eSKalle Valo if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs)) 814277b024eSKalle Valo break; 815277b024eSKalle Valo else if ((cs & bits) == bits) 816277b024eSKalle Valo return 0; 817277b024eSKalle Valo 818277b024eSKalle Valo usleep_range(10, 20); 819277b024eSKalle Valo } 820277b024eSKalle Valo 821277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 822277b024eSKalle Valo "poll card status failed, tries = %d\n", tries); 823277b024eSKalle Valo 824277b024eSKalle Valo return -1; 825277b024eSKalle Valo } 826277b024eSKalle Valo 827277b024eSKalle Valo /* 828277b024eSKalle Valo * This function disables the host interrupt. 829277b024eSKalle Valo * 830277b024eSKalle Valo * The host interrupt mask is read, the disable bit is reset and 831277b024eSKalle Valo * written back to the card host interrupt mask register. 832277b024eSKalle Valo */ 833277b024eSKalle Valo static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter) 834277b024eSKalle Valo { 835277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 836277b024eSKalle Valo struct sdio_func *func = card->func; 837277b024eSKalle Valo 838277b024eSKalle Valo sdio_claim_host(func); 839277b024eSKalle Valo mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0); 840277b024eSKalle Valo sdio_release_irq(func); 841277b024eSKalle Valo sdio_release_host(func); 842277b024eSKalle Valo } 843277b024eSKalle Valo 844277b024eSKalle Valo /* 845277b024eSKalle Valo * This function reads the interrupt status from card. 846277b024eSKalle Valo */ 847277b024eSKalle Valo static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) 848277b024eSKalle Valo { 849277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 850277b024eSKalle Valo u8 sdio_ireg; 851277b024eSKalle Valo unsigned long flags; 852277b024eSKalle Valo 853277b024eSKalle Valo if (mwifiex_read_data_sync(adapter, card->mp_regs, 854277b024eSKalle Valo card->reg->max_mp_regs, 855277b024eSKalle Valo REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) { 856277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n"); 857277b024eSKalle Valo return; 858277b024eSKalle Valo } 859277b024eSKalle Valo 860277b024eSKalle Valo sdio_ireg = card->mp_regs[card->reg->host_int_status_reg]; 861277b024eSKalle Valo if (sdio_ireg) { 862277b024eSKalle Valo /* 863277b024eSKalle Valo * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS 864277b024eSKalle Valo * For SDIO new mode CMD port interrupts 865277b024eSKalle Valo * DN_LD_CMD_PORT_HOST_INT_STATUS and/or 866277b024eSKalle Valo * UP_LD_CMD_PORT_HOST_INT_STATUS 867277b024eSKalle Valo * Clear the interrupt status register 868277b024eSKalle Valo */ 869277b024eSKalle Valo mwifiex_dbg(adapter, INTR, 870277b024eSKalle Valo "int: sdio_ireg = %#x\n", sdio_ireg); 871277b024eSKalle Valo spin_lock_irqsave(&adapter->int_lock, flags); 872277b024eSKalle Valo adapter->int_status |= sdio_ireg; 873277b024eSKalle Valo spin_unlock_irqrestore(&adapter->int_lock, flags); 874277b024eSKalle Valo } 875277b024eSKalle Valo } 876277b024eSKalle Valo 877277b024eSKalle Valo /* 878277b024eSKalle Valo * SDIO interrupt handler. 879277b024eSKalle Valo * 880277b024eSKalle Valo * This function reads the interrupt status from firmware and handles 881277b024eSKalle Valo * the interrupt in current thread (ksdioirqd) right away. 882277b024eSKalle Valo */ 883277b024eSKalle Valo static void 884277b024eSKalle Valo mwifiex_sdio_interrupt(struct sdio_func *func) 885277b024eSKalle Valo { 886277b024eSKalle Valo struct mwifiex_adapter *adapter; 887277b024eSKalle Valo struct sdio_mmc_card *card; 888277b024eSKalle Valo 889277b024eSKalle Valo card = sdio_get_drvdata(func); 890277b024eSKalle Valo if (!card || !card->adapter) { 89191442431SXinming Hu pr_err("int: func=%p card=%p adapter=%p\n", 892277b024eSKalle Valo func, card, card ? card->adapter : NULL); 893277b024eSKalle Valo return; 894277b024eSKalle Valo } 895277b024eSKalle Valo adapter = card->adapter; 896277b024eSKalle Valo 897277b024eSKalle Valo if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP) 898277b024eSKalle Valo adapter->ps_state = PS_STATE_AWAKE; 899277b024eSKalle Valo 900277b024eSKalle Valo mwifiex_interrupt_status(adapter); 901277b024eSKalle Valo mwifiex_main_process(adapter); 902277b024eSKalle Valo } 903277b024eSKalle Valo 904277b024eSKalle Valo /* 905277b024eSKalle Valo * This function enables the host interrupt. 906277b024eSKalle Valo * 907277b024eSKalle Valo * The host interrupt enable mask is written to the card 908277b024eSKalle Valo * host interrupt mask register. 909277b024eSKalle Valo */ 910277b024eSKalle Valo static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter) 911277b024eSKalle Valo { 912277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 913277b024eSKalle Valo struct sdio_func *func = card->func; 914277b024eSKalle Valo int ret; 915277b024eSKalle Valo 916277b024eSKalle Valo sdio_claim_host(func); 917277b024eSKalle Valo 918277b024eSKalle Valo /* Request the SDIO IRQ */ 919277b024eSKalle Valo ret = sdio_claim_irq(func, mwifiex_sdio_interrupt); 920277b024eSKalle Valo if (ret) { 921277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 922277b024eSKalle Valo "claim irq failed: ret=%d\n", ret); 923277b024eSKalle Valo goto out; 924277b024eSKalle Valo } 925277b024eSKalle Valo 926277b024eSKalle Valo /* Simply write the mask to the register */ 927277b024eSKalle Valo ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 928277b024eSKalle Valo card->reg->host_int_enable); 929277b024eSKalle Valo if (ret) { 930277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 931277b024eSKalle Valo "enable host interrupt failed\n"); 932277b024eSKalle Valo sdio_release_irq(func); 933277b024eSKalle Valo } 934277b024eSKalle Valo 935277b024eSKalle Valo out: 936277b024eSKalle Valo sdio_release_host(func); 937277b024eSKalle Valo return ret; 938277b024eSKalle Valo } 939277b024eSKalle Valo 940277b024eSKalle Valo /* 941277b024eSKalle Valo * This function sends a data buffer to the card. 942277b024eSKalle Valo */ 943277b024eSKalle Valo static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter, 944277b024eSKalle Valo u32 *type, u8 *buffer, 945277b024eSKalle Valo u32 npayload, u32 ioport) 946277b024eSKalle Valo { 947277b024eSKalle Valo int ret; 948277b024eSKalle Valo u32 nb; 949277b024eSKalle Valo 950277b024eSKalle Valo if (!buffer) { 951277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 952277b024eSKalle Valo "%s: buffer is NULL\n", __func__); 953277b024eSKalle Valo return -1; 954277b024eSKalle Valo } 955277b024eSKalle Valo 956277b024eSKalle Valo ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1); 957277b024eSKalle Valo 958277b024eSKalle Valo if (ret) { 959277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 960277b024eSKalle Valo "%s: read iomem failed: %d\n", __func__, 961277b024eSKalle Valo ret); 962277b024eSKalle Valo return -1; 963277b024eSKalle Valo } 964277b024eSKalle Valo 96592c70a95SDevidas Puranik nb = get_unaligned_le16((buffer)); 966277b024eSKalle Valo if (nb > npayload) { 967277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 968277b024eSKalle Valo "%s: invalid packet, nb=%d npayload=%d\n", 969277b024eSKalle Valo __func__, nb, npayload); 970277b024eSKalle Valo return -1; 971277b024eSKalle Valo } 972277b024eSKalle Valo 97392c70a95SDevidas Puranik *type = get_unaligned_le16((buffer + 2)); 974277b024eSKalle Valo 975277b024eSKalle Valo return ret; 976277b024eSKalle Valo } 977277b024eSKalle Valo 978277b024eSKalle Valo /* 979277b024eSKalle Valo * This function downloads the firmware to the card. 980277b024eSKalle Valo * 981277b024eSKalle Valo * Firmware is downloaded to the card in blocks. Every block download 982277b024eSKalle Valo * is tested for CRC errors, and retried a number of times before 983277b024eSKalle Valo * returning failure. 984277b024eSKalle Valo */ 985277b024eSKalle Valo static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 986277b024eSKalle Valo struct mwifiex_fw_image *fw) 987277b024eSKalle Valo { 988277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 989277b024eSKalle Valo const struct mwifiex_sdio_card_reg *reg = card->reg; 990277b024eSKalle Valo int ret; 991277b024eSKalle Valo u8 *firmware = fw->fw_buf; 992277b024eSKalle Valo u32 firmware_len = fw->fw_len; 993277b024eSKalle Valo u32 offset = 0; 994277b024eSKalle Valo u8 base0, base1; 995277b024eSKalle Valo u8 *fwbuf; 996277b024eSKalle Valo u16 len = 0; 997277b024eSKalle Valo u32 txlen, tx_blocks = 0, tries; 998277b024eSKalle Valo u32 i = 0; 999277b024eSKalle Valo 1000277b024eSKalle Valo if (!firmware_len) { 1001277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1002277b024eSKalle Valo "firmware image not found! Terminating download\n"); 1003277b024eSKalle Valo return -1; 1004277b024eSKalle Valo } 1005277b024eSKalle Valo 1006277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1007277b024eSKalle Valo "info: downloading FW image (%d bytes)\n", 1008277b024eSKalle Valo firmware_len); 1009277b024eSKalle Valo 1010277b024eSKalle Valo /* Assume that the allocated buffer is 8-byte aligned */ 1011277b024eSKalle Valo fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL); 1012277b024eSKalle Valo if (!fwbuf) 1013277b024eSKalle Valo return -ENOMEM; 1014277b024eSKalle Valo 1015277b024eSKalle Valo sdio_claim_host(card->func); 1016277b024eSKalle Valo 1017277b024eSKalle Valo /* Perform firmware data transfer */ 1018277b024eSKalle Valo do { 1019277b024eSKalle Valo /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY 1020277b024eSKalle Valo bits */ 1021277b024eSKalle Valo ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY | 1022277b024eSKalle Valo DN_LD_CARD_RDY); 1023277b024eSKalle Valo if (ret) { 1024277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1025277b024eSKalle Valo "FW download with helper:\t" 1026277b024eSKalle Valo "poll status timeout @ %d\n", offset); 1027277b024eSKalle Valo goto done; 1028277b024eSKalle Valo } 1029277b024eSKalle Valo 1030277b024eSKalle Valo /* More data? */ 1031277b024eSKalle Valo if (offset >= firmware_len) 1032277b024eSKalle Valo break; 1033277b024eSKalle Valo 1034277b024eSKalle Valo for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1035277b024eSKalle Valo ret = mwifiex_read_reg(adapter, reg->base_0_reg, 1036277b024eSKalle Valo &base0); 1037277b024eSKalle Valo if (ret) { 1038277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1039277b024eSKalle Valo "dev BASE0 register read failed:\t" 1040277b024eSKalle Valo "base0=%#04X(%d). Terminating dnld\n", 1041277b024eSKalle Valo base0, base0); 1042277b024eSKalle Valo goto done; 1043277b024eSKalle Valo } 1044277b024eSKalle Valo ret = mwifiex_read_reg(adapter, reg->base_1_reg, 1045277b024eSKalle Valo &base1); 1046277b024eSKalle Valo if (ret) { 1047277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1048277b024eSKalle Valo "dev BASE1 register read failed:\t" 1049277b024eSKalle Valo "base1=%#04X(%d). Terminating dnld\n", 1050277b024eSKalle Valo base1, base1); 1051277b024eSKalle Valo goto done; 1052277b024eSKalle Valo } 1053277b024eSKalle Valo len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff)); 1054277b024eSKalle Valo 1055277b024eSKalle Valo if (len) 1056277b024eSKalle Valo break; 1057277b024eSKalle Valo 1058277b024eSKalle Valo usleep_range(10, 20); 1059277b024eSKalle Valo } 1060277b024eSKalle Valo 1061277b024eSKalle Valo if (!len) { 1062277b024eSKalle Valo break; 1063277b024eSKalle Valo } else if (len > MWIFIEX_UPLD_SIZE) { 1064277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1065277b024eSKalle Valo "FW dnld failed @ %d, invalid length %d\n", 1066277b024eSKalle Valo offset, len); 1067277b024eSKalle Valo ret = -1; 1068277b024eSKalle Valo goto done; 1069277b024eSKalle Valo } 1070277b024eSKalle Valo 1071277b024eSKalle Valo txlen = len; 1072277b024eSKalle Valo 1073277b024eSKalle Valo if (len & BIT(0)) { 1074277b024eSKalle Valo i++; 1075277b024eSKalle Valo if (i > MAX_WRITE_IOMEM_RETRY) { 1076277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1077277b024eSKalle Valo "FW dnld failed @ %d, over max retry\n", 1078277b024eSKalle Valo offset); 1079277b024eSKalle Valo ret = -1; 1080277b024eSKalle Valo goto done; 1081277b024eSKalle Valo } 1082277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1083277b024eSKalle Valo "CRC indicated by the helper:\t" 1084277b024eSKalle Valo "len = 0x%04X, txlen = %d\n", len, txlen); 1085277b024eSKalle Valo len &= ~BIT(0); 1086277b024eSKalle Valo /* Setting this to 0 to resend from same offset */ 1087277b024eSKalle Valo txlen = 0; 1088277b024eSKalle Valo } else { 1089277b024eSKalle Valo i = 0; 1090277b024eSKalle Valo 1091277b024eSKalle Valo /* Set blocksize to transfer - checking for last 1092277b024eSKalle Valo block */ 1093277b024eSKalle Valo if (firmware_len - offset < txlen) 1094277b024eSKalle Valo txlen = firmware_len - offset; 1095277b024eSKalle Valo 1096277b024eSKalle Valo tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1) 1097277b024eSKalle Valo / MWIFIEX_SDIO_BLOCK_SIZE; 1098277b024eSKalle Valo 1099277b024eSKalle Valo /* Copy payload to buffer */ 1100277b024eSKalle Valo memmove(fwbuf, &firmware[offset], txlen); 1101277b024eSKalle Valo } 1102277b024eSKalle Valo 1103277b024eSKalle Valo ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks * 1104277b024eSKalle Valo MWIFIEX_SDIO_BLOCK_SIZE, 1105277b024eSKalle Valo adapter->ioport); 1106277b024eSKalle Valo if (ret) { 1107277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1108277b024eSKalle Valo "FW download, write iomem (%d) failed @ %d\n", 1109277b024eSKalle Valo i, offset); 1110277b024eSKalle Valo if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1111277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1112277b024eSKalle Valo "write CFG reg failed\n"); 1113277b024eSKalle Valo 1114277b024eSKalle Valo ret = -1; 1115277b024eSKalle Valo goto done; 1116277b024eSKalle Valo } 1117277b024eSKalle Valo 1118277b024eSKalle Valo offset += txlen; 1119277b024eSKalle Valo } while (true); 1120277b024eSKalle Valo 1121277b024eSKalle Valo mwifiex_dbg(adapter, MSG, 1122277b024eSKalle Valo "info: FW download over, size %d bytes\n", offset); 1123277b024eSKalle Valo 1124277b024eSKalle Valo ret = 0; 1125277b024eSKalle Valo done: 1126b977d305SMarty Faltesek sdio_release_host(card->func); 1127277b024eSKalle Valo kfree(fwbuf); 1128277b024eSKalle Valo return ret; 1129277b024eSKalle Valo } 1130277b024eSKalle Valo 1131277b024eSKalle Valo /* 1132277b024eSKalle Valo * This function decode sdio aggreation pkt. 1133277b024eSKalle Valo * 1134277b024eSKalle Valo * Based on the the data block size and pkt_len, 1135277b024eSKalle Valo * skb data will be decoded to few packets. 1136277b024eSKalle Valo */ 1137277b024eSKalle Valo static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter, 1138277b024eSKalle Valo struct sk_buff *skb) 1139277b024eSKalle Valo { 1140277b024eSKalle Valo u32 total_pkt_len, pkt_len; 1141277b024eSKalle Valo struct sk_buff *skb_deaggr; 1142277b024eSKalle Valo u16 blk_size; 1143277b024eSKalle Valo u8 blk_num; 1144277b024eSKalle Valo u8 *data; 1145277b024eSKalle Valo 1146277b024eSKalle Valo data = skb->data; 1147277b024eSKalle Valo total_pkt_len = skb->len; 1148277b024eSKalle Valo 1149f4c5d599SXinming Hu while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) { 1150277b024eSKalle Valo if (total_pkt_len < adapter->sdio_rx_block_size) 1151277b024eSKalle Valo break; 1152277b024eSKalle Valo blk_num = *(data + BLOCK_NUMBER_OFFSET); 1153277b024eSKalle Valo blk_size = adapter->sdio_rx_block_size * blk_num; 1154277b024eSKalle Valo if (blk_size > total_pkt_len) { 1155277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1156277b024eSKalle Valo "%s: error in blk_size,\t" 1157277b024eSKalle Valo "blk_num=%d, blk_size=%d, total_pkt_len=%d\n", 1158277b024eSKalle Valo __func__, blk_num, blk_size, total_pkt_len); 1159277b024eSKalle Valo break; 1160277b024eSKalle Valo } 116192c70a95SDevidas Puranik pkt_len = get_unaligned_le16((data + 116292c70a95SDevidas Puranik SDIO_HEADER_OFFSET)); 1163277b024eSKalle Valo if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) { 1164277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1165277b024eSKalle Valo "%s: error in pkt_len,\t" 1166277b024eSKalle Valo "pkt_len=%d, blk_size=%d\n", 1167277b024eSKalle Valo __func__, pkt_len, blk_size); 1168277b024eSKalle Valo break; 1169277b024eSKalle Valo } 117000c54780SXinming Hu 117100c54780SXinming Hu skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL); 1172277b024eSKalle Valo if (!skb_deaggr) 1173277b024eSKalle Valo break; 1174277b024eSKalle Valo skb_put(skb_deaggr, pkt_len); 1175277b024eSKalle Valo memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len); 1176f4c5d599SXinming Hu skb_pull(skb_deaggr, adapter->intf_hdr_len); 1177277b024eSKalle Valo 1178277b024eSKalle Valo mwifiex_handle_rx_packet(adapter, skb_deaggr); 1179277b024eSKalle Valo data += blk_size; 1180277b024eSKalle Valo total_pkt_len -= blk_size; 1181277b024eSKalle Valo } 1182277b024eSKalle Valo } 1183277b024eSKalle Valo 1184277b024eSKalle Valo /* 1185277b024eSKalle Valo * This function decodes a received packet. 1186277b024eSKalle Valo * 1187277b024eSKalle Valo * Based on the type, the packet is treated as either a data, or 1188277b024eSKalle Valo * a command response, or an event, and the correct handler 1189277b024eSKalle Valo * function is invoked. 1190277b024eSKalle Valo */ 1191277b024eSKalle Valo static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter, 1192277b024eSKalle Valo struct sk_buff *skb, u32 upld_typ) 1193277b024eSKalle Valo { 1194277b024eSKalle Valo u8 *cmd_buf; 119592c70a95SDevidas Puranik u16 pkt_len; 1196277b024eSKalle Valo struct mwifiex_rxinfo *rx_info; 1197277b024eSKalle Valo 119892c70a95SDevidas Puranik pkt_len = get_unaligned_le16(skb->data); 119992c70a95SDevidas Puranik 1200277b024eSKalle Valo if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) { 1201277b024eSKalle Valo skb_trim(skb, pkt_len); 1202f4c5d599SXinming Hu skb_pull(skb, adapter->intf_hdr_len); 1203277b024eSKalle Valo } 1204277b024eSKalle Valo 1205277b024eSKalle Valo switch (upld_typ) { 1206277b024eSKalle Valo case MWIFIEX_TYPE_AGGR_DATA: 1207277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1208277b024eSKalle Valo "info: --- Rx: Aggr Data packet ---\n"); 1209277b024eSKalle Valo rx_info = MWIFIEX_SKB_RXCB(skb); 1210277b024eSKalle Valo rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA; 1211277b024eSKalle Valo if (adapter->rx_work_enabled) { 1212277b024eSKalle Valo skb_queue_tail(&adapter->rx_data_q, skb); 1213277b024eSKalle Valo atomic_inc(&adapter->rx_pending); 1214277b024eSKalle Valo adapter->data_received = true; 1215277b024eSKalle Valo } else { 1216277b024eSKalle Valo mwifiex_deaggr_sdio_pkt(adapter, skb); 1217277b024eSKalle Valo dev_kfree_skb_any(skb); 1218277b024eSKalle Valo } 1219277b024eSKalle Valo break; 1220277b024eSKalle Valo 1221277b024eSKalle Valo case MWIFIEX_TYPE_DATA: 1222277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 1223277b024eSKalle Valo "info: --- Rx: Data packet ---\n"); 1224277b024eSKalle Valo if (adapter->rx_work_enabled) { 1225277b024eSKalle Valo skb_queue_tail(&adapter->rx_data_q, skb); 1226277b024eSKalle Valo adapter->data_received = true; 1227277b024eSKalle Valo atomic_inc(&adapter->rx_pending); 1228277b024eSKalle Valo } else { 1229277b024eSKalle Valo mwifiex_handle_rx_packet(adapter, skb); 1230277b024eSKalle Valo } 1231277b024eSKalle Valo break; 1232277b024eSKalle Valo 1233277b024eSKalle Valo case MWIFIEX_TYPE_CMD: 1234277b024eSKalle Valo mwifiex_dbg(adapter, CMD, 1235277b024eSKalle Valo "info: --- Rx: Cmd Response ---\n"); 1236277b024eSKalle Valo /* take care of curr_cmd = NULL case */ 1237277b024eSKalle Valo if (!adapter->curr_cmd) { 1238277b024eSKalle Valo cmd_buf = adapter->upld_buf; 1239277b024eSKalle Valo 1240277b024eSKalle Valo if (adapter->ps_state == PS_STATE_SLEEP_CFM) 1241277b024eSKalle Valo mwifiex_process_sleep_confirm_resp(adapter, 1242277b024eSKalle Valo skb->data, 1243277b024eSKalle Valo skb->len); 1244277b024eSKalle Valo 1245277b024eSKalle Valo memcpy(cmd_buf, skb->data, 1246277b024eSKalle Valo min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, 1247277b024eSKalle Valo skb->len)); 1248277b024eSKalle Valo 1249277b024eSKalle Valo dev_kfree_skb_any(skb); 1250277b024eSKalle Valo } else { 1251277b024eSKalle Valo adapter->cmd_resp_received = true; 1252277b024eSKalle Valo adapter->curr_cmd->resp_skb = skb; 1253277b024eSKalle Valo } 1254277b024eSKalle Valo break; 1255277b024eSKalle Valo 1256277b024eSKalle Valo case MWIFIEX_TYPE_EVENT: 1257277b024eSKalle Valo mwifiex_dbg(adapter, EVENT, 1258277b024eSKalle Valo "info: --- Rx: Event ---\n"); 125992c70a95SDevidas Puranik adapter->event_cause = get_unaligned_le32(skb->data); 1260277b024eSKalle Valo 1261277b024eSKalle Valo if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE)) 1262277b024eSKalle Valo memcpy(adapter->event_body, 1263277b024eSKalle Valo skb->data + MWIFIEX_EVENT_HEADER_LEN, 1264277b024eSKalle Valo skb->len); 1265277b024eSKalle Valo 1266277b024eSKalle Valo /* event cause has been saved to adapter->event_cause */ 1267277b024eSKalle Valo adapter->event_received = true; 1268277b024eSKalle Valo adapter->event_skb = skb; 1269277b024eSKalle Valo 1270277b024eSKalle Valo break; 1271277b024eSKalle Valo 1272277b024eSKalle Valo default: 1273277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1274277b024eSKalle Valo "unknown upload type %#x\n", upld_typ); 1275277b024eSKalle Valo dev_kfree_skb_any(skb); 1276277b024eSKalle Valo break; 1277277b024eSKalle Valo } 1278277b024eSKalle Valo 1279277b024eSKalle Valo return 0; 1280277b024eSKalle Valo } 1281277b024eSKalle Valo 1282277b024eSKalle Valo /* 1283277b024eSKalle Valo * This function transfers received packets from card to driver, performing 1284277b024eSKalle Valo * aggregation if required. 1285277b024eSKalle Valo * 1286277b024eSKalle Valo * For data received on control port, or if aggregation is disabled, the 1287277b024eSKalle Valo * received buffers are uploaded as separate packets. However, if aggregation 1288277b024eSKalle Valo * is enabled and required, the buffers are copied onto an aggregation buffer, 1289277b024eSKalle Valo * provided there is space left, processed and finally uploaded. 1290277b024eSKalle Valo */ 1291277b024eSKalle Valo static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter, 1292277b024eSKalle Valo u16 rx_len, u8 port) 1293277b024eSKalle Valo { 1294277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 1295277b024eSKalle Valo s32 f_do_rx_aggr = 0; 1296277b024eSKalle Valo s32 f_do_rx_cur = 0; 1297277b024eSKalle Valo s32 f_aggr_cur = 0; 1298277b024eSKalle Valo s32 f_post_aggr_cur = 0; 1299277b024eSKalle Valo struct sk_buff *skb_deaggr; 1300277b024eSKalle Valo struct sk_buff *skb = NULL; 1301277b024eSKalle Valo u32 pkt_len, pkt_type, mport, pind; 1302277b024eSKalle Valo u8 *curr_ptr; 1303277b024eSKalle Valo 1304277b024eSKalle Valo if ((card->has_control_mask) && (port == CTRL_PORT)) { 1305277b024eSKalle Valo /* Read the command Resp without aggr */ 1306277b024eSKalle Valo mwifiex_dbg(adapter, CMD, 1307277b024eSKalle Valo "info: %s: no aggregation for cmd\t" 1308277b024eSKalle Valo "response\n", __func__); 1309277b024eSKalle Valo 1310277b024eSKalle Valo f_do_rx_cur = 1; 1311277b024eSKalle Valo goto rx_curr_single; 1312277b024eSKalle Valo } 1313277b024eSKalle Valo 1314277b024eSKalle Valo if (!card->mpa_rx.enabled) { 1315277b024eSKalle Valo mwifiex_dbg(adapter, WARN, 1316277b024eSKalle Valo "info: %s: rx aggregation disabled\n", 1317277b024eSKalle Valo __func__); 1318277b024eSKalle Valo 1319277b024eSKalle Valo f_do_rx_cur = 1; 1320277b024eSKalle Valo goto rx_curr_single; 1321277b024eSKalle Valo } 1322277b024eSKalle Valo 1323277b024eSKalle Valo if ((!card->has_control_mask && (card->mp_rd_bitmap & 1324277b024eSKalle Valo card->reg->data_port_mask)) || 1325277b024eSKalle Valo (card->has_control_mask && (card->mp_rd_bitmap & 1326277b024eSKalle Valo (~((u32) CTRL_PORT_MASK))))) { 1327277b024eSKalle Valo /* Some more data RX pending */ 1328277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1329277b024eSKalle Valo "info: %s: not last packet\n", __func__); 1330277b024eSKalle Valo 1331277b024eSKalle Valo if (MP_RX_AGGR_IN_PROGRESS(card)) { 1332277b024eSKalle Valo if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) { 1333277b024eSKalle Valo f_aggr_cur = 1; 1334277b024eSKalle Valo } else { 1335277b024eSKalle Valo /* No room in Aggr buf, do rx aggr now */ 1336277b024eSKalle Valo f_do_rx_aggr = 1; 1337277b024eSKalle Valo f_post_aggr_cur = 1; 1338277b024eSKalle Valo } 1339277b024eSKalle Valo } else { 1340277b024eSKalle Valo /* Rx aggr not in progress */ 1341277b024eSKalle Valo f_aggr_cur = 1; 1342277b024eSKalle Valo } 1343277b024eSKalle Valo 1344277b024eSKalle Valo } else { 1345277b024eSKalle Valo /* No more data RX pending */ 1346277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1347277b024eSKalle Valo "info: %s: last packet\n", __func__); 1348277b024eSKalle Valo 1349277b024eSKalle Valo if (MP_RX_AGGR_IN_PROGRESS(card)) { 1350277b024eSKalle Valo f_do_rx_aggr = 1; 1351277b024eSKalle Valo if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) 1352277b024eSKalle Valo f_aggr_cur = 1; 1353277b024eSKalle Valo else 1354277b024eSKalle Valo /* No room in Aggr buf, do rx aggr now */ 1355277b024eSKalle Valo f_do_rx_cur = 1; 1356277b024eSKalle Valo } else { 1357277b024eSKalle Valo f_do_rx_cur = 1; 1358277b024eSKalle Valo } 1359277b024eSKalle Valo } 1360277b024eSKalle Valo 1361277b024eSKalle Valo if (f_aggr_cur) { 1362277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1363277b024eSKalle Valo "info: current packet aggregation\n"); 1364277b024eSKalle Valo /* Curr pkt can be aggregated */ 1365277b024eSKalle Valo mp_rx_aggr_setup(card, rx_len, port); 1366277b024eSKalle Valo 1367277b024eSKalle Valo if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) || 1368277b024eSKalle Valo mp_rx_aggr_port_limit_reached(card)) { 1369277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1370277b024eSKalle Valo "info: %s: aggregated packet\t" 1371277b024eSKalle Valo "limit reached\n", __func__); 1372277b024eSKalle Valo /* No more pkts allowed in Aggr buf, rx it */ 1373277b024eSKalle Valo f_do_rx_aggr = 1; 1374277b024eSKalle Valo } 1375277b024eSKalle Valo } 1376277b024eSKalle Valo 1377277b024eSKalle Valo if (f_do_rx_aggr) { 1378277b024eSKalle Valo /* do aggr RX now */ 1379277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 1380277b024eSKalle Valo "info: do_rx_aggr: num of packets: %d\n", 1381277b024eSKalle Valo card->mpa_rx.pkt_cnt); 1382277b024eSKalle Valo 1383277b024eSKalle Valo if (card->supports_sdio_new_mode) { 1384277b024eSKalle Valo int i; 1385277b024eSKalle Valo u32 port_count; 1386277b024eSKalle Valo 1387277b024eSKalle Valo for (i = 0, port_count = 0; i < card->max_ports; i++) 1388277b024eSKalle Valo if (card->mpa_rx.ports & BIT(i)) 1389277b024eSKalle Valo port_count++; 1390277b024eSKalle Valo 1391277b024eSKalle Valo /* Reading data from "start_port + 0" to "start_port + 1392277b024eSKalle Valo * port_count -1", so decrease the count by 1 1393277b024eSKalle Valo */ 1394277b024eSKalle Valo port_count--; 1395277b024eSKalle Valo mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1396277b024eSKalle Valo (port_count << 8)) + card->mpa_rx.start_port; 1397277b024eSKalle Valo } else { 1398277b024eSKalle Valo mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1399277b024eSKalle Valo (card->mpa_rx.ports << 4)) + 1400277b024eSKalle Valo card->mpa_rx.start_port; 1401277b024eSKalle Valo } 1402277b024eSKalle Valo 14030cb52aacSXinming Hu if (card->mpa_rx.pkt_cnt == 1) 1404ecd7eb7cSGanapathi Bhat mport = adapter->ioport + card->mpa_rx.start_port; 14050cb52aacSXinming Hu 1406277b024eSKalle Valo if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf, 1407277b024eSKalle Valo card->mpa_rx.buf_len, mport, 1)) 1408277b024eSKalle Valo goto error; 1409277b024eSKalle Valo 1410277b024eSKalle Valo curr_ptr = card->mpa_rx.buf; 1411277b024eSKalle Valo 1412277b024eSKalle Valo for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) { 1413277b024eSKalle Valo u32 *len_arr = card->mpa_rx.len_arr; 1414277b024eSKalle Valo 1415277b024eSKalle Valo /* get curr PKT len & type */ 141692c70a95SDevidas Puranik pkt_len = get_unaligned_le16(&curr_ptr[0]); 141792c70a95SDevidas Puranik pkt_type = get_unaligned_le16(&curr_ptr[2]); 1418277b024eSKalle Valo 1419277b024eSKalle Valo /* copy pkt to deaggr buf */ 1420277b024eSKalle Valo skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind], 142100c54780SXinming Hu GFP_KERNEL); 1422277b024eSKalle Valo if (!skb_deaggr) { 1423277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "skb allocation failure\t" 1424277b024eSKalle Valo "drop pkt len=%d type=%d\n", 1425277b024eSKalle Valo pkt_len, pkt_type); 1426277b024eSKalle Valo curr_ptr += len_arr[pind]; 1427277b024eSKalle Valo continue; 1428277b024eSKalle Valo } 1429277b024eSKalle Valo 1430277b024eSKalle Valo skb_put(skb_deaggr, len_arr[pind]); 1431277b024eSKalle Valo 1432277b024eSKalle Valo if ((pkt_type == MWIFIEX_TYPE_DATA || 1433277b024eSKalle Valo (pkt_type == MWIFIEX_TYPE_AGGR_DATA && 1434277b024eSKalle Valo adapter->sdio_rx_aggr_enable)) && 1435277b024eSKalle Valo (pkt_len <= len_arr[pind])) { 1436277b024eSKalle Valo 1437277b024eSKalle Valo memcpy(skb_deaggr->data, curr_ptr, pkt_len); 1438277b024eSKalle Valo 1439277b024eSKalle Valo skb_trim(skb_deaggr, pkt_len); 1440277b024eSKalle Valo 1441277b024eSKalle Valo /* Process de-aggr packet */ 1442277b024eSKalle Valo mwifiex_decode_rx_packet(adapter, skb_deaggr, 1443277b024eSKalle Valo pkt_type); 1444277b024eSKalle Valo } else { 1445277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1446277b024eSKalle Valo "drop wrong aggr pkt:\t" 1447277b024eSKalle Valo "sdio_single_port_rx_aggr=%d\t" 1448277b024eSKalle Valo "type=%d len=%d max_len=%d\n", 1449277b024eSKalle Valo adapter->sdio_rx_aggr_enable, 1450277b024eSKalle Valo pkt_type, pkt_len, len_arr[pind]); 1451277b024eSKalle Valo dev_kfree_skb_any(skb_deaggr); 1452277b024eSKalle Valo } 1453277b024eSKalle Valo curr_ptr += len_arr[pind]; 1454277b024eSKalle Valo } 1455277b024eSKalle Valo MP_RX_AGGR_BUF_RESET(card); 1456277b024eSKalle Valo } 1457277b024eSKalle Valo 1458277b024eSKalle Valo rx_curr_single: 1459277b024eSKalle Valo if (f_do_rx_cur) { 1460277b024eSKalle Valo mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n", 1461277b024eSKalle Valo port, rx_len); 1462277b024eSKalle Valo 14635c87a55aSMathias Krause skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 1464277b024eSKalle Valo if (!skb) { 1465277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1466277b024eSKalle Valo "single skb allocated fail,\t" 1467277b024eSKalle Valo "drop pkt port=%d len=%d\n", port, rx_len); 1468277b024eSKalle Valo if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1469277b024eSKalle Valo card->mpa_rx.buf, rx_len, 1470277b024eSKalle Valo adapter->ioport + port)) 1471277b024eSKalle Valo goto error; 1472277b024eSKalle Valo return 0; 1473277b024eSKalle Valo } 1474277b024eSKalle Valo 1475277b024eSKalle Valo skb_put(skb, rx_len); 1476277b024eSKalle Valo 1477277b024eSKalle Valo if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1478277b024eSKalle Valo skb->data, skb->len, 1479277b024eSKalle Valo adapter->ioport + port)) 1480277b024eSKalle Valo goto error; 1481277b024eSKalle Valo if (!adapter->sdio_rx_aggr_enable && 1482277b024eSKalle Valo pkt_type == MWIFIEX_TYPE_AGGR_DATA) { 1483277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t" 1484277b024eSKalle Valo "current SDIO RX Aggr not enabled\n", 1485277b024eSKalle Valo pkt_type); 1486277b024eSKalle Valo dev_kfree_skb_any(skb); 1487277b024eSKalle Valo return 0; 1488277b024eSKalle Valo } 1489277b024eSKalle Valo 1490277b024eSKalle Valo mwifiex_decode_rx_packet(adapter, skb, pkt_type); 1491277b024eSKalle Valo } 1492277b024eSKalle Valo if (f_post_aggr_cur) { 1493277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1494277b024eSKalle Valo "info: current packet aggregation\n"); 1495277b024eSKalle Valo /* Curr pkt can be aggregated */ 1496277b024eSKalle Valo mp_rx_aggr_setup(card, rx_len, port); 1497277b024eSKalle Valo } 1498277b024eSKalle Valo 1499277b024eSKalle Valo return 0; 1500277b024eSKalle Valo error: 1501277b024eSKalle Valo if (MP_RX_AGGR_IN_PROGRESS(card)) 1502277b024eSKalle Valo MP_RX_AGGR_BUF_RESET(card); 1503277b024eSKalle Valo 1504277b024eSKalle Valo if (f_do_rx_cur && skb) 1505277b024eSKalle Valo /* Single transfer pending. Free curr buff also */ 1506277b024eSKalle Valo dev_kfree_skb_any(skb); 1507277b024eSKalle Valo 1508277b024eSKalle Valo return -1; 1509277b024eSKalle Valo } 1510277b024eSKalle Valo 1511277b024eSKalle Valo /* 1512277b024eSKalle Valo * This function checks the current interrupt status. 1513277b024eSKalle Valo * 1514277b024eSKalle Valo * The following interrupts are checked and handled by this function - 1515277b024eSKalle Valo * - Data sent 1516277b024eSKalle Valo * - Command sent 1517277b024eSKalle Valo * - Packets received 1518277b024eSKalle Valo * 1519277b024eSKalle Valo * Since the firmware does not generate download ready interrupt if the 1520277b024eSKalle Valo * port updated is command port only, command sent interrupt checking 1521277b024eSKalle Valo * should be done manually, and for every SDIO interrupt. 1522277b024eSKalle Valo * 1523277b024eSKalle Valo * In case of Rx packets received, the packets are uploaded from card to 1524277b024eSKalle Valo * host and processed accordingly. 1525277b024eSKalle Valo */ 1526277b024eSKalle Valo static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 1527277b024eSKalle Valo { 1528277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 1529277b024eSKalle Valo const struct mwifiex_sdio_card_reg *reg = card->reg; 1530277b024eSKalle Valo int ret = 0; 1531277b024eSKalle Valo u8 sdio_ireg; 1532277b024eSKalle Valo struct sk_buff *skb; 1533277b024eSKalle Valo u8 port = CTRL_PORT; 1534277b024eSKalle Valo u32 len_reg_l, len_reg_u; 1535277b024eSKalle Valo u32 rx_blocks; 1536277b024eSKalle Valo u16 rx_len; 1537277b024eSKalle Valo unsigned long flags; 1538277b024eSKalle Valo u32 bitmap; 1539277b024eSKalle Valo u8 cr; 1540277b024eSKalle Valo 1541277b024eSKalle Valo spin_lock_irqsave(&adapter->int_lock, flags); 1542277b024eSKalle Valo sdio_ireg = adapter->int_status; 1543277b024eSKalle Valo adapter->int_status = 0; 1544277b024eSKalle Valo spin_unlock_irqrestore(&adapter->int_lock, flags); 1545277b024eSKalle Valo 1546277b024eSKalle Valo if (!sdio_ireg) 1547277b024eSKalle Valo return ret; 1548277b024eSKalle Valo 1549277b024eSKalle Valo /* Following interrupt is only for SDIO new mode */ 1550277b024eSKalle Valo if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent) 1551277b024eSKalle Valo adapter->cmd_sent = false; 1552277b024eSKalle Valo 1553277b024eSKalle Valo /* Following interrupt is only for SDIO new mode */ 1554277b024eSKalle Valo if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) { 1555277b024eSKalle Valo u32 pkt_type; 1556277b024eSKalle Valo 1557277b024eSKalle Valo /* read the len of control packet */ 1558277b024eSKalle Valo rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8; 1559277b024eSKalle Valo rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0]; 1560277b024eSKalle Valo rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE); 1561f4c5d599SXinming Hu if (rx_len <= adapter->intf_hdr_len || 1562277b024eSKalle Valo (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 1563277b024eSKalle Valo MWIFIEX_RX_DATA_BUF_SIZE) 1564277b024eSKalle Valo return -1; 1565277b024eSKalle Valo rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 1566277b024eSKalle Valo mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len); 1567277b024eSKalle Valo 15685c87a55aSMathias Krause skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 1569277b024eSKalle Valo if (!skb) 1570277b024eSKalle Valo return -1; 1571277b024eSKalle Valo 1572277b024eSKalle Valo skb_put(skb, rx_len); 1573277b024eSKalle Valo 1574277b024eSKalle Valo if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data, 1575277b024eSKalle Valo skb->len, adapter->ioport | 1576277b024eSKalle Valo CMD_PORT_SLCT)) { 1577277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1578277b024eSKalle Valo "%s: failed to card_to_host", __func__); 1579277b024eSKalle Valo dev_kfree_skb_any(skb); 1580277b024eSKalle Valo goto term_cmd; 1581277b024eSKalle Valo } 1582277b024eSKalle Valo 1583277b024eSKalle Valo if ((pkt_type != MWIFIEX_TYPE_CMD) && 1584277b024eSKalle Valo (pkt_type != MWIFIEX_TYPE_EVENT)) 1585277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1586277b024eSKalle Valo "%s:Received wrong packet on cmd port", 1587277b024eSKalle Valo __func__); 1588277b024eSKalle Valo 1589277b024eSKalle Valo mwifiex_decode_rx_packet(adapter, skb, pkt_type); 1590277b024eSKalle Valo } 1591277b024eSKalle Valo 1592277b024eSKalle Valo if (sdio_ireg & DN_LD_HOST_INT_STATUS) { 1593277b024eSKalle Valo bitmap = (u32) card->mp_regs[reg->wr_bitmap_l]; 1594277b024eSKalle Valo bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8; 1595277b024eSKalle Valo if (card->supports_sdio_new_mode) { 1596277b024eSKalle Valo bitmap |= 1597277b024eSKalle Valo ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16; 1598277b024eSKalle Valo bitmap |= 1599277b024eSKalle Valo ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24; 1600277b024eSKalle Valo } 1601277b024eSKalle Valo card->mp_wr_bitmap = bitmap; 1602277b024eSKalle Valo 1603277b024eSKalle Valo mwifiex_dbg(adapter, INTR, 1604277b024eSKalle Valo "int: DNLD: wr_bitmap=0x%x\n", 1605277b024eSKalle Valo card->mp_wr_bitmap); 1606277b024eSKalle Valo if (adapter->data_sent && 1607277b024eSKalle Valo (card->mp_wr_bitmap & card->mp_data_port_mask)) { 1608277b024eSKalle Valo mwifiex_dbg(adapter, INTR, 1609277b024eSKalle Valo "info: <--- Tx DONE Interrupt --->\n"); 1610277b024eSKalle Valo adapter->data_sent = false; 1611277b024eSKalle Valo } 1612277b024eSKalle Valo } 1613277b024eSKalle Valo 1614277b024eSKalle Valo /* As firmware will not generate download ready interrupt if the port 1615277b024eSKalle Valo updated is command port only, cmd_sent should be done for any SDIO 1616277b024eSKalle Valo interrupt. */ 1617277b024eSKalle Valo if (card->has_control_mask && adapter->cmd_sent) { 1618277b024eSKalle Valo /* Check if firmware has attach buffer at command port and 1619277b024eSKalle Valo update just that in wr_bit_map. */ 1620277b024eSKalle Valo card->mp_wr_bitmap |= 1621277b024eSKalle Valo (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK; 1622277b024eSKalle Valo if (card->mp_wr_bitmap & CTRL_PORT_MASK) 1623277b024eSKalle Valo adapter->cmd_sent = false; 1624277b024eSKalle Valo } 1625277b024eSKalle Valo 1626277b024eSKalle Valo mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n", 1627277b024eSKalle Valo adapter->cmd_sent, adapter->data_sent); 1628277b024eSKalle Valo if (sdio_ireg & UP_LD_HOST_INT_STATUS) { 1629277b024eSKalle Valo bitmap = (u32) card->mp_regs[reg->rd_bitmap_l]; 1630277b024eSKalle Valo bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8; 1631277b024eSKalle Valo if (card->supports_sdio_new_mode) { 1632277b024eSKalle Valo bitmap |= 1633277b024eSKalle Valo ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16; 1634277b024eSKalle Valo bitmap |= 1635277b024eSKalle Valo ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24; 1636277b024eSKalle Valo } 1637277b024eSKalle Valo card->mp_rd_bitmap = bitmap; 1638277b024eSKalle Valo mwifiex_dbg(adapter, INTR, 1639277b024eSKalle Valo "int: UPLD: rd_bitmap=0x%x\n", 1640277b024eSKalle Valo card->mp_rd_bitmap); 1641277b024eSKalle Valo 1642277b024eSKalle Valo while (true) { 1643277b024eSKalle Valo ret = mwifiex_get_rd_port(adapter, &port); 1644277b024eSKalle Valo if (ret) { 1645277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1646277b024eSKalle Valo "info: no more rd_port available\n"); 1647277b024eSKalle Valo break; 1648277b024eSKalle Valo } 1649277b024eSKalle Valo len_reg_l = reg->rd_len_p0_l + (port << 1); 1650277b024eSKalle Valo len_reg_u = reg->rd_len_p0_u + (port << 1); 1651277b024eSKalle Valo rx_len = ((u16) card->mp_regs[len_reg_u]) << 8; 1652277b024eSKalle Valo rx_len |= (u16) card->mp_regs[len_reg_l]; 1653277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1654277b024eSKalle Valo "info: RX: port=%d rx_len=%u\n", 1655277b024eSKalle Valo port, rx_len); 1656277b024eSKalle Valo rx_blocks = 1657277b024eSKalle Valo (rx_len + MWIFIEX_SDIO_BLOCK_SIZE - 1658277b024eSKalle Valo 1) / MWIFIEX_SDIO_BLOCK_SIZE; 1659f4c5d599SXinming Hu if (rx_len <= adapter->intf_hdr_len || 1660277b024eSKalle Valo (card->mpa_rx.enabled && 1661277b024eSKalle Valo ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 1662277b024eSKalle Valo card->mpa_rx.buf_size))) { 1663277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1664277b024eSKalle Valo "invalid rx_len=%d\n", 1665277b024eSKalle Valo rx_len); 1666277b024eSKalle Valo return -1; 1667277b024eSKalle Valo } 1668277b024eSKalle Valo 1669277b024eSKalle Valo rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 1670277b024eSKalle Valo mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", 1671277b024eSKalle Valo rx_len); 1672277b024eSKalle Valo 1673277b024eSKalle Valo if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len, 1674277b024eSKalle Valo port)) { 1675277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1676277b024eSKalle Valo "card_to_host_mpa failed: int status=%#x\n", 1677277b024eSKalle Valo sdio_ireg); 1678277b024eSKalle Valo goto term_cmd; 1679277b024eSKalle Valo } 1680277b024eSKalle Valo } 1681277b024eSKalle Valo } 1682277b024eSKalle Valo 1683277b024eSKalle Valo return 0; 1684277b024eSKalle Valo 1685277b024eSKalle Valo term_cmd: 1686277b024eSKalle Valo /* terminate cmd */ 1687277b024eSKalle Valo if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 1688277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n"); 1689277b024eSKalle Valo else 1690277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1691277b024eSKalle Valo "info: CFG reg val = %d\n", cr); 1692277b024eSKalle Valo 1693277b024eSKalle Valo if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04))) 1694277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1695277b024eSKalle Valo "write CFG reg failed\n"); 1696277b024eSKalle Valo else 1697277b024eSKalle Valo mwifiex_dbg(adapter, INFO, "info: write success\n"); 1698277b024eSKalle Valo 1699277b024eSKalle Valo if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 1700277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1701277b024eSKalle Valo "read CFG reg failed\n"); 1702277b024eSKalle Valo else 1703277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1704277b024eSKalle Valo "info: CFG reg val =%x\n", cr); 1705277b024eSKalle Valo 1706277b024eSKalle Valo return -1; 1707277b024eSKalle Valo } 1708277b024eSKalle Valo 1709277b024eSKalle Valo /* 1710277b024eSKalle Valo * This function aggregates transmission buffers in driver and downloads 1711277b024eSKalle Valo * the aggregated packet to card. 1712277b024eSKalle Valo * 1713277b024eSKalle Valo * The individual packets are aggregated by copying into an aggregation 1714277b024eSKalle Valo * buffer and then downloaded to the card. Previous unsent packets in the 1715277b024eSKalle Valo * aggregation buffer are pre-copied first before new packets are added. 1716277b024eSKalle Valo * Aggregation is done till there is space left in the aggregation buffer, 1717277b024eSKalle Valo * or till new packets are available. 1718277b024eSKalle Valo * 1719277b024eSKalle Valo * The function will only download the packet to the card when aggregation 1720277b024eSKalle Valo * stops, otherwise it will just aggregate the packet in aggregation buffer 1721277b024eSKalle Valo * and return. 1722277b024eSKalle Valo */ 1723277b024eSKalle Valo static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter, 1724277b024eSKalle Valo u8 *payload, u32 pkt_len, u32 port, 1725277b024eSKalle Valo u32 next_pkt_len) 1726277b024eSKalle Valo { 1727277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 1728277b024eSKalle Valo int ret = 0; 1729277b024eSKalle Valo s32 f_send_aggr_buf = 0; 1730277b024eSKalle Valo s32 f_send_cur_buf = 0; 1731277b024eSKalle Valo s32 f_precopy_cur_buf = 0; 1732277b024eSKalle Valo s32 f_postcopy_cur_buf = 0; 1733277b024eSKalle Valo u32 mport; 17348b7ef8b6SXinming Hu int index; 1735277b024eSKalle Valo 1736277b024eSKalle Valo if (!card->mpa_tx.enabled || 1737277b024eSKalle Valo (card->has_control_mask && (port == CTRL_PORT)) || 1738277b024eSKalle Valo (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) { 1739277b024eSKalle Valo mwifiex_dbg(adapter, WARN, 1740277b024eSKalle Valo "info: %s: tx aggregation disabled\n", 1741277b024eSKalle Valo __func__); 1742277b024eSKalle Valo 1743277b024eSKalle Valo f_send_cur_buf = 1; 1744277b024eSKalle Valo goto tx_curr_single; 1745277b024eSKalle Valo } 1746277b024eSKalle Valo 1747277b024eSKalle Valo if (next_pkt_len) { 1748277b024eSKalle Valo /* More pkt in TX queue */ 1749277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1750277b024eSKalle Valo "info: %s: more packets in queue.\n", 1751277b024eSKalle Valo __func__); 1752277b024eSKalle Valo 1753277b024eSKalle Valo if (MP_TX_AGGR_IN_PROGRESS(card)) { 1754277b024eSKalle Valo if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) { 1755277b024eSKalle Valo f_precopy_cur_buf = 1; 1756277b024eSKalle Valo 1757277b024eSKalle Valo if (!(card->mp_wr_bitmap & 1758277b024eSKalle Valo (1 << card->curr_wr_port)) || 1759277b024eSKalle Valo !MP_TX_AGGR_BUF_HAS_ROOM( 1760277b024eSKalle Valo card, pkt_len + next_pkt_len)) 1761277b024eSKalle Valo f_send_aggr_buf = 1; 1762277b024eSKalle Valo } else { 1763277b024eSKalle Valo /* No room in Aggr buf, send it */ 1764277b024eSKalle Valo f_send_aggr_buf = 1; 1765277b024eSKalle Valo 1766277b024eSKalle Valo if (!(card->mp_wr_bitmap & 1767277b024eSKalle Valo (1 << card->curr_wr_port))) 1768277b024eSKalle Valo f_send_cur_buf = 1; 1769277b024eSKalle Valo else 1770277b024eSKalle Valo f_postcopy_cur_buf = 1; 1771277b024eSKalle Valo } 1772277b024eSKalle Valo } else { 1773277b024eSKalle Valo if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) && 1774277b024eSKalle Valo (card->mp_wr_bitmap & (1 << card->curr_wr_port))) 1775277b024eSKalle Valo f_precopy_cur_buf = 1; 1776277b024eSKalle Valo else 1777277b024eSKalle Valo f_send_cur_buf = 1; 1778277b024eSKalle Valo } 1779277b024eSKalle Valo } else { 1780277b024eSKalle Valo /* Last pkt in TX queue */ 1781277b024eSKalle Valo mwifiex_dbg(adapter, INFO, 1782277b024eSKalle Valo "info: %s: Last packet in Tx Queue.\n", 1783277b024eSKalle Valo __func__); 1784277b024eSKalle Valo 1785277b024eSKalle Valo if (MP_TX_AGGR_IN_PROGRESS(card)) { 1786277b024eSKalle Valo /* some packs in Aggr buf already */ 1787277b024eSKalle Valo f_send_aggr_buf = 1; 1788277b024eSKalle Valo 1789277b024eSKalle Valo if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) 1790277b024eSKalle Valo f_precopy_cur_buf = 1; 1791277b024eSKalle Valo else 1792277b024eSKalle Valo /* No room in Aggr buf, send it */ 1793277b024eSKalle Valo f_send_cur_buf = 1; 1794277b024eSKalle Valo } else { 1795277b024eSKalle Valo f_send_cur_buf = 1; 1796277b024eSKalle Valo } 1797277b024eSKalle Valo } 1798277b024eSKalle Valo 1799277b024eSKalle Valo if (f_precopy_cur_buf) { 1800277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 1801277b024eSKalle Valo "data: %s: precopy current buffer\n", 1802277b024eSKalle Valo __func__); 1803277b024eSKalle Valo MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 1804277b024eSKalle Valo 1805277b024eSKalle Valo if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) || 1806277b024eSKalle Valo mp_tx_aggr_port_limit_reached(card)) 1807277b024eSKalle Valo /* No more pkts allowed in Aggr buf, send it */ 1808277b024eSKalle Valo f_send_aggr_buf = 1; 1809277b024eSKalle Valo } 1810277b024eSKalle Valo 1811277b024eSKalle Valo if (f_send_aggr_buf) { 1812277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 1813277b024eSKalle Valo "data: %s: send aggr buffer: %d %d\n", 1814277b024eSKalle Valo __func__, card->mpa_tx.start_port, 1815277b024eSKalle Valo card->mpa_tx.ports); 1816277b024eSKalle Valo if (card->supports_sdio_new_mode) { 1817277b024eSKalle Valo u32 port_count; 1818277b024eSKalle Valo int i; 1819277b024eSKalle Valo 1820277b024eSKalle Valo for (i = 0, port_count = 0; i < card->max_ports; i++) 1821277b024eSKalle Valo if (card->mpa_tx.ports & BIT(i)) 1822277b024eSKalle Valo port_count++; 1823277b024eSKalle Valo 1824277b024eSKalle Valo /* Writing data from "start_port + 0" to "start_port + 1825277b024eSKalle Valo * port_count -1", so decrease the count by 1 1826277b024eSKalle Valo */ 1827277b024eSKalle Valo port_count--; 1828277b024eSKalle Valo mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1829277b024eSKalle Valo (port_count << 8)) + card->mpa_tx.start_port; 1830277b024eSKalle Valo } else { 1831277b024eSKalle Valo mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1832277b024eSKalle Valo (card->mpa_tx.ports << 4)) + 1833277b024eSKalle Valo card->mpa_tx.start_port; 1834277b024eSKalle Valo } 1835277b024eSKalle Valo 18360cb52aacSXinming Hu if (card->mpa_tx.pkt_cnt == 1) 1837ecd7eb7cSGanapathi Bhat mport = adapter->ioport + card->mpa_tx.start_port; 18380cb52aacSXinming Hu 1839277b024eSKalle Valo ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf, 1840277b024eSKalle Valo card->mpa_tx.buf_len, mport); 1841277b024eSKalle Valo 18428b7ef8b6SXinming Hu /* Save the last multi port tx aggreagation info to debug log */ 18438b7ef8b6SXinming Hu index = adapter->dbg.last_sdio_mp_index; 18448b7ef8b6SXinming Hu index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM; 18458b7ef8b6SXinming Hu adapter->dbg.last_sdio_mp_index = index; 18468b7ef8b6SXinming Hu adapter->dbg.last_mp_wr_ports[index] = mport; 18478b7ef8b6SXinming Hu adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap; 18488b7ef8b6SXinming Hu adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len; 18498b7ef8b6SXinming Hu adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port; 18508b7ef8b6SXinming Hu 1851277b024eSKalle Valo MP_TX_AGGR_BUF_RESET(card); 1852277b024eSKalle Valo } 1853277b024eSKalle Valo 1854277b024eSKalle Valo tx_curr_single: 1855277b024eSKalle Valo if (f_send_cur_buf) { 1856277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 1857277b024eSKalle Valo "data: %s: send current buffer %d\n", 1858277b024eSKalle Valo __func__, port); 1859277b024eSKalle Valo ret = mwifiex_write_data_to_card(adapter, payload, pkt_len, 1860277b024eSKalle Valo adapter->ioport + port); 1861277b024eSKalle Valo } 1862277b024eSKalle Valo 1863277b024eSKalle Valo if (f_postcopy_cur_buf) { 1864277b024eSKalle Valo mwifiex_dbg(adapter, DATA, 1865277b024eSKalle Valo "data: %s: postcopy current buffer\n", 1866277b024eSKalle Valo __func__); 1867277b024eSKalle Valo MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 1868277b024eSKalle Valo } 1869277b024eSKalle Valo 1870277b024eSKalle Valo return ret; 1871277b024eSKalle Valo } 1872277b024eSKalle Valo 1873277b024eSKalle Valo /* 1874277b024eSKalle Valo * This function downloads data from driver to card. 1875277b024eSKalle Valo * 1876277b024eSKalle Valo * Both commands and data packets are transferred to the card by this 1877277b024eSKalle Valo * function. 1878277b024eSKalle Valo * 1879277b024eSKalle Valo * This function adds the SDIO specific header to the front of the buffer 1880277b024eSKalle Valo * before transferring. The header contains the length of the packet and 1881277b024eSKalle Valo * the type. The firmware handles the packets based upon this set type. 1882277b024eSKalle Valo */ 1883277b024eSKalle Valo static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter, 1884277b024eSKalle Valo u8 type, struct sk_buff *skb, 1885277b024eSKalle Valo struct mwifiex_tx_param *tx_param) 1886277b024eSKalle Valo { 1887277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 1888277b024eSKalle Valo int ret; 1889277b024eSKalle Valo u32 buf_block_len; 1890277b024eSKalle Valo u32 blk_size; 1891277b024eSKalle Valo u32 port = CTRL_PORT; 1892277b024eSKalle Valo u8 *payload = (u8 *)skb->data; 1893277b024eSKalle Valo u32 pkt_len = skb->len; 1894277b024eSKalle Valo 1895277b024eSKalle Valo /* Allocate buffer and copy payload */ 1896277b024eSKalle Valo blk_size = MWIFIEX_SDIO_BLOCK_SIZE; 1897277b024eSKalle Valo buf_block_len = (pkt_len + blk_size - 1) / blk_size; 189892c70a95SDevidas Puranik put_unaligned_le16((u16)pkt_len, payload + 0); 189992c70a95SDevidas Puranik put_unaligned_le16((u32)type, payload + 2); 190092c70a95SDevidas Puranik 1901277b024eSKalle Valo 1902277b024eSKalle Valo /* 1903277b024eSKalle Valo * This is SDIO specific header 1904277b024eSKalle Valo * u16 length, 1905277b024eSKalle Valo * u16 type (MWIFIEX_TYPE_DATA = 0, MWIFIEX_TYPE_CMD = 1, 1906277b024eSKalle Valo * MWIFIEX_TYPE_EVENT = 3) 1907277b024eSKalle Valo */ 1908277b024eSKalle Valo if (type == MWIFIEX_TYPE_DATA) { 1909277b024eSKalle Valo ret = mwifiex_get_wr_port_data(adapter, &port); 1910277b024eSKalle Valo if (ret) { 1911277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1912277b024eSKalle Valo "%s: no wr_port available\n", 1913277b024eSKalle Valo __func__); 1914277b024eSKalle Valo return ret; 1915277b024eSKalle Valo } 1916277b024eSKalle Valo } else { 1917277b024eSKalle Valo adapter->cmd_sent = true; 1918277b024eSKalle Valo /* Type must be MWIFIEX_TYPE_CMD */ 1919277b024eSKalle Valo 1920f4c5d599SXinming Hu if (pkt_len <= adapter->intf_hdr_len || 1921277b024eSKalle Valo pkt_len > MWIFIEX_UPLD_SIZE) 1922277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 1923277b024eSKalle Valo "%s: payload=%p, nb=%d\n", 1924277b024eSKalle Valo __func__, payload, pkt_len); 1925277b024eSKalle Valo 1926277b024eSKalle Valo if (card->supports_sdio_new_mode) 1927277b024eSKalle Valo port = CMD_PORT_SLCT; 1928277b024eSKalle Valo } 1929277b024eSKalle Valo 1930277b024eSKalle Valo /* Transfer data to card */ 1931277b024eSKalle Valo pkt_len = buf_block_len * blk_size; 1932277b024eSKalle Valo 1933277b024eSKalle Valo if (tx_param) 1934277b024eSKalle Valo ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 1935277b024eSKalle Valo port, tx_param->next_pkt_len 1936277b024eSKalle Valo ); 1937277b024eSKalle Valo else 1938277b024eSKalle Valo ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 1939277b024eSKalle Valo port, 0); 1940277b024eSKalle Valo 1941277b024eSKalle Valo if (ret) { 1942277b024eSKalle Valo if (type == MWIFIEX_TYPE_CMD) 1943277b024eSKalle Valo adapter->cmd_sent = false; 1944277b024eSKalle Valo if (type == MWIFIEX_TYPE_DATA) { 1945277b024eSKalle Valo adapter->data_sent = false; 1946277b024eSKalle Valo /* restore curr_wr_port in error cases */ 1947277b024eSKalle Valo card->curr_wr_port = port; 1948277b024eSKalle Valo card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port); 1949277b024eSKalle Valo } 1950277b024eSKalle Valo } else { 1951277b024eSKalle Valo if (type == MWIFIEX_TYPE_DATA) { 1952277b024eSKalle Valo if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port))) 1953277b024eSKalle Valo adapter->data_sent = true; 1954277b024eSKalle Valo else 1955277b024eSKalle Valo adapter->data_sent = false; 1956277b024eSKalle Valo } 1957277b024eSKalle Valo } 1958277b024eSKalle Valo 1959277b024eSKalle Valo return ret; 1960277b024eSKalle Valo } 1961277b024eSKalle Valo 1962277b024eSKalle Valo /* 1963277b024eSKalle Valo * This function allocates the MPA Tx and Rx buffers. 1964277b024eSKalle Valo */ 1965277b024eSKalle Valo static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter, 1966277b024eSKalle Valo u32 mpa_tx_buf_size, u32 mpa_rx_buf_size) 1967277b024eSKalle Valo { 1968277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 1969277b024eSKalle Valo u32 rx_buf_size; 1970277b024eSKalle Valo int ret = 0; 1971277b024eSKalle Valo 1972277b024eSKalle Valo card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL); 1973277b024eSKalle Valo if (!card->mpa_tx.buf) { 1974277b024eSKalle Valo ret = -1; 1975277b024eSKalle Valo goto error; 1976277b024eSKalle Valo } 1977277b024eSKalle Valo 1978277b024eSKalle Valo card->mpa_tx.buf_size = mpa_tx_buf_size; 1979277b024eSKalle Valo 1980277b024eSKalle Valo rx_buf_size = max_t(u32, mpa_rx_buf_size, 1981277b024eSKalle Valo (u32)SDIO_MAX_AGGR_BUF_SIZE); 1982277b024eSKalle Valo card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL); 1983277b024eSKalle Valo if (!card->mpa_rx.buf) { 1984277b024eSKalle Valo ret = -1; 1985277b024eSKalle Valo goto error; 1986277b024eSKalle Valo } 1987277b024eSKalle Valo 1988277b024eSKalle Valo card->mpa_rx.buf_size = rx_buf_size; 1989277b024eSKalle Valo 1990277b024eSKalle Valo error: 1991277b024eSKalle Valo if (ret) { 1992277b024eSKalle Valo kfree(card->mpa_tx.buf); 1993277b024eSKalle Valo kfree(card->mpa_rx.buf); 1994277b024eSKalle Valo card->mpa_tx.buf_size = 0; 1995277b024eSKalle Valo card->mpa_rx.buf_size = 0; 1996277b024eSKalle Valo } 1997277b024eSKalle Valo 1998277b024eSKalle Valo return ret; 1999277b024eSKalle Valo } 2000277b024eSKalle Valo 2001277b024eSKalle Valo /* 2002277b024eSKalle Valo * This function unregisters the SDIO device. 2003277b024eSKalle Valo * 2004277b024eSKalle Valo * The SDIO IRQ is released, the function is disabled and driver 2005277b024eSKalle Valo * data is set to null. 2006277b024eSKalle Valo */ 2007277b024eSKalle Valo static void 2008277b024eSKalle Valo mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 2009277b024eSKalle Valo { 2010277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2011277b024eSKalle Valo 2012277b024eSKalle Valo if (adapter->card) { 2013bcf28a2fSXinming Hu card->adapter = NULL; 2014277b024eSKalle Valo sdio_claim_host(card->func); 2015277b024eSKalle Valo sdio_disable_func(card->func); 2016277b024eSKalle Valo sdio_release_host(card->func); 2017277b024eSKalle Valo } 2018277b024eSKalle Valo } 2019277b024eSKalle Valo 2020277b024eSKalle Valo /* 2021277b024eSKalle Valo * This function registers the SDIO device. 2022277b024eSKalle Valo * 2023277b024eSKalle Valo * SDIO IRQ is claimed, block size is set and driver data is initialized. 2024277b024eSKalle Valo */ 2025277b024eSKalle Valo static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 2026277b024eSKalle Valo { 2027277b024eSKalle Valo int ret; 2028277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2029277b024eSKalle Valo struct sdio_func *func = card->func; 2030277b024eSKalle Valo 2031277b024eSKalle Valo /* save adapter pointer in card */ 2032277b024eSKalle Valo card->adapter = adapter; 2033277b024eSKalle Valo adapter->tx_buf_size = card->tx_buf_size; 2034277b024eSKalle Valo 2035277b024eSKalle Valo sdio_claim_host(func); 2036277b024eSKalle Valo 2037277b024eSKalle Valo /* Set block size */ 2038277b024eSKalle Valo ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 2039277b024eSKalle Valo sdio_release_host(func); 2040277b024eSKalle Valo if (ret) { 2041277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2042277b024eSKalle Valo "cannot set SDIO block size\n"); 2043277b024eSKalle Valo return ret; 2044277b024eSKalle Valo } 2045277b024eSKalle Valo 2046277b024eSKalle Valo strcpy(adapter->fw_name, card->firmware); 2047277b024eSKalle Valo if (card->fw_dump_enh) { 2048277b024eSKalle Valo adapter->mem_type_mapping_tbl = generic_mem_type_map; 2049277b024eSKalle Valo adapter->num_mem_types = 1; 2050277b024eSKalle Valo } else { 2051277b024eSKalle Valo adapter->mem_type_mapping_tbl = mem_type_mapping_tbl; 2052277b024eSKalle Valo adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl); 2053277b024eSKalle Valo } 2054277b024eSKalle Valo 2055277b024eSKalle Valo return 0; 2056277b024eSKalle Valo } 2057277b024eSKalle Valo 2058277b024eSKalle Valo /* 2059277b024eSKalle Valo * This function initializes the SDIO driver. 2060277b024eSKalle Valo * 2061277b024eSKalle Valo * The following initializations steps are followed - 2062277b024eSKalle Valo * - Read the Host interrupt status register to acknowledge 2063277b024eSKalle Valo * the first interrupt got from bootloader 2064277b024eSKalle Valo * - Disable host interrupt mask register 2065277b024eSKalle Valo * - Get SDIO port 2066277b024eSKalle Valo * - Initialize SDIO variables in card 2067277b024eSKalle Valo * - Allocate MP registers 2068277b024eSKalle Valo * - Allocate MPA Tx and Rx buffers 2069277b024eSKalle Valo */ 2070277b024eSKalle Valo static int mwifiex_init_sdio(struct mwifiex_adapter *adapter) 2071277b024eSKalle Valo { 2072277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2073277b024eSKalle Valo const struct mwifiex_sdio_card_reg *reg = card->reg; 2074277b024eSKalle Valo int ret; 2075277b024eSKalle Valo u8 sdio_ireg; 2076277b024eSKalle Valo 2077277b024eSKalle Valo sdio_set_drvdata(card->func, card); 2078277b024eSKalle Valo 2079277b024eSKalle Valo /* 2080277b024eSKalle Valo * Read the host_int_status_reg for ACK the first interrupt got 2081277b024eSKalle Valo * from the bootloader. If we don't do this we get a interrupt 2082277b024eSKalle Valo * as soon as we register the irq. 2083277b024eSKalle Valo */ 2084277b024eSKalle Valo mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 2085277b024eSKalle Valo 2086277b024eSKalle Valo /* Get SDIO ioport */ 2087277b024eSKalle Valo mwifiex_init_sdio_ioport(adapter); 2088277b024eSKalle Valo 2089277b024eSKalle Valo /* Initialize SDIO variables in card */ 2090277b024eSKalle Valo card->mp_rd_bitmap = 0; 2091277b024eSKalle Valo card->mp_wr_bitmap = 0; 2092277b024eSKalle Valo card->curr_rd_port = reg->start_rd_port; 2093277b024eSKalle Valo card->curr_wr_port = reg->start_wr_port; 2094277b024eSKalle Valo 2095277b024eSKalle Valo card->mp_data_port_mask = reg->data_port_mask; 2096277b024eSKalle Valo 2097277b024eSKalle Valo card->mpa_tx.buf_len = 0; 2098277b024eSKalle Valo card->mpa_tx.pkt_cnt = 0; 2099277b024eSKalle Valo card->mpa_tx.start_port = 0; 2100277b024eSKalle Valo 2101277b024eSKalle Valo card->mpa_tx.enabled = 1; 2102277b024eSKalle Valo card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2103277b024eSKalle Valo 2104277b024eSKalle Valo card->mpa_rx.buf_len = 0; 2105277b024eSKalle Valo card->mpa_rx.pkt_cnt = 0; 2106277b024eSKalle Valo card->mpa_rx.start_port = 0; 2107277b024eSKalle Valo 2108277b024eSKalle Valo card->mpa_rx.enabled = 1; 2109277b024eSKalle Valo card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2110277b024eSKalle Valo 2111277b024eSKalle Valo /* Allocate buffers for SDIO MP-A */ 2112277b024eSKalle Valo card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL); 2113277b024eSKalle Valo if (!card->mp_regs) 2114277b024eSKalle Valo return -ENOMEM; 2115277b024eSKalle Valo 2116277b024eSKalle Valo /* Allocate skb pointer buffers */ 21176396bb22SKees Cook card->mpa_rx.skb_arr = kcalloc(card->mp_agg_pkt_limit, sizeof(void *), 21186396bb22SKees Cook GFP_KERNEL); 211950f85e22SInsu Yun if (!card->mpa_rx.skb_arr) { 212050f85e22SInsu Yun kfree(card->mp_regs); 212150f85e22SInsu Yun return -ENOMEM; 212250f85e22SInsu Yun } 212350f85e22SInsu Yun 21246396bb22SKees Cook card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit, 21256396bb22SKees Cook sizeof(*card->mpa_rx.len_arr), 21266396bb22SKees Cook GFP_KERNEL); 212750f85e22SInsu Yun if (!card->mpa_rx.len_arr) { 212850f85e22SInsu Yun kfree(card->mp_regs); 212950f85e22SInsu Yun kfree(card->mpa_rx.skb_arr); 213050f85e22SInsu Yun return -ENOMEM; 213150f85e22SInsu Yun } 213250f85e22SInsu Yun 2133277b024eSKalle Valo ret = mwifiex_alloc_sdio_mpa_buffers(adapter, 2134277b024eSKalle Valo card->mp_tx_agg_buf_size, 2135277b024eSKalle Valo card->mp_rx_agg_buf_size); 2136277b024eSKalle Valo 2137277b024eSKalle Valo /* Allocate 32k MPA Tx/Rx buffers if 64k memory allocation fails */ 2138277b024eSKalle Valo if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX || 2139277b024eSKalle Valo card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) { 2140277b024eSKalle Valo /* Disable rx single port aggregation */ 2141277b024eSKalle Valo adapter->host_disable_sdio_rx_aggr = true; 2142277b024eSKalle Valo 2143277b024eSKalle Valo ret = mwifiex_alloc_sdio_mpa_buffers 2144277b024eSKalle Valo (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K, 2145277b024eSKalle Valo MWIFIEX_MP_AGGR_BUF_SIZE_32K); 2146277b024eSKalle Valo if (ret) { 2147277b024eSKalle Valo /* Disable multi port aggregation */ 2148277b024eSKalle Valo card->mpa_tx.enabled = 0; 2149277b024eSKalle Valo card->mpa_rx.enabled = 0; 2150277b024eSKalle Valo } 2151277b024eSKalle Valo } 2152277b024eSKalle Valo 2153277b024eSKalle Valo adapter->auto_tdls = card->can_auto_tdls; 2154277b024eSKalle Valo adapter->ext_scan = card->can_ext_scan; 2155277b024eSKalle Valo return 0; 2156277b024eSKalle Valo } 2157277b024eSKalle Valo 2158277b024eSKalle Valo /* 2159277b024eSKalle Valo * This function resets the MPA Tx and Rx buffers. 2160277b024eSKalle Valo */ 2161277b024eSKalle Valo static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter) 2162277b024eSKalle Valo { 2163277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2164277b024eSKalle Valo 2165277b024eSKalle Valo MP_TX_AGGR_BUF_RESET(card); 2166277b024eSKalle Valo MP_RX_AGGR_BUF_RESET(card); 2167277b024eSKalle Valo } 2168277b024eSKalle Valo 2169277b024eSKalle Valo /* 2170277b024eSKalle Valo * This function cleans up the allocated card buffers. 2171277b024eSKalle Valo * 2172277b024eSKalle Valo * The following are freed by this function - 2173277b024eSKalle Valo * - MP registers 2174277b024eSKalle Valo * - MPA Tx buffer 2175277b024eSKalle Valo * - MPA Rx buffer 2176277b024eSKalle Valo */ 2177277b024eSKalle Valo static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter) 2178277b024eSKalle Valo { 2179277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2180277b024eSKalle Valo 21815caa7f38SBrian Norris cancel_work_sync(&card->work); 21825caa7f38SBrian Norris 2183277b024eSKalle Valo kfree(card->mp_regs); 2184277b024eSKalle Valo kfree(card->mpa_rx.skb_arr); 2185277b024eSKalle Valo kfree(card->mpa_rx.len_arr); 2186277b024eSKalle Valo kfree(card->mpa_tx.buf); 2187277b024eSKalle Valo kfree(card->mpa_rx.buf); 2188277b024eSKalle Valo } 2189277b024eSKalle Valo 2190277b024eSKalle Valo /* 2191277b024eSKalle Valo * This function updates the MP end port in card. 2192277b024eSKalle Valo */ 2193277b024eSKalle Valo static void 2194277b024eSKalle Valo mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port) 2195277b024eSKalle Valo { 2196277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2197277b024eSKalle Valo const struct mwifiex_sdio_card_reg *reg = card->reg; 2198277b024eSKalle Valo int i; 2199277b024eSKalle Valo 2200277b024eSKalle Valo card->mp_end_port = port; 2201277b024eSKalle Valo 2202277b024eSKalle Valo card->mp_data_port_mask = reg->data_port_mask; 2203277b024eSKalle Valo 2204277b024eSKalle Valo if (reg->start_wr_port) { 2205277b024eSKalle Valo for (i = 1; i <= card->max_ports - card->mp_end_port; i++) 2206277b024eSKalle Valo card->mp_data_port_mask &= 2207277b024eSKalle Valo ~(1 << (card->max_ports - i)); 2208277b024eSKalle Valo } 2209277b024eSKalle Valo 2210277b024eSKalle Valo card->curr_wr_port = reg->start_wr_port; 2211277b024eSKalle Valo 2212277b024eSKalle Valo mwifiex_dbg(adapter, CMD, 2213277b024eSKalle Valo "cmd: mp_end_port %d, data port mask 0x%x\n", 2214277b024eSKalle Valo port, card->mp_data_port_mask); 2215277b024eSKalle Valo } 2216277b024eSKalle Valo 2217c742e623SXinming Hu static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter) 2218277b024eSKalle Valo { 2219c742e623SXinming Hu struct sdio_mmc_card *card = adapter->card; 2220277b024eSKalle Valo struct sdio_func *func = card->func; 2221755b37c9SBrian Norris int ret; 2222277b024eSKalle Valo 2223c742e623SXinming Hu mwifiex_shutdown_sw(adapter); 222466b9c182SBrian Norris 2225277b024eSKalle Valo /* power cycle the adapter */ 2226277b024eSKalle Valo sdio_claim_host(func); 2227277b024eSKalle Valo mmc_hw_reset(func->card->host); 2228277b024eSKalle Valo sdio_release_host(func); 2229277b024eSKalle Valo 223074c8719bSAmitkumar Karwar /* Previous save_adapter won't be valid after this. We will cancel 223174c8719bSAmitkumar Karwar * pending work requests. 223274c8719bSAmitkumar Karwar */ 2233cc75c577SXinming Hu clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 2234cc75c577SXinming Hu clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 223574c8719bSAmitkumar Karwar 2236755b37c9SBrian Norris ret = mwifiex_reinit_sw(adapter); 2237755b37c9SBrian Norris if (ret) 2238755b37c9SBrian Norris dev_err(&func->dev, "reinit failed: %d\n", ret); 2239277b024eSKalle Valo } 2240277b024eSKalle Valo 2241277b024eSKalle Valo /* This function read/write firmware */ 2242277b024eSKalle Valo static enum 2243277b024eSKalle Valo rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter, 2244277b024eSKalle Valo u8 doneflag) 2245277b024eSKalle Valo { 2246277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2247277b024eSKalle Valo int ret, tries; 2248277b024eSKalle Valo u8 ctrl_data = 0; 2249277b024eSKalle Valo 2250277b024eSKalle Valo sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2251277b024eSKalle Valo card->reg->fw_dump_ctrl, &ret); 2252277b024eSKalle Valo if (ret) { 2253277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n"); 2254277b024eSKalle Valo return RDWR_STATUS_FAILURE; 2255277b024eSKalle Valo } 2256277b024eSKalle Valo for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2257277b024eSKalle Valo ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl, 2258277b024eSKalle Valo &ret); 2259277b024eSKalle Valo if (ret) { 2260277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2261277b024eSKalle Valo return RDWR_STATUS_FAILURE; 2262277b024eSKalle Valo } 2263277b024eSKalle Valo if (ctrl_data == FW_DUMP_DONE) 2264277b024eSKalle Valo break; 2265277b024eSKalle Valo if (doneflag && ctrl_data == doneflag) 2266277b024eSKalle Valo return RDWR_STATUS_DONE; 2267277b024eSKalle Valo if (ctrl_data != card->reg->fw_dump_host_ready) { 2268277b024eSKalle Valo mwifiex_dbg(adapter, WARN, 2269277b024eSKalle Valo "The ctrl reg was changed, re-try again\n"); 2270277b024eSKalle Valo sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2271277b024eSKalle Valo card->reg->fw_dump_ctrl, &ret); 2272277b024eSKalle Valo if (ret) { 2273277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2274277b024eSKalle Valo return RDWR_STATUS_FAILURE; 2275277b024eSKalle Valo } 2276277b024eSKalle Valo } 2277277b024eSKalle Valo usleep_range(100, 200); 2278277b024eSKalle Valo } 2279277b024eSKalle Valo if (ctrl_data == card->reg->fw_dump_host_ready) { 2280277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2281277b024eSKalle Valo "Fail to pull ctrl_data\n"); 2282277b024eSKalle Valo return RDWR_STATUS_FAILURE; 2283277b024eSKalle Valo } 2284277b024eSKalle Valo 2285277b024eSKalle Valo return RDWR_STATUS_SUCCESS; 2286277b024eSKalle Valo } 2287277b024eSKalle Valo 2288277b024eSKalle Valo /* This function dump firmware memory to file */ 2289277b024eSKalle Valo static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter) 2290277b024eSKalle Valo { 2291277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2292277b024eSKalle Valo int ret = 0; 2293277b024eSKalle Valo unsigned int reg, reg_start, reg_end; 2294277b024eSKalle Valo u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0; 2295277b024eSKalle Valo enum rdwr_status stat; 2296277b024eSKalle Valo u32 memory_size; 2297277b024eSKalle Valo 2298277b024eSKalle Valo if (!card->can_dump_fw) 2299277b024eSKalle Valo return; 2300277b024eSKalle Valo 2301277b024eSKalle Valo for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) { 2302277b024eSKalle Valo struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2303277b024eSKalle Valo 2304277b024eSKalle Valo if (entry->mem_ptr) { 2305277b024eSKalle Valo vfree(entry->mem_ptr); 2306277b024eSKalle Valo entry->mem_ptr = NULL; 2307277b024eSKalle Valo } 2308277b024eSKalle Valo entry->mem_size = 0; 2309277b024eSKalle Valo } 2310277b024eSKalle Valo 2311277b024eSKalle Valo mwifiex_pm_wakeup_card(adapter); 2312277b024eSKalle Valo sdio_claim_host(card->func); 2313277b024eSKalle Valo 2314277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2315277b024eSKalle Valo 2316277b024eSKalle Valo stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2317277b024eSKalle Valo if (stat == RDWR_STATUS_FAILURE) 2318277b024eSKalle Valo goto done; 2319277b024eSKalle Valo 2320277b024eSKalle Valo reg = card->reg->fw_dump_start; 2321277b024eSKalle Valo /* Read the number of the memories which will dump */ 2322277b024eSKalle Valo dump_num = sdio_readb(card->func, reg, &ret); 2323277b024eSKalle Valo if (ret) { 2324277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n"); 2325277b024eSKalle Valo goto done; 2326277b024eSKalle Valo } 2327277b024eSKalle Valo 2328277b024eSKalle Valo /* Read the length of every memory which will dump */ 2329277b024eSKalle Valo for (idx = 0; idx < dump_num; idx++) { 2330277b024eSKalle Valo struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2331277b024eSKalle Valo 2332277b024eSKalle Valo stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2333277b024eSKalle Valo if (stat == RDWR_STATUS_FAILURE) 2334277b024eSKalle Valo goto done; 2335277b024eSKalle Valo 2336277b024eSKalle Valo memory_size = 0; 2337277b024eSKalle Valo reg = card->reg->fw_dump_start; 2338277b024eSKalle Valo for (i = 0; i < 4; i++) { 2339277b024eSKalle Valo read_reg = sdio_readb(card->func, reg, &ret); 2340277b024eSKalle Valo if (ret) { 2341277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2342277b024eSKalle Valo goto done; 2343277b024eSKalle Valo } 2344277b024eSKalle Valo memory_size |= (read_reg << i*8); 2345277b024eSKalle Valo reg++; 2346277b024eSKalle Valo } 2347277b024eSKalle Valo 2348277b024eSKalle Valo if (memory_size == 0) { 2349277b024eSKalle Valo mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n"); 2350277b024eSKalle Valo ret = mwifiex_write_reg(adapter, 2351277b024eSKalle Valo card->reg->fw_dump_ctrl, 2352277b024eSKalle Valo FW_DUMP_READ_DONE); 2353277b024eSKalle Valo if (ret) { 2354277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2355277b024eSKalle Valo return; 2356277b024eSKalle Valo } 2357277b024eSKalle Valo break; 2358277b024eSKalle Valo } 2359277b024eSKalle Valo 2360277b024eSKalle Valo mwifiex_dbg(adapter, DUMP, 2361277b024eSKalle Valo "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2362277b024eSKalle Valo entry->mem_ptr = vmalloc(memory_size + 1); 2363277b024eSKalle Valo entry->mem_size = memory_size; 2364277b024eSKalle Valo if (!entry->mem_ptr) { 2365277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n", 2366277b024eSKalle Valo entry->mem_name); 2367277b024eSKalle Valo goto done; 2368277b024eSKalle Valo } 2369277b024eSKalle Valo dbg_ptr = entry->mem_ptr; 2370277b024eSKalle Valo end_ptr = dbg_ptr + memory_size; 2371277b024eSKalle Valo 2372277b024eSKalle Valo doneflag = entry->done_flag; 2373277b024eSKalle Valo mwifiex_dbg(adapter, DUMP, 2374277b024eSKalle Valo "Start %s output, please wait...\n", 2375277b024eSKalle Valo entry->mem_name); 2376277b024eSKalle Valo 2377277b024eSKalle Valo do { 2378277b024eSKalle Valo stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2379277b024eSKalle Valo if (stat == RDWR_STATUS_FAILURE) 2380277b024eSKalle Valo goto done; 2381277b024eSKalle Valo 2382277b024eSKalle Valo reg_start = card->reg->fw_dump_start; 2383277b024eSKalle Valo reg_end = card->reg->fw_dump_end; 2384277b024eSKalle Valo for (reg = reg_start; reg <= reg_end; reg++) { 2385277b024eSKalle Valo *dbg_ptr = sdio_readb(card->func, reg, &ret); 2386277b024eSKalle Valo if (ret) { 2387277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2388277b024eSKalle Valo "SDIO read err\n"); 2389277b024eSKalle Valo goto done; 2390277b024eSKalle Valo } 2391277b024eSKalle Valo if (dbg_ptr < end_ptr) 2392277b024eSKalle Valo dbg_ptr++; 2393277b024eSKalle Valo else 2394277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2395277b024eSKalle Valo "Allocated buf not enough\n"); 2396277b024eSKalle Valo } 2397277b024eSKalle Valo 2398277b024eSKalle Valo if (stat != RDWR_STATUS_DONE) 2399277b024eSKalle Valo continue; 2400277b024eSKalle Valo 2401277b024eSKalle Valo mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n", 2402277b024eSKalle Valo entry->mem_name, dbg_ptr - entry->mem_ptr); 2403277b024eSKalle Valo break; 2404277b024eSKalle Valo } while (1); 2405277b024eSKalle Valo } 2406277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2407277b024eSKalle Valo 2408277b024eSKalle Valo done: 2409277b024eSKalle Valo sdio_release_host(card->func); 2410277b024eSKalle Valo } 2411277b024eSKalle Valo 2412277b024eSKalle Valo static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter) 2413277b024eSKalle Valo { 2414277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2415277b024eSKalle Valo struct memory_type_mapping *entry = &generic_mem_type_map[0]; 2416277b024eSKalle Valo unsigned int reg, reg_start, reg_end; 2417277b024eSKalle Valo u8 start_flag = 0, done_flag = 0; 2418277b024eSKalle Valo u8 *dbg_ptr, *end_ptr; 2419277b024eSKalle Valo enum rdwr_status stat; 2420277b024eSKalle Valo int ret = -1, tries; 2421277b024eSKalle Valo 2422277b024eSKalle Valo if (!card->fw_dump_enh) 2423277b024eSKalle Valo return; 2424277b024eSKalle Valo 2425277b024eSKalle Valo if (entry->mem_ptr) { 2426277b024eSKalle Valo vfree(entry->mem_ptr); 2427277b024eSKalle Valo entry->mem_ptr = NULL; 2428277b024eSKalle Valo } 2429277b024eSKalle Valo entry->mem_size = 0; 2430277b024eSKalle Valo 2431277b024eSKalle Valo mwifiex_pm_wakeup_card(adapter); 2432277b024eSKalle Valo sdio_claim_host(card->func); 2433277b024eSKalle Valo 2434277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2435277b024eSKalle Valo 2436277b024eSKalle Valo stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2437277b024eSKalle Valo if (stat == RDWR_STATUS_FAILURE) 2438277b024eSKalle Valo goto done; 2439277b024eSKalle Valo 2440277b024eSKalle Valo reg_start = card->reg->fw_dump_start; 2441277b024eSKalle Valo reg_end = card->reg->fw_dump_end; 2442277b024eSKalle Valo for (reg = reg_start; reg <= reg_end; reg++) { 2443277b024eSKalle Valo for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2444277b024eSKalle Valo start_flag = sdio_readb(card->func, reg, &ret); 2445277b024eSKalle Valo if (ret) { 2446277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2447277b024eSKalle Valo "SDIO read err\n"); 2448277b024eSKalle Valo goto done; 2449277b024eSKalle Valo } 2450277b024eSKalle Valo if (start_flag == 0) 2451277b024eSKalle Valo break; 2452277b024eSKalle Valo if (tries == MAX_POLL_TRIES) { 2453277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2454277b024eSKalle Valo "FW not ready to dump\n"); 2455277b024eSKalle Valo ret = -1; 2456277b024eSKalle Valo goto done; 2457277b024eSKalle Valo } 2458277b024eSKalle Valo } 2459277b024eSKalle Valo usleep_range(100, 200); 2460277b024eSKalle Valo } 2461277b024eSKalle Valo 2462277b024eSKalle Valo entry->mem_ptr = vmalloc(0xf0000 + 1); 2463277b024eSKalle Valo if (!entry->mem_ptr) { 2464277b024eSKalle Valo ret = -1; 2465277b024eSKalle Valo goto done; 2466277b024eSKalle Valo } 2467277b024eSKalle Valo dbg_ptr = entry->mem_ptr; 2468277b024eSKalle Valo entry->mem_size = 0xf0000; 2469277b024eSKalle Valo end_ptr = dbg_ptr + entry->mem_size; 2470277b024eSKalle Valo 2471277b024eSKalle Valo done_flag = entry->done_flag; 2472277b024eSKalle Valo mwifiex_dbg(adapter, DUMP, 2473277b024eSKalle Valo "Start %s output, please wait...\n", entry->mem_name); 2474277b024eSKalle Valo 2475277b024eSKalle Valo while (true) { 2476277b024eSKalle Valo stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2477277b024eSKalle Valo if (stat == RDWR_STATUS_FAILURE) 2478277b024eSKalle Valo goto done; 2479277b024eSKalle Valo for (reg = reg_start; reg <= reg_end; reg++) { 2480277b024eSKalle Valo *dbg_ptr = sdio_readb(card->func, reg, &ret); 2481277b024eSKalle Valo if (ret) { 2482277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, 2483277b024eSKalle Valo "SDIO read err\n"); 2484277b024eSKalle Valo goto done; 2485277b024eSKalle Valo } 2486277b024eSKalle Valo dbg_ptr++; 2487277b024eSKalle Valo if (dbg_ptr >= end_ptr) { 2488277b024eSKalle Valo u8 *tmp_ptr; 2489277b024eSKalle Valo 2490277b024eSKalle Valo tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1); 2491277b024eSKalle Valo if (!tmp_ptr) 2492277b024eSKalle Valo goto done; 2493277b024eSKalle Valo 2494277b024eSKalle Valo memcpy(tmp_ptr, entry->mem_ptr, 2495277b024eSKalle Valo entry->mem_size); 2496277b024eSKalle Valo vfree(entry->mem_ptr); 2497277b024eSKalle Valo entry->mem_ptr = tmp_ptr; 2498277b024eSKalle Valo tmp_ptr = NULL; 2499277b024eSKalle Valo dbg_ptr = entry->mem_ptr + entry->mem_size; 2500277b024eSKalle Valo entry->mem_size += 0x4000; 2501277b024eSKalle Valo end_ptr = entry->mem_ptr + entry->mem_size; 2502277b024eSKalle Valo } 2503277b024eSKalle Valo } 2504277b024eSKalle Valo if (stat == RDWR_STATUS_DONE) { 2505277b024eSKalle Valo entry->mem_size = dbg_ptr - entry->mem_ptr; 2506277b024eSKalle Valo mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n", 2507277b024eSKalle Valo entry->mem_name, entry->mem_size); 2508277b024eSKalle Valo ret = 0; 2509277b024eSKalle Valo break; 2510277b024eSKalle Valo } 2511277b024eSKalle Valo } 2512277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2513277b024eSKalle Valo 2514277b024eSKalle Valo done: 2515277b024eSKalle Valo if (ret) { 2516277b024eSKalle Valo mwifiex_dbg(adapter, ERROR, "firmware dump failed\n"); 2517277b024eSKalle Valo if (entry->mem_ptr) { 2518277b024eSKalle Valo vfree(entry->mem_ptr); 2519277b024eSKalle Valo entry->mem_ptr = NULL; 2520277b024eSKalle Valo } 2521277b024eSKalle Valo entry->mem_size = 0; 2522277b024eSKalle Valo } 2523277b024eSKalle Valo sdio_release_host(card->func); 2524277b024eSKalle Valo } 2525277b024eSKalle Valo 2526277b024eSKalle Valo static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter) 2527277b024eSKalle Valo { 2528277b024eSKalle Valo struct sdio_mmc_card *card = adapter->card; 2529277b024eSKalle Valo 2530d0e2b44eSXinming Hu adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2531d0e2b44eSXinming Hu if (!adapter->devdump_data) { 2532d0e2b44eSXinming Hu mwifiex_dbg(adapter, ERROR, 2533d0e2b44eSXinming Hu "vzalloc devdump data failure!\n"); 2534d0e2b44eSXinming Hu return; 2535d0e2b44eSXinming Hu } 2536d0e2b44eSXinming Hu 2537d0e2b44eSXinming Hu mwifiex_drv_info_dump(adapter); 2538277b024eSKalle Valo if (card->fw_dump_enh) 2539277b024eSKalle Valo mwifiex_sdio_generic_fw_dump(adapter); 2540277b024eSKalle Valo else 2541277b024eSKalle Valo mwifiex_sdio_fw_dump(adapter); 2542d0e2b44eSXinming Hu mwifiex_prepare_fw_dump_info(adapter); 2543d0e2b44eSXinming Hu mwifiex_upload_device_dump(adapter); 2544277b024eSKalle Valo } 2545277b024eSKalle Valo 2546277b024eSKalle Valo static void mwifiex_sdio_work(struct work_struct *work) 2547277b024eSKalle Valo { 2548cc75c577SXinming Hu struct sdio_mmc_card *card = 2549cc75c577SXinming Hu container_of(work, struct sdio_mmc_card, work); 2550cc75c577SXinming Hu 2551277b024eSKalle Valo if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2552cc75c577SXinming Hu &card->work_flags)) 2553cc75c577SXinming Hu mwifiex_sdio_device_dump_work(card->adapter); 2554277b024eSKalle Valo if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2555cc75c577SXinming Hu &card->work_flags)) 2556cc75c577SXinming Hu mwifiex_sdio_card_reset_work(card->adapter); 2557277b024eSKalle Valo } 2558277b024eSKalle Valo 2559277b024eSKalle Valo /* This function resets the card */ 2560277b024eSKalle Valo static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter) 2561277b024eSKalle Valo { 2562cc75c577SXinming Hu struct sdio_mmc_card *card = adapter->card; 2563cc75c577SXinming Hu 256421f569afSBrian Norris if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2565cc75c577SXinming Hu schedule_work(&card->work); 2566277b024eSKalle Valo } 2567277b024eSKalle Valo 2568277b024eSKalle Valo /* This function dumps FW information */ 2569277b024eSKalle Valo static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter) 2570277b024eSKalle Valo { 2571cc75c577SXinming Hu struct sdio_mmc_card *card = adapter->card; 2572cc75c577SXinming Hu 257321f569afSBrian Norris if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 257421f569afSBrian Norris &card->work_flags)) 2575cc75c577SXinming Hu schedule_work(&card->work); 2576277b024eSKalle Valo } 2577277b024eSKalle Valo 2578277b024eSKalle Valo /* Function to dump SDIO function registers and SDIO scratch registers in case 2579277b024eSKalle Valo * of FW crash 2580277b024eSKalle Valo */ 2581277b024eSKalle Valo static int 2582277b024eSKalle Valo mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2583277b024eSKalle Valo { 2584277b024eSKalle Valo char *p = drv_buf; 2585277b024eSKalle Valo struct sdio_mmc_card *cardp = adapter->card; 2586277b024eSKalle Valo int ret = 0; 2587277b024eSKalle Valo u8 count, func, data, index = 0, size = 0; 2588277b024eSKalle Valo u8 reg, reg_start, reg_end; 2589277b024eSKalle Valo char buf[256], *ptr; 2590277b024eSKalle Valo 2591277b024eSKalle Valo if (!p) 2592277b024eSKalle Valo return 0; 2593277b024eSKalle Valo 2594277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "SDIO register dump start\n"); 2595277b024eSKalle Valo 2596277b024eSKalle Valo mwifiex_pm_wakeup_card(adapter); 2597277b024eSKalle Valo 2598277b024eSKalle Valo sdio_claim_host(cardp->func); 2599277b024eSKalle Valo 2600277b024eSKalle Valo for (count = 0; count < 5; count++) { 2601277b024eSKalle Valo memset(buf, 0, sizeof(buf)); 2602277b024eSKalle Valo ptr = buf; 2603277b024eSKalle Valo 2604277b024eSKalle Valo switch (count) { 2605277b024eSKalle Valo case 0: 2606277b024eSKalle Valo /* Read the registers of SDIO function0 */ 2607277b024eSKalle Valo func = count; 2608277b024eSKalle Valo reg_start = 0; 2609277b024eSKalle Valo reg_end = 9; 2610277b024eSKalle Valo break; 2611277b024eSKalle Valo case 1: 2612277b024eSKalle Valo /* Read the registers of SDIO function1 */ 2613277b024eSKalle Valo func = count; 2614277b024eSKalle Valo reg_start = cardp->reg->func1_dump_reg_start; 2615277b024eSKalle Valo reg_end = cardp->reg->func1_dump_reg_end; 2616277b024eSKalle Valo break; 2617277b024eSKalle Valo case 2: 2618277b024eSKalle Valo index = 0; 2619277b024eSKalle Valo func = 1; 2620277b024eSKalle Valo reg_start = cardp->reg->func1_spec_reg_table[index++]; 2621277b024eSKalle Valo size = cardp->reg->func1_spec_reg_num; 2622277b024eSKalle Valo reg_end = cardp->reg->func1_spec_reg_table[size-1]; 2623277b024eSKalle Valo break; 2624277b024eSKalle Valo default: 2625277b024eSKalle Valo /* Read the scratch registers of SDIO function1 */ 2626277b024eSKalle Valo if (count == 4) 2627277b024eSKalle Valo mdelay(100); 2628277b024eSKalle Valo func = 1; 2629277b024eSKalle Valo reg_start = cardp->reg->func1_scratch_reg; 2630277b024eSKalle Valo reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE; 2631277b024eSKalle Valo } 2632277b024eSKalle Valo 2633277b024eSKalle Valo if (count != 2) 2634277b024eSKalle Valo ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ", 2635277b024eSKalle Valo func, reg_start, reg_end); 2636277b024eSKalle Valo else 2637277b024eSKalle Valo ptr += sprintf(ptr, "SDIO Func%d: ", func); 2638277b024eSKalle Valo 2639277b024eSKalle Valo for (reg = reg_start; reg <= reg_end;) { 2640277b024eSKalle Valo if (func == 0) 2641277b024eSKalle Valo data = sdio_f0_readb(cardp->func, reg, &ret); 2642277b024eSKalle Valo else 2643277b024eSKalle Valo data = sdio_readb(cardp->func, reg, &ret); 2644277b024eSKalle Valo 2645277b024eSKalle Valo if (count == 2) 2646277b024eSKalle Valo ptr += sprintf(ptr, "(%#x) ", reg); 2647277b024eSKalle Valo if (!ret) { 2648277b024eSKalle Valo ptr += sprintf(ptr, "%02x ", data); 2649277b024eSKalle Valo } else { 2650277b024eSKalle Valo ptr += sprintf(ptr, "ERR"); 2651277b024eSKalle Valo break; 2652277b024eSKalle Valo } 2653277b024eSKalle Valo 2654277b024eSKalle Valo if (count == 2 && reg < reg_end) 2655277b024eSKalle Valo reg = cardp->reg->func1_spec_reg_table[index++]; 2656277b024eSKalle Valo else 2657277b024eSKalle Valo reg++; 2658277b024eSKalle Valo } 2659277b024eSKalle Valo 2660277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "%s\n", buf); 2661277b024eSKalle Valo p += sprintf(p, "%s\n", buf); 2662277b024eSKalle Valo } 2663277b024eSKalle Valo 2664277b024eSKalle Valo sdio_release_host(cardp->func); 2665277b024eSKalle Valo 2666277b024eSKalle Valo mwifiex_dbg(adapter, MSG, "SDIO register dump end\n"); 2667277b024eSKalle Valo 2668277b024eSKalle Valo return p - drv_buf; 2669277b024eSKalle Valo } 2670277b024eSKalle Valo 2671c742e623SXinming Hu /* sdio device/function initialization, code is extracted 2672c742e623SXinming Hu * from init_if handler and register_dev handler. 2673c742e623SXinming Hu */ 2674c742e623SXinming Hu static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter) 2675c742e623SXinming Hu { 2676c742e623SXinming Hu struct sdio_mmc_card *card = adapter->card; 2677c742e623SXinming Hu u8 sdio_ireg; 2678c742e623SXinming Hu 2679c742e623SXinming Hu sdio_claim_host(card->func); 2680c742e623SXinming Hu sdio_enable_func(card->func); 2681c742e623SXinming Hu sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 2682c742e623SXinming Hu sdio_release_host(card->func); 2683c742e623SXinming Hu 2684c742e623SXinming Hu /* tx_buf_size might be changed to 3584 by firmware during 2685c742e623SXinming Hu * data transfer, we will reset to default size. 2686c742e623SXinming Hu */ 2687c742e623SXinming Hu adapter->tx_buf_size = card->tx_buf_size; 2688c742e623SXinming Hu 2689c742e623SXinming Hu /* Read the host_int_status_reg for ACK the first interrupt got 2690c742e623SXinming Hu * from the bootloader. If we don't do this we get a interrupt 2691c742e623SXinming Hu * as soon as we register the irq. 2692c742e623SXinming Hu */ 2693c742e623SXinming Hu mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 2694c742e623SXinming Hu 2695c742e623SXinming Hu mwifiex_init_sdio_ioport(adapter); 2696c742e623SXinming Hu } 2697c742e623SXinming Hu 2698277b024eSKalle Valo static struct mwifiex_if_ops sdio_ops = { 2699277b024eSKalle Valo .init_if = mwifiex_init_sdio, 2700277b024eSKalle Valo .cleanup_if = mwifiex_cleanup_sdio, 2701277b024eSKalle Valo .check_fw_status = mwifiex_check_fw_status, 27022fd5c6edSchunfan chen .check_winner_status = mwifiex_check_winner_status, 2703277b024eSKalle Valo .prog_fw = mwifiex_prog_fw_w_helper, 2704277b024eSKalle Valo .register_dev = mwifiex_register_dev, 2705277b024eSKalle Valo .unregister_dev = mwifiex_unregister_dev, 2706277b024eSKalle Valo .enable_int = mwifiex_sdio_enable_host_int, 2707277b024eSKalle Valo .disable_int = mwifiex_sdio_disable_host_int, 2708277b024eSKalle Valo .process_int_status = mwifiex_process_int_status, 2709277b024eSKalle Valo .host_to_card = mwifiex_sdio_host_to_card, 2710277b024eSKalle Valo .wakeup = mwifiex_pm_wakeup_card, 2711277b024eSKalle Valo .wakeup_complete = mwifiex_pm_wakeup_card_complete, 2712277b024eSKalle Valo 2713277b024eSKalle Valo /* SDIO specific */ 2714277b024eSKalle Valo .update_mp_end_port = mwifiex_update_mp_end_port, 2715277b024eSKalle Valo .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf, 2716277b024eSKalle Valo .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete, 2717277b024eSKalle Valo .event_complete = mwifiex_sdio_event_complete, 27182095b142SArnd Bergmann .dnld_fw = mwifiex_sdio_dnld_fw, 2719277b024eSKalle Valo .card_reset = mwifiex_sdio_card_reset, 2720277b024eSKalle Valo .reg_dump = mwifiex_sdio_reg_dump, 2721277b024eSKalle Valo .device_dump = mwifiex_sdio_device_dump, 2722277b024eSKalle Valo .deaggr_pkt = mwifiex_deaggr_sdio_pkt, 2723c742e623SXinming Hu .up_dev = mwifiex_sdio_up_dev, 2724277b024eSKalle Valo }; 2725277b024eSKalle Valo 2726c0e6aa42SAmitkumar Karwar module_driver(mwifiex_sdio, sdio_register_driver, sdio_unregister_driver); 2727277b024eSKalle Valo 2728277b024eSKalle Valo MODULE_AUTHOR("Marvell International Ltd."); 2729277b024eSKalle Valo MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION); 2730277b024eSKalle Valo MODULE_VERSION(SDIO_VERSION); 2731277b024eSKalle Valo MODULE_LICENSE("GPL v2"); 2732277b024eSKalle Valo MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME); 2733277b024eSKalle Valo MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME); 2734277b024eSKalle Valo MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME); 2735277b024eSKalle Valo MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME); 2736277b024eSKalle Valo MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME); 27371a0f5478SHemantkumar Suthar MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME); 2738*938c7c80STamás Szűcs MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME); 2739277b024eSKalle Valo MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME); 2740