xref: /linux/drivers/net/wireless/marvell/mwifiex/pcie.c (revision 17cfcb68af3bc7d5e8ae08779b1853310a2949f3)
1 /*
2  * Marvell Wireless LAN device driver: PCIE specific handling
3  *
4  * Copyright (C) 2011-2014, Marvell International Ltd.
5  *
6  * This software file (the "File") is distributed by Marvell International
7  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8  * (the "License").  You may use, redistribute and/or modify this File in
9  * accordance with the terms and conditions of the License, a copy of which
10  * is available by writing to the Free Software Foundation, Inc.,
11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13  *
14  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
17  * this warranty disclaimer.
18  */
19 
20 #include <linux/firmware.h>
21 
22 #include "decl.h"
23 #include "ioctl.h"
24 #include "util.h"
25 #include "fw.h"
26 #include "main.h"
27 #include "wmm.h"
28 #include "11n.h"
29 #include "pcie.h"
30 
31 #define PCIE_VERSION	"1.0"
32 #define DRV_NAME        "Marvell mwifiex PCIe"
33 
34 static struct mwifiex_if_ops pcie_ops;
35 
36 static const struct of_device_id mwifiex_pcie_of_match_table[] = {
37 	{ .compatible = "pci11ab,2b42" },
38 	{ .compatible = "pci1b4b,2b42" },
39 	{ }
40 };
41 
42 static int mwifiex_pcie_probe_of(struct device *dev)
43 {
44 	if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
45 		dev_err(dev, "required compatible string missing\n");
46 		return -EINVAL;
47 	}
48 
49 	return 0;
50 }
51 
52 static void mwifiex_pcie_work(struct work_struct *work);
53 
54 static int
55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
56 		       size_t size, int flags)
57 {
58 	struct pcie_service_card *card = adapter->card;
59 	struct mwifiex_dma_mapping mapping;
60 
61 	mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
62 	if (pci_dma_mapping_error(card->dev, mapping.addr)) {
63 		mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
64 		return -1;
65 	}
66 	mapping.len = size;
67 	mwifiex_store_mapping(skb, &mapping);
68 	return 0;
69 }
70 
71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
72 				     struct sk_buff *skb, int flags)
73 {
74 	struct pcie_service_card *card = adapter->card;
75 	struct mwifiex_dma_mapping mapping;
76 
77 	mwifiex_get_mapping(skb, &mapping);
78 	pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
79 }
80 
81 /*
82  * This function writes data into PCIE card register.
83  */
84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
85 {
86 	struct pcie_service_card *card = adapter->card;
87 
88 	iowrite32(data, card->pci_mmap1 + reg);
89 
90 	return 0;
91 }
92 
93 /* This function reads data from PCIE card register.
94  */
95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
96 {
97 	struct pcie_service_card *card = adapter->card;
98 
99 	*data = ioread32(card->pci_mmap1 + reg);
100 	if (*data == 0xffffffff)
101 		return 0xffffffff;
102 
103 	return 0;
104 }
105 
106 /* This function reads u8 data from PCIE card register. */
107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
108 				 int reg, u8 *data)
109 {
110 	struct pcie_service_card *card = adapter->card;
111 
112 	*data = ioread8(card->pci_mmap1 + reg);
113 
114 	return 0;
115 }
116 
117 /*
118  * This function reads sleep cookie and checks if FW is ready
119  */
120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
121 {
122 	u32 cookie_value;
123 	struct pcie_service_card *card = adapter->card;
124 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
125 
126 	if (!reg->sleep_cookie)
127 		return true;
128 
129 	if (card->sleep_cookie_vbase) {
130 		cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
131 		mwifiex_dbg(adapter, INFO,
132 			    "info: ACCESS_HW: sleep cookie=0x%x\n",
133 			    cookie_value);
134 		if (cookie_value == FW_AWAKE_COOKIE)
135 			return true;
136 	}
137 
138 	return false;
139 }
140 
141 #ifdef CONFIG_PM_SLEEP
142 /*
143  * Kernel needs to suspend all functions separately. Therefore all
144  * registered functions must have drivers with suspend and resume
145  * methods. Failing that the kernel simply removes the whole card.
146  *
147  * If already not suspended, this function allocates and sends a host
148  * sleep activate request to the firmware and turns off the traffic.
149  */
150 static int mwifiex_pcie_suspend(struct device *dev)
151 {
152 	struct mwifiex_adapter *adapter;
153 	struct pcie_service_card *card = dev_get_drvdata(dev);
154 
155 
156 	/* Might still be loading firmware */
157 	wait_for_completion(&card->fw_done);
158 
159 	adapter = card->adapter;
160 	if (!adapter) {
161 		dev_err(dev, "adapter is not valid\n");
162 		return 0;
163 	}
164 
165 	mwifiex_enable_wake(adapter);
166 
167 	/* Enable the Host Sleep */
168 	if (!mwifiex_enable_hs(adapter)) {
169 		mwifiex_dbg(adapter, ERROR,
170 			    "cmd: failed to suspend\n");
171 		clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
172 		mwifiex_disable_wake(adapter);
173 		return -EFAULT;
174 	}
175 
176 	flush_workqueue(adapter->workqueue);
177 
178 	/* Indicate device suspended */
179 	set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
180 	clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
181 
182 	return 0;
183 }
184 
185 /*
186  * Kernel needs to suspend all functions separately. Therefore all
187  * registered functions must have drivers with suspend and resume
188  * methods. Failing that the kernel simply removes the whole card.
189  *
190  * If already not resumed, this function turns on the traffic and
191  * sends a host sleep cancel request to the firmware.
192  */
193 static int mwifiex_pcie_resume(struct device *dev)
194 {
195 	struct mwifiex_adapter *adapter;
196 	struct pcie_service_card *card = dev_get_drvdata(dev);
197 
198 
199 	if (!card->adapter) {
200 		dev_err(dev, "adapter structure is not valid\n");
201 		return 0;
202 	}
203 
204 	adapter = card->adapter;
205 
206 	if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
207 		mwifiex_dbg(adapter, WARN,
208 			    "Device already resumed\n");
209 		return 0;
210 	}
211 
212 	clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
213 
214 	mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
215 			  MWIFIEX_ASYNC_CMD);
216 	mwifiex_disable_wake(adapter);
217 
218 	return 0;
219 }
220 #endif
221 
222 /*
223  * This function probes an mwifiex device and registers it. It allocates
224  * the card structure, enables PCIE function number and initiates the
225  * device registration and initialization procedure by adding a logical
226  * interface.
227  */
228 static int mwifiex_pcie_probe(struct pci_dev *pdev,
229 					const struct pci_device_id *ent)
230 {
231 	struct pcie_service_card *card;
232 	int ret;
233 
234 	pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
235 		 pdev->vendor, pdev->device, pdev->revision);
236 
237 	card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
238 	if (!card)
239 		return -ENOMEM;
240 
241 	init_completion(&card->fw_done);
242 
243 	card->dev = pdev;
244 
245 	if (ent->driver_data) {
246 		struct mwifiex_pcie_device *data = (void *)ent->driver_data;
247 		card->pcie.reg = data->reg;
248 		card->pcie.blksz_fw_dl = data->blksz_fw_dl;
249 		card->pcie.tx_buf_size = data->tx_buf_size;
250 		card->pcie.can_dump_fw = data->can_dump_fw;
251 		card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
252 		card->pcie.num_mem_types = data->num_mem_types;
253 		card->pcie.can_ext_scan = data->can_ext_scan;
254 		INIT_WORK(&card->work, mwifiex_pcie_work);
255 	}
256 
257 	/* device tree node parsing and platform specific configuration*/
258 	if (pdev->dev.of_node) {
259 		ret = mwifiex_pcie_probe_of(&pdev->dev);
260 		if (ret)
261 			return ret;
262 	}
263 
264 	if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
265 			     MWIFIEX_PCIE, &pdev->dev)) {
266 		pr_err("%s failed\n", __func__);
267 		return -1;
268 	}
269 
270 	return 0;
271 }
272 
273 /*
274  * This function removes the interface and frees up the card structure.
275  */
276 static void mwifiex_pcie_remove(struct pci_dev *pdev)
277 {
278 	struct pcie_service_card *card;
279 	struct mwifiex_adapter *adapter;
280 	struct mwifiex_private *priv;
281 	const struct mwifiex_pcie_card_reg *reg;
282 	u32 fw_status;
283 	int ret;
284 
285 	card = pci_get_drvdata(pdev);
286 
287 	wait_for_completion(&card->fw_done);
288 
289 	adapter = card->adapter;
290 	if (!adapter || !adapter->priv_num)
291 		return;
292 
293 	reg = card->pcie.reg;
294 	if (reg)
295 		ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
296 	else
297 		fw_status = -1;
298 
299 	if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
300 		mwifiex_deauthenticate_all(adapter);
301 
302 		priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
303 
304 		mwifiex_disable_auto_ds(priv);
305 
306 		mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
307 	}
308 
309 	mwifiex_remove_card(adapter);
310 }
311 
312 static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
313 {
314 	mwifiex_pcie_remove(pdev);
315 
316 	return;
317 }
318 
319 static void mwifiex_pcie_coredump(struct device *dev)
320 {
321 	struct pci_dev *pdev;
322 	struct pcie_service_card *card;
323 
324 	pdev = container_of(dev, struct pci_dev, dev);
325 	card = pci_get_drvdata(pdev);
326 
327 	if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
328 			      &card->work_flags))
329 		schedule_work(&card->work);
330 }
331 
332 static const struct pci_device_id mwifiex_ids[] = {
333 	{
334 		PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
335 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
336 		.driver_data = (unsigned long)&mwifiex_pcie8766,
337 	},
338 	{
339 		PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
340 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
341 		.driver_data = (unsigned long)&mwifiex_pcie8897,
342 	},
343 	{
344 		PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
345 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
346 		.driver_data = (unsigned long)&mwifiex_pcie8997,
347 	},
348 	{
349 		PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
350 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
351 		.driver_data = (unsigned long)&mwifiex_pcie8997,
352 	},
353 	{},
354 };
355 
356 MODULE_DEVICE_TABLE(pci, mwifiex_ids);
357 
358 /*
359  * Cleanup all software without cleaning anything related to PCIe and HW.
360  */
361 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
362 {
363 	struct pcie_service_card *card = pci_get_drvdata(pdev);
364 	struct mwifiex_adapter *adapter = card->adapter;
365 
366 	if (!adapter) {
367 		dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
368 			__func__);
369 		return;
370 	}
371 
372 	mwifiex_dbg(adapter, INFO,
373 		    "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
374 		    __func__, pdev->vendor, pdev->device, pdev->revision);
375 
376 	mwifiex_shutdown_sw(adapter);
377 	clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
378 	clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
379 	mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
380 }
381 
382 /*
383  * Kernel stores and restores PCIe function context before and after performing
384  * FLR respectively. Reconfigure the software and firmware including firmware
385  * redownload.
386  */
387 static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
388 {
389 	struct pcie_service_card *card = pci_get_drvdata(pdev);
390 	struct mwifiex_adapter *adapter = card->adapter;
391 	int ret;
392 
393 	if (!adapter) {
394 		dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
395 			__func__);
396 		return;
397 	}
398 
399 	mwifiex_dbg(adapter, INFO,
400 		    "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
401 		    __func__, pdev->vendor, pdev->device, pdev->revision);
402 
403 	ret = mwifiex_reinit_sw(adapter);
404 	if (ret)
405 		dev_err(&pdev->dev, "reinit failed: %d\n", ret);
406 	else
407 		mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
408 }
409 
410 static const struct pci_error_handlers mwifiex_pcie_err_handler = {
411 	.reset_prepare		= mwifiex_pcie_reset_prepare,
412 	.reset_done		= mwifiex_pcie_reset_done,
413 };
414 
415 #ifdef CONFIG_PM_SLEEP
416 /* Power Management Hooks */
417 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
418 				mwifiex_pcie_resume);
419 #endif
420 
421 /* PCI Device Driver */
422 static struct pci_driver __refdata mwifiex_pcie = {
423 	.name     = "mwifiex_pcie",
424 	.id_table = mwifiex_ids,
425 	.probe    = mwifiex_pcie_probe,
426 	.remove   = mwifiex_pcie_remove,
427 	.driver   = {
428 		.coredump = mwifiex_pcie_coredump,
429 #ifdef CONFIG_PM_SLEEP
430 		.pm = &mwifiex_pcie_pm_ops,
431 #endif
432 	},
433 	.shutdown = mwifiex_pcie_shutdown,
434 	.err_handler = &mwifiex_pcie_err_handler,
435 };
436 
437 /*
438  * This function adds delay loop to ensure FW is awake before proceeding.
439  */
440 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
441 {
442 	int i = 0;
443 
444 	while (mwifiex_pcie_ok_to_access_hw(adapter)) {
445 		i++;
446 		usleep_range(10, 20);
447 		/* 50ms max wait */
448 		if (i == 5000)
449 			break;
450 	}
451 
452 	return;
453 }
454 
455 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
456 					   u32 max_delay_loop_cnt)
457 {
458 	struct pcie_service_card *card = adapter->card;
459 	u8 *buffer;
460 	u32 sleep_cookie, count;
461 	struct sk_buff *cmdrsp = card->cmdrsp_buf;
462 
463 	for (count = 0; count < max_delay_loop_cnt; count++) {
464 		pci_dma_sync_single_for_cpu(card->dev,
465 					    MWIFIEX_SKB_DMA_ADDR(cmdrsp),
466 					    sizeof(sleep_cookie),
467 					    PCI_DMA_FROMDEVICE);
468 		buffer = cmdrsp->data;
469 		sleep_cookie = get_unaligned_le32(buffer);
470 
471 		if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
472 			mwifiex_dbg(adapter, INFO,
473 				    "sleep cookie found at count %d\n", count);
474 			break;
475 		}
476 		pci_dma_sync_single_for_device(card->dev,
477 					       MWIFIEX_SKB_DMA_ADDR(cmdrsp),
478 					       sizeof(sleep_cookie),
479 					       PCI_DMA_FROMDEVICE);
480 		usleep_range(20, 30);
481 	}
482 
483 	if (count >= max_delay_loop_cnt)
484 		mwifiex_dbg(adapter, INFO,
485 			    "max count reached while accessing sleep cookie\n");
486 }
487 
488 /* This function wakes up the card by reading fw_status register. */
489 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
490 {
491 	struct pcie_service_card *card = adapter->card;
492 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
493 
494 	mwifiex_dbg(adapter, EVENT,
495 		    "event: Wakeup device...\n");
496 
497 	if (reg->sleep_cookie)
498 		mwifiex_pcie_dev_wakeup_delay(adapter);
499 
500 	/* Accessing fw_status register will wakeup device */
501 	if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
502 		mwifiex_dbg(adapter, ERROR,
503 			    "Writing fw_status register failed\n");
504 		return -1;
505 	}
506 
507 	if (reg->sleep_cookie) {
508 		mwifiex_pcie_dev_wakeup_delay(adapter);
509 		mwifiex_dbg(adapter, INFO,
510 			    "PCIE wakeup: Setting PS_STATE_AWAKE\n");
511 		adapter->ps_state = PS_STATE_AWAKE;
512 	}
513 
514 	return 0;
515 }
516 
517 /*
518  * This function is called after the card has woken up.
519  *
520  * The card configuration register is reset.
521  */
522 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
523 {
524 	mwifiex_dbg(adapter, CMD,
525 		    "cmd: Wakeup device completed\n");
526 
527 	return 0;
528 }
529 
530 /*
531  * This function disables the host interrupt.
532  *
533  * The host interrupt mask is read, the disable bit is reset and
534  * written back to the card host interrupt mask register.
535  */
536 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
537 {
538 	if (mwifiex_pcie_ok_to_access_hw(adapter)) {
539 		if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
540 				      0x00000000)) {
541 			mwifiex_dbg(adapter, ERROR,
542 				    "Disable host interrupt failed\n");
543 			return -1;
544 		}
545 	}
546 
547 	atomic_set(&adapter->tx_hw_pending, 0);
548 	return 0;
549 }
550 
551 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
552 {
553 	WARN_ON(mwifiex_pcie_disable_host_int(adapter));
554 }
555 
556 /*
557  * This function enables the host interrupt.
558  *
559  * The host interrupt enable mask is written to the card
560  * host interrupt mask register.
561  */
562 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
563 {
564 	if (mwifiex_pcie_ok_to_access_hw(adapter)) {
565 		/* Simply write the mask to the register */
566 		if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
567 				      HOST_INTR_MASK)) {
568 			mwifiex_dbg(adapter, ERROR,
569 				    "Enable host interrupt failed\n");
570 			return -1;
571 		}
572 	}
573 
574 	return 0;
575 }
576 
577 /*
578  * This function initializes TX buffer ring descriptors
579  */
580 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
581 {
582 	struct pcie_service_card *card = adapter->card;
583 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
584 	struct mwifiex_pcie_buf_desc *desc;
585 	struct mwifiex_pfu_buf_desc *desc2;
586 	int i;
587 
588 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
589 		card->tx_buf_list[i] = NULL;
590 		if (reg->pfu_enabled) {
591 			card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
592 					     (sizeof(*desc2) * i);
593 			desc2 = card->txbd_ring[i];
594 			memset(desc2, 0, sizeof(*desc2));
595 		} else {
596 			card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
597 					     (sizeof(*desc) * i);
598 			desc = card->txbd_ring[i];
599 			memset(desc, 0, sizeof(*desc));
600 		}
601 	}
602 
603 	return 0;
604 }
605 
606 /* This function initializes RX buffer ring descriptors. Each SKB is allocated
607  * here and after mapping PCI memory, its physical address is assigned to
608  * PCIE Rx buffer descriptor's physical address.
609  */
610 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
611 {
612 	struct pcie_service_card *card = adapter->card;
613 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
614 	struct sk_buff *skb;
615 	struct mwifiex_pcie_buf_desc *desc;
616 	struct mwifiex_pfu_buf_desc *desc2;
617 	dma_addr_t buf_pa;
618 	int i;
619 
620 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
621 		/* Allocate skb here so that firmware can DMA data from it */
622 		skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
623 						  GFP_KERNEL);
624 		if (!skb) {
625 			mwifiex_dbg(adapter, ERROR,
626 				    "Unable to allocate skb for RX ring.\n");
627 			kfree(card->rxbd_ring_vbase);
628 			return -ENOMEM;
629 		}
630 
631 		if (mwifiex_map_pci_memory(adapter, skb,
632 					   MWIFIEX_RX_DATA_BUF_SIZE,
633 					   PCI_DMA_FROMDEVICE))
634 			return -1;
635 
636 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
637 
638 		mwifiex_dbg(adapter, INFO,
639 			    "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
640 			    skb, skb->len, skb->data, (u32)buf_pa,
641 			    (u32)((u64)buf_pa >> 32));
642 
643 		card->rx_buf_list[i] = skb;
644 		if (reg->pfu_enabled) {
645 			card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
646 					     (sizeof(*desc2) * i);
647 			desc2 = card->rxbd_ring[i];
648 			desc2->paddr = buf_pa;
649 			desc2->len = (u16)skb->len;
650 			desc2->frag_len = (u16)skb->len;
651 			desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
652 			desc2->offset = 0;
653 		} else {
654 			card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
655 					     (sizeof(*desc) * i));
656 			desc = card->rxbd_ring[i];
657 			desc->paddr = buf_pa;
658 			desc->len = (u16)skb->len;
659 			desc->flags = 0;
660 		}
661 	}
662 
663 	return 0;
664 }
665 
666 /* This function initializes event buffer ring descriptors. Each SKB is
667  * allocated here and after mapping PCI memory, its physical address is assigned
668  * to PCIE Rx buffer descriptor's physical address
669  */
670 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
671 {
672 	struct pcie_service_card *card = adapter->card;
673 	struct mwifiex_evt_buf_desc *desc;
674 	struct sk_buff *skb;
675 	dma_addr_t buf_pa;
676 	int i;
677 
678 	for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
679 		/* Allocate skb here so that firmware can DMA data from it */
680 		skb = dev_alloc_skb(MAX_EVENT_SIZE);
681 		if (!skb) {
682 			mwifiex_dbg(adapter, ERROR,
683 				    "Unable to allocate skb for EVENT buf.\n");
684 			kfree(card->evtbd_ring_vbase);
685 			return -ENOMEM;
686 		}
687 		skb_put(skb, MAX_EVENT_SIZE);
688 
689 		if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
690 					   PCI_DMA_FROMDEVICE))
691 			return -1;
692 
693 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
694 
695 		mwifiex_dbg(adapter, EVENT,
696 			    "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
697 			    skb, skb->len, skb->data, (u32)buf_pa,
698 			    (u32)((u64)buf_pa >> 32));
699 
700 		card->evt_buf_list[i] = skb;
701 		card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
702 				      (sizeof(*desc) * i));
703 		desc = card->evtbd_ring[i];
704 		desc->paddr = buf_pa;
705 		desc->len = (u16)skb->len;
706 		desc->flags = 0;
707 	}
708 
709 	return 0;
710 }
711 
712 /* This function cleans up TX buffer rings. If any of the buffer list has valid
713  * SKB address, associated SKB is freed.
714  */
715 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
716 {
717 	struct pcie_service_card *card = adapter->card;
718 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
719 	struct sk_buff *skb;
720 	struct mwifiex_pcie_buf_desc *desc;
721 	struct mwifiex_pfu_buf_desc *desc2;
722 	int i;
723 
724 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
725 		if (reg->pfu_enabled) {
726 			desc2 = card->txbd_ring[i];
727 			if (card->tx_buf_list[i]) {
728 				skb = card->tx_buf_list[i];
729 				mwifiex_unmap_pci_memory(adapter, skb,
730 							 PCI_DMA_TODEVICE);
731 				dev_kfree_skb_any(skb);
732 			}
733 			memset(desc2, 0, sizeof(*desc2));
734 		} else {
735 			desc = card->txbd_ring[i];
736 			if (card->tx_buf_list[i]) {
737 				skb = card->tx_buf_list[i];
738 				mwifiex_unmap_pci_memory(adapter, skb,
739 							 PCI_DMA_TODEVICE);
740 				dev_kfree_skb_any(skb);
741 			}
742 			memset(desc, 0, sizeof(*desc));
743 		}
744 		card->tx_buf_list[i] = NULL;
745 	}
746 
747 	atomic_set(&adapter->tx_hw_pending, 0);
748 	return;
749 }
750 
751 /* This function cleans up RX buffer rings. If any of the buffer list has valid
752  * SKB address, associated SKB is freed.
753  */
754 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
755 {
756 	struct pcie_service_card *card = adapter->card;
757 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
758 	struct mwifiex_pcie_buf_desc *desc;
759 	struct mwifiex_pfu_buf_desc *desc2;
760 	struct sk_buff *skb;
761 	int i;
762 
763 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
764 		if (reg->pfu_enabled) {
765 			desc2 = card->rxbd_ring[i];
766 			if (card->rx_buf_list[i]) {
767 				skb = card->rx_buf_list[i];
768 				mwifiex_unmap_pci_memory(adapter, skb,
769 							 PCI_DMA_FROMDEVICE);
770 				dev_kfree_skb_any(skb);
771 			}
772 			memset(desc2, 0, sizeof(*desc2));
773 		} else {
774 			desc = card->rxbd_ring[i];
775 			if (card->rx_buf_list[i]) {
776 				skb = card->rx_buf_list[i];
777 				mwifiex_unmap_pci_memory(adapter, skb,
778 							 PCI_DMA_FROMDEVICE);
779 				dev_kfree_skb_any(skb);
780 			}
781 			memset(desc, 0, sizeof(*desc));
782 		}
783 		card->rx_buf_list[i] = NULL;
784 	}
785 
786 	return;
787 }
788 
789 /* This function cleans up event buffer rings. If any of the buffer list has
790  * valid SKB address, associated SKB is freed.
791  */
792 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
793 {
794 	struct pcie_service_card *card = adapter->card;
795 	struct mwifiex_evt_buf_desc *desc;
796 	struct sk_buff *skb;
797 	int i;
798 
799 	for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
800 		desc = card->evtbd_ring[i];
801 		if (card->evt_buf_list[i]) {
802 			skb = card->evt_buf_list[i];
803 			mwifiex_unmap_pci_memory(adapter, skb,
804 						 PCI_DMA_FROMDEVICE);
805 			dev_kfree_skb_any(skb);
806 		}
807 		card->evt_buf_list[i] = NULL;
808 		memset(desc, 0, sizeof(*desc));
809 	}
810 
811 	return;
812 }
813 
814 /* This function creates buffer descriptor ring for TX
815  */
816 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
817 {
818 	struct pcie_service_card *card = adapter->card;
819 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
820 
821 	/*
822 	 * driver maintaines the write pointer and firmware maintaines the read
823 	 * pointer. The write pointer starts at 0 (zero) while the read pointer
824 	 * starts at zero with rollover bit set
825 	 */
826 	card->txbd_wrptr = 0;
827 
828 	if (reg->pfu_enabled)
829 		card->txbd_rdptr = 0;
830 	else
831 		card->txbd_rdptr |= reg->tx_rollover_ind;
832 
833 	/* allocate shared memory for the BD ring and divide the same in to
834 	   several descriptors */
835 	if (reg->pfu_enabled)
836 		card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
837 				       MWIFIEX_MAX_TXRX_BD;
838 	else
839 		card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
840 				       MWIFIEX_MAX_TXRX_BD;
841 
842 	mwifiex_dbg(adapter, INFO,
843 		    "info: txbd_ring: Allocating %d bytes\n",
844 		    card->txbd_ring_size);
845 	card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
846 						     card->txbd_ring_size,
847 						     &card->txbd_ring_pbase);
848 	if (!card->txbd_ring_vbase) {
849 		mwifiex_dbg(adapter, ERROR,
850 			    "allocate consistent memory (%d bytes) failed!\n",
851 			    card->txbd_ring_size);
852 		return -ENOMEM;
853 	}
854 	mwifiex_dbg(adapter, DATA,
855 		    "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
856 		    card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
857 		    (u32)((u64)card->txbd_ring_pbase >> 32),
858 		    card->txbd_ring_size);
859 
860 	return mwifiex_init_txq_ring(adapter);
861 }
862 
863 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
864 {
865 	struct pcie_service_card *card = adapter->card;
866 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
867 
868 	mwifiex_cleanup_txq_ring(adapter);
869 
870 	if (card->txbd_ring_vbase)
871 		pci_free_consistent(card->dev, card->txbd_ring_size,
872 				    card->txbd_ring_vbase,
873 				    card->txbd_ring_pbase);
874 	card->txbd_ring_size = 0;
875 	card->txbd_wrptr = 0;
876 	card->txbd_rdptr = 0 | reg->tx_rollover_ind;
877 	card->txbd_ring_vbase = NULL;
878 	card->txbd_ring_pbase = 0;
879 
880 	return 0;
881 }
882 
883 /*
884  * This function creates buffer descriptor ring for RX
885  */
886 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
887 {
888 	struct pcie_service_card *card = adapter->card;
889 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
890 
891 	/*
892 	 * driver maintaines the read pointer and firmware maintaines the write
893 	 * pointer. The write pointer starts at 0 (zero) while the read pointer
894 	 * starts at zero with rollover bit set
895 	 */
896 	card->rxbd_wrptr = 0;
897 	card->rxbd_rdptr = reg->rx_rollover_ind;
898 
899 	if (reg->pfu_enabled)
900 		card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
901 				       MWIFIEX_MAX_TXRX_BD;
902 	else
903 		card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
904 				       MWIFIEX_MAX_TXRX_BD;
905 
906 	mwifiex_dbg(adapter, INFO,
907 		    "info: rxbd_ring: Allocating %d bytes\n",
908 		    card->rxbd_ring_size);
909 	card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
910 						     card->rxbd_ring_size,
911 						     &card->rxbd_ring_pbase);
912 	if (!card->rxbd_ring_vbase) {
913 		mwifiex_dbg(adapter, ERROR,
914 			    "allocate consistent memory (%d bytes) failed!\n",
915 			    card->rxbd_ring_size);
916 		return -ENOMEM;
917 	}
918 
919 	mwifiex_dbg(adapter, DATA,
920 		    "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
921 		    card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
922 		    (u32)((u64)card->rxbd_ring_pbase >> 32),
923 		    card->rxbd_ring_size);
924 
925 	return mwifiex_init_rxq_ring(adapter);
926 }
927 
928 /*
929  * This function deletes Buffer descriptor ring for RX
930  */
931 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
932 {
933 	struct pcie_service_card *card = adapter->card;
934 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
935 
936 	mwifiex_cleanup_rxq_ring(adapter);
937 
938 	if (card->rxbd_ring_vbase)
939 		pci_free_consistent(card->dev, card->rxbd_ring_size,
940 				    card->rxbd_ring_vbase,
941 				    card->rxbd_ring_pbase);
942 	card->rxbd_ring_size = 0;
943 	card->rxbd_wrptr = 0;
944 	card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
945 	card->rxbd_ring_vbase = NULL;
946 	card->rxbd_ring_pbase = 0;
947 
948 	return 0;
949 }
950 
951 /*
952  * This function creates buffer descriptor ring for Events
953  */
954 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
955 {
956 	struct pcie_service_card *card = adapter->card;
957 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
958 
959 	/*
960 	 * driver maintaines the read pointer and firmware maintaines the write
961 	 * pointer. The write pointer starts at 0 (zero) while the read pointer
962 	 * starts at zero with rollover bit set
963 	 */
964 	card->evtbd_wrptr = 0;
965 	card->evtbd_rdptr = reg->evt_rollover_ind;
966 
967 	card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
968 				MWIFIEX_MAX_EVT_BD;
969 
970 	mwifiex_dbg(adapter, INFO,
971 		    "info: evtbd_ring: Allocating %d bytes\n",
972 		card->evtbd_ring_size);
973 	card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
974 						      card->evtbd_ring_size,
975 						      &card->evtbd_ring_pbase);
976 	if (!card->evtbd_ring_vbase) {
977 		mwifiex_dbg(adapter, ERROR,
978 			    "allocate consistent memory (%d bytes) failed!\n",
979 			    card->evtbd_ring_size);
980 		return -ENOMEM;
981 	}
982 
983 	mwifiex_dbg(adapter, EVENT,
984 		    "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
985 		    card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
986 		    (u32)((u64)card->evtbd_ring_pbase >> 32),
987 		    card->evtbd_ring_size);
988 
989 	return mwifiex_pcie_init_evt_ring(adapter);
990 }
991 
992 /*
993  * This function deletes Buffer descriptor ring for Events
994  */
995 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
996 {
997 	struct pcie_service_card *card = adapter->card;
998 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
999 
1000 	mwifiex_cleanup_evt_ring(adapter);
1001 
1002 	if (card->evtbd_ring_vbase)
1003 		pci_free_consistent(card->dev, card->evtbd_ring_size,
1004 				    card->evtbd_ring_vbase,
1005 				    card->evtbd_ring_pbase);
1006 	card->evtbd_wrptr = 0;
1007 	card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
1008 	card->evtbd_ring_size = 0;
1009 	card->evtbd_ring_vbase = NULL;
1010 	card->evtbd_ring_pbase = 0;
1011 
1012 	return 0;
1013 }
1014 
1015 /*
1016  * This function allocates a buffer for CMDRSP
1017  */
1018 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1019 {
1020 	struct pcie_service_card *card = adapter->card;
1021 	struct sk_buff *skb;
1022 
1023 	/* Allocate memory for receiving command response data */
1024 	skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1025 	if (!skb) {
1026 		mwifiex_dbg(adapter, ERROR,
1027 			    "Unable to allocate skb for command response data.\n");
1028 		return -ENOMEM;
1029 	}
1030 	skb_put(skb, MWIFIEX_UPLD_SIZE);
1031 	if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1032 				   PCI_DMA_FROMDEVICE))
1033 		return -1;
1034 
1035 	card->cmdrsp_buf = skb;
1036 
1037 	return 0;
1038 }
1039 
1040 /*
1041  * This function deletes a buffer for CMDRSP
1042  */
1043 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1044 {
1045 	struct pcie_service_card *card;
1046 
1047 	if (!adapter)
1048 		return 0;
1049 
1050 	card = adapter->card;
1051 
1052 	if (card && card->cmdrsp_buf) {
1053 		mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1054 					 PCI_DMA_FROMDEVICE);
1055 		dev_kfree_skb_any(card->cmdrsp_buf);
1056 		card->cmdrsp_buf = NULL;
1057 	}
1058 
1059 	if (card && card->cmd_buf) {
1060 		mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1061 					 PCI_DMA_TODEVICE);
1062 		dev_kfree_skb_any(card->cmd_buf);
1063 		card->cmd_buf = NULL;
1064 	}
1065 	return 0;
1066 }
1067 
1068 /*
1069  * This function allocates a buffer for sleep cookie
1070  */
1071 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1072 {
1073 	struct pcie_service_card *card = adapter->card;
1074 	u32 tmp;
1075 
1076 	card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
1077 						     &card->sleep_cookie_pbase);
1078 	if (!card->sleep_cookie_vbase) {
1079 		mwifiex_dbg(adapter, ERROR,
1080 			    "pci_alloc_consistent failed!\n");
1081 		return -ENOMEM;
1082 	}
1083 	/* Init val of Sleep Cookie */
1084 	tmp = FW_AWAKE_COOKIE;
1085 	put_unaligned(tmp, card->sleep_cookie_vbase);
1086 
1087 	mwifiex_dbg(adapter, INFO,
1088 		    "alloc_scook: sleep cookie=0x%x\n",
1089 		    get_unaligned(card->sleep_cookie_vbase));
1090 
1091 	return 0;
1092 }
1093 
1094 /*
1095  * This function deletes buffer for sleep cookie
1096  */
1097 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1098 {
1099 	struct pcie_service_card *card;
1100 
1101 	if (!adapter)
1102 		return 0;
1103 
1104 	card = adapter->card;
1105 
1106 	if (card && card->sleep_cookie_vbase) {
1107 		pci_free_consistent(card->dev, sizeof(u32),
1108 				    card->sleep_cookie_vbase,
1109 				    card->sleep_cookie_pbase);
1110 		card->sleep_cookie_vbase = NULL;
1111 	}
1112 
1113 	return 0;
1114 }
1115 
1116 /* This function flushes the TX buffer descriptor ring
1117  * This function defined as handler is also called while cleaning TXRX
1118  * during disconnect/ bss stop.
1119  */
1120 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1121 {
1122 	struct pcie_service_card *card = adapter->card;
1123 
1124 	if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1125 		card->txbd_flush = 1;
1126 		/* write pointer already set at last send
1127 		 * send dnld-rdy intr again, wait for completion.
1128 		 */
1129 		if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1130 				      CPU_INTR_DNLD_RDY)) {
1131 			mwifiex_dbg(adapter, ERROR,
1132 				    "failed to assert dnld-rdy interrupt.\n");
1133 			return -1;
1134 		}
1135 	}
1136 	return 0;
1137 }
1138 
1139 /*
1140  * This function unmaps and frees downloaded data buffer
1141  */
1142 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1143 {
1144 	struct sk_buff *skb;
1145 	u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1146 	struct mwifiex_pcie_buf_desc *desc;
1147 	struct mwifiex_pfu_buf_desc *desc2;
1148 	struct pcie_service_card *card = adapter->card;
1149 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1150 
1151 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1152 		mwifiex_pm_wakeup_card(adapter);
1153 
1154 	/* Read the TX ring read pointer set by firmware */
1155 	if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1156 		mwifiex_dbg(adapter, ERROR,
1157 			    "SEND COMP: failed to read reg->tx_rdptr\n");
1158 		return -1;
1159 	}
1160 
1161 	mwifiex_dbg(adapter, DATA,
1162 		    "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1163 		    card->txbd_rdptr, rdptr);
1164 
1165 	num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1166 	/* free from previous txbd_rdptr to current txbd_rdptr */
1167 	while (((card->txbd_rdptr & reg->tx_mask) !=
1168 		(rdptr & reg->tx_mask)) ||
1169 	       ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1170 		(rdptr & reg->tx_rollover_ind))) {
1171 		wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1172 			    reg->tx_start_ptr;
1173 
1174 		skb = card->tx_buf_list[wrdoneidx];
1175 
1176 		if (skb) {
1177 			mwifiex_dbg(adapter, DATA,
1178 				    "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1179 				    skb, wrdoneidx);
1180 			mwifiex_unmap_pci_memory(adapter, skb,
1181 						 PCI_DMA_TODEVICE);
1182 
1183 			unmap_count++;
1184 
1185 			if (card->txbd_flush)
1186 				mwifiex_write_data_complete(adapter, skb, 0,
1187 							    -1);
1188 			else
1189 				mwifiex_write_data_complete(adapter, skb, 0, 0);
1190 			atomic_dec(&adapter->tx_hw_pending);
1191 		}
1192 
1193 		card->tx_buf_list[wrdoneidx] = NULL;
1194 
1195 		if (reg->pfu_enabled) {
1196 			desc2 = card->txbd_ring[wrdoneidx];
1197 			memset(desc2, 0, sizeof(*desc2));
1198 		} else {
1199 			desc = card->txbd_ring[wrdoneidx];
1200 			memset(desc, 0, sizeof(*desc));
1201 		}
1202 		switch (card->dev->device) {
1203 		case PCIE_DEVICE_ID_MARVELL_88W8766P:
1204 			card->txbd_rdptr++;
1205 			break;
1206 		case PCIE_DEVICE_ID_MARVELL_88W8897:
1207 		case PCIE_DEVICE_ID_MARVELL_88W8997:
1208 			card->txbd_rdptr += reg->ring_tx_start_ptr;
1209 			break;
1210 		}
1211 
1212 
1213 		if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1214 			card->txbd_rdptr = ((card->txbd_rdptr &
1215 					     reg->tx_rollover_ind) ^
1216 					     reg->tx_rollover_ind);
1217 	}
1218 
1219 	if (unmap_count)
1220 		adapter->data_sent = false;
1221 
1222 	if (card->txbd_flush) {
1223 		if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1224 			card->txbd_flush = 0;
1225 		else
1226 			mwifiex_clean_pcie_ring_buf(adapter);
1227 	}
1228 
1229 	return 0;
1230 }
1231 
1232 /* This function sends data buffer to device. First 4 bytes of payload
1233  * are filled with payload length and payload type. Then this payload
1234  * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1235  * Download ready interrupt to FW is deffered if Tx ring is not full and
1236  * additional payload can be accomodated.
1237  * Caller must ensure tx_param parameter to this function is not NULL.
1238  */
1239 static int
1240 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1241 		       struct mwifiex_tx_param *tx_param)
1242 {
1243 	struct pcie_service_card *card = adapter->card;
1244 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1245 	u32 wrindx, num_tx_buffs, rx_val;
1246 	int ret;
1247 	dma_addr_t buf_pa;
1248 	struct mwifiex_pcie_buf_desc *desc = NULL;
1249 	struct mwifiex_pfu_buf_desc *desc2 = NULL;
1250 
1251 	if (!(skb->data && skb->len)) {
1252 		mwifiex_dbg(adapter, ERROR,
1253 			    "%s(): invalid parameter <%p, %#x>\n",
1254 			    __func__, skb->data, skb->len);
1255 		return -1;
1256 	}
1257 
1258 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1259 		mwifiex_pm_wakeup_card(adapter);
1260 
1261 	num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1262 	mwifiex_dbg(adapter, DATA,
1263 		    "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1264 		card->txbd_rdptr, card->txbd_wrptr);
1265 	if (mwifiex_pcie_txbd_not_full(card)) {
1266 		u8 *payload;
1267 
1268 		adapter->data_sent = true;
1269 		payload = skb->data;
1270 		put_unaligned_le16((u16)skb->len, payload + 0);
1271 		put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1272 
1273 		if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1274 					   PCI_DMA_TODEVICE))
1275 			return -1;
1276 
1277 		wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1278 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1279 		card->tx_buf_list[wrindx] = skb;
1280 		atomic_inc(&adapter->tx_hw_pending);
1281 
1282 		if (reg->pfu_enabled) {
1283 			desc2 = card->txbd_ring[wrindx];
1284 			desc2->paddr = buf_pa;
1285 			desc2->len = (u16)skb->len;
1286 			desc2->frag_len = (u16)skb->len;
1287 			desc2->offset = 0;
1288 			desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1289 					 MWIFIEX_BD_FLAG_LAST_DESC;
1290 		} else {
1291 			desc = card->txbd_ring[wrindx];
1292 			desc->paddr = buf_pa;
1293 			desc->len = (u16)skb->len;
1294 			desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1295 				      MWIFIEX_BD_FLAG_LAST_DESC;
1296 		}
1297 
1298 		switch (card->dev->device) {
1299 		case PCIE_DEVICE_ID_MARVELL_88W8766P:
1300 			card->txbd_wrptr++;
1301 			break;
1302 		case PCIE_DEVICE_ID_MARVELL_88W8897:
1303 		case PCIE_DEVICE_ID_MARVELL_88W8997:
1304 			card->txbd_wrptr += reg->ring_tx_start_ptr;
1305 			break;
1306 		}
1307 
1308 		if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1309 			card->txbd_wrptr = ((card->txbd_wrptr &
1310 						reg->tx_rollover_ind) ^
1311 						reg->tx_rollover_ind);
1312 
1313 		rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1314 		/* Write the TX ring write pointer in to reg->tx_wrptr */
1315 		if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1316 				      card->txbd_wrptr | rx_val)) {
1317 			mwifiex_dbg(adapter, ERROR,
1318 				    "SEND DATA: failed to write reg->tx_wrptr\n");
1319 			ret = -1;
1320 			goto done_unmap;
1321 		}
1322 		if ((mwifiex_pcie_txbd_not_full(card)) &&
1323 		    tx_param->next_pkt_len) {
1324 			/* have more packets and TxBD still can hold more */
1325 			mwifiex_dbg(adapter, DATA,
1326 				    "SEND DATA: delay dnld-rdy interrupt.\n");
1327 			adapter->data_sent = false;
1328 		} else {
1329 			/* Send the TX ready interrupt */
1330 			if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1331 					      CPU_INTR_DNLD_RDY)) {
1332 				mwifiex_dbg(adapter, ERROR,
1333 					    "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1334 				ret = -1;
1335 				goto done_unmap;
1336 			}
1337 		}
1338 		mwifiex_dbg(adapter, DATA,
1339 			    "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1340 			    "%#x> and sent packet to firmware successfully\n",
1341 			    card->txbd_rdptr, card->txbd_wrptr);
1342 	} else {
1343 		mwifiex_dbg(adapter, DATA,
1344 			    "info: TX Ring full, can't send packets to fw\n");
1345 		adapter->data_sent = true;
1346 		/* Send the TX ready interrupt */
1347 		if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1348 				      CPU_INTR_DNLD_RDY))
1349 			mwifiex_dbg(adapter, ERROR,
1350 				    "SEND DATA: failed to assert door-bell intr\n");
1351 		return -EBUSY;
1352 	}
1353 
1354 	return -EINPROGRESS;
1355 done_unmap:
1356 	mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1357 	card->tx_buf_list[wrindx] = NULL;
1358 	atomic_dec(&adapter->tx_hw_pending);
1359 	if (reg->pfu_enabled)
1360 		memset(desc2, 0, sizeof(*desc2));
1361 	else
1362 		memset(desc, 0, sizeof(*desc));
1363 
1364 	return ret;
1365 }
1366 
1367 /*
1368  * This function handles received buffer ring and
1369  * dispatches packets to upper
1370  */
1371 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1372 {
1373 	struct pcie_service_card *card = adapter->card;
1374 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1375 	u32 wrptr, rd_index, tx_val;
1376 	dma_addr_t buf_pa;
1377 	int ret = 0;
1378 	struct sk_buff *skb_tmp = NULL;
1379 	struct mwifiex_pcie_buf_desc *desc;
1380 	struct mwifiex_pfu_buf_desc *desc2;
1381 
1382 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1383 		mwifiex_pm_wakeup_card(adapter);
1384 
1385 	/* Read the RX ring Write pointer set by firmware */
1386 	if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1387 		mwifiex_dbg(adapter, ERROR,
1388 			    "RECV DATA: failed to read reg->rx_wrptr\n");
1389 		ret = -1;
1390 		goto done;
1391 	}
1392 	card->rxbd_wrptr = wrptr;
1393 
1394 	while (((wrptr & reg->rx_mask) !=
1395 		(card->rxbd_rdptr & reg->rx_mask)) ||
1396 	       ((wrptr & reg->rx_rollover_ind) ==
1397 		(card->rxbd_rdptr & reg->rx_rollover_ind))) {
1398 		struct sk_buff *skb_data;
1399 		u16 rx_len;
1400 
1401 		rd_index = card->rxbd_rdptr & reg->rx_mask;
1402 		skb_data = card->rx_buf_list[rd_index];
1403 
1404 		/* If skb allocation was failed earlier for Rx packet,
1405 		 * rx_buf_list[rd_index] would have been left with a NULL.
1406 		 */
1407 		if (!skb_data)
1408 			return -ENOMEM;
1409 
1410 		mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1411 		card->rx_buf_list[rd_index] = NULL;
1412 
1413 		/* Get data length from interface header -
1414 		 * first 2 bytes for len, next 2 bytes is for type
1415 		 */
1416 		rx_len = get_unaligned_le16(skb_data->data);
1417 		if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1418 			    rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1419 			mwifiex_dbg(adapter, ERROR,
1420 				    "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1421 				    rx_len, card->rxbd_rdptr, wrptr);
1422 			dev_kfree_skb_any(skb_data);
1423 		} else {
1424 			skb_put(skb_data, rx_len);
1425 			mwifiex_dbg(adapter, DATA,
1426 				    "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1427 				    card->rxbd_rdptr, wrptr, rx_len);
1428 			skb_pull(skb_data, adapter->intf_hdr_len);
1429 			if (adapter->rx_work_enabled) {
1430 				skb_queue_tail(&adapter->rx_data_q, skb_data);
1431 				adapter->data_received = true;
1432 				atomic_inc(&adapter->rx_pending);
1433 			} else {
1434 				mwifiex_handle_rx_packet(adapter, skb_data);
1435 			}
1436 		}
1437 
1438 		skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1439 						      GFP_KERNEL);
1440 		if (!skb_tmp) {
1441 			mwifiex_dbg(adapter, ERROR,
1442 				    "Unable to allocate skb.\n");
1443 			return -ENOMEM;
1444 		}
1445 
1446 		if (mwifiex_map_pci_memory(adapter, skb_tmp,
1447 					   MWIFIEX_RX_DATA_BUF_SIZE,
1448 					   PCI_DMA_FROMDEVICE))
1449 			return -1;
1450 
1451 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1452 
1453 		mwifiex_dbg(adapter, INFO,
1454 			    "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1455 			    skb_tmp, rd_index);
1456 		card->rx_buf_list[rd_index] = skb_tmp;
1457 
1458 		if (reg->pfu_enabled) {
1459 			desc2 = card->rxbd_ring[rd_index];
1460 			desc2->paddr = buf_pa;
1461 			desc2->len = skb_tmp->len;
1462 			desc2->frag_len = skb_tmp->len;
1463 			desc2->offset = 0;
1464 			desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1465 		} else {
1466 			desc = card->rxbd_ring[rd_index];
1467 			desc->paddr = buf_pa;
1468 			desc->len = skb_tmp->len;
1469 			desc->flags = 0;
1470 		}
1471 
1472 		if ((++card->rxbd_rdptr & reg->rx_mask) ==
1473 							MWIFIEX_MAX_TXRX_BD) {
1474 			card->rxbd_rdptr = ((card->rxbd_rdptr &
1475 					     reg->rx_rollover_ind) ^
1476 					     reg->rx_rollover_ind);
1477 		}
1478 		mwifiex_dbg(adapter, DATA,
1479 			    "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1480 			    card->rxbd_rdptr, wrptr);
1481 
1482 		tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1483 		/* Write the RX ring read pointer in to reg->rx_rdptr */
1484 		if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1485 				      card->rxbd_rdptr | tx_val)) {
1486 			mwifiex_dbg(adapter, DATA,
1487 				    "RECV DATA: failed to write reg->rx_rdptr\n");
1488 			ret = -1;
1489 			goto done;
1490 		}
1491 
1492 		/* Read the RX ring Write pointer set by firmware */
1493 		if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1494 			mwifiex_dbg(adapter, ERROR,
1495 				    "RECV DATA: failed to read reg->rx_wrptr\n");
1496 			ret = -1;
1497 			goto done;
1498 		}
1499 		mwifiex_dbg(adapter, DATA,
1500 			    "info: RECV DATA: Rcvd packet from fw successfully\n");
1501 		card->rxbd_wrptr = wrptr;
1502 	}
1503 
1504 done:
1505 	return ret;
1506 }
1507 
1508 /*
1509  * This function downloads the boot command to device
1510  */
1511 static int
1512 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1513 {
1514 	dma_addr_t buf_pa;
1515 	struct pcie_service_card *card = adapter->card;
1516 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1517 
1518 	if (!(skb->data && skb->len)) {
1519 		mwifiex_dbg(adapter, ERROR,
1520 			    "Invalid parameter in %s <%p. len %d>\n",
1521 			    __func__, skb->data, skb->len);
1522 		return -1;
1523 	}
1524 
1525 	if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1526 		return -1;
1527 
1528 	buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1529 
1530 	/* Write the lower 32bits of the physical address to low command
1531 	 * address scratch register
1532 	 */
1533 	if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1534 		mwifiex_dbg(adapter, ERROR,
1535 			    "%s: failed to write download command to boot code.\n",
1536 			    __func__);
1537 		mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1538 		return -1;
1539 	}
1540 
1541 	/* Write the upper 32bits of the physical address to high command
1542 	 * address scratch register
1543 	 */
1544 	if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1545 			      (u32)((u64)buf_pa >> 32))) {
1546 		mwifiex_dbg(adapter, ERROR,
1547 			    "%s: failed to write download command to boot code.\n",
1548 			    __func__);
1549 		mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1550 		return -1;
1551 	}
1552 
1553 	/* Write the command length to cmd_size scratch register */
1554 	if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1555 		mwifiex_dbg(adapter, ERROR,
1556 			    "%s: failed to write command len to cmd_size scratch reg\n",
1557 			    __func__);
1558 		mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1559 		return -1;
1560 	}
1561 
1562 	/* Ring the door bell */
1563 	if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1564 			      CPU_INTR_DOOR_BELL)) {
1565 		mwifiex_dbg(adapter, ERROR,
1566 			    "%s: failed to assert door-bell intr\n", __func__);
1567 		mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1568 		return -1;
1569 	}
1570 
1571 	return 0;
1572 }
1573 
1574 /* This function init rx port in firmware which in turn enables to receive data
1575  * from device before transmitting any packet.
1576  */
1577 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1578 {
1579 	struct pcie_service_card *card = adapter->card;
1580 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1581 	int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1582 
1583 	/* Write the RX ring read pointer in to reg->rx_rdptr */
1584 	if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1585 			      tx_wrap)) {
1586 		mwifiex_dbg(adapter, ERROR,
1587 			    "RECV DATA: failed to write reg->rx_rdptr\n");
1588 		return -1;
1589 	}
1590 	return 0;
1591 }
1592 
1593 /* This function downloads commands to the device
1594  */
1595 static int
1596 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1597 {
1598 	struct pcie_service_card *card = adapter->card;
1599 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1600 	int ret = 0;
1601 	dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1602 	u8 *payload = (u8 *)skb->data;
1603 
1604 	if (!(skb->data && skb->len)) {
1605 		mwifiex_dbg(adapter, ERROR,
1606 			    "Invalid parameter in %s <%p, %#x>\n",
1607 			    __func__, skb->data, skb->len);
1608 		return -1;
1609 	}
1610 
1611 	/* Make sure a command response buffer is available */
1612 	if (!card->cmdrsp_buf) {
1613 		mwifiex_dbg(adapter, ERROR,
1614 			    "No response buffer available, send command failed\n");
1615 		return -EBUSY;
1616 	}
1617 
1618 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1619 		mwifiex_pm_wakeup_card(adapter);
1620 
1621 	adapter->cmd_sent = true;
1622 
1623 	put_unaligned_le16((u16)skb->len, &payload[0]);
1624 	put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1625 
1626 	if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1627 		return -1;
1628 
1629 	card->cmd_buf = skb;
1630 	/*
1631 	 * Need to keep a reference, since core driver might free up this
1632 	 * buffer before we've unmapped it.
1633 	 */
1634 	skb_get(skb);
1635 
1636 	/* To send a command, the driver will:
1637 		1. Write the 64bit physical address of the data buffer to
1638 		   cmd response address low  + cmd response address high
1639 		2. Ring the door bell (i.e. set the door bell interrupt)
1640 
1641 		In response to door bell interrupt, the firmware will perform
1642 		the DMA of the command packet (first header to obtain the total
1643 		length and then rest of the command).
1644 	*/
1645 
1646 	if (card->cmdrsp_buf) {
1647 		cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1648 		/* Write the lower 32bits of the cmdrsp buffer physical
1649 		   address */
1650 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1651 				      (u32)cmdrsp_buf_pa)) {
1652 			mwifiex_dbg(adapter, ERROR,
1653 				    "Failed to write download cmd to boot code.\n");
1654 			ret = -1;
1655 			goto done;
1656 		}
1657 		/* Write the upper 32bits of the cmdrsp buffer physical
1658 		   address */
1659 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1660 				      (u32)((u64)cmdrsp_buf_pa >> 32))) {
1661 			mwifiex_dbg(adapter, ERROR,
1662 				    "Failed to write download cmd to boot code.\n");
1663 			ret = -1;
1664 			goto done;
1665 		}
1666 	}
1667 
1668 	cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1669 	/* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1670 	if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1671 			      (u32)cmd_buf_pa)) {
1672 		mwifiex_dbg(adapter, ERROR,
1673 			    "Failed to write download cmd to boot code.\n");
1674 		ret = -1;
1675 		goto done;
1676 	}
1677 	/* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1678 	if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1679 			      (u32)((u64)cmd_buf_pa >> 32))) {
1680 		mwifiex_dbg(adapter, ERROR,
1681 			    "Failed to write download cmd to boot code.\n");
1682 		ret = -1;
1683 		goto done;
1684 	}
1685 
1686 	/* Write the command length to reg->cmd_size */
1687 	if (mwifiex_write_reg(adapter, reg->cmd_size,
1688 			      card->cmd_buf->len)) {
1689 		mwifiex_dbg(adapter, ERROR,
1690 			    "Failed to write cmd len to reg->cmd_size\n");
1691 		ret = -1;
1692 		goto done;
1693 	}
1694 
1695 	/* Ring the door bell */
1696 	if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1697 			      CPU_INTR_DOOR_BELL)) {
1698 		mwifiex_dbg(adapter, ERROR,
1699 			    "Failed to assert door-bell intr\n");
1700 		ret = -1;
1701 		goto done;
1702 	}
1703 
1704 done:
1705 	if (ret)
1706 		adapter->cmd_sent = false;
1707 
1708 	return 0;
1709 }
1710 
1711 /*
1712  * This function handles command complete interrupt
1713  */
1714 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1715 {
1716 	struct pcie_service_card *card = adapter->card;
1717 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1718 	struct sk_buff *skb = card->cmdrsp_buf;
1719 	int count = 0;
1720 	u16 rx_len;
1721 
1722 	mwifiex_dbg(adapter, CMD,
1723 		    "info: Rx CMD Response\n");
1724 
1725 	if (adapter->curr_cmd)
1726 		mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1727 	else
1728 		pci_dma_sync_single_for_cpu(card->dev,
1729 					    MWIFIEX_SKB_DMA_ADDR(skb),
1730 					    MWIFIEX_UPLD_SIZE,
1731 					    PCI_DMA_FROMDEVICE);
1732 
1733 	/* Unmap the command as a response has been received. */
1734 	if (card->cmd_buf) {
1735 		mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1736 					 PCI_DMA_TODEVICE);
1737 		dev_kfree_skb_any(card->cmd_buf);
1738 		card->cmd_buf = NULL;
1739 	}
1740 
1741 	rx_len = get_unaligned_le16(skb->data);
1742 	skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1743 	skb_trim(skb, rx_len);
1744 
1745 	if (!adapter->curr_cmd) {
1746 		if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1747 			pci_dma_sync_single_for_device(card->dev,
1748 						MWIFIEX_SKB_DMA_ADDR(skb),
1749 						MWIFIEX_SLEEP_COOKIE_SIZE,
1750 						PCI_DMA_FROMDEVICE);
1751 			if (mwifiex_write_reg(adapter,
1752 					      PCIE_CPU_INT_EVENT,
1753 					      CPU_INTR_SLEEP_CFM_DONE)) {
1754 				mwifiex_dbg(adapter, ERROR,
1755 					    "Write register failed\n");
1756 				return -1;
1757 			}
1758 			mwifiex_delay_for_sleep_cookie(adapter,
1759 						       MWIFIEX_MAX_DELAY_COUNT);
1760 			mwifiex_unmap_pci_memory(adapter, skb,
1761 						 PCI_DMA_FROMDEVICE);
1762 			skb_pull(skb, adapter->intf_hdr_len);
1763 			while (reg->sleep_cookie && (count++ < 10) &&
1764 			       mwifiex_pcie_ok_to_access_hw(adapter))
1765 				usleep_range(50, 60);
1766 			mwifiex_pcie_enable_host_int(adapter);
1767 			mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1768 							   skb->len);
1769 		} else {
1770 			mwifiex_dbg(adapter, ERROR,
1771 				    "There is no command but got cmdrsp\n");
1772 		}
1773 		memcpy(adapter->upld_buf, skb->data,
1774 		       min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1775 		skb_push(skb, adapter->intf_hdr_len);
1776 		if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1777 					   PCI_DMA_FROMDEVICE))
1778 			return -1;
1779 	} else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1780 		skb_pull(skb, adapter->intf_hdr_len);
1781 		adapter->curr_cmd->resp_skb = skb;
1782 		adapter->cmd_resp_received = true;
1783 		/* Take the pointer and set it to CMD node and will
1784 		   return in the response complete callback */
1785 		card->cmdrsp_buf = NULL;
1786 
1787 		/* Clear the cmd-rsp buffer address in scratch registers. This
1788 		   will prevent firmware from writing to the same response
1789 		   buffer again. */
1790 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1791 			mwifiex_dbg(adapter, ERROR,
1792 				    "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1793 			return -1;
1794 		}
1795 		/* Write the upper 32bits of the cmdrsp buffer physical
1796 		   address */
1797 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1798 			mwifiex_dbg(adapter, ERROR,
1799 				    "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1800 			return -1;
1801 		}
1802 	}
1803 
1804 	return 0;
1805 }
1806 
1807 /*
1808  * Command Response processing complete handler
1809  */
1810 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1811 					struct sk_buff *skb)
1812 {
1813 	struct pcie_service_card *card = adapter->card;
1814 
1815 	if (skb) {
1816 		card->cmdrsp_buf = skb;
1817 		skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
1818 		if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1819 					   PCI_DMA_FROMDEVICE))
1820 			return -1;
1821 	}
1822 
1823 	return 0;
1824 }
1825 
1826 /*
1827  * This function handles firmware event ready interrupt
1828  */
1829 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1830 {
1831 	struct pcie_service_card *card = adapter->card;
1832 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1833 	u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1834 	u32 wrptr, event;
1835 	struct mwifiex_evt_buf_desc *desc;
1836 
1837 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1838 		mwifiex_pm_wakeup_card(adapter);
1839 
1840 	if (adapter->event_received) {
1841 		mwifiex_dbg(adapter, EVENT,
1842 			    "info: Event being processed,\t"
1843 			    "do not process this interrupt just yet\n");
1844 		return 0;
1845 	}
1846 
1847 	if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1848 		mwifiex_dbg(adapter, ERROR,
1849 			    "info: Invalid read pointer...\n");
1850 		return -1;
1851 	}
1852 
1853 	/* Read the event ring write pointer set by firmware */
1854 	if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1855 		mwifiex_dbg(adapter, ERROR,
1856 			    "EventReady: failed to read reg->evt_wrptr\n");
1857 		return -1;
1858 	}
1859 
1860 	mwifiex_dbg(adapter, EVENT,
1861 		    "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1862 		    card->evtbd_rdptr, wrptr);
1863 	if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1864 					      & MWIFIEX_EVTBD_MASK)) ||
1865 	    ((wrptr & reg->evt_rollover_ind) ==
1866 	     (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1867 		struct sk_buff *skb_cmd;
1868 		__le16 data_len = 0;
1869 		u16 evt_len;
1870 
1871 		mwifiex_dbg(adapter, INFO,
1872 			    "info: Read Index: %d\n", rdptr);
1873 		skb_cmd = card->evt_buf_list[rdptr];
1874 		mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1875 
1876 		/* Take the pointer and set it to event pointer in adapter
1877 		   and will return back after event handling callback */
1878 		card->evt_buf_list[rdptr] = NULL;
1879 		desc = card->evtbd_ring[rdptr];
1880 		memset(desc, 0, sizeof(*desc));
1881 
1882 		event = get_unaligned_le32(
1883 			&skb_cmd->data[adapter->intf_hdr_len]);
1884 		adapter->event_cause = event;
1885 		/* The first 4bytes will be the event transfer header
1886 		   len is 2 bytes followed by type which is 2 bytes */
1887 		memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1888 		evt_len = le16_to_cpu(data_len);
1889 		skb_trim(skb_cmd, evt_len);
1890 		skb_pull(skb_cmd, adapter->intf_hdr_len);
1891 		mwifiex_dbg(adapter, EVENT,
1892 			    "info: Event length: %d\n", evt_len);
1893 
1894 		if (evt_len > MWIFIEX_EVENT_HEADER_LEN &&
1895 		    evt_len < MAX_EVENT_SIZE)
1896 			memcpy(adapter->event_body, skb_cmd->data +
1897 			       MWIFIEX_EVENT_HEADER_LEN, evt_len -
1898 			       MWIFIEX_EVENT_HEADER_LEN);
1899 
1900 		adapter->event_received = true;
1901 		adapter->event_skb = skb_cmd;
1902 
1903 		/* Do not update the event read pointer here, wait till the
1904 		   buffer is released. This is just to make things simpler,
1905 		   we need to find a better method of managing these buffers.
1906 		*/
1907 	} else {
1908 		if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1909 				      CPU_INTR_EVENT_DONE)) {
1910 			mwifiex_dbg(adapter, ERROR,
1911 				    "Write register failed\n");
1912 			return -1;
1913 		}
1914 	}
1915 
1916 	return 0;
1917 }
1918 
1919 /*
1920  * Event processing complete handler
1921  */
1922 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1923 				       struct sk_buff *skb)
1924 {
1925 	struct pcie_service_card *card = adapter->card;
1926 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1927 	int ret = 0;
1928 	u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1929 	u32 wrptr;
1930 	struct mwifiex_evt_buf_desc *desc;
1931 
1932 	if (!skb)
1933 		return 0;
1934 
1935 	if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1936 		mwifiex_dbg(adapter, ERROR,
1937 			    "event_complete: Invalid rdptr 0x%x\n",
1938 			    rdptr);
1939 		return -EINVAL;
1940 	}
1941 
1942 	/* Read the event ring write pointer set by firmware */
1943 	if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1944 		mwifiex_dbg(adapter, ERROR,
1945 			    "event_complete: failed to read reg->evt_wrptr\n");
1946 		return -1;
1947 	}
1948 
1949 	if (!card->evt_buf_list[rdptr]) {
1950 		skb_push(skb, adapter->intf_hdr_len);
1951 		skb_put(skb, MAX_EVENT_SIZE - skb->len);
1952 		if (mwifiex_map_pci_memory(adapter, skb,
1953 					   MAX_EVENT_SIZE,
1954 					   PCI_DMA_FROMDEVICE))
1955 			return -1;
1956 		card->evt_buf_list[rdptr] = skb;
1957 		desc = card->evtbd_ring[rdptr];
1958 		desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1959 		desc->len = (u16)skb->len;
1960 		desc->flags = 0;
1961 		skb = NULL;
1962 	} else {
1963 		mwifiex_dbg(adapter, ERROR,
1964 			    "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1965 			    rdptr, card->evt_buf_list[rdptr], skb);
1966 	}
1967 
1968 	if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1969 		card->evtbd_rdptr = ((card->evtbd_rdptr &
1970 					reg->evt_rollover_ind) ^
1971 					reg->evt_rollover_ind);
1972 	}
1973 
1974 	mwifiex_dbg(adapter, EVENT,
1975 		    "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1976 		    card->evtbd_rdptr, wrptr);
1977 
1978 	/* Write the event ring read pointer in to reg->evt_rdptr */
1979 	if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1980 			      card->evtbd_rdptr)) {
1981 		mwifiex_dbg(adapter, ERROR,
1982 			    "event_complete: failed to read reg->evt_rdptr\n");
1983 		return -1;
1984 	}
1985 
1986 	mwifiex_dbg(adapter, EVENT,
1987 		    "info: Check Events Again\n");
1988 	ret = mwifiex_pcie_process_event_ready(adapter);
1989 
1990 	return ret;
1991 }
1992 
1993 /* Combo firmware image is a combination of
1994  * (1) combo crc heaer, start with CMD5
1995  * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1.
1996  * (3) wifi image.
1997  *
1998  * This function bypass the header and bluetooth part, return
1999  * the offset of tail wifi-only part. If the image is already wifi-only,
2000  * that is start with CMD1, return 0.
2001  */
2002 
2003 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
2004 				   const void *firmware, u32 firmware_len) {
2005 	const struct mwifiex_fw_data *fwdata;
2006 	u32 offset = 0, data_len, dnld_cmd;
2007 	int ret = 0;
2008 	bool cmd7_before = false, first_cmd = false;
2009 
2010 	while (1) {
2011 		/* Check for integer and buffer overflow */
2012 		if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2013 		    offset + sizeof(fwdata->header) >= firmware_len) {
2014 			mwifiex_dbg(adapter, ERROR,
2015 				    "extract wifi-only fw failure!\n");
2016 			ret = -1;
2017 			goto done;
2018 		}
2019 
2020 		fwdata = firmware + offset;
2021 		dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2022 		data_len = le32_to_cpu(fwdata->header.data_length);
2023 
2024 		/* Skip past header */
2025 		offset += sizeof(fwdata->header);
2026 
2027 		switch (dnld_cmd) {
2028 		case MWIFIEX_FW_DNLD_CMD_1:
2029 			if (offset + data_len < data_len) {
2030 				mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2031 				ret = -1;
2032 				goto done;
2033 			}
2034 
2035 			/* Image start with cmd1, already wifi-only firmware */
2036 			if (!first_cmd) {
2037 				mwifiex_dbg(adapter, MSG,
2038 					    "input wifi-only firmware\n");
2039 				return 0;
2040 			}
2041 
2042 			if (!cmd7_before) {
2043 				mwifiex_dbg(adapter, ERROR,
2044 					    "no cmd7 before cmd1!\n");
2045 				ret = -1;
2046 				goto done;
2047 			}
2048 			offset += data_len;
2049 			break;
2050 		case MWIFIEX_FW_DNLD_CMD_5:
2051 			first_cmd = true;
2052 			/* Check for integer overflow */
2053 			if (offset + data_len < data_len) {
2054 				mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2055 				ret = -1;
2056 				goto done;
2057 			}
2058 			offset += data_len;
2059 			break;
2060 		case MWIFIEX_FW_DNLD_CMD_6:
2061 			first_cmd = true;
2062 			/* Check for integer overflow */
2063 			if (offset + data_len < data_len) {
2064 				mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2065 				ret = -1;
2066 				goto done;
2067 			}
2068 			offset += data_len;
2069 			if (offset >= firmware_len) {
2070 				mwifiex_dbg(adapter, ERROR,
2071 					    "extract wifi-only fw failure!\n");
2072 				ret = -1;
2073 			} else {
2074 				ret = offset;
2075 			}
2076 			goto done;
2077 		case MWIFIEX_FW_DNLD_CMD_7:
2078 			first_cmd = true;
2079 			cmd7_before = true;
2080 			break;
2081 		default:
2082 			mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2083 				    dnld_cmd);
2084 			ret = -1;
2085 			goto done;
2086 		}
2087 	}
2088 
2089 done:
2090 	return ret;
2091 }
2092 
2093 /*
2094  * This function downloads the firmware to the card.
2095  *
2096  * Firmware is downloaded to the card in blocks. Every block download
2097  * is tested for CRC errors, and retried a number of times before
2098  * returning failure.
2099  */
2100 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2101 				    struct mwifiex_fw_image *fw)
2102 {
2103 	int ret;
2104 	u8 *firmware = fw->fw_buf;
2105 	u32 firmware_len = fw->fw_len;
2106 	u32 offset = 0;
2107 	struct sk_buff *skb;
2108 	u32 txlen, tx_blocks = 0, tries, len, val;
2109 	u32 block_retry_cnt = 0;
2110 	struct pcie_service_card *card = adapter->card;
2111 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2112 
2113 	if (!firmware || !firmware_len) {
2114 		mwifiex_dbg(adapter, ERROR,
2115 			    "No firmware image found! Terminating download\n");
2116 		return -1;
2117 	}
2118 
2119 	mwifiex_dbg(adapter, INFO,
2120 		    "info: Downloading FW image (%d bytes)\n",
2121 		    firmware_len);
2122 
2123 	if (mwifiex_pcie_disable_host_int(adapter)) {
2124 		mwifiex_dbg(adapter, ERROR,
2125 			    "%s: Disabling interrupts failed.\n", __func__);
2126 		return -1;
2127 	}
2128 
2129 	skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2130 	if (!skb) {
2131 		ret = -ENOMEM;
2132 		goto done;
2133 	}
2134 
2135 	ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2136 	if (ret) {
2137 		mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2138 		goto done;
2139 	}
2140 
2141 	/* PCIE FLR case: extract wifi part from combo firmware*/
2142 	if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2143 		ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2144 		if (ret < 0) {
2145 			mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2146 			goto done;
2147 		}
2148 		offset = ret;
2149 		mwifiex_dbg(adapter, MSG,
2150 			    "info: dnld wifi firmware from %d bytes\n", offset);
2151 	}
2152 
2153 	/* Perform firmware data transfer */
2154 	do {
2155 		u32 ireg_intr = 0;
2156 
2157 		/* More data? */
2158 		if (offset >= firmware_len)
2159 			break;
2160 
2161 		for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2162 			ret = mwifiex_read_reg(adapter, reg->cmd_size,
2163 					       &len);
2164 			if (ret) {
2165 				mwifiex_dbg(adapter, FATAL,
2166 					    "Failed reading len from boot code\n");
2167 				goto done;
2168 			}
2169 			if (len)
2170 				break;
2171 			usleep_range(10, 20);
2172 		}
2173 
2174 		if (!len) {
2175 			break;
2176 		} else if (len > MWIFIEX_UPLD_SIZE) {
2177 			mwifiex_dbg(adapter, ERROR,
2178 				    "FW download failure @ %d, invalid length %d\n",
2179 				    offset, len);
2180 			ret = -1;
2181 			goto done;
2182 		}
2183 
2184 		txlen = len;
2185 
2186 		if (len & BIT(0)) {
2187 			block_retry_cnt++;
2188 			if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2189 				mwifiex_dbg(adapter, ERROR,
2190 					    "FW download failure @ %d, over max\t"
2191 					    "retry count\n", offset);
2192 				ret = -1;
2193 				goto done;
2194 			}
2195 			mwifiex_dbg(adapter, ERROR,
2196 				    "FW CRC error indicated by the\t"
2197 				    "helper: len = 0x%04X, txlen = %d\n",
2198 				    len, txlen);
2199 			len &= ~BIT(0);
2200 			/* Setting this to 0 to resend from same offset */
2201 			txlen = 0;
2202 		} else {
2203 			block_retry_cnt = 0;
2204 			/* Set blocksize to transfer - checking for
2205 			   last block */
2206 			if (firmware_len - offset < txlen)
2207 				txlen = firmware_len - offset;
2208 
2209 			tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2210 				    card->pcie.blksz_fw_dl;
2211 
2212 			/* Copy payload to buffer */
2213 			memmove(skb->data, &firmware[offset], txlen);
2214 		}
2215 
2216 		skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2217 		skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2218 
2219 		/* Send the boot command to device */
2220 		if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2221 			mwifiex_dbg(adapter, ERROR,
2222 				    "Failed to send firmware download command\n");
2223 			ret = -1;
2224 			goto done;
2225 		}
2226 
2227 		/* Wait for the command done interrupt */
2228 		for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2229 			if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2230 					     &ireg_intr)) {
2231 				mwifiex_dbg(adapter, ERROR,
2232 					    "%s: Failed to read\t"
2233 					    "interrupt status during fw dnld.\n",
2234 					    __func__);
2235 				mwifiex_unmap_pci_memory(adapter, skb,
2236 							 PCI_DMA_TODEVICE);
2237 				ret = -1;
2238 				goto done;
2239 			}
2240 			if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2241 				break;
2242 			usleep_range(10, 20);
2243 		}
2244 		if (ireg_intr & CPU_INTR_DOOR_BELL) {
2245 			mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2246 				    __func__);
2247 			mwifiex_unmap_pci_memory(adapter, skb,
2248 						 PCI_DMA_TODEVICE);
2249 			ret = -1;
2250 			goto done;
2251 		}
2252 
2253 		mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
2254 
2255 		offset += txlen;
2256 	} while (true);
2257 
2258 	mwifiex_dbg(adapter, MSG,
2259 		    "info: FW download over, size %d bytes\n", offset);
2260 
2261 	ret = 0;
2262 
2263 done:
2264 	dev_kfree_skb_any(skb);
2265 	return ret;
2266 }
2267 
2268 /*
2269  * This function checks the firmware status in card.
2270  */
2271 static int
2272 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2273 {
2274 	int ret = 0;
2275 	u32 firmware_stat;
2276 	struct pcie_service_card *card = adapter->card;
2277 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2278 	u32 tries;
2279 
2280 	/* Mask spurios interrupts */
2281 	if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2282 			      HOST_INTR_MASK)) {
2283 		mwifiex_dbg(adapter, ERROR,
2284 			    "Write register failed\n");
2285 		return -1;
2286 	}
2287 
2288 	mwifiex_dbg(adapter, INFO,
2289 		    "Setting driver ready signature\n");
2290 	if (mwifiex_write_reg(adapter, reg->drv_rdy,
2291 			      FIRMWARE_READY_PCIE)) {
2292 		mwifiex_dbg(adapter, ERROR,
2293 			    "Failed to write driver ready signature\n");
2294 		return -1;
2295 	}
2296 
2297 	/* Wait for firmware initialization event */
2298 	for (tries = 0; tries < poll_num; tries++) {
2299 		if (mwifiex_read_reg(adapter, reg->fw_status,
2300 				     &firmware_stat))
2301 			ret = -1;
2302 		else
2303 			ret = 0;
2304 
2305 		mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2306 			    tries, ret, firmware_stat);
2307 
2308 		if (ret)
2309 			continue;
2310 		if (firmware_stat == FIRMWARE_READY_PCIE) {
2311 			ret = 0;
2312 			break;
2313 		} else {
2314 			msleep(100);
2315 			ret = -1;
2316 		}
2317 	}
2318 
2319 	return ret;
2320 }
2321 
2322 /* This function checks if WLAN is the winner.
2323  */
2324 static int
2325 mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2326 {
2327 	u32 winner = 0;
2328 	int ret = 0;
2329 	struct pcie_service_card *card = adapter->card;
2330 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2331 
2332 	if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2333 		ret = -1;
2334 	} else if (!winner) {
2335 		mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2336 		adapter->winner = 1;
2337 	} else {
2338 		mwifiex_dbg(adapter, ERROR,
2339 			    "PCI-E is not the winner <%#x>", winner);
2340 	}
2341 
2342 	return ret;
2343 }
2344 
2345 /*
2346  * This function reads the interrupt status from card.
2347  */
2348 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2349 				     int msg_id)
2350 {
2351 	u32 pcie_ireg;
2352 	unsigned long flags;
2353 	struct pcie_service_card *card = adapter->card;
2354 
2355 	if (card->msi_enable) {
2356 		spin_lock_irqsave(&adapter->int_lock, flags);
2357 		adapter->int_status = 1;
2358 		spin_unlock_irqrestore(&adapter->int_lock, flags);
2359 		return;
2360 	}
2361 
2362 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
2363 		return;
2364 
2365 	if (card->msix_enable && msg_id >= 0) {
2366 		pcie_ireg = BIT(msg_id);
2367 	} else {
2368 		if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2369 				     &pcie_ireg)) {
2370 			mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2371 			return;
2372 		}
2373 
2374 		if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2375 			return;
2376 
2377 
2378 		mwifiex_pcie_disable_host_int(adapter);
2379 
2380 		/* Clear the pending interrupts */
2381 		if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2382 				      ~pcie_ireg)) {
2383 			mwifiex_dbg(adapter, ERROR,
2384 				    "Write register failed\n");
2385 			return;
2386 		}
2387 	}
2388 
2389 	if (!adapter->pps_uapsd_mode &&
2390 	    adapter->ps_state == PS_STATE_SLEEP &&
2391 	    mwifiex_pcie_ok_to_access_hw(adapter)) {
2392 		/* Potentially for PCIe we could get other
2393 		 * interrupts like shared. Don't change power
2394 		 * state until cookie is set
2395 		 */
2396 		adapter->ps_state = PS_STATE_AWAKE;
2397 		adapter->pm_wakeup_fw_try = false;
2398 		del_timer(&adapter->wakeup_timer);
2399 	}
2400 
2401 	spin_lock_irqsave(&adapter->int_lock, flags);
2402 	adapter->int_status |= pcie_ireg;
2403 	spin_unlock_irqrestore(&adapter->int_lock, flags);
2404 	mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2405 }
2406 
2407 /*
2408  * Interrupt handler for PCIe root port
2409  *
2410  * This function reads the interrupt status from firmware and assigns
2411  * the main process in workqueue which will handle the interrupt.
2412  */
2413 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2414 {
2415 	struct mwifiex_msix_context *ctx = context;
2416 	struct pci_dev *pdev = ctx->dev;
2417 	struct pcie_service_card *card;
2418 	struct mwifiex_adapter *adapter;
2419 
2420 	card = pci_get_drvdata(pdev);
2421 
2422 	if (!card->adapter) {
2423 		pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2424 		       card ? card->adapter : NULL);
2425 		goto exit;
2426 	}
2427 	adapter = card->adapter;
2428 
2429 	if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags))
2430 		goto exit;
2431 
2432 	if (card->msix_enable)
2433 		mwifiex_interrupt_status(adapter, ctx->msg_id);
2434 	else
2435 		mwifiex_interrupt_status(adapter, -1);
2436 
2437 	mwifiex_queue_main_work(adapter);
2438 
2439 exit:
2440 	return IRQ_HANDLED;
2441 }
2442 
2443 /*
2444  * This function checks the current interrupt status.
2445  *
2446  * The following interrupts are checked and handled by this function -
2447  *      - Data sent
2448  *      - Command sent
2449  *      - Command received
2450  *      - Packets received
2451  *      - Events received
2452  *
2453  * In case of Rx packets received, the packets are uploaded from card to
2454  * host and processed accordingly.
2455  */
2456 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2457 {
2458 	int ret;
2459 	u32 pcie_ireg = 0;
2460 	unsigned long flags;
2461 	struct pcie_service_card *card = adapter->card;
2462 
2463 	spin_lock_irqsave(&adapter->int_lock, flags);
2464 	if (!card->msi_enable) {
2465 		/* Clear out unused interrupts */
2466 		pcie_ireg = adapter->int_status;
2467 	}
2468 	adapter->int_status = 0;
2469 	spin_unlock_irqrestore(&adapter->int_lock, flags);
2470 
2471 	if (card->msi_enable) {
2472 		if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2473 			if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2474 					     &pcie_ireg)) {
2475 				mwifiex_dbg(adapter, ERROR,
2476 					    "Read register failed\n");
2477 				return -1;
2478 			}
2479 
2480 			if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2481 				if (mwifiex_write_reg(adapter,
2482 						      PCIE_HOST_INT_STATUS,
2483 						      ~pcie_ireg)) {
2484 					mwifiex_dbg(adapter, ERROR,
2485 						    "Write register failed\n");
2486 					return -1;
2487 				}
2488 				if (!adapter->pps_uapsd_mode &&
2489 				    adapter->ps_state == PS_STATE_SLEEP) {
2490 					adapter->ps_state = PS_STATE_AWAKE;
2491 					adapter->pm_wakeup_fw_try = false;
2492 					del_timer(&adapter->wakeup_timer);
2493 				}
2494 			}
2495 		}
2496 	}
2497 
2498 	if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2499 		mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2500 		ret = mwifiex_pcie_send_data_complete(adapter);
2501 		if (ret)
2502 			return ret;
2503 	}
2504 	if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2505 		mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2506 		ret = mwifiex_pcie_process_recv_data(adapter);
2507 		if (ret)
2508 			return ret;
2509 	}
2510 	if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2511 		mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2512 		ret = mwifiex_pcie_process_event_ready(adapter);
2513 		if (ret)
2514 			return ret;
2515 	}
2516 	if (pcie_ireg & HOST_INTR_CMD_DONE) {
2517 		if (adapter->cmd_sent) {
2518 			mwifiex_dbg(adapter, INTR,
2519 				    "info: CMD sent Interrupt\n");
2520 			adapter->cmd_sent = false;
2521 		}
2522 		/* Handle command response */
2523 		ret = mwifiex_pcie_process_cmd_complete(adapter);
2524 		if (ret)
2525 			return ret;
2526 	}
2527 
2528 	mwifiex_dbg(adapter, INTR,
2529 		    "info: cmd_sent=%d data_sent=%d\n",
2530 		    adapter->cmd_sent, adapter->data_sent);
2531 	if (!card->msi_enable && !card->msix_enable &&
2532 				 adapter->ps_state != PS_STATE_SLEEP)
2533 		mwifiex_pcie_enable_host_int(adapter);
2534 
2535 	return 0;
2536 }
2537 
2538 /*
2539  * This function downloads data from driver to card.
2540  *
2541  * Both commands and data packets are transferred to the card by this
2542  * function.
2543  *
2544  * This function adds the PCIE specific header to the front of the buffer
2545  * before transferring. The header contains the length of the packet and
2546  * the type. The firmware handles the packets based upon this set type.
2547  */
2548 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2549 				     struct sk_buff *skb,
2550 				     struct mwifiex_tx_param *tx_param)
2551 {
2552 	if (!skb) {
2553 		mwifiex_dbg(adapter, ERROR,
2554 			    "Passed NULL skb to %s\n", __func__);
2555 		return -1;
2556 	}
2557 
2558 	if (type == MWIFIEX_TYPE_DATA)
2559 		return mwifiex_pcie_send_data(adapter, skb, tx_param);
2560 	else if (type == MWIFIEX_TYPE_CMD)
2561 		return mwifiex_pcie_send_cmd(adapter, skb);
2562 
2563 	return 0;
2564 }
2565 
2566 /* Function to dump PCIE scratch registers in case of FW crash
2567  */
2568 static int
2569 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2570 {
2571 	char *p = drv_buf;
2572 	char buf[256], *ptr;
2573 	int i;
2574 	u32 value;
2575 	struct pcie_service_card *card = adapter->card;
2576 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2577 	int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2578 				  PCIE_SCRATCH_14_REG,
2579 				  PCIE_SCRATCH_15_REG};
2580 
2581 	if (!p)
2582 		return 0;
2583 
2584 	mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2585 
2586 	if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2587 		mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2588 		return 0;
2589 	}
2590 
2591 	ptr = buf;
2592 	mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2593 	for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2594 		mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2595 		ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2596 			       pcie_scratch_reg[i], value);
2597 	}
2598 
2599 	mwifiex_dbg(adapter, MSG, "%s\n", buf);
2600 	p += sprintf(p, "%s\n", buf);
2601 
2602 	mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2603 
2604 	return p - drv_buf;
2605 }
2606 
2607 /* This function read/write firmware */
2608 static enum rdwr_status
2609 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2610 {
2611 	int ret, tries;
2612 	u8 ctrl_data;
2613 	u32 fw_status;
2614 	struct pcie_service_card *card = adapter->card;
2615 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2616 
2617 	if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2618 		return RDWR_STATUS_FAILURE;
2619 
2620 	ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2621 				reg->fw_dump_host_ready);
2622 	if (ret) {
2623 		mwifiex_dbg(adapter, ERROR,
2624 			    "PCIE write err\n");
2625 		return RDWR_STATUS_FAILURE;
2626 	}
2627 
2628 	for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2629 		mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2630 		if (ctrl_data == FW_DUMP_DONE)
2631 			return RDWR_STATUS_SUCCESS;
2632 		if (doneflag && ctrl_data == doneflag)
2633 			return RDWR_STATUS_DONE;
2634 		if (ctrl_data != reg->fw_dump_host_ready) {
2635 			mwifiex_dbg(adapter, WARN,
2636 				    "The ctrl reg was changed, re-try again!\n");
2637 			ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2638 						reg->fw_dump_host_ready);
2639 			if (ret) {
2640 				mwifiex_dbg(adapter, ERROR,
2641 					    "PCIE write err\n");
2642 				return RDWR_STATUS_FAILURE;
2643 			}
2644 		}
2645 		usleep_range(100, 200);
2646 	}
2647 
2648 	mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2649 	return RDWR_STATUS_FAILURE;
2650 }
2651 
2652 /* This function dump firmware memory to file */
2653 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2654 {
2655 	struct pcie_service_card *card = adapter->card;
2656 	const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2657 	unsigned int reg, reg_start, reg_end;
2658 	u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2659 	u8 idx, i, read_reg, doneflag = 0;
2660 	enum rdwr_status stat;
2661 	u32 memory_size;
2662 	int ret;
2663 
2664 	if (!card->pcie.can_dump_fw)
2665 		return;
2666 
2667 	for (idx = 0; idx < adapter->num_mem_types; idx++) {
2668 		struct memory_type_mapping *entry =
2669 				&adapter->mem_type_mapping_tbl[idx];
2670 
2671 		if (entry->mem_ptr) {
2672 			vfree(entry->mem_ptr);
2673 			entry->mem_ptr = NULL;
2674 		}
2675 		entry->mem_size = 0;
2676 	}
2677 
2678 	mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2679 
2680 	/* Read the number of the memories which will dump */
2681 	stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2682 	if (stat == RDWR_STATUS_FAILURE)
2683 		return;
2684 
2685 	reg = creg->fw_dump_start;
2686 	mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2687 
2688 	/* W8997 chipset firmware dump will be restore in single region*/
2689 	if (fw_dump_num == 0)
2690 		dump_num = 1;
2691 	else
2692 		dump_num = fw_dump_num;
2693 
2694 	/* Read the length of every memory which will dump */
2695 	for (idx = 0; idx < dump_num; idx++) {
2696 		struct memory_type_mapping *entry =
2697 				&adapter->mem_type_mapping_tbl[idx];
2698 		memory_size = 0;
2699 		if (fw_dump_num != 0) {
2700 			stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2701 			if (stat == RDWR_STATUS_FAILURE)
2702 				return;
2703 
2704 			reg = creg->fw_dump_start;
2705 			for (i = 0; i < 4; i++) {
2706 				mwifiex_read_reg_byte(adapter, reg, &read_reg);
2707 				memory_size |= (read_reg << (i * 8));
2708 				reg++;
2709 			}
2710 		} else {
2711 			memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2712 		}
2713 
2714 		if (memory_size == 0) {
2715 			mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2716 			ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2717 						creg->fw_dump_read_done);
2718 			if (ret) {
2719 				mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2720 				return;
2721 			}
2722 			break;
2723 		}
2724 
2725 		mwifiex_dbg(adapter, DUMP,
2726 			    "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2727 		entry->mem_ptr = vmalloc(memory_size + 1);
2728 		entry->mem_size = memory_size;
2729 		if (!entry->mem_ptr) {
2730 			mwifiex_dbg(adapter, ERROR,
2731 				    "Vmalloc %s failed\n", entry->mem_name);
2732 			return;
2733 		}
2734 		dbg_ptr = entry->mem_ptr;
2735 		end_ptr = dbg_ptr + memory_size;
2736 
2737 		doneflag = entry->done_flag;
2738 		mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2739 			    entry->mem_name);
2740 
2741 		do {
2742 			stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2743 			if (RDWR_STATUS_FAILURE == stat)
2744 				return;
2745 
2746 			reg_start = creg->fw_dump_start;
2747 			reg_end = creg->fw_dump_end;
2748 			for (reg = reg_start; reg <= reg_end; reg++) {
2749 				mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2750 				if (dbg_ptr < end_ptr) {
2751 					dbg_ptr++;
2752 					continue;
2753 				}
2754 				mwifiex_dbg(adapter, ERROR,
2755 					    "pre-allocated buf not enough\n");
2756 				tmp_ptr =
2757 					vzalloc(memory_size + MWIFIEX_SIZE_4K);
2758 				if (!tmp_ptr)
2759 					return;
2760 				memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2761 				vfree(entry->mem_ptr);
2762 				entry->mem_ptr = tmp_ptr;
2763 				tmp_ptr = NULL;
2764 				dbg_ptr = entry->mem_ptr + memory_size;
2765 				memory_size += MWIFIEX_SIZE_4K;
2766 				end_ptr = entry->mem_ptr + memory_size;
2767 			}
2768 
2769 			if (stat != RDWR_STATUS_DONE)
2770 				continue;
2771 
2772 			mwifiex_dbg(adapter, DUMP,
2773 				    "%s done: size=0x%tx\n",
2774 				    entry->mem_name, dbg_ptr - entry->mem_ptr);
2775 			break;
2776 		} while (true);
2777 	}
2778 	mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2779 }
2780 
2781 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2782 {
2783 	adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2784 	if (!adapter->devdump_data) {
2785 		mwifiex_dbg(adapter, ERROR,
2786 			    "vzalloc devdump data failure!\n");
2787 		return;
2788 	}
2789 
2790 	mwifiex_drv_info_dump(adapter);
2791 	mwifiex_pcie_fw_dump(adapter);
2792 	mwifiex_prepare_fw_dump_info(adapter);
2793 	mwifiex_upload_device_dump(adapter);
2794 }
2795 
2796 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2797 {
2798 	struct pcie_service_card *card = adapter->card;
2799 
2800 	/* We can't afford to wait here; remove() might be waiting on us. If we
2801 	 * can't grab the device lock, maybe we'll get another chance later.
2802 	 */
2803 	pci_try_reset_function(card->dev);
2804 }
2805 
2806 static void mwifiex_pcie_work(struct work_struct *work)
2807 {
2808 	struct pcie_service_card *card =
2809 		container_of(work, struct pcie_service_card, work);
2810 
2811 	if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2812 			       &card->work_flags))
2813 		mwifiex_pcie_device_dump_work(card->adapter);
2814 	if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2815 			       &card->work_flags))
2816 		mwifiex_pcie_card_reset_work(card->adapter);
2817 }
2818 
2819 /* This function dumps FW information */
2820 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2821 {
2822 	struct pcie_service_card *card = adapter->card;
2823 
2824 	if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2825 			      &card->work_flags))
2826 		schedule_work(&card->work);
2827 }
2828 
2829 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
2830 {
2831 	struct pcie_service_card *card = adapter->card;
2832 
2833 	if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2834 		schedule_work(&card->work);
2835 }
2836 
2837 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
2838 {
2839 	struct pcie_service_card *card = adapter->card;
2840 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2841 	int ret;
2842 
2843 	card->cmdrsp_buf = NULL;
2844 	ret = mwifiex_pcie_create_txbd_ring(adapter);
2845 	if (ret) {
2846 		mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
2847 		goto err_cre_txbd;
2848 	}
2849 
2850 	ret = mwifiex_pcie_create_rxbd_ring(adapter);
2851 	if (ret) {
2852 		mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
2853 		goto err_cre_rxbd;
2854 	}
2855 
2856 	ret = mwifiex_pcie_create_evtbd_ring(adapter);
2857 	if (ret) {
2858 		mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
2859 		goto err_cre_evtbd;
2860 	}
2861 
2862 	ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2863 	if (ret) {
2864 		mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
2865 		goto err_alloc_cmdbuf;
2866 	}
2867 
2868 	if (reg->sleep_cookie) {
2869 		ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2870 		if (ret) {
2871 			mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
2872 			goto err_alloc_cookie;
2873 		}
2874 	} else {
2875 		card->sleep_cookie_vbase = NULL;
2876 	}
2877 
2878 	return 0;
2879 
2880 err_alloc_cookie:
2881 	mwifiex_pcie_delete_cmdrsp_buf(adapter);
2882 err_alloc_cmdbuf:
2883 	mwifiex_pcie_delete_evtbd_ring(adapter);
2884 err_cre_evtbd:
2885 	mwifiex_pcie_delete_rxbd_ring(adapter);
2886 err_cre_rxbd:
2887 	mwifiex_pcie_delete_txbd_ring(adapter);
2888 err_cre_txbd:
2889 	return ret;
2890 }
2891 
2892 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
2893 {
2894 	struct pcie_service_card *card = adapter->card;
2895 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2896 
2897 	if (reg->sleep_cookie)
2898 		mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2899 
2900 	mwifiex_pcie_delete_cmdrsp_buf(adapter);
2901 	mwifiex_pcie_delete_evtbd_ring(adapter);
2902 	mwifiex_pcie_delete_rxbd_ring(adapter);
2903 	mwifiex_pcie_delete_txbd_ring(adapter);
2904 }
2905 
2906 /*
2907  * This function initializes the PCI-E host memory space, WCB rings, etc.
2908  */
2909 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
2910 {
2911 	struct pcie_service_card *card = adapter->card;
2912 	int ret;
2913 	struct pci_dev *pdev = card->dev;
2914 
2915 	pci_set_drvdata(pdev, card);
2916 
2917 	ret = pci_enable_device(pdev);
2918 	if (ret)
2919 		goto err_enable_dev;
2920 
2921 	pci_set_master(pdev);
2922 
2923 	ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2924 	if (ret) {
2925 		pr_err("set_dma_mask(32) failed: %d\n", ret);
2926 		goto err_set_dma_mask;
2927 	}
2928 
2929 	ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2930 	if (ret) {
2931 		pr_err("set_consistent_dma_mask(64) failed\n");
2932 		goto err_set_dma_mask;
2933 	}
2934 
2935 	ret = pci_request_region(pdev, 0, DRV_NAME);
2936 	if (ret) {
2937 		pr_err("req_reg(0) error\n");
2938 		goto err_req_region0;
2939 	}
2940 	card->pci_mmap = pci_iomap(pdev, 0, 0);
2941 	if (!card->pci_mmap) {
2942 		pr_err("iomap(0) error\n");
2943 		ret = -EIO;
2944 		goto err_iomap0;
2945 	}
2946 	ret = pci_request_region(pdev, 2, DRV_NAME);
2947 	if (ret) {
2948 		pr_err("req_reg(2) error\n");
2949 		goto err_req_region2;
2950 	}
2951 	card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2952 	if (!card->pci_mmap1) {
2953 		pr_err("iomap(2) error\n");
2954 		ret = -EIO;
2955 		goto err_iomap2;
2956 	}
2957 
2958 	pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n",
2959 		  card->pci_mmap, card->pci_mmap1);
2960 
2961 	ret = mwifiex_pcie_alloc_buffers(adapter);
2962 	if (ret)
2963 		goto err_alloc_buffers;
2964 
2965 	return 0;
2966 
2967 err_alloc_buffers:
2968 	pci_iounmap(pdev, card->pci_mmap1);
2969 err_iomap2:
2970 	pci_release_region(pdev, 2);
2971 err_req_region2:
2972 	pci_iounmap(pdev, card->pci_mmap);
2973 err_iomap0:
2974 	pci_release_region(pdev, 0);
2975 err_req_region0:
2976 err_set_dma_mask:
2977 	pci_disable_device(pdev);
2978 err_enable_dev:
2979 	return ret;
2980 }
2981 
2982 /*
2983  * This function cleans up the allocated card buffers.
2984  */
2985 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
2986 {
2987 	struct pcie_service_card *card = adapter->card;
2988 	struct pci_dev *pdev = card->dev;
2989 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2990 	int ret;
2991 	u32 fw_status;
2992 
2993 	cancel_work_sync(&card->work);
2994 
2995 	ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
2996 	if (fw_status == FIRMWARE_READY_PCIE) {
2997 		mwifiex_dbg(adapter, INFO,
2998 			    "Clearing driver ready signature\n");
2999 		if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3000 			mwifiex_dbg(adapter, ERROR,
3001 				    "Failed to write driver not-ready signature\n");
3002 	}
3003 
3004 	pci_disable_device(pdev);
3005 
3006 	pci_iounmap(pdev, card->pci_mmap);
3007 	pci_iounmap(pdev, card->pci_mmap1);
3008 	pci_release_region(pdev, 2);
3009 	pci_release_region(pdev, 0);
3010 
3011 	mwifiex_pcie_free_buffers(adapter);
3012 }
3013 
3014 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
3015 {
3016 	int ret, i, j;
3017 	struct pcie_service_card *card = adapter->card;
3018 	struct pci_dev *pdev = card->dev;
3019 
3020 	if (card->pcie.reg->msix_support) {
3021 		for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3022 			card->msix_entries[i].entry = i;
3023 		ret = pci_enable_msix_exact(pdev, card->msix_entries,
3024 					    MWIFIEX_NUM_MSIX_VECTORS);
3025 		if (!ret) {
3026 			for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3027 				card->msix_ctx[i].dev = pdev;
3028 				card->msix_ctx[i].msg_id = i;
3029 
3030 				ret = request_irq(card->msix_entries[i].vector,
3031 						  mwifiex_pcie_interrupt, 0,
3032 						  "MWIFIEX_PCIE_MSIX",
3033 						  &card->msix_ctx[i]);
3034 				if (ret)
3035 					break;
3036 			}
3037 
3038 			if (ret) {
3039 				mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3040 					    ret);
3041 				for (j = 0; j < i; j++)
3042 					free_irq(card->msix_entries[j].vector,
3043 						 &card->msix_ctx[i]);
3044 				pci_disable_msix(pdev);
3045 			} else {
3046 				mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3047 				card->msix_enable = 1;
3048 				return 0;
3049 			}
3050 		}
3051 	}
3052 
3053 	if (pci_enable_msi(pdev) != 0)
3054 		pci_disable_msi(pdev);
3055 	else
3056 		card->msi_enable = 1;
3057 
3058 	mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3059 
3060 	card->share_irq_ctx.dev = pdev;
3061 	card->share_irq_ctx.msg_id = -1;
3062 	ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3063 			  "MRVL_PCIE", &card->share_irq_ctx);
3064 	if (ret) {
3065 		pr_err("request_irq failed: ret=%d\n", ret);
3066 		return -1;
3067 	}
3068 
3069 	return 0;
3070 }
3071 
3072 /*
3073  * This function gets the firmware name for downloading by revision id
3074  *
3075  * Read revision id register to get revision id
3076  */
3077 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3078 {
3079 	int revision_id = 0;
3080 	int version, magic;
3081 	struct pcie_service_card *card = adapter->card;
3082 
3083 	switch (card->dev->device) {
3084 	case PCIE_DEVICE_ID_MARVELL_88W8766P:
3085 		strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3086 		break;
3087 	case PCIE_DEVICE_ID_MARVELL_88W8897:
3088 		mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3089 		mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3090 		revision_id &= 0xff00;
3091 		switch (revision_id) {
3092 		case PCIE8897_A0:
3093 			strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3094 			break;
3095 		case PCIE8897_B0:
3096 			strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3097 			break;
3098 		default:
3099 			strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3100 
3101 			break;
3102 		}
3103 		break;
3104 	case PCIE_DEVICE_ID_MARVELL_88W8997:
3105 		mwifiex_read_reg(adapter, 0x8, &revision_id);
3106 		mwifiex_read_reg(adapter, 0x0cd0, &version);
3107 		mwifiex_read_reg(adapter, 0x0cd4, &magic);
3108 		revision_id &= 0xff;
3109 		version &= 0x7;
3110 		magic &= 0xff;
3111 		if (revision_id == PCIE8997_A1 &&
3112 		    magic == CHIP_MAGIC_VALUE &&
3113 		    version == CHIP_VER_PCIEUART)
3114 			strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3115 		else
3116 			strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3117 		break;
3118 	default:
3119 		break;
3120 	}
3121 }
3122 
3123 /*
3124  * This function registers the PCIE device.
3125  *
3126  * PCIE IRQ is claimed, block size is set and driver data is initialized.
3127  */
3128 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3129 {
3130 	struct pcie_service_card *card = adapter->card;
3131 
3132 	/* save adapter pointer in card */
3133 	card->adapter = adapter;
3134 
3135 	if (mwifiex_pcie_request_irq(adapter))
3136 		return -1;
3137 
3138 	adapter->tx_buf_size = card->pcie.tx_buf_size;
3139 	adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3140 	adapter->num_mem_types = card->pcie.num_mem_types;
3141 	adapter->ext_scan = card->pcie.can_ext_scan;
3142 	mwifiex_pcie_get_fw_name(adapter);
3143 
3144 	return 0;
3145 }
3146 
3147 /*
3148  * This function unregisters the PCIE device.
3149  *
3150  * The PCIE IRQ is released, the function is disabled and driver
3151  * data is set to null.
3152  */
3153 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3154 {
3155 	struct pcie_service_card *card = adapter->card;
3156 	struct pci_dev *pdev = card->dev;
3157 	int i;
3158 
3159 	if (card->msix_enable) {
3160 		for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3161 			synchronize_irq(card->msix_entries[i].vector);
3162 
3163 		for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3164 			free_irq(card->msix_entries[i].vector,
3165 				 &card->msix_ctx[i]);
3166 
3167 		card->msix_enable = 0;
3168 		pci_disable_msix(pdev);
3169 	} else {
3170 		mwifiex_dbg(adapter, INFO,
3171 			    "%s(): calling free_irq()\n", __func__);
3172 	       free_irq(card->dev->irq, &card->share_irq_ctx);
3173 
3174 		if (card->msi_enable)
3175 			pci_disable_msi(pdev);
3176 	}
3177 	card->adapter = NULL;
3178 }
3179 
3180 /*
3181  * This function initializes the PCI-E host memory space, WCB rings, etc.,
3182  * similar to mwifiex_init_pcie(), but without resetting PCI-E state.
3183  */
3184 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3185 {
3186 	struct pcie_service_card *card = adapter->card;
3187 	struct pci_dev *pdev = card->dev;
3188 
3189 	/* tx_buf_size might be changed to 3584 by firmware during
3190 	 * data transfer, we should reset it to default size.
3191 	 */
3192 	adapter->tx_buf_size = card->pcie.tx_buf_size;
3193 
3194 	mwifiex_pcie_alloc_buffers(adapter);
3195 
3196 	pci_set_master(pdev);
3197 }
3198 
3199 /* This function cleans up the PCI-E host memory space. */
3200 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3201 {
3202 	struct pcie_service_card *card = adapter->card;
3203 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3204 	struct pci_dev *pdev = card->dev;
3205 
3206 	if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3207 		mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3208 
3209 	pci_clear_master(pdev);
3210 
3211 	adapter->seq_num = 0;
3212 
3213 	mwifiex_pcie_free_buffers(adapter);
3214 }
3215 
3216 static struct mwifiex_if_ops pcie_ops = {
3217 	.init_if =			mwifiex_init_pcie,
3218 	.cleanup_if =			mwifiex_cleanup_pcie,
3219 	.check_fw_status =		mwifiex_check_fw_status,
3220 	.check_winner_status =          mwifiex_check_winner_status,
3221 	.prog_fw =			mwifiex_prog_fw_w_helper,
3222 	.register_dev =			mwifiex_register_dev,
3223 	.unregister_dev =		mwifiex_unregister_dev,
3224 	.enable_int =			mwifiex_pcie_enable_host_int,
3225 	.disable_int =			mwifiex_pcie_disable_host_int_noerr,
3226 	.process_int_status =		mwifiex_process_int_status,
3227 	.host_to_card =			mwifiex_pcie_host_to_card,
3228 	.wakeup =			mwifiex_pm_wakeup_card,
3229 	.wakeup_complete =		mwifiex_pm_wakeup_card_complete,
3230 
3231 	/* PCIE specific */
3232 	.cmdrsp_complete =		mwifiex_pcie_cmdrsp_complete,
3233 	.event_complete =		mwifiex_pcie_event_complete,
3234 	.update_mp_end_port =		NULL,
3235 	.cleanup_mpa_buf =		NULL,
3236 	.init_fw_port =			mwifiex_pcie_init_fw_port,
3237 	.clean_pcie_ring =		mwifiex_clean_pcie_ring_buf,
3238 	.card_reset =			mwifiex_pcie_card_reset,
3239 	.reg_dump =			mwifiex_pcie_reg_dump,
3240 	.device_dump =			mwifiex_pcie_device_dump,
3241 	.down_dev =			mwifiex_pcie_down_dev,
3242 	.up_dev =			mwifiex_pcie_up_dev,
3243 };
3244 
3245 module_pci_driver(mwifiex_pcie);
3246 
3247 MODULE_AUTHOR("Marvell International Ltd.");
3248 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3249 MODULE_VERSION(PCIE_VERSION);
3250 MODULE_LICENSE("GPL v2");
3251