1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 cookie_value; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 cookie_value); 134 if (cookie_value == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card; 154 struct pci_dev *pdev = to_pci_dev(dev); 155 156 card = pci_get_drvdata(pdev); 157 158 /* Might still be loading firmware */ 159 wait_for_completion(&card->fw_done); 160 161 adapter = card->adapter; 162 if (!adapter) { 163 dev_err(dev, "adapter is not valid\n"); 164 return 0; 165 } 166 167 mwifiex_enable_wake(adapter); 168 169 /* Enable the Host Sleep */ 170 if (!mwifiex_enable_hs(adapter)) { 171 mwifiex_dbg(adapter, ERROR, 172 "cmd: failed to suspend\n"); 173 adapter->hs_enabling = false; 174 mwifiex_disable_wake(adapter); 175 return -EFAULT; 176 } 177 178 flush_workqueue(adapter->workqueue); 179 180 /* Indicate device suspended */ 181 adapter->is_suspended = true; 182 adapter->hs_enabling = false; 183 184 return 0; 185 } 186 187 /* 188 * Kernel needs to suspend all functions separately. Therefore all 189 * registered functions must have drivers with suspend and resume 190 * methods. Failing that the kernel simply removes the whole card. 191 * 192 * If already not resumed, this function turns on the traffic and 193 * sends a host sleep cancel request to the firmware. 194 */ 195 static int mwifiex_pcie_resume(struct device *dev) 196 { 197 struct mwifiex_adapter *adapter; 198 struct pcie_service_card *card; 199 struct pci_dev *pdev = to_pci_dev(dev); 200 201 card = pci_get_drvdata(pdev); 202 203 if (!card->adapter) { 204 dev_err(dev, "adapter structure is not valid\n"); 205 return 0; 206 } 207 208 adapter = card->adapter; 209 210 if (!adapter->is_suspended) { 211 mwifiex_dbg(adapter, WARN, 212 "Device already resumed\n"); 213 return 0; 214 } 215 216 adapter->is_suspended = false; 217 218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 219 MWIFIEX_ASYNC_CMD); 220 mwifiex_disable_wake(adapter); 221 222 return 0; 223 } 224 #endif 225 226 /* 227 * This function probes an mwifiex device and registers it. It allocates 228 * the card structure, enables PCIE function number and initiates the 229 * device registration and initialization procedure by adding a logical 230 * interface. 231 */ 232 static int mwifiex_pcie_probe(struct pci_dev *pdev, 233 const struct pci_device_id *ent) 234 { 235 struct pcie_service_card *card; 236 int ret; 237 238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 239 pdev->vendor, pdev->device, pdev->revision); 240 241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 242 if (!card) 243 return -ENOMEM; 244 245 init_completion(&card->fw_done); 246 247 card->dev = pdev; 248 249 if (ent->driver_data) { 250 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 251 card->pcie.reg = data->reg; 252 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 253 card->pcie.tx_buf_size = data->tx_buf_size; 254 card->pcie.can_dump_fw = data->can_dump_fw; 255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 256 card->pcie.num_mem_types = data->num_mem_types; 257 card->pcie.can_ext_scan = data->can_ext_scan; 258 INIT_WORK(&card->work, mwifiex_pcie_work); 259 } 260 261 /* device tree node parsing and platform specific configuration*/ 262 if (pdev->dev.of_node) { 263 ret = mwifiex_pcie_probe_of(&pdev->dev); 264 if (ret) 265 return ret; 266 } 267 268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 269 MWIFIEX_PCIE, &pdev->dev)) { 270 pr_err("%s failed\n", __func__); 271 return -1; 272 } 273 274 return 0; 275 } 276 277 /* 278 * This function removes the interface and frees up the card structure. 279 */ 280 static void mwifiex_pcie_remove(struct pci_dev *pdev) 281 { 282 struct pcie_service_card *card; 283 struct mwifiex_adapter *adapter; 284 struct mwifiex_private *priv; 285 const struct mwifiex_pcie_card_reg *reg; 286 u32 fw_status; 287 int ret; 288 289 card = pci_get_drvdata(pdev); 290 291 wait_for_completion(&card->fw_done); 292 293 adapter = card->adapter; 294 if (!adapter || !adapter->priv_num) 295 return; 296 297 reg = card->pcie.reg; 298 if (reg) 299 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 300 else 301 fw_status = -1; 302 303 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 304 mwifiex_deauthenticate_all(adapter); 305 306 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 307 308 mwifiex_disable_auto_ds(priv); 309 310 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 311 } 312 313 mwifiex_remove_card(adapter); 314 } 315 316 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 317 { 318 mwifiex_pcie_remove(pdev); 319 320 return; 321 } 322 323 static const struct pci_device_id mwifiex_ids[] = { 324 { 325 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 326 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 327 .driver_data = (unsigned long)&mwifiex_pcie8766, 328 }, 329 { 330 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 331 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 332 .driver_data = (unsigned long)&mwifiex_pcie8897, 333 }, 334 { 335 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 336 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 337 .driver_data = (unsigned long)&mwifiex_pcie8997, 338 }, 339 { 340 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 341 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 342 .driver_data = (unsigned long)&mwifiex_pcie8997, 343 }, 344 {}, 345 }; 346 347 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 348 349 static void mwifiex_pcie_reset_notify(struct pci_dev *pdev, bool prepare) 350 { 351 struct pcie_service_card *card = pci_get_drvdata(pdev); 352 struct mwifiex_adapter *adapter = card->adapter; 353 int ret; 354 355 if (!adapter) { 356 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 357 __func__); 358 return; 359 } 360 361 mwifiex_dbg(adapter, INFO, 362 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d %s\n", 363 __func__, pdev->vendor, pdev->device, 364 pdev->revision, 365 prepare ? "Pre-FLR" : "Post-FLR"); 366 367 if (prepare) { 368 /* Kernel would be performing FLR after this notification. 369 * Cleanup all software without cleaning anything related to 370 * PCIe and HW. 371 */ 372 mwifiex_shutdown_sw(adapter); 373 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 374 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 375 } else { 376 /* Kernel stores and restores PCIe function context before and 377 * after performing FLR respectively. Reconfigure the software 378 * and firmware including firmware redownload 379 */ 380 ret = mwifiex_reinit_sw(adapter); 381 if (ret) { 382 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 383 return; 384 } 385 } 386 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 387 } 388 389 static const struct pci_error_handlers mwifiex_pcie_err_handler[] = { 390 { .reset_notify = mwifiex_pcie_reset_notify, }, 391 }; 392 393 #ifdef CONFIG_PM_SLEEP 394 /* Power Management Hooks */ 395 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 396 mwifiex_pcie_resume); 397 #endif 398 399 /* PCI Device Driver */ 400 static struct pci_driver __refdata mwifiex_pcie = { 401 .name = "mwifiex_pcie", 402 .id_table = mwifiex_ids, 403 .probe = mwifiex_pcie_probe, 404 .remove = mwifiex_pcie_remove, 405 #ifdef CONFIG_PM_SLEEP 406 .driver = { 407 .pm = &mwifiex_pcie_pm_ops, 408 }, 409 #endif 410 .shutdown = mwifiex_pcie_shutdown, 411 .err_handler = mwifiex_pcie_err_handler, 412 }; 413 414 /* 415 * This function adds delay loop to ensure FW is awake before proceeding. 416 */ 417 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 418 { 419 int i = 0; 420 421 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 422 i++; 423 usleep_range(10, 20); 424 /* 50ms max wait */ 425 if (i == 5000) 426 break; 427 } 428 429 return; 430 } 431 432 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 433 u32 max_delay_loop_cnt) 434 { 435 struct pcie_service_card *card = adapter->card; 436 u8 *buffer; 437 u32 sleep_cookie, count; 438 struct sk_buff *cmdrsp = card->cmdrsp_buf; 439 440 for (count = 0; count < max_delay_loop_cnt; count++) { 441 pci_dma_sync_single_for_cpu(card->dev, 442 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 443 sizeof(sleep_cookie), 444 PCI_DMA_FROMDEVICE); 445 buffer = cmdrsp->data; 446 sleep_cookie = get_unaligned_le32(buffer); 447 448 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 449 mwifiex_dbg(adapter, INFO, 450 "sleep cookie found at count %d\n", count); 451 break; 452 } 453 pci_dma_sync_single_for_device(card->dev, 454 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 455 sizeof(sleep_cookie), 456 PCI_DMA_FROMDEVICE); 457 usleep_range(20, 30); 458 } 459 460 if (count >= max_delay_loop_cnt) 461 mwifiex_dbg(adapter, INFO, 462 "max count reached while accessing sleep cookie\n"); 463 } 464 465 /* This function wakes up the card by reading fw_status register. */ 466 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 467 { 468 struct pcie_service_card *card = adapter->card; 469 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 470 471 mwifiex_dbg(adapter, EVENT, 472 "event: Wakeup device...\n"); 473 474 if (reg->sleep_cookie) 475 mwifiex_pcie_dev_wakeup_delay(adapter); 476 477 /* Accessing fw_status register will wakeup device */ 478 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 479 mwifiex_dbg(adapter, ERROR, 480 "Writing fw_status register failed\n"); 481 return -1; 482 } 483 484 if (reg->sleep_cookie) { 485 mwifiex_pcie_dev_wakeup_delay(adapter); 486 mwifiex_dbg(adapter, INFO, 487 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 488 adapter->ps_state = PS_STATE_AWAKE; 489 } 490 491 return 0; 492 } 493 494 /* 495 * This function is called after the card has woken up. 496 * 497 * The card configuration register is reset. 498 */ 499 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 500 { 501 mwifiex_dbg(adapter, CMD, 502 "cmd: Wakeup device completed\n"); 503 504 return 0; 505 } 506 507 /* 508 * This function disables the host interrupt. 509 * 510 * The host interrupt mask is read, the disable bit is reset and 511 * written back to the card host interrupt mask register. 512 */ 513 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 514 { 515 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 516 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 517 0x00000000)) { 518 mwifiex_dbg(adapter, ERROR, 519 "Disable host interrupt failed\n"); 520 return -1; 521 } 522 } 523 524 atomic_set(&adapter->tx_hw_pending, 0); 525 return 0; 526 } 527 528 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 529 { 530 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 531 } 532 533 /* 534 * This function enables the host interrupt. 535 * 536 * The host interrupt enable mask is written to the card 537 * host interrupt mask register. 538 */ 539 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 540 { 541 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 542 /* Simply write the mask to the register */ 543 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 544 HOST_INTR_MASK)) { 545 mwifiex_dbg(adapter, ERROR, 546 "Enable host interrupt failed\n"); 547 return -1; 548 } 549 } 550 551 return 0; 552 } 553 554 /* 555 * This function initializes TX buffer ring descriptors 556 */ 557 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 558 { 559 struct pcie_service_card *card = adapter->card; 560 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 561 struct mwifiex_pcie_buf_desc *desc; 562 struct mwifiex_pfu_buf_desc *desc2; 563 int i; 564 565 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 566 card->tx_buf_list[i] = NULL; 567 if (reg->pfu_enabled) { 568 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 569 (sizeof(*desc2) * i); 570 desc2 = card->txbd_ring[i]; 571 memset(desc2, 0, sizeof(*desc2)); 572 } else { 573 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 574 (sizeof(*desc) * i); 575 desc = card->txbd_ring[i]; 576 memset(desc, 0, sizeof(*desc)); 577 } 578 } 579 580 return 0; 581 } 582 583 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 584 * here and after mapping PCI memory, its physical address is assigned to 585 * PCIE Rx buffer descriptor's physical address. 586 */ 587 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 588 { 589 struct pcie_service_card *card = adapter->card; 590 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 591 struct sk_buff *skb; 592 struct mwifiex_pcie_buf_desc *desc; 593 struct mwifiex_pfu_buf_desc *desc2; 594 dma_addr_t buf_pa; 595 int i; 596 597 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 598 /* Allocate skb here so that firmware can DMA data from it */ 599 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 600 GFP_KERNEL); 601 if (!skb) { 602 mwifiex_dbg(adapter, ERROR, 603 "Unable to allocate skb for RX ring.\n"); 604 kfree(card->rxbd_ring_vbase); 605 return -ENOMEM; 606 } 607 608 if (mwifiex_map_pci_memory(adapter, skb, 609 MWIFIEX_RX_DATA_BUF_SIZE, 610 PCI_DMA_FROMDEVICE)) 611 return -1; 612 613 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 614 615 mwifiex_dbg(adapter, INFO, 616 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 617 skb, skb->len, skb->data, (u32)buf_pa, 618 (u32)((u64)buf_pa >> 32)); 619 620 card->rx_buf_list[i] = skb; 621 if (reg->pfu_enabled) { 622 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 623 (sizeof(*desc2) * i); 624 desc2 = card->rxbd_ring[i]; 625 desc2->paddr = buf_pa; 626 desc2->len = (u16)skb->len; 627 desc2->frag_len = (u16)skb->len; 628 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 629 desc2->offset = 0; 630 } else { 631 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 632 (sizeof(*desc) * i)); 633 desc = card->rxbd_ring[i]; 634 desc->paddr = buf_pa; 635 desc->len = (u16)skb->len; 636 desc->flags = 0; 637 } 638 } 639 640 return 0; 641 } 642 643 /* This function initializes event buffer ring descriptors. Each SKB is 644 * allocated here and after mapping PCI memory, its physical address is assigned 645 * to PCIE Rx buffer descriptor's physical address 646 */ 647 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 648 { 649 struct pcie_service_card *card = adapter->card; 650 struct mwifiex_evt_buf_desc *desc; 651 struct sk_buff *skb; 652 dma_addr_t buf_pa; 653 int i; 654 655 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 656 /* Allocate skb here so that firmware can DMA data from it */ 657 skb = dev_alloc_skb(MAX_EVENT_SIZE); 658 if (!skb) { 659 mwifiex_dbg(adapter, ERROR, 660 "Unable to allocate skb for EVENT buf.\n"); 661 kfree(card->evtbd_ring_vbase); 662 return -ENOMEM; 663 } 664 skb_put(skb, MAX_EVENT_SIZE); 665 666 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 667 PCI_DMA_FROMDEVICE)) 668 return -1; 669 670 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 671 672 mwifiex_dbg(adapter, EVENT, 673 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 674 skb, skb->len, skb->data, (u32)buf_pa, 675 (u32)((u64)buf_pa >> 32)); 676 677 card->evt_buf_list[i] = skb; 678 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 679 (sizeof(*desc) * i)); 680 desc = card->evtbd_ring[i]; 681 desc->paddr = buf_pa; 682 desc->len = (u16)skb->len; 683 desc->flags = 0; 684 } 685 686 return 0; 687 } 688 689 /* This function cleans up TX buffer rings. If any of the buffer list has valid 690 * SKB address, associated SKB is freed. 691 */ 692 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 693 { 694 struct pcie_service_card *card = adapter->card; 695 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 696 struct sk_buff *skb; 697 struct mwifiex_pcie_buf_desc *desc; 698 struct mwifiex_pfu_buf_desc *desc2; 699 int i; 700 701 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 702 if (reg->pfu_enabled) { 703 desc2 = card->txbd_ring[i]; 704 if (card->tx_buf_list[i]) { 705 skb = card->tx_buf_list[i]; 706 mwifiex_unmap_pci_memory(adapter, skb, 707 PCI_DMA_TODEVICE); 708 dev_kfree_skb_any(skb); 709 } 710 memset(desc2, 0, sizeof(*desc2)); 711 } else { 712 desc = card->txbd_ring[i]; 713 if (card->tx_buf_list[i]) { 714 skb = card->tx_buf_list[i]; 715 mwifiex_unmap_pci_memory(adapter, skb, 716 PCI_DMA_TODEVICE); 717 dev_kfree_skb_any(skb); 718 } 719 memset(desc, 0, sizeof(*desc)); 720 } 721 card->tx_buf_list[i] = NULL; 722 } 723 724 atomic_set(&adapter->tx_hw_pending, 0); 725 return; 726 } 727 728 /* This function cleans up RX buffer rings. If any of the buffer list has valid 729 * SKB address, associated SKB is freed. 730 */ 731 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 732 { 733 struct pcie_service_card *card = adapter->card; 734 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 735 struct mwifiex_pcie_buf_desc *desc; 736 struct mwifiex_pfu_buf_desc *desc2; 737 struct sk_buff *skb; 738 int i; 739 740 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 741 if (reg->pfu_enabled) { 742 desc2 = card->rxbd_ring[i]; 743 if (card->rx_buf_list[i]) { 744 skb = card->rx_buf_list[i]; 745 mwifiex_unmap_pci_memory(adapter, skb, 746 PCI_DMA_FROMDEVICE); 747 dev_kfree_skb_any(skb); 748 } 749 memset(desc2, 0, sizeof(*desc2)); 750 } else { 751 desc = card->rxbd_ring[i]; 752 if (card->rx_buf_list[i]) { 753 skb = card->rx_buf_list[i]; 754 mwifiex_unmap_pci_memory(adapter, skb, 755 PCI_DMA_FROMDEVICE); 756 dev_kfree_skb_any(skb); 757 } 758 memset(desc, 0, sizeof(*desc)); 759 } 760 card->rx_buf_list[i] = NULL; 761 } 762 763 return; 764 } 765 766 /* This function cleans up event buffer rings. If any of the buffer list has 767 * valid SKB address, associated SKB is freed. 768 */ 769 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 770 { 771 struct pcie_service_card *card = adapter->card; 772 struct mwifiex_evt_buf_desc *desc; 773 struct sk_buff *skb; 774 int i; 775 776 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 777 desc = card->evtbd_ring[i]; 778 if (card->evt_buf_list[i]) { 779 skb = card->evt_buf_list[i]; 780 mwifiex_unmap_pci_memory(adapter, skb, 781 PCI_DMA_FROMDEVICE); 782 dev_kfree_skb_any(skb); 783 } 784 card->evt_buf_list[i] = NULL; 785 memset(desc, 0, sizeof(*desc)); 786 } 787 788 return; 789 } 790 791 /* This function creates buffer descriptor ring for TX 792 */ 793 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 794 { 795 struct pcie_service_card *card = adapter->card; 796 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 797 798 /* 799 * driver maintaines the write pointer and firmware maintaines the read 800 * pointer. The write pointer starts at 0 (zero) while the read pointer 801 * starts at zero with rollover bit set 802 */ 803 card->txbd_wrptr = 0; 804 805 if (reg->pfu_enabled) 806 card->txbd_rdptr = 0; 807 else 808 card->txbd_rdptr |= reg->tx_rollover_ind; 809 810 /* allocate shared memory for the BD ring and divide the same in to 811 several descriptors */ 812 if (reg->pfu_enabled) 813 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 814 MWIFIEX_MAX_TXRX_BD; 815 else 816 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 817 MWIFIEX_MAX_TXRX_BD; 818 819 mwifiex_dbg(adapter, INFO, 820 "info: txbd_ring: Allocating %d bytes\n", 821 card->txbd_ring_size); 822 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 823 card->txbd_ring_size, 824 &card->txbd_ring_pbase); 825 if (!card->txbd_ring_vbase) { 826 mwifiex_dbg(adapter, ERROR, 827 "allocate consistent memory (%d bytes) failed!\n", 828 card->txbd_ring_size); 829 return -ENOMEM; 830 } 831 mwifiex_dbg(adapter, DATA, 832 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 833 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 834 (u32)((u64)card->txbd_ring_pbase >> 32), 835 card->txbd_ring_size); 836 837 return mwifiex_init_txq_ring(adapter); 838 } 839 840 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 841 { 842 struct pcie_service_card *card = adapter->card; 843 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 844 845 mwifiex_cleanup_txq_ring(adapter); 846 847 if (card->txbd_ring_vbase) 848 pci_free_consistent(card->dev, card->txbd_ring_size, 849 card->txbd_ring_vbase, 850 card->txbd_ring_pbase); 851 card->txbd_ring_size = 0; 852 card->txbd_wrptr = 0; 853 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 854 card->txbd_ring_vbase = NULL; 855 card->txbd_ring_pbase = 0; 856 857 return 0; 858 } 859 860 /* 861 * This function creates buffer descriptor ring for RX 862 */ 863 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 864 { 865 struct pcie_service_card *card = adapter->card; 866 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 867 868 /* 869 * driver maintaines the read pointer and firmware maintaines the write 870 * pointer. The write pointer starts at 0 (zero) while the read pointer 871 * starts at zero with rollover bit set 872 */ 873 card->rxbd_wrptr = 0; 874 card->rxbd_rdptr = reg->rx_rollover_ind; 875 876 if (reg->pfu_enabled) 877 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 878 MWIFIEX_MAX_TXRX_BD; 879 else 880 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 881 MWIFIEX_MAX_TXRX_BD; 882 883 mwifiex_dbg(adapter, INFO, 884 "info: rxbd_ring: Allocating %d bytes\n", 885 card->rxbd_ring_size); 886 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 887 card->rxbd_ring_size, 888 &card->rxbd_ring_pbase); 889 if (!card->rxbd_ring_vbase) { 890 mwifiex_dbg(adapter, ERROR, 891 "allocate consistent memory (%d bytes) failed!\n", 892 card->rxbd_ring_size); 893 return -ENOMEM; 894 } 895 896 mwifiex_dbg(adapter, DATA, 897 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 898 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 899 (u32)((u64)card->rxbd_ring_pbase >> 32), 900 card->rxbd_ring_size); 901 902 return mwifiex_init_rxq_ring(adapter); 903 } 904 905 /* 906 * This function deletes Buffer descriptor ring for RX 907 */ 908 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 909 { 910 struct pcie_service_card *card = adapter->card; 911 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 912 913 mwifiex_cleanup_rxq_ring(adapter); 914 915 if (card->rxbd_ring_vbase) 916 pci_free_consistent(card->dev, card->rxbd_ring_size, 917 card->rxbd_ring_vbase, 918 card->rxbd_ring_pbase); 919 card->rxbd_ring_size = 0; 920 card->rxbd_wrptr = 0; 921 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 922 card->rxbd_ring_vbase = NULL; 923 card->rxbd_ring_pbase = 0; 924 925 return 0; 926 } 927 928 /* 929 * This function creates buffer descriptor ring for Events 930 */ 931 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 932 { 933 struct pcie_service_card *card = adapter->card; 934 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 935 936 /* 937 * driver maintaines the read pointer and firmware maintaines the write 938 * pointer. The write pointer starts at 0 (zero) while the read pointer 939 * starts at zero with rollover bit set 940 */ 941 card->evtbd_wrptr = 0; 942 card->evtbd_rdptr = reg->evt_rollover_ind; 943 944 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 945 MWIFIEX_MAX_EVT_BD; 946 947 mwifiex_dbg(adapter, INFO, 948 "info: evtbd_ring: Allocating %d bytes\n", 949 card->evtbd_ring_size); 950 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 951 card->evtbd_ring_size, 952 &card->evtbd_ring_pbase); 953 if (!card->evtbd_ring_vbase) { 954 mwifiex_dbg(adapter, ERROR, 955 "allocate consistent memory (%d bytes) failed!\n", 956 card->evtbd_ring_size); 957 return -ENOMEM; 958 } 959 960 mwifiex_dbg(adapter, EVENT, 961 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 962 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 963 (u32)((u64)card->evtbd_ring_pbase >> 32), 964 card->evtbd_ring_size); 965 966 return mwifiex_pcie_init_evt_ring(adapter); 967 } 968 969 /* 970 * This function deletes Buffer descriptor ring for Events 971 */ 972 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 973 { 974 struct pcie_service_card *card = adapter->card; 975 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 976 977 mwifiex_cleanup_evt_ring(adapter); 978 979 if (card->evtbd_ring_vbase) 980 pci_free_consistent(card->dev, card->evtbd_ring_size, 981 card->evtbd_ring_vbase, 982 card->evtbd_ring_pbase); 983 card->evtbd_wrptr = 0; 984 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 985 card->evtbd_ring_size = 0; 986 card->evtbd_ring_vbase = NULL; 987 card->evtbd_ring_pbase = 0; 988 989 return 0; 990 } 991 992 /* 993 * This function allocates a buffer for CMDRSP 994 */ 995 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 996 { 997 struct pcie_service_card *card = adapter->card; 998 struct sk_buff *skb; 999 1000 /* Allocate memory for receiving command response data */ 1001 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1002 if (!skb) { 1003 mwifiex_dbg(adapter, ERROR, 1004 "Unable to allocate skb for command response data.\n"); 1005 return -ENOMEM; 1006 } 1007 skb_put(skb, MWIFIEX_UPLD_SIZE); 1008 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1009 PCI_DMA_FROMDEVICE)) 1010 return -1; 1011 1012 card->cmdrsp_buf = skb; 1013 1014 return 0; 1015 } 1016 1017 /* 1018 * This function deletes a buffer for CMDRSP 1019 */ 1020 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1021 { 1022 struct pcie_service_card *card; 1023 1024 if (!adapter) 1025 return 0; 1026 1027 card = adapter->card; 1028 1029 if (card && card->cmdrsp_buf) { 1030 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1031 PCI_DMA_FROMDEVICE); 1032 dev_kfree_skb_any(card->cmdrsp_buf); 1033 } 1034 1035 if (card && card->cmd_buf) { 1036 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1037 PCI_DMA_TODEVICE); 1038 dev_kfree_skb_any(card->cmd_buf); 1039 } 1040 return 0; 1041 } 1042 1043 /* 1044 * This function allocates a buffer for sleep cookie 1045 */ 1046 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1047 { 1048 struct pcie_service_card *card = adapter->card; 1049 u32 tmp; 1050 1051 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1052 &card->sleep_cookie_pbase); 1053 if (!card->sleep_cookie_vbase) { 1054 mwifiex_dbg(adapter, ERROR, 1055 "pci_alloc_consistent failed!\n"); 1056 return -ENOMEM; 1057 } 1058 /* Init val of Sleep Cookie */ 1059 tmp = FW_AWAKE_COOKIE; 1060 put_unaligned(tmp, card->sleep_cookie_vbase); 1061 1062 mwifiex_dbg(adapter, INFO, 1063 "alloc_scook: sleep cookie=0x%x\n", 1064 get_unaligned(card->sleep_cookie_vbase)); 1065 1066 return 0; 1067 } 1068 1069 /* 1070 * This function deletes buffer for sleep cookie 1071 */ 1072 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1073 { 1074 struct pcie_service_card *card; 1075 1076 if (!adapter) 1077 return 0; 1078 1079 card = adapter->card; 1080 1081 if (card && card->sleep_cookie_vbase) { 1082 pci_free_consistent(card->dev, sizeof(u32), 1083 card->sleep_cookie_vbase, 1084 card->sleep_cookie_pbase); 1085 card->sleep_cookie_vbase = NULL; 1086 } 1087 1088 return 0; 1089 } 1090 1091 /* This function flushes the TX buffer descriptor ring 1092 * This function defined as handler is also called while cleaning TXRX 1093 * during disconnect/ bss stop. 1094 */ 1095 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1096 { 1097 struct pcie_service_card *card = adapter->card; 1098 1099 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1100 card->txbd_flush = 1; 1101 /* write pointer already set at last send 1102 * send dnld-rdy intr again, wait for completion. 1103 */ 1104 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1105 CPU_INTR_DNLD_RDY)) { 1106 mwifiex_dbg(adapter, ERROR, 1107 "failed to assert dnld-rdy interrupt.\n"); 1108 return -1; 1109 } 1110 } 1111 return 0; 1112 } 1113 1114 /* 1115 * This function unmaps and frees downloaded data buffer 1116 */ 1117 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1118 { 1119 struct sk_buff *skb; 1120 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1121 struct mwifiex_pcie_buf_desc *desc; 1122 struct mwifiex_pfu_buf_desc *desc2; 1123 struct pcie_service_card *card = adapter->card; 1124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1125 1126 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1127 mwifiex_pm_wakeup_card(adapter); 1128 1129 /* Read the TX ring read pointer set by firmware */ 1130 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1131 mwifiex_dbg(adapter, ERROR, 1132 "SEND COMP: failed to read reg->tx_rdptr\n"); 1133 return -1; 1134 } 1135 1136 mwifiex_dbg(adapter, DATA, 1137 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1138 card->txbd_rdptr, rdptr); 1139 1140 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1141 /* free from previous txbd_rdptr to current txbd_rdptr */ 1142 while (((card->txbd_rdptr & reg->tx_mask) != 1143 (rdptr & reg->tx_mask)) || 1144 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1145 (rdptr & reg->tx_rollover_ind))) { 1146 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1147 reg->tx_start_ptr; 1148 1149 skb = card->tx_buf_list[wrdoneidx]; 1150 1151 if (skb) { 1152 mwifiex_dbg(adapter, DATA, 1153 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1154 skb, wrdoneidx); 1155 mwifiex_unmap_pci_memory(adapter, skb, 1156 PCI_DMA_TODEVICE); 1157 1158 unmap_count++; 1159 1160 if (card->txbd_flush) 1161 mwifiex_write_data_complete(adapter, skb, 0, 1162 -1); 1163 else 1164 mwifiex_write_data_complete(adapter, skb, 0, 0); 1165 atomic_dec(&adapter->tx_hw_pending); 1166 } 1167 1168 card->tx_buf_list[wrdoneidx] = NULL; 1169 1170 if (reg->pfu_enabled) { 1171 desc2 = card->txbd_ring[wrdoneidx]; 1172 memset(desc2, 0, sizeof(*desc2)); 1173 } else { 1174 desc = card->txbd_ring[wrdoneidx]; 1175 memset(desc, 0, sizeof(*desc)); 1176 } 1177 switch (card->dev->device) { 1178 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1179 card->txbd_rdptr++; 1180 break; 1181 case PCIE_DEVICE_ID_MARVELL_88W8897: 1182 case PCIE_DEVICE_ID_MARVELL_88W8997: 1183 card->txbd_rdptr += reg->ring_tx_start_ptr; 1184 break; 1185 } 1186 1187 1188 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1189 card->txbd_rdptr = ((card->txbd_rdptr & 1190 reg->tx_rollover_ind) ^ 1191 reg->tx_rollover_ind); 1192 } 1193 1194 if (unmap_count) 1195 adapter->data_sent = false; 1196 1197 if (card->txbd_flush) { 1198 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1199 card->txbd_flush = 0; 1200 else 1201 mwifiex_clean_pcie_ring_buf(adapter); 1202 } 1203 1204 return 0; 1205 } 1206 1207 /* This function sends data buffer to device. First 4 bytes of payload 1208 * are filled with payload length and payload type. Then this payload 1209 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1210 * Download ready interrupt to FW is deffered if Tx ring is not full and 1211 * additional payload can be accomodated. 1212 * Caller must ensure tx_param parameter to this function is not NULL. 1213 */ 1214 static int 1215 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1216 struct mwifiex_tx_param *tx_param) 1217 { 1218 struct pcie_service_card *card = adapter->card; 1219 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1220 u32 wrindx, num_tx_buffs, rx_val; 1221 int ret; 1222 dma_addr_t buf_pa; 1223 struct mwifiex_pcie_buf_desc *desc = NULL; 1224 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1225 1226 if (!(skb->data && skb->len)) { 1227 mwifiex_dbg(adapter, ERROR, 1228 "%s(): invalid parameter <%p, %#x>\n", 1229 __func__, skb->data, skb->len); 1230 return -1; 1231 } 1232 1233 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1234 mwifiex_pm_wakeup_card(adapter); 1235 1236 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1237 mwifiex_dbg(adapter, DATA, 1238 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1239 card->txbd_rdptr, card->txbd_wrptr); 1240 if (mwifiex_pcie_txbd_not_full(card)) { 1241 u8 *payload; 1242 1243 adapter->data_sent = true; 1244 payload = skb->data; 1245 put_unaligned_le16((u16)skb->len, payload + 0); 1246 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1247 1248 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1249 PCI_DMA_TODEVICE)) 1250 return -1; 1251 1252 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1253 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1254 card->tx_buf_list[wrindx] = skb; 1255 atomic_inc(&adapter->tx_hw_pending); 1256 1257 if (reg->pfu_enabled) { 1258 desc2 = card->txbd_ring[wrindx]; 1259 desc2->paddr = buf_pa; 1260 desc2->len = (u16)skb->len; 1261 desc2->frag_len = (u16)skb->len; 1262 desc2->offset = 0; 1263 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1264 MWIFIEX_BD_FLAG_LAST_DESC; 1265 } else { 1266 desc = card->txbd_ring[wrindx]; 1267 desc->paddr = buf_pa; 1268 desc->len = (u16)skb->len; 1269 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1270 MWIFIEX_BD_FLAG_LAST_DESC; 1271 } 1272 1273 switch (card->dev->device) { 1274 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1275 card->txbd_wrptr++; 1276 break; 1277 case PCIE_DEVICE_ID_MARVELL_88W8897: 1278 case PCIE_DEVICE_ID_MARVELL_88W8997: 1279 card->txbd_wrptr += reg->ring_tx_start_ptr; 1280 break; 1281 } 1282 1283 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1284 card->txbd_wrptr = ((card->txbd_wrptr & 1285 reg->tx_rollover_ind) ^ 1286 reg->tx_rollover_ind); 1287 1288 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1289 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1290 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1291 card->txbd_wrptr | rx_val)) { 1292 mwifiex_dbg(adapter, ERROR, 1293 "SEND DATA: failed to write reg->tx_wrptr\n"); 1294 ret = -1; 1295 goto done_unmap; 1296 } 1297 if ((mwifiex_pcie_txbd_not_full(card)) && 1298 tx_param->next_pkt_len) { 1299 /* have more packets and TxBD still can hold more */ 1300 mwifiex_dbg(adapter, DATA, 1301 "SEND DATA: delay dnld-rdy interrupt.\n"); 1302 adapter->data_sent = false; 1303 } else { 1304 /* Send the TX ready interrupt */ 1305 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1306 CPU_INTR_DNLD_RDY)) { 1307 mwifiex_dbg(adapter, ERROR, 1308 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1309 ret = -1; 1310 goto done_unmap; 1311 } 1312 } 1313 mwifiex_dbg(adapter, DATA, 1314 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1315 "%#x> and sent packet to firmware successfully\n", 1316 card->txbd_rdptr, card->txbd_wrptr); 1317 } else { 1318 mwifiex_dbg(adapter, DATA, 1319 "info: TX Ring full, can't send packets to fw\n"); 1320 adapter->data_sent = true; 1321 /* Send the TX ready interrupt */ 1322 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1323 CPU_INTR_DNLD_RDY)) 1324 mwifiex_dbg(adapter, ERROR, 1325 "SEND DATA: failed to assert door-bell intr\n"); 1326 return -EBUSY; 1327 } 1328 1329 return -EINPROGRESS; 1330 done_unmap: 1331 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1332 card->tx_buf_list[wrindx] = NULL; 1333 atomic_dec(&adapter->tx_hw_pending); 1334 if (reg->pfu_enabled) 1335 memset(desc2, 0, sizeof(*desc2)); 1336 else 1337 memset(desc, 0, sizeof(*desc)); 1338 1339 return ret; 1340 } 1341 1342 /* 1343 * This function handles received buffer ring and 1344 * dispatches packets to upper 1345 */ 1346 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1347 { 1348 struct pcie_service_card *card = adapter->card; 1349 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1350 u32 wrptr, rd_index, tx_val; 1351 dma_addr_t buf_pa; 1352 int ret = 0; 1353 struct sk_buff *skb_tmp = NULL; 1354 struct mwifiex_pcie_buf_desc *desc; 1355 struct mwifiex_pfu_buf_desc *desc2; 1356 1357 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1358 mwifiex_pm_wakeup_card(adapter); 1359 1360 /* Read the RX ring Write pointer set by firmware */ 1361 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1362 mwifiex_dbg(adapter, ERROR, 1363 "RECV DATA: failed to read reg->rx_wrptr\n"); 1364 ret = -1; 1365 goto done; 1366 } 1367 card->rxbd_wrptr = wrptr; 1368 1369 while (((wrptr & reg->rx_mask) != 1370 (card->rxbd_rdptr & reg->rx_mask)) || 1371 ((wrptr & reg->rx_rollover_ind) == 1372 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1373 struct sk_buff *skb_data; 1374 u16 rx_len; 1375 1376 rd_index = card->rxbd_rdptr & reg->rx_mask; 1377 skb_data = card->rx_buf_list[rd_index]; 1378 1379 /* If skb allocation was failed earlier for Rx packet, 1380 * rx_buf_list[rd_index] would have been left with a NULL. 1381 */ 1382 if (!skb_data) 1383 return -ENOMEM; 1384 1385 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1386 card->rx_buf_list[rd_index] = NULL; 1387 1388 /* Get data length from interface header - 1389 * first 2 bytes for len, next 2 bytes is for type 1390 */ 1391 rx_len = get_unaligned_le16(skb_data->data); 1392 if (WARN_ON(rx_len <= adapter->intf_hdr_len || 1393 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1394 mwifiex_dbg(adapter, ERROR, 1395 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1396 rx_len, card->rxbd_rdptr, wrptr); 1397 dev_kfree_skb_any(skb_data); 1398 } else { 1399 skb_put(skb_data, rx_len); 1400 mwifiex_dbg(adapter, DATA, 1401 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1402 card->rxbd_rdptr, wrptr, rx_len); 1403 skb_pull(skb_data, adapter->intf_hdr_len); 1404 if (adapter->rx_work_enabled) { 1405 skb_queue_tail(&adapter->rx_data_q, skb_data); 1406 adapter->data_received = true; 1407 atomic_inc(&adapter->rx_pending); 1408 } else { 1409 mwifiex_handle_rx_packet(adapter, skb_data); 1410 } 1411 } 1412 1413 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1414 GFP_KERNEL); 1415 if (!skb_tmp) { 1416 mwifiex_dbg(adapter, ERROR, 1417 "Unable to allocate skb.\n"); 1418 return -ENOMEM; 1419 } 1420 1421 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1422 MWIFIEX_RX_DATA_BUF_SIZE, 1423 PCI_DMA_FROMDEVICE)) 1424 return -1; 1425 1426 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1427 1428 mwifiex_dbg(adapter, INFO, 1429 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1430 skb_tmp, rd_index); 1431 card->rx_buf_list[rd_index] = skb_tmp; 1432 1433 if (reg->pfu_enabled) { 1434 desc2 = card->rxbd_ring[rd_index]; 1435 desc2->paddr = buf_pa; 1436 desc2->len = skb_tmp->len; 1437 desc2->frag_len = skb_tmp->len; 1438 desc2->offset = 0; 1439 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1440 } else { 1441 desc = card->rxbd_ring[rd_index]; 1442 desc->paddr = buf_pa; 1443 desc->len = skb_tmp->len; 1444 desc->flags = 0; 1445 } 1446 1447 if ((++card->rxbd_rdptr & reg->rx_mask) == 1448 MWIFIEX_MAX_TXRX_BD) { 1449 card->rxbd_rdptr = ((card->rxbd_rdptr & 1450 reg->rx_rollover_ind) ^ 1451 reg->rx_rollover_ind); 1452 } 1453 mwifiex_dbg(adapter, DATA, 1454 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1455 card->rxbd_rdptr, wrptr); 1456 1457 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1458 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1459 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1460 card->rxbd_rdptr | tx_val)) { 1461 mwifiex_dbg(adapter, DATA, 1462 "RECV DATA: failed to write reg->rx_rdptr\n"); 1463 ret = -1; 1464 goto done; 1465 } 1466 1467 /* Read the RX ring Write pointer set by firmware */ 1468 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1469 mwifiex_dbg(adapter, ERROR, 1470 "RECV DATA: failed to read reg->rx_wrptr\n"); 1471 ret = -1; 1472 goto done; 1473 } 1474 mwifiex_dbg(adapter, DATA, 1475 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1476 card->rxbd_wrptr = wrptr; 1477 } 1478 1479 done: 1480 return ret; 1481 } 1482 1483 /* 1484 * This function downloads the boot command to device 1485 */ 1486 static int 1487 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1488 { 1489 dma_addr_t buf_pa; 1490 struct pcie_service_card *card = adapter->card; 1491 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1492 1493 if (!(skb->data && skb->len)) { 1494 mwifiex_dbg(adapter, ERROR, 1495 "Invalid parameter in %s <%p. len %d>\n", 1496 __func__, skb->data, skb->len); 1497 return -1; 1498 } 1499 1500 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1501 return -1; 1502 1503 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1504 1505 /* Write the lower 32bits of the physical address to low command 1506 * address scratch register 1507 */ 1508 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1509 mwifiex_dbg(adapter, ERROR, 1510 "%s: failed to write download command to boot code.\n", 1511 __func__); 1512 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1513 return -1; 1514 } 1515 1516 /* Write the upper 32bits of the physical address to high command 1517 * address scratch register 1518 */ 1519 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1520 (u32)((u64)buf_pa >> 32))) { 1521 mwifiex_dbg(adapter, ERROR, 1522 "%s: failed to write download command to boot code.\n", 1523 __func__); 1524 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1525 return -1; 1526 } 1527 1528 /* Write the command length to cmd_size scratch register */ 1529 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1530 mwifiex_dbg(adapter, ERROR, 1531 "%s: failed to write command len to cmd_size scratch reg\n", 1532 __func__); 1533 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1534 return -1; 1535 } 1536 1537 /* Ring the door bell */ 1538 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1539 CPU_INTR_DOOR_BELL)) { 1540 mwifiex_dbg(adapter, ERROR, 1541 "%s: failed to assert door-bell intr\n", __func__); 1542 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1543 return -1; 1544 } 1545 1546 return 0; 1547 } 1548 1549 /* This function init rx port in firmware which in turn enables to receive data 1550 * from device before transmitting any packet. 1551 */ 1552 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1553 { 1554 struct pcie_service_card *card = adapter->card; 1555 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1556 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1557 1558 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1559 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1560 tx_wrap)) { 1561 mwifiex_dbg(adapter, ERROR, 1562 "RECV DATA: failed to write reg->rx_rdptr\n"); 1563 return -1; 1564 } 1565 return 0; 1566 } 1567 1568 /* This function downloads commands to the device 1569 */ 1570 static int 1571 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1572 { 1573 struct pcie_service_card *card = adapter->card; 1574 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1575 int ret = 0; 1576 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1577 u8 *payload = (u8 *)skb->data; 1578 1579 if (!(skb->data && skb->len)) { 1580 mwifiex_dbg(adapter, ERROR, 1581 "Invalid parameter in %s <%p, %#x>\n", 1582 __func__, skb->data, skb->len); 1583 return -1; 1584 } 1585 1586 /* Make sure a command response buffer is available */ 1587 if (!card->cmdrsp_buf) { 1588 mwifiex_dbg(adapter, ERROR, 1589 "No response buffer available, send command failed\n"); 1590 return -EBUSY; 1591 } 1592 1593 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1594 mwifiex_pm_wakeup_card(adapter); 1595 1596 adapter->cmd_sent = true; 1597 1598 put_unaligned_le16((u16)skb->len, &payload[0]); 1599 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1600 1601 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1602 return -1; 1603 1604 card->cmd_buf = skb; 1605 /* 1606 * Need to keep a reference, since core driver might free up this 1607 * buffer before we've unmapped it. 1608 */ 1609 skb_get(skb); 1610 1611 /* To send a command, the driver will: 1612 1. Write the 64bit physical address of the data buffer to 1613 cmd response address low + cmd response address high 1614 2. Ring the door bell (i.e. set the door bell interrupt) 1615 1616 In response to door bell interrupt, the firmware will perform 1617 the DMA of the command packet (first header to obtain the total 1618 length and then rest of the command). 1619 */ 1620 1621 if (card->cmdrsp_buf) { 1622 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1623 /* Write the lower 32bits of the cmdrsp buffer physical 1624 address */ 1625 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1626 (u32)cmdrsp_buf_pa)) { 1627 mwifiex_dbg(adapter, ERROR, 1628 "Failed to write download cmd to boot code.\n"); 1629 ret = -1; 1630 goto done; 1631 } 1632 /* Write the upper 32bits of the cmdrsp buffer physical 1633 address */ 1634 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1635 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1636 mwifiex_dbg(adapter, ERROR, 1637 "Failed to write download cmd to boot code.\n"); 1638 ret = -1; 1639 goto done; 1640 } 1641 } 1642 1643 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1644 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1645 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1646 (u32)cmd_buf_pa)) { 1647 mwifiex_dbg(adapter, ERROR, 1648 "Failed to write download cmd to boot code.\n"); 1649 ret = -1; 1650 goto done; 1651 } 1652 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1653 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1654 (u32)((u64)cmd_buf_pa >> 32))) { 1655 mwifiex_dbg(adapter, ERROR, 1656 "Failed to write download cmd to boot code.\n"); 1657 ret = -1; 1658 goto done; 1659 } 1660 1661 /* Write the command length to reg->cmd_size */ 1662 if (mwifiex_write_reg(adapter, reg->cmd_size, 1663 card->cmd_buf->len)) { 1664 mwifiex_dbg(adapter, ERROR, 1665 "Failed to write cmd len to reg->cmd_size\n"); 1666 ret = -1; 1667 goto done; 1668 } 1669 1670 /* Ring the door bell */ 1671 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1672 CPU_INTR_DOOR_BELL)) { 1673 mwifiex_dbg(adapter, ERROR, 1674 "Failed to assert door-bell intr\n"); 1675 ret = -1; 1676 goto done; 1677 } 1678 1679 done: 1680 if (ret) 1681 adapter->cmd_sent = false; 1682 1683 return 0; 1684 } 1685 1686 /* 1687 * This function handles command complete interrupt 1688 */ 1689 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1690 { 1691 struct pcie_service_card *card = adapter->card; 1692 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1693 struct sk_buff *skb = card->cmdrsp_buf; 1694 int count = 0; 1695 u16 rx_len; 1696 1697 mwifiex_dbg(adapter, CMD, 1698 "info: Rx CMD Response\n"); 1699 1700 if (adapter->curr_cmd) 1701 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1702 else 1703 pci_dma_sync_single_for_cpu(card->dev, 1704 MWIFIEX_SKB_DMA_ADDR(skb), 1705 MWIFIEX_UPLD_SIZE, 1706 PCI_DMA_FROMDEVICE); 1707 1708 /* Unmap the command as a response has been received. */ 1709 if (card->cmd_buf) { 1710 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1711 PCI_DMA_TODEVICE); 1712 dev_kfree_skb_any(card->cmd_buf); 1713 card->cmd_buf = NULL; 1714 } 1715 1716 rx_len = get_unaligned_le16(skb->data); 1717 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1718 skb_trim(skb, rx_len); 1719 1720 if (!adapter->curr_cmd) { 1721 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1722 pci_dma_sync_single_for_device(card->dev, 1723 MWIFIEX_SKB_DMA_ADDR(skb), 1724 MWIFIEX_SLEEP_COOKIE_SIZE, 1725 PCI_DMA_FROMDEVICE); 1726 if (mwifiex_write_reg(adapter, 1727 PCIE_CPU_INT_EVENT, 1728 CPU_INTR_SLEEP_CFM_DONE)) { 1729 mwifiex_dbg(adapter, ERROR, 1730 "Write register failed\n"); 1731 return -1; 1732 } 1733 mwifiex_delay_for_sleep_cookie(adapter, 1734 MWIFIEX_MAX_DELAY_COUNT); 1735 mwifiex_unmap_pci_memory(adapter, skb, 1736 PCI_DMA_FROMDEVICE); 1737 skb_pull(skb, adapter->intf_hdr_len); 1738 while (reg->sleep_cookie && (count++ < 10) && 1739 mwifiex_pcie_ok_to_access_hw(adapter)) 1740 usleep_range(50, 60); 1741 mwifiex_pcie_enable_host_int(adapter); 1742 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1743 skb->len); 1744 } else { 1745 mwifiex_dbg(adapter, ERROR, 1746 "There is no command but got cmdrsp\n"); 1747 } 1748 memcpy(adapter->upld_buf, skb->data, 1749 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1750 skb_push(skb, adapter->intf_hdr_len); 1751 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1752 PCI_DMA_FROMDEVICE)) 1753 return -1; 1754 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1755 skb_pull(skb, adapter->intf_hdr_len); 1756 adapter->curr_cmd->resp_skb = skb; 1757 adapter->cmd_resp_received = true; 1758 /* Take the pointer and set it to CMD node and will 1759 return in the response complete callback */ 1760 card->cmdrsp_buf = NULL; 1761 1762 /* Clear the cmd-rsp buffer address in scratch registers. This 1763 will prevent firmware from writing to the same response 1764 buffer again. */ 1765 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1766 mwifiex_dbg(adapter, ERROR, 1767 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1768 return -1; 1769 } 1770 /* Write the upper 32bits of the cmdrsp buffer physical 1771 address */ 1772 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1773 mwifiex_dbg(adapter, ERROR, 1774 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1775 return -1; 1776 } 1777 } 1778 1779 return 0; 1780 } 1781 1782 /* 1783 * Command Response processing complete handler 1784 */ 1785 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1786 struct sk_buff *skb) 1787 { 1788 struct pcie_service_card *card = adapter->card; 1789 1790 if (skb) { 1791 card->cmdrsp_buf = skb; 1792 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len); 1793 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1794 PCI_DMA_FROMDEVICE)) 1795 return -1; 1796 } 1797 1798 return 0; 1799 } 1800 1801 /* 1802 * This function handles firmware event ready interrupt 1803 */ 1804 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1805 { 1806 struct pcie_service_card *card = adapter->card; 1807 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1808 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1809 u32 wrptr, event; 1810 struct mwifiex_evt_buf_desc *desc; 1811 1812 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1813 mwifiex_pm_wakeup_card(adapter); 1814 1815 if (adapter->event_received) { 1816 mwifiex_dbg(adapter, EVENT, 1817 "info: Event being processed,\t" 1818 "do not process this interrupt just yet\n"); 1819 return 0; 1820 } 1821 1822 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1823 mwifiex_dbg(adapter, ERROR, 1824 "info: Invalid read pointer...\n"); 1825 return -1; 1826 } 1827 1828 /* Read the event ring write pointer set by firmware */ 1829 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1830 mwifiex_dbg(adapter, ERROR, 1831 "EventReady: failed to read reg->evt_wrptr\n"); 1832 return -1; 1833 } 1834 1835 mwifiex_dbg(adapter, EVENT, 1836 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1837 card->evtbd_rdptr, wrptr); 1838 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1839 & MWIFIEX_EVTBD_MASK)) || 1840 ((wrptr & reg->evt_rollover_ind) == 1841 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1842 struct sk_buff *skb_cmd; 1843 __le16 data_len = 0; 1844 u16 evt_len; 1845 1846 mwifiex_dbg(adapter, INFO, 1847 "info: Read Index: %d\n", rdptr); 1848 skb_cmd = card->evt_buf_list[rdptr]; 1849 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1850 1851 /* Take the pointer and set it to event pointer in adapter 1852 and will return back after event handling callback */ 1853 card->evt_buf_list[rdptr] = NULL; 1854 desc = card->evtbd_ring[rdptr]; 1855 memset(desc, 0, sizeof(*desc)); 1856 1857 event = get_unaligned_le32( 1858 &skb_cmd->data[adapter->intf_hdr_len]); 1859 adapter->event_cause = event; 1860 /* The first 4bytes will be the event transfer header 1861 len is 2 bytes followed by type which is 2 bytes */ 1862 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1863 evt_len = le16_to_cpu(data_len); 1864 skb_trim(skb_cmd, evt_len); 1865 skb_pull(skb_cmd, adapter->intf_hdr_len); 1866 mwifiex_dbg(adapter, EVENT, 1867 "info: Event length: %d\n", evt_len); 1868 1869 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) 1870 memcpy(adapter->event_body, skb_cmd->data + 1871 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1872 MWIFIEX_EVENT_HEADER_LEN); 1873 1874 adapter->event_received = true; 1875 adapter->event_skb = skb_cmd; 1876 1877 /* Do not update the event read pointer here, wait till the 1878 buffer is released. This is just to make things simpler, 1879 we need to find a better method of managing these buffers. 1880 */ 1881 } else { 1882 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1883 CPU_INTR_EVENT_DONE)) { 1884 mwifiex_dbg(adapter, ERROR, 1885 "Write register failed\n"); 1886 return -1; 1887 } 1888 } 1889 1890 return 0; 1891 } 1892 1893 /* 1894 * Event processing complete handler 1895 */ 1896 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1897 struct sk_buff *skb) 1898 { 1899 struct pcie_service_card *card = adapter->card; 1900 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1901 int ret = 0; 1902 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1903 u32 wrptr; 1904 struct mwifiex_evt_buf_desc *desc; 1905 1906 if (!skb) 1907 return 0; 1908 1909 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1910 mwifiex_dbg(adapter, ERROR, 1911 "event_complete: Invalid rdptr 0x%x\n", 1912 rdptr); 1913 return -EINVAL; 1914 } 1915 1916 /* Read the event ring write pointer set by firmware */ 1917 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1918 mwifiex_dbg(adapter, ERROR, 1919 "event_complete: failed to read reg->evt_wrptr\n"); 1920 return -1; 1921 } 1922 1923 if (!card->evt_buf_list[rdptr]) { 1924 skb_push(skb, adapter->intf_hdr_len); 1925 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1926 if (mwifiex_map_pci_memory(adapter, skb, 1927 MAX_EVENT_SIZE, 1928 PCI_DMA_FROMDEVICE)) 1929 return -1; 1930 card->evt_buf_list[rdptr] = skb; 1931 desc = card->evtbd_ring[rdptr]; 1932 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1933 desc->len = (u16)skb->len; 1934 desc->flags = 0; 1935 skb = NULL; 1936 } else { 1937 mwifiex_dbg(adapter, ERROR, 1938 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1939 rdptr, card->evt_buf_list[rdptr], skb); 1940 } 1941 1942 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1943 card->evtbd_rdptr = ((card->evtbd_rdptr & 1944 reg->evt_rollover_ind) ^ 1945 reg->evt_rollover_ind); 1946 } 1947 1948 mwifiex_dbg(adapter, EVENT, 1949 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1950 card->evtbd_rdptr, wrptr); 1951 1952 /* Write the event ring read pointer in to reg->evt_rdptr */ 1953 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1954 card->evtbd_rdptr)) { 1955 mwifiex_dbg(adapter, ERROR, 1956 "event_complete: failed to read reg->evt_rdptr\n"); 1957 return -1; 1958 } 1959 1960 mwifiex_dbg(adapter, EVENT, 1961 "info: Check Events Again\n"); 1962 ret = mwifiex_pcie_process_event_ready(adapter); 1963 1964 return ret; 1965 } 1966 1967 /* Combo firmware image is a combination of 1968 * (1) combo crc heaer, start with CMD5 1969 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 1970 * (3) wifi image. 1971 * 1972 * This function bypass the header and bluetooth part, return 1973 * the offset of tail wifi-only part. 1974 */ 1975 1976 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 1977 const void *firmware, u32 firmware_len) { 1978 const struct mwifiex_fw_data *fwdata; 1979 u32 offset = 0, data_len, dnld_cmd; 1980 int ret = 0; 1981 bool cmd7_before = false; 1982 1983 while (1) { 1984 /* Check for integer and buffer overflow */ 1985 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 1986 offset + sizeof(fwdata->header) >= firmware_len) { 1987 mwifiex_dbg(adapter, ERROR, 1988 "extract wifi-only fw failure!\n"); 1989 ret = -1; 1990 goto done; 1991 } 1992 1993 fwdata = firmware + offset; 1994 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 1995 data_len = le32_to_cpu(fwdata->header.data_length); 1996 1997 /* Skip past header */ 1998 offset += sizeof(fwdata->header); 1999 2000 switch (dnld_cmd) { 2001 case MWIFIEX_FW_DNLD_CMD_1: 2002 if (!cmd7_before) { 2003 mwifiex_dbg(adapter, ERROR, 2004 "no cmd7 before cmd1!\n"); 2005 ret = -1; 2006 goto done; 2007 } 2008 if (offset + data_len < data_len) { 2009 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2010 ret = -1; 2011 goto done; 2012 } 2013 offset += data_len; 2014 break; 2015 case MWIFIEX_FW_DNLD_CMD_5: 2016 /* Check for integer overflow */ 2017 if (offset + data_len < data_len) { 2018 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2019 ret = -1; 2020 goto done; 2021 } 2022 offset += data_len; 2023 break; 2024 case MWIFIEX_FW_DNLD_CMD_6: 2025 /* Check for integer overflow */ 2026 if (offset + data_len < data_len) { 2027 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2028 ret = -1; 2029 goto done; 2030 } 2031 offset += data_len; 2032 if (offset >= firmware_len) { 2033 mwifiex_dbg(adapter, ERROR, 2034 "extract wifi-only fw failure!\n"); 2035 ret = -1; 2036 } else { 2037 ret = offset; 2038 } 2039 goto done; 2040 case MWIFIEX_FW_DNLD_CMD_7: 2041 cmd7_before = true; 2042 break; 2043 default: 2044 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2045 dnld_cmd); 2046 ret = -1; 2047 goto done; 2048 } 2049 } 2050 2051 done: 2052 return ret; 2053 } 2054 2055 /* 2056 * This function downloads the firmware to the card. 2057 * 2058 * Firmware is downloaded to the card in blocks. Every block download 2059 * is tested for CRC errors, and retried a number of times before 2060 * returning failure. 2061 */ 2062 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2063 struct mwifiex_fw_image *fw) 2064 { 2065 int ret; 2066 u8 *firmware = fw->fw_buf; 2067 u32 firmware_len = fw->fw_len; 2068 u32 offset = 0; 2069 struct sk_buff *skb; 2070 u32 txlen, tx_blocks = 0, tries, len, val; 2071 u32 block_retry_cnt = 0; 2072 struct pcie_service_card *card = adapter->card; 2073 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2074 2075 if (!firmware || !firmware_len) { 2076 mwifiex_dbg(adapter, ERROR, 2077 "No firmware image found! Terminating download\n"); 2078 return -1; 2079 } 2080 2081 mwifiex_dbg(adapter, INFO, 2082 "info: Downloading FW image (%d bytes)\n", 2083 firmware_len); 2084 2085 if (mwifiex_pcie_disable_host_int(adapter)) { 2086 mwifiex_dbg(adapter, ERROR, 2087 "%s: Disabling interrupts failed.\n", __func__); 2088 return -1; 2089 } 2090 2091 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2092 if (!skb) { 2093 ret = -ENOMEM; 2094 goto done; 2095 } 2096 2097 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2098 if (ret) { 2099 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2100 goto done; 2101 } 2102 2103 /* PCIE FLR case: extract wifi part from combo firmware*/ 2104 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2105 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2106 if (ret < 0) { 2107 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2108 goto done; 2109 } 2110 offset = ret; 2111 mwifiex_dbg(adapter, MSG, 2112 "info: dnld wifi firmware from %d bytes\n", offset); 2113 } 2114 2115 /* Perform firmware data transfer */ 2116 do { 2117 u32 ireg_intr = 0; 2118 2119 /* More data? */ 2120 if (offset >= firmware_len) 2121 break; 2122 2123 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2124 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2125 &len); 2126 if (ret) { 2127 mwifiex_dbg(adapter, FATAL, 2128 "Failed reading len from boot code\n"); 2129 goto done; 2130 } 2131 if (len) 2132 break; 2133 usleep_range(10, 20); 2134 } 2135 2136 if (!len) { 2137 break; 2138 } else if (len > MWIFIEX_UPLD_SIZE) { 2139 mwifiex_dbg(adapter, ERROR, 2140 "FW download failure @ %d, invalid length %d\n", 2141 offset, len); 2142 ret = -1; 2143 goto done; 2144 } 2145 2146 txlen = len; 2147 2148 if (len & BIT(0)) { 2149 block_retry_cnt++; 2150 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2151 mwifiex_dbg(adapter, ERROR, 2152 "FW download failure @ %d, over max\t" 2153 "retry count\n", offset); 2154 ret = -1; 2155 goto done; 2156 } 2157 mwifiex_dbg(adapter, ERROR, 2158 "FW CRC error indicated by the\t" 2159 "helper: len = 0x%04X, txlen = %d\n", 2160 len, txlen); 2161 len &= ~BIT(0); 2162 /* Setting this to 0 to resend from same offset */ 2163 txlen = 0; 2164 } else { 2165 block_retry_cnt = 0; 2166 /* Set blocksize to transfer - checking for 2167 last block */ 2168 if (firmware_len - offset < txlen) 2169 txlen = firmware_len - offset; 2170 2171 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2172 card->pcie.blksz_fw_dl; 2173 2174 /* Copy payload to buffer */ 2175 memmove(skb->data, &firmware[offset], txlen); 2176 } 2177 2178 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2179 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2180 2181 /* Send the boot command to device */ 2182 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2183 mwifiex_dbg(adapter, ERROR, 2184 "Failed to send firmware download command\n"); 2185 ret = -1; 2186 goto done; 2187 } 2188 2189 /* Wait for the command done interrupt */ 2190 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2191 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2192 &ireg_intr)) { 2193 mwifiex_dbg(adapter, ERROR, 2194 "%s: Failed to read\t" 2195 "interrupt status during fw dnld.\n", 2196 __func__); 2197 mwifiex_unmap_pci_memory(adapter, skb, 2198 PCI_DMA_TODEVICE); 2199 ret = -1; 2200 goto done; 2201 } 2202 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2203 break; 2204 usleep_range(10, 20); 2205 } 2206 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2207 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2208 __func__); 2209 mwifiex_unmap_pci_memory(adapter, skb, 2210 PCI_DMA_TODEVICE); 2211 ret = -1; 2212 goto done; 2213 } 2214 2215 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2216 2217 offset += txlen; 2218 } while (true); 2219 2220 mwifiex_dbg(adapter, MSG, 2221 "info: FW download over, size %d bytes\n", offset); 2222 2223 ret = 0; 2224 2225 done: 2226 dev_kfree_skb_any(skb); 2227 return ret; 2228 } 2229 2230 /* 2231 * This function checks the firmware status in card. 2232 */ 2233 static int 2234 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2235 { 2236 int ret = 0; 2237 u32 firmware_stat; 2238 struct pcie_service_card *card = adapter->card; 2239 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2240 u32 tries; 2241 2242 /* Mask spurios interrupts */ 2243 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2244 HOST_INTR_MASK)) { 2245 mwifiex_dbg(adapter, ERROR, 2246 "Write register failed\n"); 2247 return -1; 2248 } 2249 2250 mwifiex_dbg(adapter, INFO, 2251 "Setting driver ready signature\n"); 2252 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2253 FIRMWARE_READY_PCIE)) { 2254 mwifiex_dbg(adapter, ERROR, 2255 "Failed to write driver ready signature\n"); 2256 return -1; 2257 } 2258 2259 /* Wait for firmware initialization event */ 2260 for (tries = 0; tries < poll_num; tries++) { 2261 if (mwifiex_read_reg(adapter, reg->fw_status, 2262 &firmware_stat)) 2263 ret = -1; 2264 else 2265 ret = 0; 2266 2267 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2268 tries, ret, firmware_stat); 2269 2270 if (ret) 2271 continue; 2272 if (firmware_stat == FIRMWARE_READY_PCIE) { 2273 ret = 0; 2274 break; 2275 } else { 2276 msleep(100); 2277 ret = -1; 2278 } 2279 } 2280 2281 return ret; 2282 } 2283 2284 /* This function checks if WLAN is the winner. 2285 */ 2286 static int 2287 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2288 { 2289 u32 winner = 0; 2290 int ret = 0; 2291 struct pcie_service_card *card = adapter->card; 2292 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2293 2294 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2295 ret = -1; 2296 } else if (!winner) { 2297 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2298 adapter->winner = 1; 2299 } else { 2300 mwifiex_dbg(adapter, ERROR, 2301 "PCI-E is not the winner <%#x>", winner); 2302 } 2303 2304 return ret; 2305 } 2306 2307 /* 2308 * This function reads the interrupt status from card. 2309 */ 2310 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2311 int msg_id) 2312 { 2313 u32 pcie_ireg; 2314 unsigned long flags; 2315 struct pcie_service_card *card = adapter->card; 2316 2317 if (card->msi_enable) { 2318 spin_lock_irqsave(&adapter->int_lock, flags); 2319 adapter->int_status = 1; 2320 spin_unlock_irqrestore(&adapter->int_lock, flags); 2321 return; 2322 } 2323 2324 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2325 return; 2326 2327 if (card->msix_enable && msg_id >= 0) { 2328 pcie_ireg = BIT(msg_id); 2329 } else { 2330 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2331 &pcie_ireg)) { 2332 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2333 return; 2334 } 2335 2336 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2337 return; 2338 2339 2340 mwifiex_pcie_disable_host_int(adapter); 2341 2342 /* Clear the pending interrupts */ 2343 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2344 ~pcie_ireg)) { 2345 mwifiex_dbg(adapter, ERROR, 2346 "Write register failed\n"); 2347 return; 2348 } 2349 } 2350 2351 if (!adapter->pps_uapsd_mode && 2352 adapter->ps_state == PS_STATE_SLEEP && 2353 mwifiex_pcie_ok_to_access_hw(adapter)) { 2354 /* Potentially for PCIe we could get other 2355 * interrupts like shared. Don't change power 2356 * state until cookie is set 2357 */ 2358 adapter->ps_state = PS_STATE_AWAKE; 2359 adapter->pm_wakeup_fw_try = false; 2360 del_timer(&adapter->wakeup_timer); 2361 } 2362 2363 spin_lock_irqsave(&adapter->int_lock, flags); 2364 adapter->int_status |= pcie_ireg; 2365 spin_unlock_irqrestore(&adapter->int_lock, flags); 2366 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2367 } 2368 2369 /* 2370 * Interrupt handler for PCIe root port 2371 * 2372 * This function reads the interrupt status from firmware and assigns 2373 * the main process in workqueue which will handle the interrupt. 2374 */ 2375 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2376 { 2377 struct mwifiex_msix_context *ctx = context; 2378 struct pci_dev *pdev = ctx->dev; 2379 struct pcie_service_card *card; 2380 struct mwifiex_adapter *adapter; 2381 2382 card = pci_get_drvdata(pdev); 2383 2384 if (!card->adapter) { 2385 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2386 card ? card->adapter : NULL); 2387 goto exit; 2388 } 2389 adapter = card->adapter; 2390 2391 if (adapter->surprise_removed) 2392 goto exit; 2393 2394 if (card->msix_enable) 2395 mwifiex_interrupt_status(adapter, ctx->msg_id); 2396 else 2397 mwifiex_interrupt_status(adapter, -1); 2398 2399 mwifiex_queue_main_work(adapter); 2400 2401 exit: 2402 return IRQ_HANDLED; 2403 } 2404 2405 /* 2406 * This function checks the current interrupt status. 2407 * 2408 * The following interrupts are checked and handled by this function - 2409 * - Data sent 2410 * - Command sent 2411 * - Command received 2412 * - Packets received 2413 * - Events received 2414 * 2415 * In case of Rx packets received, the packets are uploaded from card to 2416 * host and processed accordingly. 2417 */ 2418 static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter) 2419 { 2420 int ret; 2421 u32 pcie_ireg = 0; 2422 unsigned long flags; 2423 struct pcie_service_card *card = adapter->card; 2424 2425 spin_lock_irqsave(&adapter->int_lock, flags); 2426 if (!card->msi_enable) { 2427 /* Clear out unused interrupts */ 2428 pcie_ireg = adapter->int_status; 2429 } 2430 adapter->int_status = 0; 2431 spin_unlock_irqrestore(&adapter->int_lock, flags); 2432 2433 if (card->msi_enable) { 2434 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2435 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2436 &pcie_ireg)) { 2437 mwifiex_dbg(adapter, ERROR, 2438 "Read register failed\n"); 2439 return -1; 2440 } 2441 2442 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2443 if (mwifiex_write_reg(adapter, 2444 PCIE_HOST_INT_STATUS, 2445 ~pcie_ireg)) { 2446 mwifiex_dbg(adapter, ERROR, 2447 "Write register failed\n"); 2448 return -1; 2449 } 2450 if (!adapter->pps_uapsd_mode && 2451 adapter->ps_state == PS_STATE_SLEEP) { 2452 adapter->ps_state = PS_STATE_AWAKE; 2453 adapter->pm_wakeup_fw_try = false; 2454 del_timer(&adapter->wakeup_timer); 2455 } 2456 } 2457 } 2458 } 2459 2460 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2461 pcie_ireg &= ~HOST_INTR_DNLD_DONE; 2462 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2463 ret = mwifiex_pcie_send_data_complete(adapter); 2464 if (ret) 2465 return ret; 2466 } 2467 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2468 pcie_ireg &= ~HOST_INTR_UPLD_RDY; 2469 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2470 ret = mwifiex_pcie_process_recv_data(adapter); 2471 if (ret) 2472 return ret; 2473 } 2474 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2475 pcie_ireg &= ~HOST_INTR_EVENT_RDY; 2476 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2477 ret = mwifiex_pcie_process_event_ready(adapter); 2478 if (ret) 2479 return ret; 2480 } 2481 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2482 pcie_ireg &= ~HOST_INTR_CMD_DONE; 2483 if (adapter->cmd_sent) { 2484 mwifiex_dbg(adapter, INTR, 2485 "info: CMD sent Interrupt\n"); 2486 adapter->cmd_sent = false; 2487 } 2488 /* Handle command response */ 2489 ret = mwifiex_pcie_process_cmd_complete(adapter); 2490 if (ret) 2491 return ret; 2492 } 2493 2494 mwifiex_dbg(adapter, INTR, 2495 "info: cmd_sent=%d data_sent=%d\n", 2496 adapter->cmd_sent, adapter->data_sent); 2497 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP) 2498 mwifiex_pcie_enable_host_int(adapter); 2499 2500 return 0; 2501 } 2502 2503 static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter) 2504 { 2505 int ret; 2506 u32 pcie_ireg; 2507 unsigned long flags; 2508 2509 spin_lock_irqsave(&adapter->int_lock, flags); 2510 /* Clear out unused interrupts */ 2511 pcie_ireg = adapter->int_status; 2512 adapter->int_status = 0; 2513 spin_unlock_irqrestore(&adapter->int_lock, flags); 2514 2515 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2516 mwifiex_dbg(adapter, INTR, 2517 "info: TX DNLD Done\n"); 2518 ret = mwifiex_pcie_send_data_complete(adapter); 2519 if (ret) 2520 return ret; 2521 } 2522 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2523 mwifiex_dbg(adapter, INTR, 2524 "info: Rx DATA\n"); 2525 ret = mwifiex_pcie_process_recv_data(adapter); 2526 if (ret) 2527 return ret; 2528 } 2529 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2530 mwifiex_dbg(adapter, INTR, 2531 "info: Rx EVENT\n"); 2532 ret = mwifiex_pcie_process_event_ready(adapter); 2533 if (ret) 2534 return ret; 2535 } 2536 2537 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2538 if (adapter->cmd_sent) { 2539 mwifiex_dbg(adapter, INTR, 2540 "info: CMD sent Interrupt\n"); 2541 adapter->cmd_sent = false; 2542 } 2543 /* Handle command response */ 2544 ret = mwifiex_pcie_process_cmd_complete(adapter); 2545 if (ret) 2546 return ret; 2547 } 2548 2549 mwifiex_dbg(adapter, INTR, 2550 "info: cmd_sent=%d data_sent=%d\n", 2551 adapter->cmd_sent, adapter->data_sent); 2552 2553 return 0; 2554 } 2555 2556 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2557 { 2558 struct pcie_service_card *card = adapter->card; 2559 2560 if (card->msix_enable) 2561 return mwifiex_process_msix_int(adapter); 2562 else 2563 return mwifiex_process_pcie_int(adapter); 2564 } 2565 2566 /* 2567 * This function downloads data from driver to card. 2568 * 2569 * Both commands and data packets are transferred to the card by this 2570 * function. 2571 * 2572 * This function adds the PCIE specific header to the front of the buffer 2573 * before transferring. The header contains the length of the packet and 2574 * the type. The firmware handles the packets based upon this set type. 2575 */ 2576 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2577 struct sk_buff *skb, 2578 struct mwifiex_tx_param *tx_param) 2579 { 2580 if (!skb) { 2581 mwifiex_dbg(adapter, ERROR, 2582 "Passed NULL skb to %s\n", __func__); 2583 return -1; 2584 } 2585 2586 if (type == MWIFIEX_TYPE_DATA) 2587 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2588 else if (type == MWIFIEX_TYPE_CMD) 2589 return mwifiex_pcie_send_cmd(adapter, skb); 2590 2591 return 0; 2592 } 2593 2594 /* Function to dump PCIE scratch registers in case of FW crash 2595 */ 2596 static int 2597 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2598 { 2599 char *p = drv_buf; 2600 char buf[256], *ptr; 2601 int i; 2602 u32 value; 2603 struct pcie_service_card *card = adapter->card; 2604 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2605 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2606 PCIE_SCRATCH_14_REG, 2607 PCIE_SCRATCH_15_REG}; 2608 2609 if (!p) 2610 return 0; 2611 2612 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2613 2614 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2615 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2616 return 0; 2617 } 2618 2619 ptr = buf; 2620 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2621 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2622 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2623 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2624 pcie_scratch_reg[i], value); 2625 } 2626 2627 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2628 p += sprintf(p, "%s\n", buf); 2629 2630 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2631 2632 return p - drv_buf; 2633 } 2634 2635 /* This function read/write firmware */ 2636 static enum rdwr_status 2637 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2638 { 2639 int ret, tries; 2640 u8 ctrl_data; 2641 u32 fw_status; 2642 struct pcie_service_card *card = adapter->card; 2643 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2644 2645 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2646 return RDWR_STATUS_FAILURE; 2647 2648 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2649 reg->fw_dump_host_ready); 2650 if (ret) { 2651 mwifiex_dbg(adapter, ERROR, 2652 "PCIE write err\n"); 2653 return RDWR_STATUS_FAILURE; 2654 } 2655 2656 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2657 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2658 if (ctrl_data == FW_DUMP_DONE) 2659 return RDWR_STATUS_SUCCESS; 2660 if (doneflag && ctrl_data == doneflag) 2661 return RDWR_STATUS_DONE; 2662 if (ctrl_data != reg->fw_dump_host_ready) { 2663 mwifiex_dbg(adapter, WARN, 2664 "The ctrl reg was changed, re-try again!\n"); 2665 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2666 reg->fw_dump_host_ready); 2667 if (ret) { 2668 mwifiex_dbg(adapter, ERROR, 2669 "PCIE write err\n"); 2670 return RDWR_STATUS_FAILURE; 2671 } 2672 } 2673 usleep_range(100, 200); 2674 } 2675 2676 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2677 return RDWR_STATUS_FAILURE; 2678 } 2679 2680 /* This function dump firmware memory to file */ 2681 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2682 { 2683 struct pcie_service_card *card = adapter->card; 2684 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2685 unsigned int reg, reg_start, reg_end; 2686 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2687 u8 idx, i, read_reg, doneflag = 0; 2688 enum rdwr_status stat; 2689 u32 memory_size; 2690 int ret; 2691 2692 if (!card->pcie.can_dump_fw) 2693 return; 2694 2695 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2696 struct memory_type_mapping *entry = 2697 &adapter->mem_type_mapping_tbl[idx]; 2698 2699 if (entry->mem_ptr) { 2700 vfree(entry->mem_ptr); 2701 entry->mem_ptr = NULL; 2702 } 2703 entry->mem_size = 0; 2704 } 2705 2706 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2707 2708 /* Read the number of the memories which will dump */ 2709 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2710 if (stat == RDWR_STATUS_FAILURE) 2711 return; 2712 2713 reg = creg->fw_dump_start; 2714 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2715 2716 /* W8997 chipset firmware dump will be restore in single region*/ 2717 if (fw_dump_num == 0) 2718 dump_num = 1; 2719 else 2720 dump_num = fw_dump_num; 2721 2722 /* Read the length of every memory which will dump */ 2723 for (idx = 0; idx < dump_num; idx++) { 2724 struct memory_type_mapping *entry = 2725 &adapter->mem_type_mapping_tbl[idx]; 2726 memory_size = 0; 2727 if (fw_dump_num != 0) { 2728 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2729 if (stat == RDWR_STATUS_FAILURE) 2730 return; 2731 2732 reg = creg->fw_dump_start; 2733 for (i = 0; i < 4; i++) { 2734 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2735 memory_size |= (read_reg << (i * 8)); 2736 reg++; 2737 } 2738 } else { 2739 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2740 } 2741 2742 if (memory_size == 0) { 2743 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2744 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2745 creg->fw_dump_read_done); 2746 if (ret) { 2747 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2748 return; 2749 } 2750 break; 2751 } 2752 2753 mwifiex_dbg(adapter, DUMP, 2754 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2755 entry->mem_ptr = vmalloc(memory_size + 1); 2756 entry->mem_size = memory_size; 2757 if (!entry->mem_ptr) { 2758 mwifiex_dbg(adapter, ERROR, 2759 "Vmalloc %s failed\n", entry->mem_name); 2760 return; 2761 } 2762 dbg_ptr = entry->mem_ptr; 2763 end_ptr = dbg_ptr + memory_size; 2764 2765 doneflag = entry->done_flag; 2766 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2767 entry->mem_name); 2768 2769 do { 2770 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2771 if (RDWR_STATUS_FAILURE == stat) 2772 return; 2773 2774 reg_start = creg->fw_dump_start; 2775 reg_end = creg->fw_dump_end; 2776 for (reg = reg_start; reg <= reg_end; reg++) { 2777 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2778 if (dbg_ptr < end_ptr) { 2779 dbg_ptr++; 2780 continue; 2781 } 2782 mwifiex_dbg(adapter, ERROR, 2783 "pre-allocated buf not enough\n"); 2784 tmp_ptr = 2785 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2786 if (!tmp_ptr) 2787 return; 2788 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2789 vfree(entry->mem_ptr); 2790 entry->mem_ptr = tmp_ptr; 2791 tmp_ptr = NULL; 2792 dbg_ptr = entry->mem_ptr + memory_size; 2793 memory_size += MWIFIEX_SIZE_4K; 2794 end_ptr = entry->mem_ptr + memory_size; 2795 } 2796 2797 if (stat != RDWR_STATUS_DONE) 2798 continue; 2799 2800 mwifiex_dbg(adapter, DUMP, 2801 "%s done: size=0x%tx\n", 2802 entry->mem_name, dbg_ptr - entry->mem_ptr); 2803 break; 2804 } while (true); 2805 } 2806 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2807 } 2808 2809 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2810 { 2811 int drv_info_size; 2812 void *drv_info; 2813 2814 drv_info_size = mwifiex_drv_info_dump(adapter, &drv_info); 2815 mwifiex_pcie_fw_dump(adapter); 2816 mwifiex_upload_device_dump(adapter, drv_info, drv_info_size); 2817 } 2818 2819 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) 2820 { 2821 struct pcie_service_card *card = adapter->card; 2822 2823 pci_reset_function(card->dev); 2824 } 2825 2826 static void mwifiex_pcie_work(struct work_struct *work) 2827 { 2828 struct pcie_service_card *card = 2829 container_of(work, struct pcie_service_card, work); 2830 2831 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2832 &card->work_flags)) 2833 mwifiex_pcie_device_dump_work(card->adapter); 2834 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2835 &card->work_flags)) 2836 mwifiex_pcie_card_reset_work(card->adapter); 2837 } 2838 2839 /* This function dumps FW information */ 2840 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2841 { 2842 struct pcie_service_card *card = adapter->card; 2843 2844 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2845 &card->work_flags)) 2846 schedule_work(&card->work); 2847 } 2848 2849 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter) 2850 { 2851 struct pcie_service_card *card = adapter->card; 2852 2853 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2854 schedule_work(&card->work); 2855 } 2856 2857 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter) 2858 { 2859 struct pcie_service_card *card = adapter->card; 2860 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2861 int ret; 2862 2863 card->cmdrsp_buf = NULL; 2864 ret = mwifiex_pcie_create_txbd_ring(adapter); 2865 if (ret) { 2866 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 2867 goto err_cre_txbd; 2868 } 2869 2870 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2871 if (ret) { 2872 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 2873 goto err_cre_rxbd; 2874 } 2875 2876 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2877 if (ret) { 2878 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 2879 goto err_cre_evtbd; 2880 } 2881 2882 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2883 if (ret) { 2884 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 2885 goto err_alloc_cmdbuf; 2886 } 2887 2888 if (reg->sleep_cookie) { 2889 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2890 if (ret) { 2891 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 2892 goto err_alloc_cookie; 2893 } 2894 } else { 2895 card->sleep_cookie_vbase = NULL; 2896 } 2897 2898 return 0; 2899 2900 err_alloc_cookie: 2901 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2902 err_alloc_cmdbuf: 2903 mwifiex_pcie_delete_evtbd_ring(adapter); 2904 err_cre_evtbd: 2905 mwifiex_pcie_delete_rxbd_ring(adapter); 2906 err_cre_rxbd: 2907 mwifiex_pcie_delete_txbd_ring(adapter); 2908 err_cre_txbd: 2909 return ret; 2910 } 2911 2912 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2913 { 2914 struct pcie_service_card *card = adapter->card; 2915 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2916 2917 if (reg->sleep_cookie) 2918 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2919 2920 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2921 mwifiex_pcie_delete_evtbd_ring(adapter); 2922 mwifiex_pcie_delete_rxbd_ring(adapter); 2923 mwifiex_pcie_delete_txbd_ring(adapter); 2924 card->cmdrsp_buf = NULL; 2925 } 2926 2927 /* 2928 * This function initializes the PCI-E host memory space, WCB rings, etc. 2929 */ 2930 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2931 { 2932 struct pcie_service_card *card = adapter->card; 2933 int ret; 2934 struct pci_dev *pdev = card->dev; 2935 2936 pci_set_drvdata(pdev, card); 2937 2938 ret = pci_enable_device(pdev); 2939 if (ret) 2940 goto err_enable_dev; 2941 2942 pci_set_master(pdev); 2943 2944 pr_notice("try set_consistent_dma_mask(32)\n"); 2945 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2946 if (ret) { 2947 pr_err("set_dma_mask(32) failed\n"); 2948 goto err_set_dma_mask; 2949 } 2950 2951 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2952 if (ret) { 2953 pr_err("set_consistent_dma_mask(64) failed\n"); 2954 goto err_set_dma_mask; 2955 } 2956 2957 ret = pci_request_region(pdev, 0, DRV_NAME); 2958 if (ret) { 2959 pr_err("req_reg(0) error\n"); 2960 goto err_req_region0; 2961 } 2962 card->pci_mmap = pci_iomap(pdev, 0, 0); 2963 if (!card->pci_mmap) { 2964 pr_err("iomap(0) error\n"); 2965 ret = -EIO; 2966 goto err_iomap0; 2967 } 2968 ret = pci_request_region(pdev, 2, DRV_NAME); 2969 if (ret) { 2970 pr_err("req_reg(2) error\n"); 2971 goto err_req_region2; 2972 } 2973 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2974 if (!card->pci_mmap1) { 2975 pr_err("iomap(2) error\n"); 2976 ret = -EIO; 2977 goto err_iomap2; 2978 } 2979 2980 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2981 card->pci_mmap, card->pci_mmap1); 2982 2983 ret = mwifiex_pcie_alloc_buffers(adapter); 2984 if (ret) 2985 goto err_alloc_buffers; 2986 2987 return 0; 2988 2989 err_alloc_buffers: 2990 pci_iounmap(pdev, card->pci_mmap1); 2991 err_iomap2: 2992 pci_release_region(pdev, 2); 2993 err_req_region2: 2994 pci_iounmap(pdev, card->pci_mmap); 2995 err_iomap0: 2996 pci_release_region(pdev, 0); 2997 err_req_region0: 2998 err_set_dma_mask: 2999 pci_disable_device(pdev); 3000 err_enable_dev: 3001 return ret; 3002 } 3003 3004 /* 3005 * This function cleans up the allocated card buffers. 3006 */ 3007 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 3008 { 3009 struct pcie_service_card *card = adapter->card; 3010 struct pci_dev *pdev = card->dev; 3011 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3012 int ret; 3013 u32 fw_status; 3014 3015 cancel_work_sync(&card->work); 3016 3017 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 3018 if (fw_status == FIRMWARE_READY_PCIE) { 3019 mwifiex_dbg(adapter, INFO, 3020 "Clearing driver ready signature\n"); 3021 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3022 mwifiex_dbg(adapter, ERROR, 3023 "Failed to write driver not-ready signature\n"); 3024 } 3025 3026 mwifiex_pcie_free_buffers(adapter); 3027 3028 if (pdev) { 3029 pci_iounmap(pdev, card->pci_mmap); 3030 pci_iounmap(pdev, card->pci_mmap1); 3031 pci_disable_device(pdev); 3032 pci_release_region(pdev, 2); 3033 pci_release_region(pdev, 0); 3034 } 3035 } 3036 3037 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3038 { 3039 int ret, i, j; 3040 struct pcie_service_card *card = adapter->card; 3041 struct pci_dev *pdev = card->dev; 3042 3043 if (card->pcie.reg->msix_support) { 3044 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3045 card->msix_entries[i].entry = i; 3046 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3047 MWIFIEX_NUM_MSIX_VECTORS); 3048 if (!ret) { 3049 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3050 card->msix_ctx[i].dev = pdev; 3051 card->msix_ctx[i].msg_id = i; 3052 3053 ret = request_irq(card->msix_entries[i].vector, 3054 mwifiex_pcie_interrupt, 0, 3055 "MWIFIEX_PCIE_MSIX", 3056 &card->msix_ctx[i]); 3057 if (ret) 3058 break; 3059 } 3060 3061 if (ret) { 3062 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3063 ret); 3064 for (j = 0; j < i; j++) 3065 free_irq(card->msix_entries[j].vector, 3066 &card->msix_ctx[i]); 3067 pci_disable_msix(pdev); 3068 } else { 3069 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3070 card->msix_enable = 1; 3071 return 0; 3072 } 3073 } 3074 } 3075 3076 if (pci_enable_msi(pdev) != 0) 3077 pci_disable_msi(pdev); 3078 else 3079 card->msi_enable = 1; 3080 3081 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3082 3083 card->share_irq_ctx.dev = pdev; 3084 card->share_irq_ctx.msg_id = -1; 3085 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3086 "MRVL_PCIE", &card->share_irq_ctx); 3087 if (ret) { 3088 pr_err("request_irq failed: ret=%d\n", ret); 3089 return -1; 3090 } 3091 3092 return 0; 3093 } 3094 3095 /* 3096 * This function gets the firmware name for downloading by revision id 3097 * 3098 * Read revision id register to get revision id 3099 */ 3100 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3101 { 3102 int revision_id = 0; 3103 int version, magic; 3104 struct pcie_service_card *card = adapter->card; 3105 3106 switch (card->dev->device) { 3107 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3108 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3109 break; 3110 case PCIE_DEVICE_ID_MARVELL_88W8897: 3111 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3112 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3113 revision_id &= 0xff00; 3114 switch (revision_id) { 3115 case PCIE8897_A0: 3116 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3117 break; 3118 case PCIE8897_B0: 3119 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3120 break; 3121 default: 3122 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3123 3124 break; 3125 } 3126 break; 3127 case PCIE_DEVICE_ID_MARVELL_88W8997: 3128 mwifiex_read_reg(adapter, 0x8, &revision_id); 3129 mwifiex_read_reg(adapter, 0x0cd0, &version); 3130 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3131 revision_id &= 0xff; 3132 version &= 0x7; 3133 magic &= 0xff; 3134 if (revision_id == PCIE8997_A1 && 3135 magic == CHIP_MAGIC_VALUE && 3136 version == CHIP_VER_PCIEUART) 3137 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3138 else 3139 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3140 break; 3141 default: 3142 break; 3143 } 3144 } 3145 3146 /* 3147 * This function registers the PCIE device. 3148 * 3149 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3150 */ 3151 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3152 { 3153 struct pcie_service_card *card = adapter->card; 3154 3155 /* save adapter pointer in card */ 3156 card->adapter = adapter; 3157 3158 if (mwifiex_pcie_request_irq(adapter)) 3159 return -1; 3160 3161 adapter->tx_buf_size = card->pcie.tx_buf_size; 3162 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3163 adapter->num_mem_types = card->pcie.num_mem_types; 3164 adapter->ext_scan = card->pcie.can_ext_scan; 3165 mwifiex_pcie_get_fw_name(adapter); 3166 3167 return 0; 3168 } 3169 3170 /* 3171 * This function unregisters the PCIE device. 3172 * 3173 * The PCIE IRQ is released, the function is disabled and driver 3174 * data is set to null. 3175 */ 3176 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3177 { 3178 struct pcie_service_card *card = adapter->card; 3179 struct pci_dev *pdev = card->dev; 3180 int i; 3181 3182 if (card->msix_enable) { 3183 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3184 synchronize_irq(card->msix_entries[i].vector); 3185 3186 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3187 free_irq(card->msix_entries[i].vector, 3188 &card->msix_ctx[i]); 3189 3190 card->msix_enable = 0; 3191 pci_disable_msix(pdev); 3192 } else { 3193 mwifiex_dbg(adapter, INFO, 3194 "%s(): calling free_irq()\n", __func__); 3195 free_irq(card->dev->irq, &card->share_irq_ctx); 3196 3197 if (card->msi_enable) 3198 pci_disable_msi(pdev); 3199 } 3200 card->adapter = NULL; 3201 } 3202 3203 /* 3204 * This function initializes the PCI-E host memory space, WCB rings, etc., 3205 * similar to mwifiex_init_pcie(), but without resetting PCI-E state. 3206 */ 3207 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3208 { 3209 struct pcie_service_card *card = adapter->card; 3210 int ret; 3211 struct pci_dev *pdev = card->dev; 3212 3213 /* tx_buf_size might be changed to 3584 by firmware during 3214 * data transfer, we should reset it to default size. 3215 */ 3216 adapter->tx_buf_size = card->pcie.tx_buf_size; 3217 3218 ret = mwifiex_pcie_alloc_buffers(adapter); 3219 if (!ret) 3220 return; 3221 3222 pci_iounmap(pdev, card->pci_mmap1); 3223 } 3224 3225 /* This function cleans up the PCI-E host memory space. */ 3226 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3227 { 3228 struct pcie_service_card *card = adapter->card; 3229 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3230 3231 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3232 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3233 3234 adapter->seq_num = 0; 3235 3236 mwifiex_pcie_free_buffers(adapter); 3237 } 3238 3239 static struct mwifiex_if_ops pcie_ops = { 3240 .init_if = mwifiex_init_pcie, 3241 .cleanup_if = mwifiex_cleanup_pcie, 3242 .check_fw_status = mwifiex_check_fw_status, 3243 .check_winner_status = mwifiex_check_winner_status, 3244 .prog_fw = mwifiex_prog_fw_w_helper, 3245 .register_dev = mwifiex_register_dev, 3246 .unregister_dev = mwifiex_unregister_dev, 3247 .enable_int = mwifiex_pcie_enable_host_int, 3248 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3249 .process_int_status = mwifiex_process_int_status, 3250 .host_to_card = mwifiex_pcie_host_to_card, 3251 .wakeup = mwifiex_pm_wakeup_card, 3252 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3253 3254 /* PCIE specific */ 3255 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3256 .event_complete = mwifiex_pcie_event_complete, 3257 .update_mp_end_port = NULL, 3258 .cleanup_mpa_buf = NULL, 3259 .init_fw_port = mwifiex_pcie_init_fw_port, 3260 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3261 .card_reset = mwifiex_pcie_card_reset, 3262 .reg_dump = mwifiex_pcie_reg_dump, 3263 .device_dump = mwifiex_pcie_device_dump, 3264 .down_dev = mwifiex_pcie_down_dev, 3265 .up_dev = mwifiex_pcie_up_dev, 3266 }; 3267 3268 module_pci_driver(mwifiex_pcie); 3269 3270 MODULE_AUTHOR("Marvell International Ltd."); 3271 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3272 MODULE_VERSION(PCIE_VERSION); 3273 MODULE_LICENSE("GPL v2"); 3274