1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 #ifndef P54PCI_H 3 #define P54PCI_H 4 #include <linux/interrupt.h> 5 6 /* 7 * Defines for PCI based mac80211 Prism54 driver 8 * 9 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> 10 * 11 * Based on the islsm (softmac prism54) driver, which is: 12 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. 13 */ 14 15 /* Device Interrupt register bits */ 16 #define ISL38XX_DEV_INT_RESET 0x0001 17 #define ISL38XX_DEV_INT_UPDATE 0x0002 18 #define ISL38XX_DEV_INT_WAKEUP 0x0008 19 #define ISL38XX_DEV_INT_SLEEP 0x0010 20 #define ISL38XX_DEV_INT_ABORT 0x0020 21 /* these two only used in USB */ 22 #define ISL38XX_DEV_INT_DATA 0x0040 23 #define ISL38XX_DEV_INT_MGMT 0x0080 24 25 #define ISL38XX_DEV_INT_PCIUART_CTS 0x4000 26 #define ISL38XX_DEV_INT_PCIUART_DR 0x8000 27 28 /* Interrupt Identification/Acknowledge/Enable register bits */ 29 #define ISL38XX_INT_IDENT_UPDATE 0x0002 30 #define ISL38XX_INT_IDENT_INIT 0x0004 31 #define ISL38XX_INT_IDENT_WAKEUP 0x0008 32 #define ISL38XX_INT_IDENT_SLEEP 0x0010 33 #define ISL38XX_INT_IDENT_PCIUART_CTS 0x4000 34 #define ISL38XX_INT_IDENT_PCIUART_DR 0x8000 35 36 /* Control/Status register bits */ 37 #define ISL38XX_CTRL_STAT_SLEEPMODE 0x00000200 38 #define ISL38XX_CTRL_STAT_CLKRUN 0x00800000 39 #define ISL38XX_CTRL_STAT_RESET 0x10000000 40 #define ISL38XX_CTRL_STAT_RAMBOOT 0x20000000 41 #define ISL38XX_CTRL_STAT_STARTHALTED 0x40000000 42 #define ISL38XX_CTRL_STAT_HOST_OVERRIDE 0x80000000 43 44 struct p54p_csr { 45 __le32 dev_int; 46 u8 unused_1[12]; 47 __le32 int_ident; 48 __le32 int_ack; 49 __le32 int_enable; 50 u8 unused_2[4]; 51 union { 52 __le32 ring_control_base; 53 __le32 gen_purp_com[2]; 54 }; 55 u8 unused_3[8]; 56 __le32 direct_mem_base; 57 u8 unused_4[44]; 58 __le32 dma_addr; 59 __le32 dma_len; 60 __le32 dma_ctrl; 61 u8 unused_5[12]; 62 __le32 ctrl_stat; 63 u8 unused_6[1924]; 64 u8 cardbus_cis[0x800]; 65 u8 direct_mem_win[0x1000]; 66 } __packed; 67 68 /* usb backend only needs the register defines above */ 69 #ifndef P54USB_H 70 struct p54p_desc { 71 __le32 host_addr; 72 __le32 device_addr; 73 __le16 len; 74 __le16 flags; 75 } __packed; 76 77 struct p54p_ring_control { 78 __le32 host_idx[4]; 79 __le32 device_idx[4]; 80 struct p54p_desc rx_data[8]; 81 struct p54p_desc tx_data[32]; 82 struct p54p_desc rx_mgmt[4]; 83 struct p54p_desc tx_mgmt[4]; 84 } __packed; 85 86 #define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r) 87 #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) 88 89 struct p54p_priv { 90 struct p54_common common; 91 struct pci_dev *pdev; 92 struct p54p_csr __iomem *map; 93 struct tasklet_struct tasklet; 94 const struct firmware *firmware; 95 spinlock_t lock; 96 struct p54p_ring_control *ring_control; 97 dma_addr_t ring_control_dma; 98 u32 rx_idx_data, tx_idx_data; 99 u32 rx_idx_mgmt, tx_idx_mgmt; 100 struct sk_buff *rx_buf_data[8]; 101 struct sk_buff *rx_buf_mgmt[4]; 102 struct sk_buff *tx_buf_data[32]; 103 struct sk_buff *tx_buf_mgmt[4]; 104 struct completion boot_comp; 105 struct completion fw_loaded; 106 }; 107 108 #endif /* P54USB_H */ 109 #endif /* P54PCI_H */ 110